diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 245665c9..4e47652d 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -58,17 +58,17 @@ jobs: run: echo "::set-output name=id::$(docker create ${{ env.IMAGE }})" - name: Extract files from container run: | - rm -rf targetdb + rm -rf targetdb msp430 docker cp ${{ steps.container.outputs.id }}:/opt/ti/ccs/ccs_base/common/targetdb . docker cp ${{ steps.container.outputs.id }}:/opt/ti/ccs/ccs_base/msp430 tmp - mkdir -p msp430/include - cp tmp/include/lnk_*.cmd msp430/include + mkdir -p msp430 + cp tmp/include/*.cmd msp430 rm -rf tmp - name: Remove temporary container run: docker rm ${{ steps.container.outputs.id }} - name: Commit changes run: | - git add targetdb + git add targetdb msp430 git commit -m "commit targetdb, version ${{ env.MAJOR_VER }}.${{ env.MINOR_VER }}.${{ env.PATCH_VER }}.${{ env.BUILD_VER }}" git push origin ${{ github.head_ref }} diff --git a/msp430/cc430f5123.cmd b/msp430/cc430f5123.cmd new file mode 100644 index 00000000..cfe1b0b4 --- /dev/null +++ b/msp430/cc430f5123.cmd @@ -0,0 +1,715 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* cc430f5123.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************ +* CC1101 Radio Interface +************************************************************/ +RF1AIFCTL0 = 0x0F00; +RF1AIFCTL0_L = 0x0F00; +RF1AIFCTL0_H = 0x0F01; +RF1AIFCTL1 = 0x0F02; +RF1AIFCTL1_L = 0x0F02; +RF1AIFCTL1_H = 0x0F03; +RF1AIFCTL2 = 0x0F04; +RF1AIFCTL2_L = 0x0F04; +RF1AIFCTL2_H = 0x0F05; +RF1AIFERR = 0x0F06; +RF1AIFERR_L = 0x0F06; +RF1AIFERR_H = 0x0F07; +RF1AIFERRV = 0x0F0C; +RF1AIFERRV_L = 0x0F0C; +RF1AIFERRV_H = 0x0F0D; +RF1AIFIV = 0x0F0E; +RF1AIFIV_L = 0x0F0E; +RF1AIFIV_H = 0x0F0F; +RF1AINSTRW = 0x0F10; +RF1AINSTRW_L = 0x0F10; +RF1AINSTRW_H = 0x0F11; +RF1AINSTR1W = 0x0F12; +RF1AINSTR1W_L = 0x0F12; +RF1AINSTR1W_H = 0x0F13; +RF1AINSTR2W = 0x0F14; +RF1AINSTR2W_L = 0x0F14; +RF1AINSTR2W_H = 0x0F15; +RF1ADINW = 0x0F16; +RF1ADINW_L = 0x0F16; +RF1ADINW_H = 0x0F17; +RF1ASTAT0W = 0x0F20; +RF1ASTAT0W_L = 0x0F20; +RF1ASTAT0W_H = 0x0F21; +RF1ASTAT1W = 0x0F22; +RF1ASTAT1W_L = 0x0F22; +RF1ASTAT1W_H = 0x0F23; +RF1ASTAT2W = 0x0F24; +RF1ASTAT2W_L = 0x0F24; +RF1ASTAT2W_H = 0x0F25; +RF1ADOUT0W = 0x0F28; +RF1ADOUT0W_L = 0x0F28; +RF1ADOUT0W_H = 0x0F29; +RF1ADOUT1W = 0x0F2A; +RF1ADOUT1W_L = 0x0F2A; +RF1ADOUT1W_H = 0x0F2B; +RF1ADOUT2W = 0x0F2C; +RF1ADOUT2W_L = 0x0F2C; +RF1ADOUT2W_H = 0x0F2D; +RF1AIN = 0x0F30; +RF1AIN_L = 0x0F30; +RF1AIN_H = 0x0F31; +RF1AIFG = 0x0F32; +RF1AIFG_L = 0x0F32; +RF1AIFG_H = 0x0F33; +RF1AIES = 0x0F34; +RF1AIES_L = 0x0F34; +RF1AIES_H = 0x0F35; +RF1AIE = 0x0F36; +RF1AIE_L = 0x0F36; +RF1AIE_H = 0x0F37; +RF1AIV = 0x0F38; +RF1AIV_L = 0x0F38; +RF1AIV_H = 0x0F39; +RF1ARXFIFO = 0x0F3C; +RF1ARXFIFO_L = 0x0F3C; +RF1ARXFIFO_H = 0x0F3D; +RF1ATXFIFO = 0x0F3E; +RF1ATXFIFO_L = 0x0F3E; +RF1ATXFIFO_H = 0x0F3F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock D +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* UNIFIED CLOCK SYSTEM FOR Radio Devices +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/cc430f5125.cmd b/msp430/cc430f5125.cmd new file mode 100644 index 00000000..7e5a6911 --- /dev/null +++ b/msp430/cc430f5125.cmd @@ -0,0 +1,715 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* cc430f5125.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************ +* CC1101 Radio Interface +************************************************************/ +RF1AIFCTL0 = 0x0F00; +RF1AIFCTL0_L = 0x0F00; +RF1AIFCTL0_H = 0x0F01; +RF1AIFCTL1 = 0x0F02; +RF1AIFCTL1_L = 0x0F02; +RF1AIFCTL1_H = 0x0F03; +RF1AIFCTL2 = 0x0F04; +RF1AIFCTL2_L = 0x0F04; +RF1AIFCTL2_H = 0x0F05; +RF1AIFERR = 0x0F06; +RF1AIFERR_L = 0x0F06; +RF1AIFERR_H = 0x0F07; +RF1AIFERRV = 0x0F0C; +RF1AIFERRV_L = 0x0F0C; +RF1AIFERRV_H = 0x0F0D; +RF1AIFIV = 0x0F0E; +RF1AIFIV_L = 0x0F0E; +RF1AIFIV_H = 0x0F0F; +RF1AINSTRW = 0x0F10; +RF1AINSTRW_L = 0x0F10; +RF1AINSTRW_H = 0x0F11; +RF1AINSTR1W = 0x0F12; +RF1AINSTR1W_L = 0x0F12; +RF1AINSTR1W_H = 0x0F13; +RF1AINSTR2W = 0x0F14; +RF1AINSTR2W_L = 0x0F14; +RF1AINSTR2W_H = 0x0F15; +RF1ADINW = 0x0F16; +RF1ADINW_L = 0x0F16; +RF1ADINW_H = 0x0F17; +RF1ASTAT0W = 0x0F20; +RF1ASTAT0W_L = 0x0F20; +RF1ASTAT0W_H = 0x0F21; +RF1ASTAT1W = 0x0F22; +RF1ASTAT1W_L = 0x0F22; +RF1ASTAT1W_H = 0x0F23; +RF1ASTAT2W = 0x0F24; +RF1ASTAT2W_L = 0x0F24; +RF1ASTAT2W_H = 0x0F25; +RF1ADOUT0W = 0x0F28; +RF1ADOUT0W_L = 0x0F28; +RF1ADOUT0W_H = 0x0F29; +RF1ADOUT1W = 0x0F2A; +RF1ADOUT1W_L = 0x0F2A; +RF1ADOUT1W_H = 0x0F2B; +RF1ADOUT2W = 0x0F2C; +RF1ADOUT2W_L = 0x0F2C; +RF1ADOUT2W_H = 0x0F2D; +RF1AIN = 0x0F30; +RF1AIN_L = 0x0F30; +RF1AIN_H = 0x0F31; +RF1AIFG = 0x0F32; +RF1AIFG_L = 0x0F32; +RF1AIFG_H = 0x0F33; +RF1AIES = 0x0F34; +RF1AIES_L = 0x0F34; +RF1AIES_H = 0x0F35; +RF1AIE = 0x0F36; +RF1AIE_L = 0x0F36; +RF1AIE_H = 0x0F37; +RF1AIV = 0x0F38; +RF1AIV_L = 0x0F38; +RF1AIV_H = 0x0F39; +RF1ARXFIFO = 0x0F3C; +RF1ARXFIFO_L = 0x0F3C; +RF1ARXFIFO_H = 0x0F3D; +RF1ATXFIFO = 0x0F3E; +RF1ATXFIFO_L = 0x0F3E; +RF1ATXFIFO_H = 0x0F3F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock D +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* UNIFIED CLOCK SYSTEM FOR Radio Devices +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/cc430f5133.cmd b/msp430/cc430f5133.cmd new file mode 100644 index 00000000..3913ae03 --- /dev/null +++ b/msp430/cc430f5133.cmd @@ -0,0 +1,756 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* cc430f5133.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************ +* CC1101 Radio Interface +************************************************************/ +RF1AIFCTL0 = 0x0F00; +RF1AIFCTL0_L = 0x0F00; +RF1AIFCTL0_H = 0x0F01; +RF1AIFCTL1 = 0x0F02; +RF1AIFCTL1_L = 0x0F02; +RF1AIFCTL1_H = 0x0F03; +RF1AIFCTL2 = 0x0F04; +RF1AIFCTL2_L = 0x0F04; +RF1AIFCTL2_H = 0x0F05; +RF1AIFERR = 0x0F06; +RF1AIFERR_L = 0x0F06; +RF1AIFERR_H = 0x0F07; +RF1AIFERRV = 0x0F0C; +RF1AIFERRV_L = 0x0F0C; +RF1AIFERRV_H = 0x0F0D; +RF1AIFIV = 0x0F0E; +RF1AIFIV_L = 0x0F0E; +RF1AIFIV_H = 0x0F0F; +RF1AINSTRW = 0x0F10; +RF1AINSTRW_L = 0x0F10; +RF1AINSTRW_H = 0x0F11; +RF1AINSTR1W = 0x0F12; +RF1AINSTR1W_L = 0x0F12; +RF1AINSTR1W_H = 0x0F13; +RF1AINSTR2W = 0x0F14; +RF1AINSTR2W_L = 0x0F14; +RF1AINSTR2W_H = 0x0F15; +RF1ADINW = 0x0F16; +RF1ADINW_L = 0x0F16; +RF1ADINW_H = 0x0F17; +RF1ASTAT0W = 0x0F20; +RF1ASTAT0W_L = 0x0F20; +RF1ASTAT0W_H = 0x0F21; +RF1ASTAT1W = 0x0F22; +RF1ASTAT1W_L = 0x0F22; +RF1ASTAT1W_H = 0x0F23; +RF1ASTAT2W = 0x0F24; +RF1ASTAT2W_L = 0x0F24; +RF1ASTAT2W_H = 0x0F25; +RF1ADOUT0W = 0x0F28; +RF1ADOUT0W_L = 0x0F28; +RF1ADOUT0W_H = 0x0F29; +RF1ADOUT1W = 0x0F2A; +RF1ADOUT1W_L = 0x0F2A; +RF1ADOUT1W_H = 0x0F2B; +RF1ADOUT2W = 0x0F2C; +RF1ADOUT2W_L = 0x0F2C; +RF1ADOUT2W_H = 0x0F2D; +RF1AIN = 0x0F30; +RF1AIN_L = 0x0F30; +RF1AIN_H = 0x0F31; +RF1AIFG = 0x0F32; +RF1AIFG_L = 0x0F32; +RF1AIFG_H = 0x0F33; +RF1AIES = 0x0F34; +RF1AIES_L = 0x0F34; +RF1AIES_H = 0x0F35; +RF1AIE = 0x0F36; +RF1AIE_L = 0x0F36; +RF1AIE_H = 0x0F37; +RF1AIV = 0x0F38; +RF1AIV_L = 0x0F38; +RF1AIV_H = 0x0F39; +RF1ARXFIFO = 0x0F3C; +RF1ARXFIFO_L = 0x0F3C; +RF1ARXFIFO_H = 0x0F3D; +RF1ATXFIFO = 0x0F3E; +RF1ATXFIFO_L = 0x0F3E; +RF1ATXFIFO_H = 0x0F3F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* UNIFIED CLOCK SYSTEM FOR Radio Devices +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/cc430f5135.cmd b/msp430/cc430f5135.cmd new file mode 100644 index 00000000..e80d872c --- /dev/null +++ b/msp430/cc430f5135.cmd @@ -0,0 +1,756 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* cc430f5135.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************ +* CC1101 Radio Interface +************************************************************/ +RF1AIFCTL0 = 0x0F00; +RF1AIFCTL0_L = 0x0F00; +RF1AIFCTL0_H = 0x0F01; +RF1AIFCTL1 = 0x0F02; +RF1AIFCTL1_L = 0x0F02; +RF1AIFCTL1_H = 0x0F03; +RF1AIFCTL2 = 0x0F04; +RF1AIFCTL2_L = 0x0F04; +RF1AIFCTL2_H = 0x0F05; +RF1AIFERR = 0x0F06; +RF1AIFERR_L = 0x0F06; +RF1AIFERR_H = 0x0F07; +RF1AIFERRV = 0x0F0C; +RF1AIFERRV_L = 0x0F0C; +RF1AIFERRV_H = 0x0F0D; +RF1AIFIV = 0x0F0E; +RF1AIFIV_L = 0x0F0E; +RF1AIFIV_H = 0x0F0F; +RF1AINSTRW = 0x0F10; +RF1AINSTRW_L = 0x0F10; +RF1AINSTRW_H = 0x0F11; +RF1AINSTR1W = 0x0F12; +RF1AINSTR1W_L = 0x0F12; +RF1AINSTR1W_H = 0x0F13; +RF1AINSTR2W = 0x0F14; +RF1AINSTR2W_L = 0x0F14; +RF1AINSTR2W_H = 0x0F15; +RF1ADINW = 0x0F16; +RF1ADINW_L = 0x0F16; +RF1ADINW_H = 0x0F17; +RF1ASTAT0W = 0x0F20; +RF1ASTAT0W_L = 0x0F20; +RF1ASTAT0W_H = 0x0F21; +RF1ASTAT1W = 0x0F22; +RF1ASTAT1W_L = 0x0F22; +RF1ASTAT1W_H = 0x0F23; +RF1ASTAT2W = 0x0F24; +RF1ASTAT2W_L = 0x0F24; +RF1ASTAT2W_H = 0x0F25; +RF1ADOUT0W = 0x0F28; +RF1ADOUT0W_L = 0x0F28; +RF1ADOUT0W_H = 0x0F29; +RF1ADOUT1W = 0x0F2A; +RF1ADOUT1W_L = 0x0F2A; +RF1ADOUT1W_H = 0x0F2B; +RF1ADOUT2W = 0x0F2C; +RF1ADOUT2W_L = 0x0F2C; +RF1ADOUT2W_H = 0x0F2D; +RF1AIN = 0x0F30; +RF1AIN_L = 0x0F30; +RF1AIN_H = 0x0F31; +RF1AIFG = 0x0F32; +RF1AIFG_L = 0x0F32; +RF1AIFG_H = 0x0F33; +RF1AIES = 0x0F34; +RF1AIES_L = 0x0F34; +RF1AIES_H = 0x0F35; +RF1AIE = 0x0F36; +RF1AIE_L = 0x0F36; +RF1AIE_H = 0x0F37; +RF1AIV = 0x0F38; +RF1AIV_L = 0x0F38; +RF1AIV_H = 0x0F39; +RF1ARXFIFO = 0x0F3C; +RF1ARXFIFO_L = 0x0F3C; +RF1ARXFIFO_H = 0x0F3D; +RF1ATXFIFO = 0x0F3E; +RF1ATXFIFO_L = 0x0F3E; +RF1ATXFIFO_H = 0x0F3F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* UNIFIED CLOCK SYSTEM FOR Radio Devices +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/cc430f5137.cmd b/msp430/cc430f5137.cmd new file mode 100644 index 00000000..12c1bd0c --- /dev/null +++ b/msp430/cc430f5137.cmd @@ -0,0 +1,756 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* cc430f5137.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************ +* CC1101 Radio Interface +************************************************************/ +RF1AIFCTL0 = 0x0F00; +RF1AIFCTL0_L = 0x0F00; +RF1AIFCTL0_H = 0x0F01; +RF1AIFCTL1 = 0x0F02; +RF1AIFCTL1_L = 0x0F02; +RF1AIFCTL1_H = 0x0F03; +RF1AIFCTL2 = 0x0F04; +RF1AIFCTL2_L = 0x0F04; +RF1AIFCTL2_H = 0x0F05; +RF1AIFERR = 0x0F06; +RF1AIFERR_L = 0x0F06; +RF1AIFERR_H = 0x0F07; +RF1AIFERRV = 0x0F0C; +RF1AIFERRV_L = 0x0F0C; +RF1AIFERRV_H = 0x0F0D; +RF1AIFIV = 0x0F0E; +RF1AIFIV_L = 0x0F0E; +RF1AIFIV_H = 0x0F0F; +RF1AINSTRW = 0x0F10; +RF1AINSTRW_L = 0x0F10; +RF1AINSTRW_H = 0x0F11; +RF1AINSTR1W = 0x0F12; +RF1AINSTR1W_L = 0x0F12; +RF1AINSTR1W_H = 0x0F13; +RF1AINSTR2W = 0x0F14; +RF1AINSTR2W_L = 0x0F14; +RF1AINSTR2W_H = 0x0F15; +RF1ADINW = 0x0F16; +RF1ADINW_L = 0x0F16; +RF1ADINW_H = 0x0F17; +RF1ASTAT0W = 0x0F20; +RF1ASTAT0W_L = 0x0F20; +RF1ASTAT0W_H = 0x0F21; +RF1ASTAT1W = 0x0F22; +RF1ASTAT1W_L = 0x0F22; +RF1ASTAT1W_H = 0x0F23; +RF1ASTAT2W = 0x0F24; +RF1ASTAT2W_L = 0x0F24; +RF1ASTAT2W_H = 0x0F25; +RF1ADOUT0W = 0x0F28; +RF1ADOUT0W_L = 0x0F28; +RF1ADOUT0W_H = 0x0F29; +RF1ADOUT1W = 0x0F2A; +RF1ADOUT1W_L = 0x0F2A; +RF1ADOUT1W_H = 0x0F2B; +RF1ADOUT2W = 0x0F2C; +RF1ADOUT2W_L = 0x0F2C; +RF1ADOUT2W_H = 0x0F2D; +RF1AIN = 0x0F30; +RF1AIN_L = 0x0F30; +RF1AIN_H = 0x0F31; +RF1AIFG = 0x0F32; +RF1AIFG_L = 0x0F32; +RF1AIFG_H = 0x0F33; +RF1AIES = 0x0F34; +RF1AIES_L = 0x0F34; +RF1AIES_H = 0x0F35; +RF1AIE = 0x0F36; +RF1AIE_L = 0x0F36; +RF1AIE_H = 0x0F37; +RF1AIV = 0x0F38; +RF1AIV_L = 0x0F38; +RF1AIV_H = 0x0F39; +RF1ARXFIFO = 0x0F3C; +RF1ARXFIFO_L = 0x0F3C; +RF1ARXFIFO_H = 0x0F3D; +RF1ATXFIFO = 0x0F3E; +RF1ATXFIFO_L = 0x0F3E; +RF1ATXFIFO_H = 0x0F3F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* UNIFIED CLOCK SYSTEM FOR Radio Devices +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/cc430f5143.cmd b/msp430/cc430f5143.cmd new file mode 100644 index 00000000..e3e7b013 --- /dev/null +++ b/msp430/cc430f5143.cmd @@ -0,0 +1,715 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* cc430f5143.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************ +* CC1101 Radio Interface +************************************************************/ +RF1AIFCTL0 = 0x0F00; +RF1AIFCTL0_L = 0x0F00; +RF1AIFCTL0_H = 0x0F01; +RF1AIFCTL1 = 0x0F02; +RF1AIFCTL1_L = 0x0F02; +RF1AIFCTL1_H = 0x0F03; +RF1AIFCTL2 = 0x0F04; +RF1AIFCTL2_L = 0x0F04; +RF1AIFCTL2_H = 0x0F05; +RF1AIFERR = 0x0F06; +RF1AIFERR_L = 0x0F06; +RF1AIFERR_H = 0x0F07; +RF1AIFERRV = 0x0F0C; +RF1AIFERRV_L = 0x0F0C; +RF1AIFERRV_H = 0x0F0D; +RF1AIFIV = 0x0F0E; +RF1AIFIV_L = 0x0F0E; +RF1AIFIV_H = 0x0F0F; +RF1AINSTRW = 0x0F10; +RF1AINSTRW_L = 0x0F10; +RF1AINSTRW_H = 0x0F11; +RF1AINSTR1W = 0x0F12; +RF1AINSTR1W_L = 0x0F12; +RF1AINSTR1W_H = 0x0F13; +RF1AINSTR2W = 0x0F14; +RF1AINSTR2W_L = 0x0F14; +RF1AINSTR2W_H = 0x0F15; +RF1ADINW = 0x0F16; +RF1ADINW_L = 0x0F16; +RF1ADINW_H = 0x0F17; +RF1ASTAT0W = 0x0F20; +RF1ASTAT0W_L = 0x0F20; +RF1ASTAT0W_H = 0x0F21; +RF1ASTAT1W = 0x0F22; +RF1ASTAT1W_L = 0x0F22; +RF1ASTAT1W_H = 0x0F23; +RF1ASTAT2W = 0x0F24; +RF1ASTAT2W_L = 0x0F24; +RF1ASTAT2W_H = 0x0F25; +RF1ADOUT0W = 0x0F28; +RF1ADOUT0W_L = 0x0F28; +RF1ADOUT0W_H = 0x0F29; +RF1ADOUT1W = 0x0F2A; +RF1ADOUT1W_L = 0x0F2A; +RF1ADOUT1W_H = 0x0F2B; +RF1ADOUT2W = 0x0F2C; +RF1ADOUT2W_L = 0x0F2C; +RF1ADOUT2W_H = 0x0F2D; +RF1AIN = 0x0F30; +RF1AIN_L = 0x0F30; +RF1AIN_H = 0x0F31; +RF1AIFG = 0x0F32; +RF1AIFG_L = 0x0F32; +RF1AIFG_H = 0x0F33; +RF1AIES = 0x0F34; +RF1AIES_L = 0x0F34; +RF1AIES_H = 0x0F35; +RF1AIE = 0x0F36; +RF1AIE_L = 0x0F36; +RF1AIE_H = 0x0F37; +RF1AIV = 0x0F38; +RF1AIV_L = 0x0F38; +RF1AIV_H = 0x0F39; +RF1ARXFIFO = 0x0F3C; +RF1ARXFIFO_L = 0x0F3C; +RF1ARXFIFO_H = 0x0F3D; +RF1ATXFIFO = 0x0F3E; +RF1ATXFIFO_L = 0x0F3E; +RF1ATXFIFO_H = 0x0F3F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock D +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* UNIFIED CLOCK SYSTEM FOR Radio Devices +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/cc430f5145.cmd b/msp430/cc430f5145.cmd new file mode 100644 index 00000000..1b4bb2f7 --- /dev/null +++ b/msp430/cc430f5145.cmd @@ -0,0 +1,715 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* cc430f5145.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************ +* CC1101 Radio Interface +************************************************************/ +RF1AIFCTL0 = 0x0F00; +RF1AIFCTL0_L = 0x0F00; +RF1AIFCTL0_H = 0x0F01; +RF1AIFCTL1 = 0x0F02; +RF1AIFCTL1_L = 0x0F02; +RF1AIFCTL1_H = 0x0F03; +RF1AIFCTL2 = 0x0F04; +RF1AIFCTL2_L = 0x0F04; +RF1AIFCTL2_H = 0x0F05; +RF1AIFERR = 0x0F06; +RF1AIFERR_L = 0x0F06; +RF1AIFERR_H = 0x0F07; +RF1AIFERRV = 0x0F0C; +RF1AIFERRV_L = 0x0F0C; +RF1AIFERRV_H = 0x0F0D; +RF1AIFIV = 0x0F0E; +RF1AIFIV_L = 0x0F0E; +RF1AIFIV_H = 0x0F0F; +RF1AINSTRW = 0x0F10; +RF1AINSTRW_L = 0x0F10; +RF1AINSTRW_H = 0x0F11; +RF1AINSTR1W = 0x0F12; +RF1AINSTR1W_L = 0x0F12; +RF1AINSTR1W_H = 0x0F13; +RF1AINSTR2W = 0x0F14; +RF1AINSTR2W_L = 0x0F14; +RF1AINSTR2W_H = 0x0F15; +RF1ADINW = 0x0F16; +RF1ADINW_L = 0x0F16; +RF1ADINW_H = 0x0F17; +RF1ASTAT0W = 0x0F20; +RF1ASTAT0W_L = 0x0F20; +RF1ASTAT0W_H = 0x0F21; +RF1ASTAT1W = 0x0F22; +RF1ASTAT1W_L = 0x0F22; +RF1ASTAT1W_H = 0x0F23; +RF1ASTAT2W = 0x0F24; +RF1ASTAT2W_L = 0x0F24; +RF1ASTAT2W_H = 0x0F25; +RF1ADOUT0W = 0x0F28; +RF1ADOUT0W_L = 0x0F28; +RF1ADOUT0W_H = 0x0F29; +RF1ADOUT1W = 0x0F2A; +RF1ADOUT1W_L = 0x0F2A; +RF1ADOUT1W_H = 0x0F2B; +RF1ADOUT2W = 0x0F2C; +RF1ADOUT2W_L = 0x0F2C; +RF1ADOUT2W_H = 0x0F2D; +RF1AIN = 0x0F30; +RF1AIN_L = 0x0F30; +RF1AIN_H = 0x0F31; +RF1AIFG = 0x0F32; +RF1AIFG_L = 0x0F32; +RF1AIFG_H = 0x0F33; +RF1AIES = 0x0F34; +RF1AIES_L = 0x0F34; +RF1AIES_H = 0x0F35; +RF1AIE = 0x0F36; +RF1AIE_L = 0x0F36; +RF1AIE_H = 0x0F37; +RF1AIV = 0x0F38; +RF1AIV_L = 0x0F38; +RF1AIV_H = 0x0F39; +RF1ARXFIFO = 0x0F3C; +RF1ARXFIFO_L = 0x0F3C; +RF1ARXFIFO_H = 0x0F3D; +RF1ATXFIFO = 0x0F3E; +RF1ATXFIFO_L = 0x0F3E; +RF1ATXFIFO_H = 0x0F3F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock D +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* UNIFIED CLOCK SYSTEM FOR Radio Devices +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/cc430f5147.cmd b/msp430/cc430f5147.cmd new file mode 100644 index 00000000..94a93480 --- /dev/null +++ b/msp430/cc430f5147.cmd @@ -0,0 +1,715 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* cc430f5147.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************ +* CC1101 Radio Interface +************************************************************/ +RF1AIFCTL0 = 0x0F00; +RF1AIFCTL0_L = 0x0F00; +RF1AIFCTL0_H = 0x0F01; +RF1AIFCTL1 = 0x0F02; +RF1AIFCTL1_L = 0x0F02; +RF1AIFCTL1_H = 0x0F03; +RF1AIFCTL2 = 0x0F04; +RF1AIFCTL2_L = 0x0F04; +RF1AIFCTL2_H = 0x0F05; +RF1AIFERR = 0x0F06; +RF1AIFERR_L = 0x0F06; +RF1AIFERR_H = 0x0F07; +RF1AIFERRV = 0x0F0C; +RF1AIFERRV_L = 0x0F0C; +RF1AIFERRV_H = 0x0F0D; +RF1AIFIV = 0x0F0E; +RF1AIFIV_L = 0x0F0E; +RF1AIFIV_H = 0x0F0F; +RF1AINSTRW = 0x0F10; +RF1AINSTRW_L = 0x0F10; +RF1AINSTRW_H = 0x0F11; +RF1AINSTR1W = 0x0F12; +RF1AINSTR1W_L = 0x0F12; +RF1AINSTR1W_H = 0x0F13; +RF1AINSTR2W = 0x0F14; +RF1AINSTR2W_L = 0x0F14; +RF1AINSTR2W_H = 0x0F15; +RF1ADINW = 0x0F16; +RF1ADINW_L = 0x0F16; +RF1ADINW_H = 0x0F17; +RF1ASTAT0W = 0x0F20; +RF1ASTAT0W_L = 0x0F20; +RF1ASTAT0W_H = 0x0F21; +RF1ASTAT1W = 0x0F22; +RF1ASTAT1W_L = 0x0F22; +RF1ASTAT1W_H = 0x0F23; +RF1ASTAT2W = 0x0F24; +RF1ASTAT2W_L = 0x0F24; +RF1ASTAT2W_H = 0x0F25; +RF1ADOUT0W = 0x0F28; +RF1ADOUT0W_L = 0x0F28; +RF1ADOUT0W_H = 0x0F29; +RF1ADOUT1W = 0x0F2A; +RF1ADOUT1W_L = 0x0F2A; +RF1ADOUT1W_H = 0x0F2B; +RF1ADOUT2W = 0x0F2C; +RF1ADOUT2W_L = 0x0F2C; +RF1ADOUT2W_H = 0x0F2D; +RF1AIN = 0x0F30; +RF1AIN_L = 0x0F30; +RF1AIN_H = 0x0F31; +RF1AIFG = 0x0F32; +RF1AIFG_L = 0x0F32; +RF1AIFG_H = 0x0F33; +RF1AIES = 0x0F34; +RF1AIES_L = 0x0F34; +RF1AIES_H = 0x0F35; +RF1AIE = 0x0F36; +RF1AIE_L = 0x0F36; +RF1AIE_H = 0x0F37; +RF1AIV = 0x0F38; +RF1AIV_L = 0x0F38; +RF1AIV_H = 0x0F39; +RF1ARXFIFO = 0x0F3C; +RF1ARXFIFO_L = 0x0F3C; +RF1ARXFIFO_H = 0x0F3D; +RF1ATXFIFO = 0x0F3E; +RF1ATXFIFO_L = 0x0F3E; +RF1ATXFIFO_H = 0x0F3F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock D +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* UNIFIED CLOCK SYSTEM FOR Radio Devices +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/cc430f6125.cmd b/msp430/cc430f6125.cmd new file mode 100644 index 00000000..fc7dc876 --- /dev/null +++ b/msp430/cc430f6125.cmd @@ -0,0 +1,753 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* cc430f6125.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************ +* CC1101 Radio Interface +************************************************************/ +RF1AIFCTL0 = 0x0F00; +RF1AIFCTL0_L = 0x0F00; +RF1AIFCTL0_H = 0x0F01; +RF1AIFCTL1 = 0x0F02; +RF1AIFCTL1_L = 0x0F02; +RF1AIFCTL1_H = 0x0F03; +RF1AIFCTL2 = 0x0F04; +RF1AIFCTL2_L = 0x0F04; +RF1AIFCTL2_H = 0x0F05; +RF1AIFERR = 0x0F06; +RF1AIFERR_L = 0x0F06; +RF1AIFERR_H = 0x0F07; +RF1AIFERRV = 0x0F0C; +RF1AIFERRV_L = 0x0F0C; +RF1AIFERRV_H = 0x0F0D; +RF1AIFIV = 0x0F0E; +RF1AIFIV_L = 0x0F0E; +RF1AIFIV_H = 0x0F0F; +RF1AINSTRW = 0x0F10; +RF1AINSTRW_L = 0x0F10; +RF1AINSTRW_H = 0x0F11; +RF1AINSTR1W = 0x0F12; +RF1AINSTR1W_L = 0x0F12; +RF1AINSTR1W_H = 0x0F13; +RF1AINSTR2W = 0x0F14; +RF1AINSTR2W_L = 0x0F14; +RF1AINSTR2W_H = 0x0F15; +RF1ADINW = 0x0F16; +RF1ADINW_L = 0x0F16; +RF1ADINW_H = 0x0F17; +RF1ASTAT0W = 0x0F20; +RF1ASTAT0W_L = 0x0F20; +RF1ASTAT0W_H = 0x0F21; +RF1ASTAT1W = 0x0F22; +RF1ASTAT1W_L = 0x0F22; +RF1ASTAT1W_H = 0x0F23; +RF1ASTAT2W = 0x0F24; +RF1ASTAT2W_L = 0x0F24; +RF1ASTAT2W_H = 0x0F25; +RF1ADOUT0W = 0x0F28; +RF1ADOUT0W_L = 0x0F28; +RF1ADOUT0W_H = 0x0F29; +RF1ADOUT1W = 0x0F2A; +RF1ADOUT1W_L = 0x0F2A; +RF1ADOUT1W_H = 0x0F2B; +RF1ADOUT2W = 0x0F2C; +RF1ADOUT2W_L = 0x0F2C; +RF1ADOUT2W_H = 0x0F2D; +RF1AIN = 0x0F30; +RF1AIN_L = 0x0F30; +RF1AIN_H = 0x0F31; +RF1AIFG = 0x0F32; +RF1AIFG_L = 0x0F32; +RF1AIFG_H = 0x0F33; +RF1AIES = 0x0F34; +RF1AIES_L = 0x0F34; +RF1AIES_H = 0x0F35; +RF1AIE = 0x0F36; +RF1AIE_L = 0x0F36; +RF1AIE_H = 0x0F37; +RF1AIV = 0x0F38; +RF1AIV_L = 0x0F38; +RF1AIV_H = 0x0F39; +RF1ARXFIFO = 0x0F3C; +RF1ARXFIFO_L = 0x0F3C; +RF1ARXFIFO_H = 0x0F3D; +RF1ATXFIFO = 0x0F3E; +RF1ATXFIFO_L = 0x0F3E; +RF1ATXFIFO_H = 0x0F3F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* UNIFIED CLOCK SYSTEM FOR Radio Devices +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/cc430f6126.cmd b/msp430/cc430f6126.cmd new file mode 100644 index 00000000..1a987e7b --- /dev/null +++ b/msp430/cc430f6126.cmd @@ -0,0 +1,753 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* cc430f6126.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************ +* CC1101 Radio Interface +************************************************************/ +RF1AIFCTL0 = 0x0F00; +RF1AIFCTL0_L = 0x0F00; +RF1AIFCTL0_H = 0x0F01; +RF1AIFCTL1 = 0x0F02; +RF1AIFCTL1_L = 0x0F02; +RF1AIFCTL1_H = 0x0F03; +RF1AIFCTL2 = 0x0F04; +RF1AIFCTL2_L = 0x0F04; +RF1AIFCTL2_H = 0x0F05; +RF1AIFERR = 0x0F06; +RF1AIFERR_L = 0x0F06; +RF1AIFERR_H = 0x0F07; +RF1AIFERRV = 0x0F0C; +RF1AIFERRV_L = 0x0F0C; +RF1AIFERRV_H = 0x0F0D; +RF1AIFIV = 0x0F0E; +RF1AIFIV_L = 0x0F0E; +RF1AIFIV_H = 0x0F0F; +RF1AINSTRW = 0x0F10; +RF1AINSTRW_L = 0x0F10; +RF1AINSTRW_H = 0x0F11; +RF1AINSTR1W = 0x0F12; +RF1AINSTR1W_L = 0x0F12; +RF1AINSTR1W_H = 0x0F13; +RF1AINSTR2W = 0x0F14; +RF1AINSTR2W_L = 0x0F14; +RF1AINSTR2W_H = 0x0F15; +RF1ADINW = 0x0F16; +RF1ADINW_L = 0x0F16; +RF1ADINW_H = 0x0F17; +RF1ASTAT0W = 0x0F20; +RF1ASTAT0W_L = 0x0F20; +RF1ASTAT0W_H = 0x0F21; +RF1ASTAT1W = 0x0F22; +RF1ASTAT1W_L = 0x0F22; +RF1ASTAT1W_H = 0x0F23; +RF1ASTAT2W = 0x0F24; +RF1ASTAT2W_L = 0x0F24; +RF1ASTAT2W_H = 0x0F25; +RF1ADOUT0W = 0x0F28; +RF1ADOUT0W_L = 0x0F28; +RF1ADOUT0W_H = 0x0F29; +RF1ADOUT1W = 0x0F2A; +RF1ADOUT1W_L = 0x0F2A; +RF1ADOUT1W_H = 0x0F2B; +RF1ADOUT2W = 0x0F2C; +RF1ADOUT2W_L = 0x0F2C; +RF1ADOUT2W_H = 0x0F2D; +RF1AIN = 0x0F30; +RF1AIN_L = 0x0F30; +RF1AIN_H = 0x0F31; +RF1AIFG = 0x0F32; +RF1AIFG_L = 0x0F32; +RF1AIFG_H = 0x0F33; +RF1AIES = 0x0F34; +RF1AIES_L = 0x0F34; +RF1AIES_H = 0x0F35; +RF1AIE = 0x0F36; +RF1AIE_L = 0x0F36; +RF1AIE_H = 0x0F37; +RF1AIV = 0x0F38; +RF1AIV_L = 0x0F38; +RF1AIV_H = 0x0F39; +RF1ARXFIFO = 0x0F3C; +RF1ARXFIFO_L = 0x0F3C; +RF1ARXFIFO_H = 0x0F3D; +RF1ATXFIFO = 0x0F3E; +RF1ATXFIFO_L = 0x0F3E; +RF1ATXFIFO_H = 0x0F3F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* UNIFIED CLOCK SYSTEM FOR Radio Devices +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/cc430f6127.cmd b/msp430/cc430f6127.cmd new file mode 100644 index 00000000..868deaac --- /dev/null +++ b/msp430/cc430f6127.cmd @@ -0,0 +1,753 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* cc430f6127.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************ +* CC1101 Radio Interface +************************************************************/ +RF1AIFCTL0 = 0x0F00; +RF1AIFCTL0_L = 0x0F00; +RF1AIFCTL0_H = 0x0F01; +RF1AIFCTL1 = 0x0F02; +RF1AIFCTL1_L = 0x0F02; +RF1AIFCTL1_H = 0x0F03; +RF1AIFCTL2 = 0x0F04; +RF1AIFCTL2_L = 0x0F04; +RF1AIFCTL2_H = 0x0F05; +RF1AIFERR = 0x0F06; +RF1AIFERR_L = 0x0F06; +RF1AIFERR_H = 0x0F07; +RF1AIFERRV = 0x0F0C; +RF1AIFERRV_L = 0x0F0C; +RF1AIFERRV_H = 0x0F0D; +RF1AIFIV = 0x0F0E; +RF1AIFIV_L = 0x0F0E; +RF1AIFIV_H = 0x0F0F; +RF1AINSTRW = 0x0F10; +RF1AINSTRW_L = 0x0F10; +RF1AINSTRW_H = 0x0F11; +RF1AINSTR1W = 0x0F12; +RF1AINSTR1W_L = 0x0F12; +RF1AINSTR1W_H = 0x0F13; +RF1AINSTR2W = 0x0F14; +RF1AINSTR2W_L = 0x0F14; +RF1AINSTR2W_H = 0x0F15; +RF1ADINW = 0x0F16; +RF1ADINW_L = 0x0F16; +RF1ADINW_H = 0x0F17; +RF1ASTAT0W = 0x0F20; +RF1ASTAT0W_L = 0x0F20; +RF1ASTAT0W_H = 0x0F21; +RF1ASTAT1W = 0x0F22; +RF1ASTAT1W_L = 0x0F22; +RF1ASTAT1W_H = 0x0F23; +RF1ASTAT2W = 0x0F24; +RF1ASTAT2W_L = 0x0F24; +RF1ASTAT2W_H = 0x0F25; +RF1ADOUT0W = 0x0F28; +RF1ADOUT0W_L = 0x0F28; +RF1ADOUT0W_H = 0x0F29; +RF1ADOUT1W = 0x0F2A; +RF1ADOUT1W_L = 0x0F2A; +RF1ADOUT1W_H = 0x0F2B; +RF1ADOUT2W = 0x0F2C; +RF1ADOUT2W_L = 0x0F2C; +RF1ADOUT2W_H = 0x0F2D; +RF1AIN = 0x0F30; +RF1AIN_L = 0x0F30; +RF1AIN_H = 0x0F31; +RF1AIFG = 0x0F32; +RF1AIFG_L = 0x0F32; +RF1AIFG_H = 0x0F33; +RF1AIES = 0x0F34; +RF1AIES_L = 0x0F34; +RF1AIES_H = 0x0F35; +RF1AIE = 0x0F36; +RF1AIE_L = 0x0F36; +RF1AIE_H = 0x0F37; +RF1AIV = 0x0F38; +RF1AIV_L = 0x0F38; +RF1AIV_H = 0x0F39; +RF1ARXFIFO = 0x0F3C; +RF1ARXFIFO_L = 0x0F3C; +RF1ARXFIFO_H = 0x0F3D; +RF1ATXFIFO = 0x0F3E; +RF1ATXFIFO_L = 0x0F3E; +RF1ATXFIFO_H = 0x0F3F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* UNIFIED CLOCK SYSTEM FOR Radio Devices +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/cc430f6135.cmd b/msp430/cc430f6135.cmd new file mode 100644 index 00000000..f588dec9 --- /dev/null +++ b/msp430/cc430f6135.cmd @@ -0,0 +1,838 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* cc430f6135.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************ +* CC1101 Radio Interface +************************************************************/ +RF1AIFCTL0 = 0x0F00; +RF1AIFCTL0_L = 0x0F00; +RF1AIFCTL0_H = 0x0F01; +RF1AIFCTL1 = 0x0F02; +RF1AIFCTL1_L = 0x0F02; +RF1AIFCTL1_H = 0x0F03; +RF1AIFCTL2 = 0x0F04; +RF1AIFCTL2_L = 0x0F04; +RF1AIFCTL2_H = 0x0F05; +RF1AIFERR = 0x0F06; +RF1AIFERR_L = 0x0F06; +RF1AIFERR_H = 0x0F07; +RF1AIFERRV = 0x0F0C; +RF1AIFERRV_L = 0x0F0C; +RF1AIFERRV_H = 0x0F0D; +RF1AIFIV = 0x0F0E; +RF1AIFIV_L = 0x0F0E; +RF1AIFIV_H = 0x0F0F; +RF1AINSTRW = 0x0F10; +RF1AINSTRW_L = 0x0F10; +RF1AINSTRW_H = 0x0F11; +RF1AINSTR1W = 0x0F12; +RF1AINSTR1W_L = 0x0F12; +RF1AINSTR1W_H = 0x0F13; +RF1AINSTR2W = 0x0F14; +RF1AINSTR2W_L = 0x0F14; +RF1AINSTR2W_H = 0x0F15; +RF1ADINW = 0x0F16; +RF1ADINW_L = 0x0F16; +RF1ADINW_H = 0x0F17; +RF1ASTAT0W = 0x0F20; +RF1ASTAT0W_L = 0x0F20; +RF1ASTAT0W_H = 0x0F21; +RF1ASTAT1W = 0x0F22; +RF1ASTAT1W_L = 0x0F22; +RF1ASTAT1W_H = 0x0F23; +RF1ASTAT2W = 0x0F24; +RF1ASTAT2W_L = 0x0F24; +RF1ASTAT2W_H = 0x0F25; +RF1ADOUT0W = 0x0F28; +RF1ADOUT0W_L = 0x0F28; +RF1ADOUT0W_H = 0x0F29; +RF1ADOUT1W = 0x0F2A; +RF1ADOUT1W_L = 0x0F2A; +RF1ADOUT1W_H = 0x0F2B; +RF1ADOUT2W = 0x0F2C; +RF1ADOUT2W_L = 0x0F2C; +RF1ADOUT2W_H = 0x0F2D; +RF1AIN = 0x0F30; +RF1AIN_L = 0x0F30; +RF1AIN_H = 0x0F31; +RF1AIFG = 0x0F32; +RF1AIFG_L = 0x0F32; +RF1AIFG_H = 0x0F33; +RF1AIES = 0x0F34; +RF1AIES_L = 0x0F34; +RF1AIES_H = 0x0F35; +RF1AIE = 0x0F36; +RF1AIE_L = 0x0F36; +RF1AIE_H = 0x0F37; +RF1AIV = 0x0F38; +RF1AIV_L = 0x0F38; +RF1AIV_H = 0x0F39; +RF1ARXFIFO = 0x0F3C; +RF1ARXFIFO_L = 0x0F3C; +RF1ARXFIFO_H = 0x0F3D; +RF1ATXFIFO = 0x0F3E; +RF1ATXFIFO_L = 0x0F3E; +RF1ATXFIFO_H = 0x0F3F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* UNIFIED CLOCK SYSTEM FOR Radio Devices +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/cc430f6137.cmd b/msp430/cc430f6137.cmd new file mode 100644 index 00000000..4cbca085 --- /dev/null +++ b/msp430/cc430f6137.cmd @@ -0,0 +1,838 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* cc430f6137.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************ +* CC1101 Radio Interface +************************************************************/ +RF1AIFCTL0 = 0x0F00; +RF1AIFCTL0_L = 0x0F00; +RF1AIFCTL0_H = 0x0F01; +RF1AIFCTL1 = 0x0F02; +RF1AIFCTL1_L = 0x0F02; +RF1AIFCTL1_H = 0x0F03; +RF1AIFCTL2 = 0x0F04; +RF1AIFCTL2_L = 0x0F04; +RF1AIFCTL2_H = 0x0F05; +RF1AIFERR = 0x0F06; +RF1AIFERR_L = 0x0F06; +RF1AIFERR_H = 0x0F07; +RF1AIFERRV = 0x0F0C; +RF1AIFERRV_L = 0x0F0C; +RF1AIFERRV_H = 0x0F0D; +RF1AIFIV = 0x0F0E; +RF1AIFIV_L = 0x0F0E; +RF1AIFIV_H = 0x0F0F; +RF1AINSTRW = 0x0F10; +RF1AINSTRW_L = 0x0F10; +RF1AINSTRW_H = 0x0F11; +RF1AINSTR1W = 0x0F12; +RF1AINSTR1W_L = 0x0F12; +RF1AINSTR1W_H = 0x0F13; +RF1AINSTR2W = 0x0F14; +RF1AINSTR2W_L = 0x0F14; +RF1AINSTR2W_H = 0x0F15; +RF1ADINW = 0x0F16; +RF1ADINW_L = 0x0F16; +RF1ADINW_H = 0x0F17; +RF1ASTAT0W = 0x0F20; +RF1ASTAT0W_L = 0x0F20; +RF1ASTAT0W_H = 0x0F21; +RF1ASTAT1W = 0x0F22; +RF1ASTAT1W_L = 0x0F22; +RF1ASTAT1W_H = 0x0F23; +RF1ASTAT2W = 0x0F24; +RF1ASTAT2W_L = 0x0F24; +RF1ASTAT2W_H = 0x0F25; +RF1ADOUT0W = 0x0F28; +RF1ADOUT0W_L = 0x0F28; +RF1ADOUT0W_H = 0x0F29; +RF1ADOUT1W = 0x0F2A; +RF1ADOUT1W_L = 0x0F2A; +RF1ADOUT1W_H = 0x0F2B; +RF1ADOUT2W = 0x0F2C; +RF1ADOUT2W_L = 0x0F2C; +RF1ADOUT2W_H = 0x0F2D; +RF1AIN = 0x0F30; +RF1AIN_L = 0x0F30; +RF1AIN_H = 0x0F31; +RF1AIFG = 0x0F32; +RF1AIFG_L = 0x0F32; +RF1AIFG_H = 0x0F33; +RF1AIES = 0x0F34; +RF1AIES_L = 0x0F34; +RF1AIES_H = 0x0F35; +RF1AIE = 0x0F36; +RF1AIE_L = 0x0F36; +RF1AIE_H = 0x0F37; +RF1AIV = 0x0F38; +RF1AIV_L = 0x0F38; +RF1AIV_H = 0x0F39; +RF1ARXFIFO = 0x0F3C; +RF1ARXFIFO_L = 0x0F3C; +RF1ARXFIFO_H = 0x0F3D; +RF1ATXFIFO = 0x0F3E; +RF1ATXFIFO_L = 0x0F3E; +RF1ATXFIFO_H = 0x0F3F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* UNIFIED CLOCK SYSTEM FOR Radio Devices +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/cc430f6143.cmd b/msp430/cc430f6143.cmd new file mode 100644 index 00000000..f9a2f9c3 --- /dev/null +++ b/msp430/cc430f6143.cmd @@ -0,0 +1,797 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* cc430f6143.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************ +* CC1101 Radio Interface +************************************************************/ +RF1AIFCTL0 = 0x0F00; +RF1AIFCTL0_L = 0x0F00; +RF1AIFCTL0_H = 0x0F01; +RF1AIFCTL1 = 0x0F02; +RF1AIFCTL1_L = 0x0F02; +RF1AIFCTL1_H = 0x0F03; +RF1AIFCTL2 = 0x0F04; +RF1AIFCTL2_L = 0x0F04; +RF1AIFCTL2_H = 0x0F05; +RF1AIFERR = 0x0F06; +RF1AIFERR_L = 0x0F06; +RF1AIFERR_H = 0x0F07; +RF1AIFERRV = 0x0F0C; +RF1AIFERRV_L = 0x0F0C; +RF1AIFERRV_H = 0x0F0D; +RF1AIFIV = 0x0F0E; +RF1AIFIV_L = 0x0F0E; +RF1AIFIV_H = 0x0F0F; +RF1AINSTRW = 0x0F10; +RF1AINSTRW_L = 0x0F10; +RF1AINSTRW_H = 0x0F11; +RF1AINSTR1W = 0x0F12; +RF1AINSTR1W_L = 0x0F12; +RF1AINSTR1W_H = 0x0F13; +RF1AINSTR2W = 0x0F14; +RF1AINSTR2W_L = 0x0F14; +RF1AINSTR2W_H = 0x0F15; +RF1ADINW = 0x0F16; +RF1ADINW_L = 0x0F16; +RF1ADINW_H = 0x0F17; +RF1ASTAT0W = 0x0F20; +RF1ASTAT0W_L = 0x0F20; +RF1ASTAT0W_H = 0x0F21; +RF1ASTAT1W = 0x0F22; +RF1ASTAT1W_L = 0x0F22; +RF1ASTAT1W_H = 0x0F23; +RF1ASTAT2W = 0x0F24; +RF1ASTAT2W_L = 0x0F24; +RF1ASTAT2W_H = 0x0F25; +RF1ADOUT0W = 0x0F28; +RF1ADOUT0W_L = 0x0F28; +RF1ADOUT0W_H = 0x0F29; +RF1ADOUT1W = 0x0F2A; +RF1ADOUT1W_L = 0x0F2A; +RF1ADOUT1W_H = 0x0F2B; +RF1ADOUT2W = 0x0F2C; +RF1ADOUT2W_L = 0x0F2C; +RF1ADOUT2W_H = 0x0F2D; +RF1AIN = 0x0F30; +RF1AIN_L = 0x0F30; +RF1AIN_H = 0x0F31; +RF1AIFG = 0x0F32; +RF1AIFG_L = 0x0F32; +RF1AIFG_H = 0x0F33; +RF1AIES = 0x0F34; +RF1AIES_L = 0x0F34; +RF1AIES_H = 0x0F35; +RF1AIE = 0x0F36; +RF1AIE_L = 0x0F36; +RF1AIE_H = 0x0F37; +RF1AIV = 0x0F38; +RF1AIV_L = 0x0F38; +RF1AIV_H = 0x0F39; +RF1ARXFIFO = 0x0F3C; +RF1ARXFIFO_L = 0x0F3C; +RF1ARXFIFO_H = 0x0F3D; +RF1ATXFIFO = 0x0F3E; +RF1ATXFIFO_L = 0x0F3E; +RF1ATXFIFO_H = 0x0F3F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock D +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* UNIFIED CLOCK SYSTEM FOR Radio Devices +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/cc430f6145.cmd b/msp430/cc430f6145.cmd new file mode 100644 index 00000000..ec0538f5 --- /dev/null +++ b/msp430/cc430f6145.cmd @@ -0,0 +1,797 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* cc430f6145.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************ +* CC1101 Radio Interface +************************************************************/ +RF1AIFCTL0 = 0x0F00; +RF1AIFCTL0_L = 0x0F00; +RF1AIFCTL0_H = 0x0F01; +RF1AIFCTL1 = 0x0F02; +RF1AIFCTL1_L = 0x0F02; +RF1AIFCTL1_H = 0x0F03; +RF1AIFCTL2 = 0x0F04; +RF1AIFCTL2_L = 0x0F04; +RF1AIFCTL2_H = 0x0F05; +RF1AIFERR = 0x0F06; +RF1AIFERR_L = 0x0F06; +RF1AIFERR_H = 0x0F07; +RF1AIFERRV = 0x0F0C; +RF1AIFERRV_L = 0x0F0C; +RF1AIFERRV_H = 0x0F0D; +RF1AIFIV = 0x0F0E; +RF1AIFIV_L = 0x0F0E; +RF1AIFIV_H = 0x0F0F; +RF1AINSTRW = 0x0F10; +RF1AINSTRW_L = 0x0F10; +RF1AINSTRW_H = 0x0F11; +RF1AINSTR1W = 0x0F12; +RF1AINSTR1W_L = 0x0F12; +RF1AINSTR1W_H = 0x0F13; +RF1AINSTR2W = 0x0F14; +RF1AINSTR2W_L = 0x0F14; +RF1AINSTR2W_H = 0x0F15; +RF1ADINW = 0x0F16; +RF1ADINW_L = 0x0F16; +RF1ADINW_H = 0x0F17; +RF1ASTAT0W = 0x0F20; +RF1ASTAT0W_L = 0x0F20; +RF1ASTAT0W_H = 0x0F21; +RF1ASTAT1W = 0x0F22; +RF1ASTAT1W_L = 0x0F22; +RF1ASTAT1W_H = 0x0F23; +RF1ASTAT2W = 0x0F24; +RF1ASTAT2W_L = 0x0F24; +RF1ASTAT2W_H = 0x0F25; +RF1ADOUT0W = 0x0F28; +RF1ADOUT0W_L = 0x0F28; +RF1ADOUT0W_H = 0x0F29; +RF1ADOUT1W = 0x0F2A; +RF1ADOUT1W_L = 0x0F2A; +RF1ADOUT1W_H = 0x0F2B; +RF1ADOUT2W = 0x0F2C; +RF1ADOUT2W_L = 0x0F2C; +RF1ADOUT2W_H = 0x0F2D; +RF1AIN = 0x0F30; +RF1AIN_L = 0x0F30; +RF1AIN_H = 0x0F31; +RF1AIFG = 0x0F32; +RF1AIFG_L = 0x0F32; +RF1AIFG_H = 0x0F33; +RF1AIES = 0x0F34; +RF1AIES_L = 0x0F34; +RF1AIES_H = 0x0F35; +RF1AIE = 0x0F36; +RF1AIE_L = 0x0F36; +RF1AIE_H = 0x0F37; +RF1AIV = 0x0F38; +RF1AIV_L = 0x0F38; +RF1AIV_H = 0x0F39; +RF1ARXFIFO = 0x0F3C; +RF1ARXFIFO_L = 0x0F3C; +RF1ARXFIFO_H = 0x0F3D; +RF1ATXFIFO = 0x0F3E; +RF1ATXFIFO_L = 0x0F3E; +RF1ATXFIFO_H = 0x0F3F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock D +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* UNIFIED CLOCK SYSTEM FOR Radio Devices +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/cc430f6147.cmd b/msp430/cc430f6147.cmd new file mode 100644 index 00000000..80b10400 --- /dev/null +++ b/msp430/cc430f6147.cmd @@ -0,0 +1,797 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* cc430f6147.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************ +* CC1101 Radio Interface +************************************************************/ +RF1AIFCTL0 = 0x0F00; +RF1AIFCTL0_L = 0x0F00; +RF1AIFCTL0_H = 0x0F01; +RF1AIFCTL1 = 0x0F02; +RF1AIFCTL1_L = 0x0F02; +RF1AIFCTL1_H = 0x0F03; +RF1AIFCTL2 = 0x0F04; +RF1AIFCTL2_L = 0x0F04; +RF1AIFCTL2_H = 0x0F05; +RF1AIFERR = 0x0F06; +RF1AIFERR_L = 0x0F06; +RF1AIFERR_H = 0x0F07; +RF1AIFERRV = 0x0F0C; +RF1AIFERRV_L = 0x0F0C; +RF1AIFERRV_H = 0x0F0D; +RF1AIFIV = 0x0F0E; +RF1AIFIV_L = 0x0F0E; +RF1AIFIV_H = 0x0F0F; +RF1AINSTRW = 0x0F10; +RF1AINSTRW_L = 0x0F10; +RF1AINSTRW_H = 0x0F11; +RF1AINSTR1W = 0x0F12; +RF1AINSTR1W_L = 0x0F12; +RF1AINSTR1W_H = 0x0F13; +RF1AINSTR2W = 0x0F14; +RF1AINSTR2W_L = 0x0F14; +RF1AINSTR2W_H = 0x0F15; +RF1ADINW = 0x0F16; +RF1ADINW_L = 0x0F16; +RF1ADINW_H = 0x0F17; +RF1ASTAT0W = 0x0F20; +RF1ASTAT0W_L = 0x0F20; +RF1ASTAT0W_H = 0x0F21; +RF1ASTAT1W = 0x0F22; +RF1ASTAT1W_L = 0x0F22; +RF1ASTAT1W_H = 0x0F23; +RF1ASTAT2W = 0x0F24; +RF1ASTAT2W_L = 0x0F24; +RF1ASTAT2W_H = 0x0F25; +RF1ADOUT0W = 0x0F28; +RF1ADOUT0W_L = 0x0F28; +RF1ADOUT0W_H = 0x0F29; +RF1ADOUT1W = 0x0F2A; +RF1ADOUT1W_L = 0x0F2A; +RF1ADOUT1W_H = 0x0F2B; +RF1ADOUT2W = 0x0F2C; +RF1ADOUT2W_L = 0x0F2C; +RF1ADOUT2W_H = 0x0F2D; +RF1AIN = 0x0F30; +RF1AIN_L = 0x0F30; +RF1AIN_H = 0x0F31; +RF1AIFG = 0x0F32; +RF1AIFG_L = 0x0F32; +RF1AIFG_H = 0x0F33; +RF1AIES = 0x0F34; +RF1AIES_L = 0x0F34; +RF1AIES_H = 0x0F35; +RF1AIE = 0x0F36; +RF1AIE_L = 0x0F36; +RF1AIE_H = 0x0F37; +RF1AIV = 0x0F38; +RF1AIV_L = 0x0F38; +RF1AIV_H = 0x0F39; +RF1ARXFIFO = 0x0F3C; +RF1ARXFIFO_L = 0x0F3C; +RF1ARXFIFO_H = 0x0F3D; +RF1ATXFIFO = 0x0F3E; +RF1ATXFIFO_L = 0x0F3E; +RF1ATXFIFO_H = 0x0F3F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock D +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* UNIFIED CLOCK SYSTEM FOR Radio Devices +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/cc430x513x.cmd b/msp430/cc430x513x.cmd new file mode 100644 index 00000000..100acb11 --- /dev/null +++ b/msp430/cc430x513x.cmd @@ -0,0 +1,762 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* cc430f5137.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************ +* CC1101 Radio Interface +************************************************************/ +RF1AIFCTL0 = 0x0F00; +RF1AIFCTL0_L = 0x0F00; +RF1AIFCTL0_H = 0x0F01; +RF1AIFCTL1 = 0x0F02; +RF1AIFCTL1_L = 0x0F02; +RF1AIFCTL1_H = 0x0F03; +RF1AIFCTL2 = 0x0F04; +RF1AIFCTL2_L = 0x0F04; +RF1AIFCTL2_H = 0x0F05; +RF1AIFERR = 0x0F06; +RF1AIFERR_L = 0x0F06; +RF1AIFERR_H = 0x0F07; +RF1AIFERRV = 0x0F0C; +RF1AIFERRV_L = 0x0F0C; +RF1AIFERRV_H = 0x0F0D; +RF1AIFIV = 0x0F0E; +RF1AIFIV_L = 0x0F0E; +RF1AIFIV_H = 0x0F0F; +RF1AINSTRW = 0x0F10; +RF1AINSTRW_L = 0x0F10; +RF1AINSTRW_H = 0x0F11; +RF1AINSTR1W = 0x0F12; +RF1AINSTR1W_L = 0x0F12; +RF1AINSTR1W_H = 0x0F13; +RF1AINSTR2W = 0x0F14; +RF1AINSTR2W_L = 0x0F14; +RF1AINSTR2W_H = 0x0F15; +RF1ADINW = 0x0F16; +RF1ADINW_L = 0x0F16; +RF1ADINW_H = 0x0F17; +RF1ASTAT0W = 0x0F20; +RF1ASTAT0W_L = 0x0F20; +RF1ASTAT0W_H = 0x0F21; +RF1ASTAT1W = 0x0F22; +RF1ASTAT1W_L = 0x0F22; +RF1ASTAT1W_H = 0x0F23; +RF1ASTAT2W = 0x0F24; +RF1ASTAT2W_L = 0x0F24; +RF1ASTAT2W_H = 0x0F25; +RF1ADOUT0W = 0x0F28; +RF1ADOUT0W_L = 0x0F28; +RF1ADOUT0W_H = 0x0F29; +RF1ADOUT1W = 0x0F2A; +RF1ADOUT1W_L = 0x0F2A; +RF1ADOUT1W_H = 0x0F2B; +RF1ADOUT2W = 0x0F2C; +RF1ADOUT2W_L = 0x0F2C; +RF1ADOUT2W_H = 0x0F2D; +RF1AIN = 0x0F30; +RF1AIN_L = 0x0F30; +RF1AIN_H = 0x0F31; +RF1AIFG = 0x0F32; +RF1AIFG_L = 0x0F32; +RF1AIFG_H = 0x0F33; +RF1AIES = 0x0F34; +RF1AIES_L = 0x0F34; +RF1AIES_H = 0x0F35; +RF1AIE = 0x0F36; +RF1AIE_L = 0x0F36; +RF1AIE_H = 0x0F37; +RF1AIV = 0x0F38; +RF1AIV_L = 0x0F38; +RF1AIV_H = 0x0F39; +RF1ARXFIFO = 0x0F3C; +RF1ARXFIFO_L = 0x0F3C; +RF1ARXFIFO_H = 0x0F3D; +RF1ATXFIFO = 0x0F3E; +RF1ATXFIFO_L = 0x0F3E; +RF1ATXFIFO_H = 0x0F3F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* UNIFIED CLOCK SYSTEM FOR Radio Devices +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/cc430x612x.cmd b/msp430/cc430x612x.cmd new file mode 100644 index 00000000..5dbadf88 --- /dev/null +++ b/msp430/cc430x612x.cmd @@ -0,0 +1,759 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* cc430f6127.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************ +* CC1101 Radio Interface +************************************************************/ +RF1AIFCTL0 = 0x0F00; +RF1AIFCTL0_L = 0x0F00; +RF1AIFCTL0_H = 0x0F01; +RF1AIFCTL1 = 0x0F02; +RF1AIFCTL1_L = 0x0F02; +RF1AIFCTL1_H = 0x0F03; +RF1AIFCTL2 = 0x0F04; +RF1AIFCTL2_L = 0x0F04; +RF1AIFCTL2_H = 0x0F05; +RF1AIFERR = 0x0F06; +RF1AIFERR_L = 0x0F06; +RF1AIFERR_H = 0x0F07; +RF1AIFERRV = 0x0F0C; +RF1AIFERRV_L = 0x0F0C; +RF1AIFERRV_H = 0x0F0D; +RF1AIFIV = 0x0F0E; +RF1AIFIV_L = 0x0F0E; +RF1AIFIV_H = 0x0F0F; +RF1AINSTRW = 0x0F10; +RF1AINSTRW_L = 0x0F10; +RF1AINSTRW_H = 0x0F11; +RF1AINSTR1W = 0x0F12; +RF1AINSTR1W_L = 0x0F12; +RF1AINSTR1W_H = 0x0F13; +RF1AINSTR2W = 0x0F14; +RF1AINSTR2W_L = 0x0F14; +RF1AINSTR2W_H = 0x0F15; +RF1ADINW = 0x0F16; +RF1ADINW_L = 0x0F16; +RF1ADINW_H = 0x0F17; +RF1ASTAT0W = 0x0F20; +RF1ASTAT0W_L = 0x0F20; +RF1ASTAT0W_H = 0x0F21; +RF1ASTAT1W = 0x0F22; +RF1ASTAT1W_L = 0x0F22; +RF1ASTAT1W_H = 0x0F23; +RF1ASTAT2W = 0x0F24; +RF1ASTAT2W_L = 0x0F24; +RF1ASTAT2W_H = 0x0F25; +RF1ADOUT0W = 0x0F28; +RF1ADOUT0W_L = 0x0F28; +RF1ADOUT0W_H = 0x0F29; +RF1ADOUT1W = 0x0F2A; +RF1ADOUT1W_L = 0x0F2A; +RF1ADOUT1W_H = 0x0F2B; +RF1ADOUT2W = 0x0F2C; +RF1ADOUT2W_L = 0x0F2C; +RF1ADOUT2W_H = 0x0F2D; +RF1AIN = 0x0F30; +RF1AIN_L = 0x0F30; +RF1AIN_H = 0x0F31; +RF1AIFG = 0x0F32; +RF1AIFG_L = 0x0F32; +RF1AIFG_H = 0x0F33; +RF1AIES = 0x0F34; +RF1AIES_L = 0x0F34; +RF1AIES_H = 0x0F35; +RF1AIE = 0x0F36; +RF1AIE_L = 0x0F36; +RF1AIE_H = 0x0F37; +RF1AIV = 0x0F38; +RF1AIV_L = 0x0F38; +RF1AIV_H = 0x0F39; +RF1ARXFIFO = 0x0F3C; +RF1ARXFIFO_L = 0x0F3C; +RF1ARXFIFO_H = 0x0F3D; +RF1ATXFIFO = 0x0F3E; +RF1ATXFIFO_L = 0x0F3E; +RF1ATXFIFO_H = 0x0F3F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* UNIFIED CLOCK SYSTEM FOR Radio Devices +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/cc430x613x.cmd b/msp430/cc430x613x.cmd new file mode 100644 index 00000000..d6b5bd91 --- /dev/null +++ b/msp430/cc430x613x.cmd @@ -0,0 +1,844 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* cc430f6137.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************ +* CC1101 Radio Interface +************************************************************/ +RF1AIFCTL0 = 0x0F00; +RF1AIFCTL0_L = 0x0F00; +RF1AIFCTL0_H = 0x0F01; +RF1AIFCTL1 = 0x0F02; +RF1AIFCTL1_L = 0x0F02; +RF1AIFCTL1_H = 0x0F03; +RF1AIFCTL2 = 0x0F04; +RF1AIFCTL2_L = 0x0F04; +RF1AIFCTL2_H = 0x0F05; +RF1AIFERR = 0x0F06; +RF1AIFERR_L = 0x0F06; +RF1AIFERR_H = 0x0F07; +RF1AIFERRV = 0x0F0C; +RF1AIFERRV_L = 0x0F0C; +RF1AIFERRV_H = 0x0F0D; +RF1AIFIV = 0x0F0E; +RF1AIFIV_L = 0x0F0E; +RF1AIFIV_H = 0x0F0F; +RF1AINSTRW = 0x0F10; +RF1AINSTRW_L = 0x0F10; +RF1AINSTRW_H = 0x0F11; +RF1AINSTR1W = 0x0F12; +RF1AINSTR1W_L = 0x0F12; +RF1AINSTR1W_H = 0x0F13; +RF1AINSTR2W = 0x0F14; +RF1AINSTR2W_L = 0x0F14; +RF1AINSTR2W_H = 0x0F15; +RF1ADINW = 0x0F16; +RF1ADINW_L = 0x0F16; +RF1ADINW_H = 0x0F17; +RF1ASTAT0W = 0x0F20; +RF1ASTAT0W_L = 0x0F20; +RF1ASTAT0W_H = 0x0F21; +RF1ASTAT1W = 0x0F22; +RF1ASTAT1W_L = 0x0F22; +RF1ASTAT1W_H = 0x0F23; +RF1ASTAT2W = 0x0F24; +RF1ASTAT2W_L = 0x0F24; +RF1ASTAT2W_H = 0x0F25; +RF1ADOUT0W = 0x0F28; +RF1ADOUT0W_L = 0x0F28; +RF1ADOUT0W_H = 0x0F29; +RF1ADOUT1W = 0x0F2A; +RF1ADOUT1W_L = 0x0F2A; +RF1ADOUT1W_H = 0x0F2B; +RF1ADOUT2W = 0x0F2C; +RF1ADOUT2W_L = 0x0F2C; +RF1ADOUT2W_H = 0x0F2D; +RF1AIN = 0x0F30; +RF1AIN_L = 0x0F30; +RF1AIN_H = 0x0F31; +RF1AIFG = 0x0F32; +RF1AIFG_L = 0x0F32; +RF1AIFG_H = 0x0F33; +RF1AIES = 0x0F34; +RF1AIES_L = 0x0F34; +RF1AIES_H = 0x0F35; +RF1AIE = 0x0F36; +RF1AIE_L = 0x0F36; +RF1AIE_H = 0x0F37; +RF1AIV = 0x0F38; +RF1AIV_L = 0x0F38; +RF1AIV_H = 0x0F39; +RF1ARXFIFO = 0x0F3C; +RF1ARXFIFO_L = 0x0F3C; +RF1ARXFIFO_H = 0x0F3D; +RF1ATXFIFO = 0x0F3E; +RF1ATXFIFO_L = 0x0F3E; +RF1ATXFIFO_H = 0x0F3F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* UNIFIED CLOCK SYSTEM FOR Radio Devices +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/lnk_cc430f5123.cmd b/msp430/lnk_cc430f5123.cmd new file mode 100644 index 00000000..5e3adb37 --- /dev/null +++ b/msp430/lnk_cc430f5123.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_cc430f5123.cmd - LINKER COMMAND FILE FOR LINKING CC430F5123 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x07FE + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xE000, length = 0x1F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + AES : { * ( .int45 ) } > INT45 type = VECT_INIT + RTC : { * ( .int46 ) } > INT46 type = VECT_INIT + .int47 : {} > INT47 + PORT2 : { * ( .int48 ) } > INT48 type = VECT_INIT + PORT1 : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER1_A1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER1_A0 : { * ( .int51 ) } > INT51 type = VECT_INIT + DMA : { * ( .int52 ) } > INT52 type = VECT_INIT + CC1101 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + ADC10 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_B0 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_A0 : { * ( .int58 ) } > INT58 type = VECT_INIT + WDT : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l cc430f5123.cmd + diff --git a/msp430/lnk_cc430f5125.cmd b/msp430/lnk_cc430f5125.cmd new file mode 100644 index 00000000..2578310f --- /dev/null +++ b/msp430/lnk_cc430f5125.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_cc430f5125.cmd - LINKER COMMAND FILE FOR LINKING CC430F5125 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x07FE + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + AES : { * ( .int45 ) } > INT45 type = VECT_INIT + RTC : { * ( .int46 ) } > INT46 type = VECT_INIT + .int47 : {} > INT47 + PORT2 : { * ( .int48 ) } > INT48 type = VECT_INIT + PORT1 : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER1_A1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER1_A0 : { * ( .int51 ) } > INT51 type = VECT_INIT + DMA : { * ( .int52 ) } > INT52 type = VECT_INIT + CC1101 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + ADC10 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_B0 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_A0 : { * ( .int58 ) } > INT58 type = VECT_INIT + WDT : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l cc430f5125.cmd + diff --git a/msp430/lnk_cc430f5133.cmd b/msp430/lnk_cc430f5133.cmd new file mode 100644 index 00000000..5171ac9d --- /dev/null +++ b/msp430/lnk_cc430f5133.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_cc430f5133.cmd - LINKER COMMAND FILE FOR LINKING CC430F5133 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x07FE + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xE000, length = 0x1F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + AES : { * ( .int45 ) } > INT45 type = VECT_INIT + RTC : { * ( .int46 ) } > INT46 type = VECT_INIT + .int47 : {} > INT47 + PORT2 : { * ( .int48 ) } > INT48 type = VECT_INIT + PORT1 : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER1_A1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER1_A0 : { * ( .int51 ) } > INT51 type = VECT_INIT + DMA : { * ( .int52 ) } > INT52 type = VECT_INIT + CC1101 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + ADC12 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_B0 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_A0 : { * ( .int58 ) } > INT58 type = VECT_INIT + WDT : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l cc430f5133.cmd + diff --git a/msp430/lnk_cc430f5135.cmd b/msp430/lnk_cc430f5135.cmd new file mode 100644 index 00000000..26396faa --- /dev/null +++ b/msp430/lnk_cc430f5135.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_cc430f5135.cmd - LINKER COMMAND FILE FOR LINKING CC430F5135 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x07FE + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + AES : { * ( .int45 ) } > INT45 type = VECT_INIT + RTC : { * ( .int46 ) } > INT46 type = VECT_INIT + .int47 : {} > INT47 + PORT2 : { * ( .int48 ) } > INT48 type = VECT_INIT + PORT1 : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER1_A1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER1_A0 : { * ( .int51 ) } > INT51 type = VECT_INIT + DMA : { * ( .int52 ) } > INT52 type = VECT_INIT + CC1101 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + ADC12 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_B0 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_A0 : { * ( .int58 ) } > INT58 type = VECT_INIT + WDT : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l cc430f5135.cmd + diff --git a/msp430/lnk_cc430f5137.cmd b/msp430/lnk_cc430f5137.cmd new file mode 100644 index 00000000..c7d49713 --- /dev/null +++ b/msp430/lnk_cc430f5137.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_cc430f5137.cmd - LINKER COMMAND FILE FOR LINKING CC430F5137 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0FFE + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + AES : { * ( .int45 ) } > INT45 type = VECT_INIT + RTC : { * ( .int46 ) } > INT46 type = VECT_INIT + .int47 : {} > INT47 + PORT2 : { * ( .int48 ) } > INT48 type = VECT_INIT + PORT1 : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER1_A1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER1_A0 : { * ( .int51 ) } > INT51 type = VECT_INIT + DMA : { * ( .int52 ) } > INT52 type = VECT_INIT + CC1101 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + ADC12 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_B0 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_A0 : { * ( .int58 ) } > INT58 type = VECT_INIT + WDT : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l cc430f5137.cmd + diff --git a/msp430/lnk_cc430f5143.cmd b/msp430/lnk_cc430f5143.cmd new file mode 100644 index 00000000..67839b04 --- /dev/null +++ b/msp430/lnk_cc430f5143.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_cc430f5143.cmd - LINKER COMMAND FILE FOR LINKING CC430F5143 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x07FE + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xE000, length = 0x1F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + AES : { * ( .int45 ) } > INT45 type = VECT_INIT + RTC : { * ( .int46 ) } > INT46 type = VECT_INIT + .int47 : {} > INT47 + PORT2 : { * ( .int48 ) } > INT48 type = VECT_INIT + PORT1 : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER1_A1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER1_A0 : { * ( .int51 ) } > INT51 type = VECT_INIT + DMA : { * ( .int52 ) } > INT52 type = VECT_INIT + CC1101 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + ADC10 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_B0 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_A0 : { * ( .int58 ) } > INT58 type = VECT_INIT + WDT : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l cc430f5143.cmd + diff --git a/msp430/lnk_cc430f5145.cmd b/msp430/lnk_cc430f5145.cmd new file mode 100644 index 00000000..cc14a83b --- /dev/null +++ b/msp430/lnk_cc430f5145.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_cc430f5145.cmd - LINKER COMMAND FILE FOR LINKING CC430F5145 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x07FE + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + AES : { * ( .int45 ) } > INT45 type = VECT_INIT + RTC : { * ( .int46 ) } > INT46 type = VECT_INIT + .int47 : {} > INT47 + PORT2 : { * ( .int48 ) } > INT48 type = VECT_INIT + PORT1 : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER1_A1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER1_A0 : { * ( .int51 ) } > INT51 type = VECT_INIT + DMA : { * ( .int52 ) } > INT52 type = VECT_INIT + CC1101 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + ADC10 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_B0 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_A0 : { * ( .int58 ) } > INT58 type = VECT_INIT + WDT : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l cc430f5145.cmd + diff --git a/msp430/lnk_cc430f5147.cmd b/msp430/lnk_cc430f5147.cmd new file mode 100644 index 00000000..22dcffac --- /dev/null +++ b/msp430/lnk_cc430f5147.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_cc430f5147.cmd - LINKER COMMAND FILE FOR LINKING CC430F5147 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0FFE + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + AES : { * ( .int45 ) } > INT45 type = VECT_INIT + RTC : { * ( .int46 ) } > INT46 type = VECT_INIT + .int47 : {} > INT47 + PORT2 : { * ( .int48 ) } > INT48 type = VECT_INIT + PORT1 : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER1_A1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER1_A0 : { * ( .int51 ) } > INT51 type = VECT_INIT + DMA : { * ( .int52 ) } > INT52 type = VECT_INIT + CC1101 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + ADC10 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_B0 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_A0 : { * ( .int58 ) } > INT58 type = VECT_INIT + WDT : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l cc430f5147.cmd + diff --git a/msp430/lnk_cc430f6125.cmd b/msp430/lnk_cc430f6125.cmd new file mode 100644 index 00000000..5d8e56ab --- /dev/null +++ b/msp430/lnk_cc430f6125.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_cc430f6125.cmd - LINKER COMMAND FILE FOR LINKING CC430F6125 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x07FE + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + AES : { * ( .int45 ) } > INT45 type = VECT_INIT + RTC : { * ( .int46 ) } > INT46 type = VECT_INIT + LCD_B : { * ( .int47 ) } > INT47 type = VECT_INIT + PORT2 : { * ( .int48 ) } > INT48 type = VECT_INIT + PORT1 : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER1_A1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER1_A0 : { * ( .int51 ) } > INT51 type = VECT_INIT + DMA : { * ( .int52 ) } > INT52 type = VECT_INIT + CC1101 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + .int56 : {} > INT56 + USCI_B0 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_A0 : { * ( .int58 ) } > INT58 type = VECT_INIT + WDT : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l cc430f6125.cmd + diff --git a/msp430/lnk_cc430f6126.cmd b/msp430/lnk_cc430f6126.cmd new file mode 100644 index 00000000..fc76971d --- /dev/null +++ b/msp430/lnk_cc430f6126.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_cc430f6126.cmd - LINKER COMMAND FILE FOR LINKING CC430F6126 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x07FE + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + AES : { * ( .int45 ) } > INT45 type = VECT_INIT + RTC : { * ( .int46 ) } > INT46 type = VECT_INIT + LCD_B : { * ( .int47 ) } > INT47 type = VECT_INIT + PORT2 : { * ( .int48 ) } > INT48 type = VECT_INIT + PORT1 : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER1_A1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER1_A0 : { * ( .int51 ) } > INT51 type = VECT_INIT + DMA : { * ( .int52 ) } > INT52 type = VECT_INIT + CC1101 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + .int56 : {} > INT56 + USCI_B0 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_A0 : { * ( .int58 ) } > INT58 type = VECT_INIT + WDT : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l cc430f6126.cmd + diff --git a/msp430/lnk_cc430f6127.cmd b/msp430/lnk_cc430f6127.cmd new file mode 100644 index 00000000..966146ce --- /dev/null +++ b/msp430/lnk_cc430f6127.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_cc430f6127.cmd - LINKER COMMAND FILE FOR LINKING CC430F6127 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0FFE + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + AES : { * ( .int45 ) } > INT45 type = VECT_INIT + RTC : { * ( .int46 ) } > INT46 type = VECT_INIT + LCD_B : { * ( .int47 ) } > INT47 type = VECT_INIT + PORT2 : { * ( .int48 ) } > INT48 type = VECT_INIT + PORT1 : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER1_A1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER1_A0 : { * ( .int51 ) } > INT51 type = VECT_INIT + DMA : { * ( .int52 ) } > INT52 type = VECT_INIT + CC1101 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + .int56 : {} > INT56 + USCI_B0 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_A0 : { * ( .int58 ) } > INT58 type = VECT_INIT + WDT : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l cc430f6127.cmd + diff --git a/msp430/lnk_cc430f6135.cmd b/msp430/lnk_cc430f6135.cmd new file mode 100644 index 00000000..5fc82aca --- /dev/null +++ b/msp430/lnk_cc430f6135.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_cc430f6135.cmd - LINKER COMMAND FILE FOR LINKING CC430F6135 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x07FE + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + AES : { * ( .int45 ) } > INT45 type = VECT_INIT + RTC : { * ( .int46 ) } > INT46 type = VECT_INIT + LCD_B : { * ( .int47 ) } > INT47 type = VECT_INIT + PORT2 : { * ( .int48 ) } > INT48 type = VECT_INIT + PORT1 : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER1_A1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER1_A0 : { * ( .int51 ) } > INT51 type = VECT_INIT + DMA : { * ( .int52 ) } > INT52 type = VECT_INIT + CC1101 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + ADC12 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_B0 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_A0 : { * ( .int58 ) } > INT58 type = VECT_INIT + WDT : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l cc430f6135.cmd + diff --git a/msp430/lnk_cc430f6137.cmd b/msp430/lnk_cc430f6137.cmd new file mode 100644 index 00000000..833639e8 --- /dev/null +++ b/msp430/lnk_cc430f6137.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_cc430f6137.cmd - LINKER COMMAND FILE FOR LINKING CC430F6137 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0FFE + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + AES : { * ( .int45 ) } > INT45 type = VECT_INIT + RTC : { * ( .int46 ) } > INT46 type = VECT_INIT + LCD_B : { * ( .int47 ) } > INT47 type = VECT_INIT + PORT2 : { * ( .int48 ) } > INT48 type = VECT_INIT + PORT1 : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER1_A1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER1_A0 : { * ( .int51 ) } > INT51 type = VECT_INIT + DMA : { * ( .int52 ) } > INT52 type = VECT_INIT + CC1101 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + ADC12 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_B0 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_A0 : { * ( .int58 ) } > INT58 type = VECT_INIT + WDT : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l cc430f6137.cmd + diff --git a/msp430/lnk_cc430f6143.cmd b/msp430/lnk_cc430f6143.cmd new file mode 100644 index 00000000..46753347 --- /dev/null +++ b/msp430/lnk_cc430f6143.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_cc430f6143.cmd - LINKER COMMAND FILE FOR LINKING CC430F6143 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x07FE + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xE000, length = 0x1F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + AES : { * ( .int45 ) } > INT45 type = VECT_INIT + RTC : { * ( .int46 ) } > INT46 type = VECT_INIT + LCD_B : { * ( .int47 ) } > INT47 type = VECT_INIT + PORT2 : { * ( .int48 ) } > INT48 type = VECT_INIT + PORT1 : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER1_A1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER1_A0 : { * ( .int51 ) } > INT51 type = VECT_INIT + DMA : { * ( .int52 ) } > INT52 type = VECT_INIT + CC1101 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + ADC10 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_B0 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_A0 : { * ( .int58 ) } > INT58 type = VECT_INIT + WDT : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l cc430f6143.cmd + diff --git a/msp430/lnk_cc430f6145.cmd b/msp430/lnk_cc430f6145.cmd new file mode 100644 index 00000000..b6dafc14 --- /dev/null +++ b/msp430/lnk_cc430f6145.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_cc430f6145.cmd - LINKER COMMAND FILE FOR LINKING CC430F6145 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x07FE + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + AES : { * ( .int45 ) } > INT45 type = VECT_INIT + RTC : { * ( .int46 ) } > INT46 type = VECT_INIT + LCD_B : { * ( .int47 ) } > INT47 type = VECT_INIT + PORT2 : { * ( .int48 ) } > INT48 type = VECT_INIT + PORT1 : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER1_A1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER1_A0 : { * ( .int51 ) } > INT51 type = VECT_INIT + DMA : { * ( .int52 ) } > INT52 type = VECT_INIT + CC1101 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + ADC10 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_B0 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_A0 : { * ( .int58 ) } > INT58 type = VECT_INIT + WDT : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l cc430f6145.cmd + diff --git a/msp430/lnk_cc430f6147.cmd b/msp430/lnk_cc430f6147.cmd new file mode 100644 index 00000000..70f40ed2 --- /dev/null +++ b/msp430/lnk_cc430f6147.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_cc430f6147.cmd - LINKER COMMAND FILE FOR LINKING CC430F6147 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0FFE + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + AES : { * ( .int45 ) } > INT45 type = VECT_INIT + RTC : { * ( .int46 ) } > INT46 type = VECT_INIT + LCD_B : { * ( .int47 ) } > INT47 type = VECT_INIT + PORT2 : { * ( .int48 ) } > INT48 type = VECT_INIT + PORT1 : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER1_A1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER1_A0 : { * ( .int51 ) } > INT51 type = VECT_INIT + DMA : { * ( .int52 ) } > INT52 type = VECT_INIT + CC1101 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + ADC10 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_B0 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_A0 : { * ( .int58 ) } > INT58 type = VECT_INIT + WDT : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l cc430f6147.cmd + diff --git a/msp430/lnk_msp430afe221.cmd b/msp430/lnk_msp430afe221.cmd new file mode 100644 index 00000000..4d02968c --- /dev/null +++ b/msp430/lnk_msp430afe221.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430afe221.cmd - LINKER COMMAND FILE FOR LINKING MSP430AFE221 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF000, length = 0x0FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD24 : { * ( .int12 ) } > INT12 type = VECT_INIT + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430afe221.cmd + diff --git a/msp430/lnk_msp430afe222.cmd b/msp430/lnk_msp430afe222.cmd new file mode 100644 index 00000000..41514b16 --- /dev/null +++ b/msp430/lnk_msp430afe222.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430afe222.cmd - LINKER COMMAND FILE FOR LINKING MSP430AFE222 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF000, length = 0x0FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD24 : { * ( .int12 ) } > INT12 type = VECT_INIT + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430afe222.cmd + diff --git a/msp430/lnk_msp430afe223.cmd b/msp430/lnk_msp430afe223.cmd new file mode 100644 index 00000000..946f90d6 --- /dev/null +++ b/msp430/lnk_msp430afe223.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430afe223.cmd - LINKER COMMAND FILE FOR LINKING MSP430AFE223 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF000, length = 0x0FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD24 : { * ( .int12 ) } > INT12 type = VECT_INIT + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430afe223.cmd + diff --git a/msp430/lnk_msp430afe231.cmd b/msp430/lnk_msp430afe231.cmd new file mode 100644 index 00000000..c06d94a8 --- /dev/null +++ b/msp430/lnk_msp430afe231.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430afe231.cmd - LINKER COMMAND FILE FOR LINKING MSP430AFE231 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xE000, length = 0x1FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD24 : { * ( .int12 ) } > INT12 type = VECT_INIT + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430afe231.cmd + diff --git a/msp430/lnk_msp430afe232.cmd b/msp430/lnk_msp430afe232.cmd new file mode 100644 index 00000000..be6df5ec --- /dev/null +++ b/msp430/lnk_msp430afe232.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430afe232.cmd - LINKER COMMAND FILE FOR LINKING MSP430AFE232 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xE000, length = 0x1FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD24 : { * ( .int12 ) } > INT12 type = VECT_INIT + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430afe232.cmd + diff --git a/msp430/lnk_msp430afe233.cmd b/msp430/lnk_msp430afe233.cmd new file mode 100644 index 00000000..83e4be64 --- /dev/null +++ b/msp430/lnk_msp430afe233.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430afe233.cmd - LINKER COMMAND FILE FOR LINKING MSP430AFE233 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xE000, length = 0x1FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD24 : { * ( .int12 ) } > INT12 type = VECT_INIT + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430afe233.cmd + diff --git a/msp430/lnk_msp430afe251.cmd b/msp430/lnk_msp430afe251.cmd new file mode 100644 index 00000000..1e78ecdc --- /dev/null +++ b/msp430/lnk_msp430afe251.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430afe251.cmd - LINKER COMMAND FILE FOR LINKING MSP430AFE251 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xC000, length = 0x3FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD24 : { * ( .int12 ) } > INT12 type = VECT_INIT + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430afe251.cmd + diff --git a/msp430/lnk_msp430afe252.cmd b/msp430/lnk_msp430afe252.cmd new file mode 100644 index 00000000..ae2195ca --- /dev/null +++ b/msp430/lnk_msp430afe252.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430afe252.cmd - LINKER COMMAND FILE FOR LINKING MSP430AFE252 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xC000, length = 0x3FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD24 : { * ( .int12 ) } > INT12 type = VECT_INIT + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430afe252.cmd + diff --git a/msp430/lnk_msp430afe253.cmd b/msp430/lnk_msp430afe253.cmd new file mode 100644 index 00000000..d88b39ee --- /dev/null +++ b/msp430/lnk_msp430afe253.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430afe253.cmd - LINKER COMMAND FILE FOR LINKING MSP430AFE253 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xC000, length = 0x3FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD24 : { * ( .int12 ) } > INT12 type = VECT_INIT + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430afe253.cmd + diff --git a/msp430/lnk_msp430bt5190.cmd b/msp430/lnk_msp430bt5190.cmd new file mode 100644 index 00000000..33aaaae8 --- /dev/null +++ b/msp430/lnk_msp430bt5190.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430bt5190.cmd - LINKER COMMAND FILE FOR LINKING MSP430BT5190 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x5C00, length = 0xA380 + FLASH2 : origin = 0x10000,length = 0x35BF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_B3 : { * ( .int43 ) } > INT43 type = VECT_INIT + USCI_A3 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USCI_B2 : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + ADC12 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_B0 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_A0 : { * ( .int57 ) } > INT57 type = VECT_INIT + WDT : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B1 : { * ( .int59 ) } > INT59 type = VECT_INIT + TIMER0_B0 : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430bt5190.cmd + diff --git a/msp430/lnk_msp430c091.cmd b/msp430/lnk_msp430c091.cmd new file mode 100644 index 00000000..87bc23c5 --- /dev/null +++ b/msp430/lnk_msp430c091.cmd @@ -0,0 +1,138 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430c091.cmd - LINKER COMMAND FILE FOR LINKING MSP430C091 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2380, length = 0x0080 + INFOA : origin = 0x1C00, length = 0x0060 + ROM : origin = 0xFC80, length = 0x0360 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > ROM /* Code */ + .cinit : {} > ROM /* Initialization tables */ + .const : {} > ROM /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO ROM Memory segments */ + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + PORT2 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMER0_A1 : { * ( .int06 ) } > INT06 type = VECT_INIT + TIMER0_A0 : { * ( .int07 ) } > INT07 type = VECT_INIT + PORT1 : { * ( .int08 ) } > INT08 type = VECT_INIT + APOOL : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + TIMER1_A1 : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A0 : { * ( .int12 ) } > INT12 type = VECT_INIT + UNMI : { * ( .int13 ) } > INT13 type = VECT_INIT + SYSNMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430c091.cmd + diff --git a/msp430/lnk_msp430c092.cmd b/msp430/lnk_msp430c092.cmd new file mode 100644 index 00000000..3c245e80 --- /dev/null +++ b/msp430/lnk_msp430c092.cmd @@ -0,0 +1,138 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430c092.cmd - LINKER COMMAND FILE FOR LINKING MSP430C092 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2380, length = 0x0080 + INFOA : origin = 0x1C00, length = 0x0060 + ROM : origin = 0xF880, length = 0x0760 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > ROM /* Code */ + .cinit : {} > ROM /* Initialization tables */ + .const : {} > ROM /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO ROM Memory segments */ + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + PORT2 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMER0_A1 : { * ( .int06 ) } > INT06 type = VECT_INIT + TIMER0_A0 : { * ( .int07 ) } > INT07 type = VECT_INIT + PORT1 : { * ( .int08 ) } > INT08 type = VECT_INIT + APOOL : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + TIMER1_A1 : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A0 : { * ( .int12 ) } > INT12 type = VECT_INIT + UNMI : { * ( .int13 ) } > INT13 type = VECT_INIT + SYSNMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430c092.cmd + diff --git a/msp430/lnk_msp430c111.cmd b/msp430/lnk_msp430c111.cmd new file mode 100644 index 00000000..048d173c --- /dev/null +++ b/msp430/lnk_msp430c111.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430c111.cmd - LINKER COMMAND FILE FOR LINKING MSP430C111 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + ROM : origin = 0xF800, length = 0x07E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > ROM /* Code */ + .cinit : {} > ROM /* Initialization tables */ + .const : {} > ROM /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430c111.cmd + diff --git a/msp430/lnk_msp430c1111.cmd b/msp430/lnk_msp430c1111.cmd new file mode 100644 index 00000000..b436da62 --- /dev/null +++ b/msp430/lnk_msp430c1111.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430c1111.cmd - LINKER COMMAND FILE FOR LINKING MSP430C1111 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + ROM : origin = 0xF800, length = 0x07E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > ROM /* Code */ + .cinit : {} > ROM /* Initialization tables */ + .const : {} > ROM /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430c1111.cmd + diff --git a/msp430/lnk_msp430c112.cmd b/msp430/lnk_msp430c112.cmd new file mode 100644 index 00000000..a901e5ca --- /dev/null +++ b/msp430/lnk_msp430c112.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430c112.cmd - LINKER COMMAND FILE FOR LINKING MSP430C112 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + ROM : origin = 0xF000, length = 0x0FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > ROM /* Code */ + .cinit : {} > ROM /* Initialization tables */ + .const : {} > ROM /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430c112.cmd + diff --git a/msp430/lnk_msp430c1121.cmd b/msp430/lnk_msp430c1121.cmd new file mode 100644 index 00000000..242f3368 --- /dev/null +++ b/msp430/lnk_msp430c1121.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430c1121.cmd - LINKER COMMAND FILE FOR LINKING MSP430C1121 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + ROM : origin = 0xF000, length = 0x0FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > ROM /* Code */ + .cinit : {} > ROM /* Initialization tables */ + .const : {} > ROM /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430c1121.cmd + diff --git a/msp430/lnk_msp430c1331.cmd b/msp430/lnk_msp430c1331.cmd new file mode 100644 index 00000000..b4d3ffe4 --- /dev/null +++ b/msp430/lnk_msp430c1331.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430c1331.cmd - LINKER COMMAND FILE FOR LINKING MSP430C1331 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + ROM : origin = 0xE000, length = 0x1FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > ROM /* Code */ + .cinit : {} > ROM /* Initialization tables */ + .const : {} > ROM /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430c1331.cmd + diff --git a/msp430/lnk_msp430c1351.cmd b/msp430/lnk_msp430c1351.cmd new file mode 100644 index 00000000..ec7a86ae --- /dev/null +++ b/msp430/lnk_msp430c1351.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430c1351.cmd - LINKER COMMAND FILE FOR LINKING MSP430C1351 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + ROM : origin = 0xC000, length = 0x3FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > ROM /* Code */ + .cinit : {} > ROM /* Initialization tables */ + .const : {} > ROM /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430c1351.cmd + diff --git a/msp430/lnk_msp430c311s.cmd b/msp430/lnk_msp430c311s.cmd new file mode 100644 index 00000000..d00c97f2 --- /dev/null +++ b/msp430/lnk_msp430c311s.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430c311s.cmd - LINKER COMMAND FILE FOR LINKING MSP430C311S PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + ROM : origin = 0xF800, length = 0x07E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > ROM /* Code */ + .cinit : {} > ROM /* Initialization tables */ + .const : {} > ROM /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + PORT0 : { * ( .int00 ) } > INT00 type = VECT_INIT + BASICTIMER : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + TIMERPORT : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + IO1 : { * ( .int12 ) } > INT12 type = VECT_INIT + IO0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430c311s.cmd + diff --git a/msp430/lnk_msp430c312.cmd b/msp430/lnk_msp430c312.cmd new file mode 100644 index 00000000..d99ac465 --- /dev/null +++ b/msp430/lnk_msp430c312.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430c312.cmd - LINKER COMMAND FILE FOR LINKING MSP430C312 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + ROM : origin = 0xF000, length = 0x0FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > ROM /* Code */ + .cinit : {} > ROM /* Initialization tables */ + .const : {} > ROM /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + PORT0 : { * ( .int00 ) } > INT00 type = VECT_INIT + BASICTIMER : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + TIMERPORT : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + IO1 : { * ( .int12 ) } > INT12 type = VECT_INIT + IO0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430c312.cmd + diff --git a/msp430/lnk_msp430c313.cmd b/msp430/lnk_msp430c313.cmd new file mode 100644 index 00000000..d5578b23 --- /dev/null +++ b/msp430/lnk_msp430c313.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430c313.cmd - LINKER COMMAND FILE FOR LINKING MSP430C313 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + ROM : origin = 0xE000, length = 0x1FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > ROM /* Code */ + .cinit : {} > ROM /* Initialization tables */ + .const : {} > ROM /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + PORT0 : { * ( .int00 ) } > INT00 type = VECT_INIT + BASICTIMER : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + TIMERPORT : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + IO1 : { * ( .int12 ) } > INT12 type = VECT_INIT + IO0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430c313.cmd + diff --git a/msp430/lnk_msp430c314.cmd b/msp430/lnk_msp430c314.cmd new file mode 100644 index 00000000..98ed4dce --- /dev/null +++ b/msp430/lnk_msp430c314.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430c314.cmd - LINKER COMMAND FILE FOR LINKING MSP430C314 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + ROM : origin = 0xD000, length = 0x2FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > ROM /* Code */ + .cinit : {} > ROM /* Initialization tables */ + .const : {} > ROM /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + PORT0 : { * ( .int00 ) } > INT00 type = VECT_INIT + BASICTIMER : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + TIMERPORT : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + IO1 : { * ( .int12 ) } > INT12 type = VECT_INIT + IO0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430c314.cmd + diff --git a/msp430/lnk_msp430c315.cmd b/msp430/lnk_msp430c315.cmd new file mode 100644 index 00000000..bb070fda --- /dev/null +++ b/msp430/lnk_msp430c315.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430c315.cmd - LINKER COMMAND FILE FOR LINKING MSP430C315 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + ROM : origin = 0xC000, length = 0x3FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > ROM /* Code */ + .cinit : {} > ROM /* Initialization tables */ + .const : {} > ROM /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + PORT0 : { * ( .int00 ) } > INT00 type = VECT_INIT + BASICTIMER : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + TIMERPORT : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + IO1 : { * ( .int12 ) } > INT12 type = VECT_INIT + IO0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430c315.cmd + diff --git a/msp430/lnk_msp430c323.cmd b/msp430/lnk_msp430c323.cmd new file mode 100644 index 00000000..0c52d11e --- /dev/null +++ b/msp430/lnk_msp430c323.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430c323.cmd - LINKER COMMAND FILE FOR LINKING MSP430C323 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + ROM : origin = 0xE000, length = 0x1FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > ROM /* Code */ + .cinit : {} > ROM /* Initialization tables */ + .const : {} > ROM /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + PORT0 : { * ( .int00 ) } > INT00 type = VECT_INIT + BASICTIMER : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + TIMERPORT : { * ( .int04 ) } > INT04 type = VECT_INIT + ADC : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + IO1 : { * ( .int12 ) } > INT12 type = VECT_INIT + IO0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430c323.cmd + diff --git a/msp430/lnk_msp430c325.cmd b/msp430/lnk_msp430c325.cmd new file mode 100644 index 00000000..99a616d2 --- /dev/null +++ b/msp430/lnk_msp430c325.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430c325.cmd - LINKER COMMAND FILE FOR LINKING MSP430C325 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + ROM : origin = 0xC000, length = 0x3FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > ROM /* Code */ + .cinit : {} > ROM /* Initialization tables */ + .const : {} > ROM /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + PORT0 : { * ( .int00 ) } > INT00 type = VECT_INIT + BASICTIMER : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + TIMERPORT : { * ( .int04 ) } > INT04 type = VECT_INIT + ADC : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + IO1 : { * ( .int12 ) } > INT12 type = VECT_INIT + IO0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430c325.cmd + diff --git a/msp430/lnk_msp430c336.cmd b/msp430/lnk_msp430c336.cmd new file mode 100644 index 00000000..577309eb --- /dev/null +++ b/msp430/lnk_msp430c336.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430c336.cmd - LINKER COMMAND FILE FOR LINKING MSP430C336 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + ROM : origin = 0xA000, length = 0x5FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > ROM /* Code */ + .cinit : {} > ROM /* Initialization tables */ + .const : {} > ROM /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + PORT0 : { * ( .int00 ) } > INT00 type = VECT_INIT + BASICTIMER : { * ( .int01 ) } > INT01 type = VECT_INIT + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + TIMERPORT : { * ( .int04 ) } > INT04 type = VECT_INIT + .int05 : {} > INT05 + USARTTX : { * ( .int06 ) } > INT06 type = VECT_INIT + USARTRX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + IO1 : { * ( .int12 ) } > INT12 type = VECT_INIT + IO0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430c336.cmd + diff --git a/msp430/lnk_msp430c337.cmd b/msp430/lnk_msp430c337.cmd new file mode 100644 index 00000000..334fc2f7 --- /dev/null +++ b/msp430/lnk_msp430c337.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430c337.cmd - LINKER COMMAND FILE FOR LINKING MSP430C337 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + ROM : origin = 0x8000, length = 0x7FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > ROM /* Code */ + .cinit : {} > ROM /* Initialization tables */ + .const : {} > ROM /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + PORT0 : { * ( .int00 ) } > INT00 type = VECT_INIT + BASICTIMER : { * ( .int01 ) } > INT01 type = VECT_INIT + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + TIMERPORT : { * ( .int04 ) } > INT04 type = VECT_INIT + .int05 : {} > INT05 + USARTTX : { * ( .int06 ) } > INT06 type = VECT_INIT + USARTRX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + IO1 : { * ( .int12 ) } > INT12 type = VECT_INIT + IO0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430c337.cmd + diff --git a/msp430/lnk_msp430c412.cmd b/msp430/lnk_msp430c412.cmd new file mode 100644 index 00000000..4298adaf --- /dev/null +++ b/msp430/lnk_msp430c412.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430c412.cmd - LINKER COMMAND FILE FOR LINKING MSP430C412 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + ROM : origin = 0xF000, length = 0x0FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > ROM /* Code */ + .cinit : {} > ROM /* Initialization tables */ + .const : {} > ROM /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430c412.cmd + diff --git a/msp430/lnk_msp430c413.cmd b/msp430/lnk_msp430c413.cmd new file mode 100644 index 00000000..fed069da --- /dev/null +++ b/msp430/lnk_msp430c413.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430c413.cmd - LINKER COMMAND FILE FOR LINKING MSP430C413 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + ROM : origin = 0xE000, length = 0x1FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > ROM /* Code */ + .cinit : {} > ROM /* Initialization tables */ + .const : {} > ROM /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430c413.cmd + diff --git a/msp430/lnk_msp430cg4616.cmd b/msp430/lnk_msp430cg4616.cmd new file mode 100644 index 00000000..c89e20df --- /dev/null +++ b/msp430/lnk_msp430cg4616.cmd @@ -0,0 +1,182 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430cg4616.cmd - LINKER COMMAND FILE FOR LINKING MSP430CG4616 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + ROM : origin = 0x2100, length = 0xDEC0 + ROM2 : origin = 0x10000,length = 0x9000 + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > ROM /* Code */ +#else + .text : {} >> ROM2 | ROM /* Code */ +#endif + .text:_isr : {} > ROM /* ISR Code space */ + .cinit : {} > ROM /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > ROM /* Constant data */ +#else + .const : {} >> ROM | ROM2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO ROM Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + DAC12 : { * ( .int14 ) } > INT14 type = VECT_INIT + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USART1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USART1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + ADC12 : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430cg4616.cmd + diff --git a/msp430/lnk_msp430cg4617.cmd b/msp430/lnk_msp430cg4617.cmd new file mode 100644 index 00000000..6d6946b3 --- /dev/null +++ b/msp430/lnk_msp430cg4617.cmd @@ -0,0 +1,182 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430cg4617.cmd - LINKER COMMAND FILE FOR LINKING MSP430CG4617 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x2000 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + ROM : origin = 0x3100, length = 0xCEC0 + ROM2 : origin = 0x10000,length = 0xA000 + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > ROM /* Code */ +#else + .text : {} >> ROM2 | ROM /* Code */ +#endif + .text:_isr : {} > ROM /* ISR Code space */ + .cinit : {} > ROM /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > ROM /* Constant data */ +#else + .const : {} >> ROM | ROM2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO ROM Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + DAC12 : { * ( .int14 ) } > INT14 type = VECT_INIT + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USART1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USART1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + ADC12 : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430cg4617.cmd + diff --git a/msp430/lnk_msp430cg4618.cmd b/msp430/lnk_msp430cg4618.cmd new file mode 100644 index 00000000..d6a9a018 --- /dev/null +++ b/msp430/lnk_msp430cg4618.cmd @@ -0,0 +1,182 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430cg4618.cmd - LINKER COMMAND FILE FOR LINKING MSP430CG4618 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x2000 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + ROM : origin = 0x3100, length = 0xCEC0 + ROM2 : origin = 0x10000,length = 0x10000 + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > ROM /* Code */ +#else + .text : {} >> ROM2 | ROM /* Code */ +#endif + .text:_isr : {} > ROM /* ISR Code space */ + .cinit : {} > ROM /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > ROM /* Constant data */ +#else + .const : {} >> ROM | ROM2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO ROM Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + DAC12 : { * ( .int14 ) } > INT14 type = VECT_INIT + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USART1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USART1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + ADC12 : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430cg4618.cmd + diff --git a/msp430/lnk_msp430cg4619.cmd b/msp430/lnk_msp430cg4619.cmd new file mode 100644 index 00000000..c6556800 --- /dev/null +++ b/msp430/lnk_msp430cg4619.cmd @@ -0,0 +1,182 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430cg4619.cmd - LINKER COMMAND FILE FOR LINKING MSP430CG4619 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + ROM : origin = 0x2100, length = 0xDEC0 + ROM2 : origin = 0x10000,length = 0x10000 + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > ROM /* Code */ +#else + .text : {} >> ROM2 | ROM /* Code */ +#endif + .text:_isr : {} > ROM /* ISR Code space */ + .cinit : {} > ROM /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > ROM /* Constant data */ +#else + .const : {} >> ROM | ROM2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO ROM Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + DAC12 : { * ( .int14 ) } > INT14 type = VECT_INIT + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USART1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USART1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + ADC12 : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430cg4619.cmd + diff --git a/msp430/lnk_msp430e112.cmd b/msp430/lnk_msp430e112.cmd new file mode 100644 index 00000000..1da5e0bd --- /dev/null +++ b/msp430/lnk_msp430e112.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430e112.cmd - LINKER COMMAND FILE FOR LINKING MSP430E112 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + ROM : origin = 0xF000, length = 0x0FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > ROM /* Code */ + .cinit : {} > ROM /* Initialization tables */ + .const : {} > ROM /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430e112.cmd + diff --git a/msp430/lnk_msp430e313.cmd b/msp430/lnk_msp430e313.cmd new file mode 100644 index 00000000..63c2b89a --- /dev/null +++ b/msp430/lnk_msp430e313.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430e313.cmd - LINKER COMMAND FILE FOR LINKING MSP430E313 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + ROM : origin = 0xE000, length = 0x1FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > ROM /* Code */ + .cinit : {} > ROM /* Initialization tables */ + .const : {} > ROM /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + PORT0 : { * ( .int00 ) } > INT00 type = VECT_INIT + BASICTIMER : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + TIMERPORT : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + IO1 : { * ( .int12 ) } > INT12 type = VECT_INIT + IO0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430e313.cmd + diff --git a/msp430/lnk_msp430e315.cmd b/msp430/lnk_msp430e315.cmd new file mode 100644 index 00000000..30bb9729 --- /dev/null +++ b/msp430/lnk_msp430e315.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430e315.cmd - LINKER COMMAND FILE FOR LINKING MSP430E315 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + ROM : origin = 0xC000, length = 0x3FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > ROM /* Code */ + .cinit : {} > ROM /* Initialization tables */ + .const : {} > ROM /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + PORT0 : { * ( .int00 ) } > INT00 type = VECT_INIT + BASICTIMER : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + TIMERPORT : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + IO1 : { * ( .int12 ) } > INT12 type = VECT_INIT + IO0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430e315.cmd + diff --git a/msp430/lnk_msp430e325.cmd b/msp430/lnk_msp430e325.cmd new file mode 100644 index 00000000..fc969d47 --- /dev/null +++ b/msp430/lnk_msp430e325.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430e325.cmd - LINKER COMMAND FILE FOR LINKING MSP430E325 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + ROM : origin = 0xC000, length = 0x3FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > ROM /* Code */ + .cinit : {} > ROM /* Initialization tables */ + .const : {} > ROM /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + PORT0 : { * ( .int00 ) } > INT00 type = VECT_INIT + BASICTIMER : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + TIMERPORT : { * ( .int04 ) } > INT04 type = VECT_INIT + ADC : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + IO1 : { * ( .int12 ) } > INT12 type = VECT_INIT + IO0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430e325.cmd + diff --git a/msp430/lnk_msp430e337.cmd b/msp430/lnk_msp430e337.cmd new file mode 100644 index 00000000..9d69e5eb --- /dev/null +++ b/msp430/lnk_msp430e337.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430e337.cmd - LINKER COMMAND FILE FOR LINKING MSP430E337 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + ROM : origin = 0x8000, length = 0x7FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > ROM /* Code */ + .cinit : {} > ROM /* Initialization tables */ + .const : {} > ROM /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > ROM /* C++ Constructor tables */ + .binit : {} > ROM /* Boot-time Initialization tables */ + .init_array : {} > ROM /* C++ Constructor tables */ + .mspabi.exidx : {} > ROM /* C++ Constructor tables */ + .mspabi.extab : {} > ROM /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=ROM | ROM2 , run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + PORT0 : { * ( .int00 ) } > INT00 type = VECT_INIT + BASICTIMER : { * ( .int01 ) } > INT01 type = VECT_INIT + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + TIMERPORT : { * ( .int04 ) } > INT04 type = VECT_INIT + .int05 : {} > INT05 + USARTTX : { * ( .int06 ) } > INT06 type = VECT_INIT + USARTRX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + IO1 : { * ( .int12 ) } > INT12 type = VECT_INIT + IO0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430e337.cmd + diff --git a/msp430/lnk_msp430f110.cmd b/msp430/lnk_msp430f110.cmd new file mode 100644 index 00000000..04e85ebe --- /dev/null +++ b/msp430/lnk_msp430f110.cmd @@ -0,0 +1,138 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f110.cmd - LINKER COMMAND FILE FOR LINKING MSP430F110 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x1080, length = 0x0080 + FLASH : origin = 0xFC00, length = 0x03E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f110.cmd + diff --git a/msp430/lnk_msp430f1101.cmd b/msp430/lnk_msp430f1101.cmd new file mode 100644 index 00000000..b5856700 --- /dev/null +++ b/msp430/lnk_msp430f1101.cmd @@ -0,0 +1,138 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f1101.cmd - LINKER COMMAND FILE FOR LINKING MSP430F1101 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x1080, length = 0x0080 + FLASH : origin = 0xFC00, length = 0x03E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f1101.cmd + diff --git a/msp430/lnk_msp430f1101a.cmd b/msp430/lnk_msp430f1101a.cmd new file mode 100644 index 00000000..76af964a --- /dev/null +++ b/msp430/lnk_msp430f1101a.cmd @@ -0,0 +1,138 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f1101a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F1101A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x1080, length = 0x0080 + FLASH : origin = 0xFC00, length = 0x03E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f1101a.cmd + diff --git a/msp430/lnk_msp430f1111.cmd b/msp430/lnk_msp430f1111.cmd new file mode 100644 index 00000000..704af486 --- /dev/null +++ b/msp430/lnk_msp430f1111.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f1111.cmd - LINKER COMMAND FILE FOR LINKING MSP430F1111 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xF800, length = 0x07E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f1111.cmd + diff --git a/msp430/lnk_msp430f1111a.cmd b/msp430/lnk_msp430f1111a.cmd new file mode 100644 index 00000000..917e6833 --- /dev/null +++ b/msp430/lnk_msp430f1111a.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f1111a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F1111A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xF800, length = 0x07E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f1111a.cmd + diff --git a/msp430/lnk_msp430f112.cmd b/msp430/lnk_msp430f112.cmd new file mode 100644 index 00000000..58344d9b --- /dev/null +++ b/msp430/lnk_msp430f112.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f112.cmd - LINKER COMMAND FILE FOR LINKING MSP430F112 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xF000, length = 0x0FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f112.cmd + diff --git a/msp430/lnk_msp430f1121.cmd b/msp430/lnk_msp430f1121.cmd new file mode 100644 index 00000000..03601e0e --- /dev/null +++ b/msp430/lnk_msp430f1121.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f1121.cmd - LINKER COMMAND FILE FOR LINKING MSP430F1121 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xF000, length = 0x0FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f1121.cmd + diff --git a/msp430/lnk_msp430f1121a.cmd b/msp430/lnk_msp430f1121a.cmd new file mode 100644 index 00000000..a5657a85 --- /dev/null +++ b/msp430/lnk_msp430f1121a.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f1121a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F1121A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xF000, length = 0x0FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f1121a.cmd + diff --git a/msp430/lnk_msp430f1122.cmd b/msp430/lnk_msp430f1122.cmd new file mode 100644 index 00000000..f39c1086 --- /dev/null +++ b/msp430/lnk_msp430f1122.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f1122.cmd - LINKER COMMAND FILE FOR LINKING MSP430F1122 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xF000, length = 0x0FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f1122.cmd + diff --git a/msp430/lnk_msp430f1132.cmd b/msp430/lnk_msp430f1132.cmd new file mode 100644 index 00000000..6c404920 --- /dev/null +++ b/msp430/lnk_msp430f1132.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f1132.cmd - LINKER COMMAND FILE FOR LINKING MSP430F1132 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xE000, length = 0x1FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f1132.cmd + diff --git a/msp430/lnk_msp430f122.cmd b/msp430/lnk_msp430f122.cmd new file mode 100644 index 00000000..bd3cccbb --- /dev/null +++ b/msp430/lnk_msp430f122.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f122.cmd - LINKER COMMAND FILE FOR LINKING MSP430F122 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xF000, length = 0x0FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + USART0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USART0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f122.cmd + diff --git a/msp430/lnk_msp430f1222.cmd b/msp430/lnk_msp430f1222.cmd new file mode 100644 index 00000000..efb51189 --- /dev/null +++ b/msp430/lnk_msp430f1222.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f1222.cmd - LINKER COMMAND FILE FOR LINKING MSP430F1222 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xF000, length = 0x0FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USART0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USART0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f1222.cmd + diff --git a/msp430/lnk_msp430f123.cmd b/msp430/lnk_msp430f123.cmd new file mode 100644 index 00000000..6c51e72b --- /dev/null +++ b/msp430/lnk_msp430f123.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f123.cmd - LINKER COMMAND FILE FOR LINKING MSP430F123 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xE000, length = 0x1FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + USART0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USART0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f123.cmd + diff --git a/msp430/lnk_msp430f1232.cmd b/msp430/lnk_msp430f1232.cmd new file mode 100644 index 00000000..b5de0e20 --- /dev/null +++ b/msp430/lnk_msp430f1232.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f1232.cmd - LINKER COMMAND FILE FOR LINKING MSP430F1232 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xE000, length = 0x1FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USART0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USART0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f1232.cmd + diff --git a/msp430/lnk_msp430f133.cmd b/msp430/lnk_msp430f133.cmd new file mode 100644 index 00000000..b274239a --- /dev/null +++ b/msp430/lnk_msp430f133.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f133.cmd - LINKER COMMAND FILE FOR LINKING MSP430F133 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xE000, length = 0x1FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC12 : { * ( .int07 ) } > INT07 type = VECT_INIT + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f133.cmd + diff --git a/msp430/lnk_msp430f135.cmd b/msp430/lnk_msp430f135.cmd new file mode 100644 index 00000000..01fa574f --- /dev/null +++ b/msp430/lnk_msp430f135.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f135.cmd - LINKER COMMAND FILE FOR LINKING MSP430F135 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC12 : { * ( .int07 ) } > INT07 type = VECT_INIT + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f135.cmd + diff --git a/msp430/lnk_msp430f147.cmd b/msp430/lnk_msp430f147.cmd new file mode 100644 index 00000000..43e917df --- /dev/null +++ b/msp430/lnk_msp430f147.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f147.cmd - LINKER COMMAND FILE FOR LINKING MSP430F147 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + USART1TX : { * ( .int02 ) } > INT02 type = VECT_INIT + USART1RX : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC12 : { * ( .int07 ) } > INT07 type = VECT_INIT + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f147.cmd + diff --git a/msp430/lnk_msp430f1471.cmd b/msp430/lnk_msp430f1471.cmd new file mode 100644 index 00000000..0e5d48dc --- /dev/null +++ b/msp430/lnk_msp430f1471.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f1471.cmd - LINKER COMMAND FILE FOR LINKING MSP430F1471 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + USART1TX : { * ( .int02 ) } > INT02 type = VECT_INIT + USART1RX : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f1471.cmd + diff --git a/msp430/lnk_msp430f148.cmd b/msp430/lnk_msp430f148.cmd new file mode 100644 index 00000000..50879067 --- /dev/null +++ b/msp430/lnk_msp430f148.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f148.cmd - LINKER COMMAND FILE FOR LINKING MSP430F148 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBFE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + USART1TX : { * ( .int02 ) } > INT02 type = VECT_INIT + USART1RX : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC12 : { * ( .int07 ) } > INT07 type = VECT_INIT + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f148.cmd + diff --git a/msp430/lnk_msp430f1481.cmd b/msp430/lnk_msp430f1481.cmd new file mode 100644 index 00000000..2646af13 --- /dev/null +++ b/msp430/lnk_msp430f1481.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f1481.cmd - LINKER COMMAND FILE FOR LINKING MSP430F1481 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBFE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + USART1TX : { * ( .int02 ) } > INT02 type = VECT_INIT + USART1RX : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f1481.cmd + diff --git a/msp430/lnk_msp430f149.cmd b/msp430/lnk_msp430f149.cmd new file mode 100644 index 00000000..71f28e6d --- /dev/null +++ b/msp430/lnk_msp430f149.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f149.cmd - LINKER COMMAND FILE FOR LINKING MSP430F149 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x1100, length = 0xEEE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + USART1TX : { * ( .int02 ) } > INT02 type = VECT_INIT + USART1RX : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC12 : { * ( .int07 ) } > INT07 type = VECT_INIT + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f149.cmd + diff --git a/msp430/lnk_msp430f1491.cmd b/msp430/lnk_msp430f1491.cmd new file mode 100644 index 00000000..767d2262 --- /dev/null +++ b/msp430/lnk_msp430f1491.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f1491.cmd - LINKER COMMAND FILE FOR LINKING MSP430F1491 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x1100, length = 0xEEE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + USART1TX : { * ( .int02 ) } > INT02 type = VECT_INIT + USART1RX : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f1491.cmd + diff --git a/msp430/lnk_msp430f155.cmd b/msp430/lnk_msp430f155.cmd new file mode 100644 index 00000000..4702e358 --- /dev/null +++ b/msp430/lnk_msp430f155.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f155.cmd - LINKER COMMAND FILE FOR LINKING MSP430F155 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + DACDMA : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC12 : { * ( .int07 ) } > INT07 type = VECT_INIT + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f155.cmd + diff --git a/msp430/lnk_msp430f156.cmd b/msp430/lnk_msp430f156.cmd new file mode 100644 index 00000000..2f5d71fc --- /dev/null +++ b/msp430/lnk_msp430f156.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f156.cmd - LINKER COMMAND FILE FOR LINKING MSP430F156 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xA000, length = 0x5FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + DACDMA : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC12 : { * ( .int07 ) } > INT07 type = VECT_INIT + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f156.cmd + diff --git a/msp430/lnk_msp430f157.cmd b/msp430/lnk_msp430f157.cmd new file mode 100644 index 00000000..7e1af31a --- /dev/null +++ b/msp430/lnk_msp430f157.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f157.cmd - LINKER COMMAND FILE FOR LINKING MSP430F157 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + DACDMA : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC12 : { * ( .int07 ) } > INT07 type = VECT_INIT + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f157.cmd + diff --git a/msp430/lnk_msp430f1610.cmd b/msp430/lnk_msp430f1610.cmd new file mode 100644 index 00000000..6689a974 --- /dev/null +++ b/msp430/lnk_msp430f1610.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f1610.cmd - LINKER COMMAND FILE FOR LINKING MSP430F1610 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1400 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + DACDMA : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + USART1TX : { * ( .int02 ) } > INT02 type = VECT_INIT + USART1RX : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC12 : { * ( .int07 ) } > INT07 type = VECT_INIT + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f1610.cmd + diff --git a/msp430/lnk_msp430f1611.cmd b/msp430/lnk_msp430f1611.cmd new file mode 100644 index 00000000..bc6a7be1 --- /dev/null +++ b/msp430/lnk_msp430f1611.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f1611.cmd - LINKER COMMAND FILE FOR LINKING MSP430F1611 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x2800 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBFE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + DACDMA : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + USART1TX : { * ( .int02 ) } > INT02 type = VECT_INIT + USART1RX : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC12 : { * ( .int07 ) } > INT07 type = VECT_INIT + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f1611.cmd + diff --git a/msp430/lnk_msp430f1612.cmd b/msp430/lnk_msp430f1612.cmd new file mode 100644 index 00000000..41e8e49e --- /dev/null +++ b/msp430/lnk_msp430f1612.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f1612.cmd - LINKER COMMAND FILE FOR LINKING MSP430F1612 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1400 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x2500, length = 0xDAE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + DACDMA : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + USART1TX : { * ( .int02 ) } > INT02 type = VECT_INIT + USART1RX : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC12 : { * ( .int07 ) } > INT07 type = VECT_INIT + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f1612.cmd + diff --git a/msp430/lnk_msp430f167.cmd b/msp430/lnk_msp430f167.cmd new file mode 100644 index 00000000..0ddf718d --- /dev/null +++ b/msp430/lnk_msp430f167.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f167.cmd - LINKER COMMAND FILE FOR LINKING MSP430F167 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + DACDMA : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + USART1TX : { * ( .int02 ) } > INT02 type = VECT_INIT + USART1RX : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC12 : { * ( .int07 ) } > INT07 type = VECT_INIT + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f167.cmd + diff --git a/msp430/lnk_msp430f168.cmd b/msp430/lnk_msp430f168.cmd new file mode 100644 index 00000000..52dcb8d7 --- /dev/null +++ b/msp430/lnk_msp430f168.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f168.cmd - LINKER COMMAND FILE FOR LINKING MSP430F168 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBFE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + DACDMA : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + USART1TX : { * ( .int02 ) } > INT02 type = VECT_INIT + USART1RX : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC12 : { * ( .int07 ) } > INT07 type = VECT_INIT + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f168.cmd + diff --git a/msp430/lnk_msp430f169.cmd b/msp430/lnk_msp430f169.cmd new file mode 100644 index 00000000..10b42104 --- /dev/null +++ b/msp430/lnk_msp430f169.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f169.cmd - LINKER COMMAND FILE FOR LINKING MSP430F169 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x1100, length = 0xEEE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + DACDMA : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + USART1TX : { * ( .int02 ) } > INT02 type = VECT_INIT + USART1RX : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC12 : { * ( .int07 ) } > INT07 type = VECT_INIT + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f169.cmd + diff --git a/msp430/lnk_msp430f2001.cmd b/msp430/lnk_msp430f2001.cmd new file mode 100644 index 00000000..347aa7ae --- /dev/null +++ b/msp430/lnk_msp430f2001.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2001.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2001 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xFC00, length = 0x03E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2001.cmd + diff --git a/msp430/lnk_msp430f2002.cmd b/msp430/lnk_msp430f2002.cmd new file mode 100644 index 00000000..28d8fadb --- /dev/null +++ b/msp430/lnk_msp430f2002.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2002.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2002 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xFC00, length = 0x03E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + USI : { * ( .int04 ) } > INT04 type = VECT_INIT + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2002.cmd + diff --git a/msp430/lnk_msp430f2003.cmd b/msp430/lnk_msp430f2003.cmd new file mode 100644 index 00000000..6fdb658e --- /dev/null +++ b/msp430/lnk_msp430f2003.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2003.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2003 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xFC00, length = 0x03E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + USI : { * ( .int04 ) } > INT04 type = VECT_INIT + SD16 : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2003.cmd + diff --git a/msp430/lnk_msp430f2011.cmd b/msp430/lnk_msp430f2011.cmd new file mode 100644 index 00000000..727bcd51 --- /dev/null +++ b/msp430/lnk_msp430f2011.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2011.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2011 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF800, length = 0x07E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2011.cmd + diff --git a/msp430/lnk_msp430f2012.cmd b/msp430/lnk_msp430f2012.cmd new file mode 100644 index 00000000..fb216270 --- /dev/null +++ b/msp430/lnk_msp430f2012.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2012.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2012 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF800, length = 0x07E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + USI : { * ( .int04 ) } > INT04 type = VECT_INIT + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2012.cmd + diff --git a/msp430/lnk_msp430f2013.cmd b/msp430/lnk_msp430f2013.cmd new file mode 100644 index 00000000..a70ff193 --- /dev/null +++ b/msp430/lnk_msp430f2013.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2013.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2013 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF800, length = 0x07E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + USI : { * ( .int04 ) } > INT04 type = VECT_INIT + SD16 : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2013.cmd + diff --git a/msp430/lnk_msp430f2101.cmd b/msp430/lnk_msp430f2101.cmd new file mode 100644 index 00000000..a53c5842 --- /dev/null +++ b/msp430/lnk_msp430f2101.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2101.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2101 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xFC00, length = 0x03DE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2101.cmd + diff --git a/msp430/lnk_msp430f2111.cmd b/msp430/lnk_msp430f2111.cmd new file mode 100644 index 00000000..27c3f850 --- /dev/null +++ b/msp430/lnk_msp430f2111.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2111.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2111 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF800, length = 0x07DE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2111.cmd + diff --git a/msp430/lnk_msp430f2112.cmd b/msp430/lnk_msp430f2112.cmd new file mode 100644 index 00000000..da8122b9 --- /dev/null +++ b/msp430/lnk_msp430f2112.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2112.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2112 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF800, length = 0x07DE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2112.cmd + diff --git a/msp430/lnk_msp430f2121.cmd b/msp430/lnk_msp430f2121.cmd new file mode 100644 index 00000000..b05b78d2 --- /dev/null +++ b/msp430/lnk_msp430f2121.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2121.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2121 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF000, length = 0x0FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2121.cmd + diff --git a/msp430/lnk_msp430f2122.cmd b/msp430/lnk_msp430f2122.cmd new file mode 100644 index 00000000..0f3c9690 --- /dev/null +++ b/msp430/lnk_msp430f2122.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2122.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2122 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF000, length = 0x0FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2122.cmd + diff --git a/msp430/lnk_msp430f2131.cmd b/msp430/lnk_msp430f2131.cmd new file mode 100644 index 00000000..f92679f3 --- /dev/null +++ b/msp430/lnk_msp430f2131.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2131.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2131 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xE000, length = 0x1FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2131.cmd + diff --git a/msp430/lnk_msp430f2132.cmd b/msp430/lnk_msp430f2132.cmd new file mode 100644 index 00000000..2211d585 --- /dev/null +++ b/msp430/lnk_msp430f2132.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2132.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2132 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xE000, length = 0x1FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2132.cmd + diff --git a/msp430/lnk_msp430f2232.cmd b/msp430/lnk_msp430f2232.cmd new file mode 100644 index 00000000..7f998579 --- /dev/null +++ b/msp430/lnk_msp430f2232.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2232.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2232 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xE000, length = 0x1FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2232.cmd + diff --git a/msp430/lnk_msp430f2234.cmd b/msp430/lnk_msp430f2234.cmd new file mode 100644 index 00000000..b38c9e26 --- /dev/null +++ b/msp430/lnk_msp430f2234.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2234.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2234 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xE000, length = 0x1FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2234.cmd + diff --git a/msp430/lnk_msp430f2252.cmd b/msp430/lnk_msp430f2252.cmd new file mode 100644 index 00000000..bb093b10 --- /dev/null +++ b/msp430/lnk_msp430f2252.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2252.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2252 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xC000, length = 0x3FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2252.cmd + diff --git a/msp430/lnk_msp430f2254.cmd b/msp430/lnk_msp430f2254.cmd new file mode 100644 index 00000000..64adb55a --- /dev/null +++ b/msp430/lnk_msp430f2254.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2254.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2254 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xC000, length = 0x3FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2254.cmd + diff --git a/msp430/lnk_msp430f2272.cmd b/msp430/lnk_msp430f2272.cmd new file mode 100644 index 00000000..35a24743 --- /dev/null +++ b/msp430/lnk_msp430f2272.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2272.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2272 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x8000, length = 0x7FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2272.cmd + diff --git a/msp430/lnk_msp430f2274.cmd b/msp430/lnk_msp430f2274.cmd new file mode 100644 index 00000000..45956eba --- /dev/null +++ b/msp430/lnk_msp430f2274.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2274.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2274 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x8000, length = 0x7FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2274.cmd + diff --git a/msp430/lnk_msp430f233.cmd b/msp430/lnk_msp430f233.cmd new file mode 100644 index 00000000..4669e266 --- /dev/null +++ b/msp430/lnk_msp430f233.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f233.cmd - LINKER COMMAND FILE FOR LINKING MSP430F233 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xE000, length = 0x1FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC12 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f233.cmd + diff --git a/msp430/lnk_msp430f2330.cmd b/msp430/lnk_msp430f2330.cmd new file mode 100644 index 00000000..eebc60f3 --- /dev/null +++ b/msp430/lnk_msp430f2330.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2330.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2330 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xE000, length = 0x1FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + TRAPINT : { * ( .int00 ) } > INT00 type = VECT_INIT + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2330.cmd + diff --git a/msp430/lnk_msp430f235.cmd b/msp430/lnk_msp430f235.cmd new file mode 100644 index 00000000..d1146cfe --- /dev/null +++ b/msp430/lnk_msp430f235.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f235.cmd - LINKER COMMAND FILE FOR LINKING MSP430F235 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xC000, length = 0x3FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC12 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f235.cmd + diff --git a/msp430/lnk_msp430f2350.cmd b/msp430/lnk_msp430f2350.cmd new file mode 100644 index 00000000..c54c17a2 --- /dev/null +++ b/msp430/lnk_msp430f2350.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2350.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2350 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xC000, length = 0x3FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + TRAPINT : { * ( .int00 ) } > INT00 type = VECT_INIT + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2350.cmd + diff --git a/msp430/lnk_msp430f2370.cmd b/msp430/lnk_msp430f2370.cmd new file mode 100644 index 00000000..f588304b --- /dev/null +++ b/msp430/lnk_msp430f2370.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2370.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2370 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x8000, length = 0x7FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + TRAPINT : { * ( .int00 ) } > INT00 type = VECT_INIT + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2370.cmd + diff --git a/msp430/lnk_msp430f2410.cmd b/msp430/lnk_msp430f2410.cmd new file mode 100644 index 00000000..03aca540 --- /dev/null +++ b/msp430/lnk_msp430f2410.cmd @@ -0,0 +1,176 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2410.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2410 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x2100, length = 0xDEC0 + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + RESERVED0 : { * ( .int00 ) } > INT00 type = VECT_INIT + RESERVED1 : { * ( .int01 ) } > INT01 type = VECT_INIT + RESERVED2 : { * ( .int02 ) } > INT02 type = VECT_INIT + RESERVED3 : { * ( .int03 ) } > INT03 type = VECT_INIT + RESERVED4 : { * ( .int04 ) } > INT04 type = VECT_INIT + RESERVED5 : { * ( .int05 ) } > INT05 type = VECT_INIT + RESERVED6 : { * ( .int06 ) } > INT06 type = VECT_INIT + RESERVED7 : { * ( .int07 ) } > INT07 type = VECT_INIT + RESERVED8 : { * ( .int08 ) } > INT08 type = VECT_INIT + RESERVED9 : { * ( .int09 ) } > INT09 type = VECT_INIT + RESERVED10 : { * ( .int10 ) } > INT10 type = VECT_INIT + RESERVED11 : { * ( .int11 ) } > INT11 type = VECT_INIT + RESERVED12 : { * ( .int12 ) } > INT12 type = VECT_INIT + RESERVED13 : { * ( .int13 ) } > INT13 type = VECT_INIT + RESERVED14 : { * ( .int14 ) } > INT14 type = VECT_INIT + USCIAB1TX : { * ( .int16 ) } > INT16 type = VECT_INIT + USCIAB1RX : { * ( .int17 ) } > INT17 type = VECT_INIT + PORT1 : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT2 : { * ( .int19 ) } > INT19 type = VECT_INIT + RESERVED20 : { * ( .int20 ) } > INT20 type = VECT_INIT + ADC12 : { * ( .int21 ) } > INT21 type = VECT_INIT + USCIAB0TX : { * ( .int22 ) } > INT22 type = VECT_INIT + USCIAB0RX : { * ( .int23 ) } > INT23 type = VECT_INIT + TIMERA1 : { * ( .int24 ) } > INT24 type = VECT_INIT + TIMERA0 : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2410.cmd + diff --git a/msp430/lnk_msp430f2416.cmd b/msp430/lnk_msp430f2416.cmd new file mode 100644 index 00000000..00663fd7 --- /dev/null +++ b/msp430/lnk_msp430f2416.cmd @@ -0,0 +1,188 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2416.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2416 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x2100, length = 0xDEBE + FLASH2 : origin = 0x10000,length = 0x9000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + RESERVED0 : { * ( .int00 ) } > INT00 type = VECT_INIT + RESERVED1 : { * ( .int01 ) } > INT01 type = VECT_INIT + RESERVED2 : { * ( .int02 ) } > INT02 type = VECT_INIT + RESERVED3 : { * ( .int03 ) } > INT03 type = VECT_INIT + RESERVED4 : { * ( .int04 ) } > INT04 type = VECT_INIT + RESERVED5 : { * ( .int05 ) } > INT05 type = VECT_INIT + RESERVED6 : { * ( .int06 ) } > INT06 type = VECT_INIT + RESERVED7 : { * ( .int07 ) } > INT07 type = VECT_INIT + RESERVED8 : { * ( .int08 ) } > INT08 type = VECT_INIT + RESERVED9 : { * ( .int09 ) } > INT09 type = VECT_INIT + RESERVED10 : { * ( .int10 ) } > INT10 type = VECT_INIT + RESERVED11 : { * ( .int11 ) } > INT11 type = VECT_INIT + RESERVED12 : { * ( .int12 ) } > INT12 type = VECT_INIT + RESERVED13 : { * ( .int13 ) } > INT13 type = VECT_INIT + RESERVED14 : { * ( .int14 ) } > INT14 type = VECT_INIT + RESERVED15 : { * ( .int15 ) } > INT15 type = VECT_INIT + USCIAB1TX : { * ( .int16 ) } > INT16 type = VECT_INIT + USCIAB1RX : { * ( .int17 ) } > INT17 type = VECT_INIT + PORT1 : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT2 : { * ( .int19 ) } > INT19 type = VECT_INIT + RESERVED20 : { * ( .int20 ) } > INT20 type = VECT_INIT + ADC12 : { * ( .int21 ) } > INT21 type = VECT_INIT + USCIAB0TX : { * ( .int22 ) } > INT22 type = VECT_INIT + USCIAB0RX : { * ( .int23 ) } > INT23 type = VECT_INIT + TIMERA1 : { * ( .int24 ) } > INT24 type = VECT_INIT + TIMERA0 : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2416.cmd + diff --git a/msp430/lnk_msp430f2417.cmd b/msp430/lnk_msp430f2417.cmd new file mode 100644 index 00000000..364483da --- /dev/null +++ b/msp430/lnk_msp430f2417.cmd @@ -0,0 +1,188 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2417.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2417 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x2000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x3100, length = 0xCEBE + FLASH2 : origin = 0x10000,length = 0xA000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + RESERVED0 : { * ( .int00 ) } > INT00 type = VECT_INIT + RESERVED1 : { * ( .int01 ) } > INT01 type = VECT_INIT + RESERVED2 : { * ( .int02 ) } > INT02 type = VECT_INIT + RESERVED3 : { * ( .int03 ) } > INT03 type = VECT_INIT + RESERVED4 : { * ( .int04 ) } > INT04 type = VECT_INIT + RESERVED5 : { * ( .int05 ) } > INT05 type = VECT_INIT + RESERVED6 : { * ( .int06 ) } > INT06 type = VECT_INIT + RESERVED7 : { * ( .int07 ) } > INT07 type = VECT_INIT + RESERVED8 : { * ( .int08 ) } > INT08 type = VECT_INIT + RESERVED9 : { * ( .int09 ) } > INT09 type = VECT_INIT + RESERVED10 : { * ( .int10 ) } > INT10 type = VECT_INIT + RESERVED11 : { * ( .int11 ) } > INT11 type = VECT_INIT + RESERVED12 : { * ( .int12 ) } > INT12 type = VECT_INIT + RESERVED13 : { * ( .int13 ) } > INT13 type = VECT_INIT + RESERVED14 : { * ( .int14 ) } > INT14 type = VECT_INIT + RESERVED15 : { * ( .int15 ) } > INT15 type = VECT_INIT + USCIAB1TX : { * ( .int16 ) } > INT16 type = VECT_INIT + USCIAB1RX : { * ( .int17 ) } > INT17 type = VECT_INIT + PORT1 : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT2 : { * ( .int19 ) } > INT19 type = VECT_INIT + RESERVED20 : { * ( .int20 ) } > INT20 type = VECT_INIT + ADC12 : { * ( .int21 ) } > INT21 type = VECT_INIT + USCIAB0TX : { * ( .int22 ) } > INT22 type = VECT_INIT + USCIAB0RX : { * ( .int23 ) } > INT23 type = VECT_INIT + TIMERA1 : { * ( .int24 ) } > INT24 type = VECT_INIT + TIMERA0 : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2417.cmd + diff --git a/msp430/lnk_msp430f2418.cmd b/msp430/lnk_msp430f2418.cmd new file mode 100644 index 00000000..fe52511f --- /dev/null +++ b/msp430/lnk_msp430f2418.cmd @@ -0,0 +1,188 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2418.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2418 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x2000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x3100, length = 0xCEBE + FLASH2 : origin = 0x10000,length = 0x10000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + RESERVED0 : { * ( .int00 ) } > INT00 type = VECT_INIT + RESERVED1 : { * ( .int01 ) } > INT01 type = VECT_INIT + RESERVED2 : { * ( .int02 ) } > INT02 type = VECT_INIT + RESERVED3 : { * ( .int03 ) } > INT03 type = VECT_INIT + RESERVED4 : { * ( .int04 ) } > INT04 type = VECT_INIT + RESERVED5 : { * ( .int05 ) } > INT05 type = VECT_INIT + RESERVED6 : { * ( .int06 ) } > INT06 type = VECT_INIT + RESERVED7 : { * ( .int07 ) } > INT07 type = VECT_INIT + RESERVED8 : { * ( .int08 ) } > INT08 type = VECT_INIT + RESERVED9 : { * ( .int09 ) } > INT09 type = VECT_INIT + RESERVED10 : { * ( .int10 ) } > INT10 type = VECT_INIT + RESERVED11 : { * ( .int11 ) } > INT11 type = VECT_INIT + RESERVED12 : { * ( .int12 ) } > INT12 type = VECT_INIT + RESERVED13 : { * ( .int13 ) } > INT13 type = VECT_INIT + RESERVED14 : { * ( .int14 ) } > INT14 type = VECT_INIT + RESERVED15 : { * ( .int15 ) } > INT15 type = VECT_INIT + USCIAB1TX : { * ( .int16 ) } > INT16 type = VECT_INIT + USCIAB1RX : { * ( .int17 ) } > INT17 type = VECT_INIT + PORT1 : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT2 : { * ( .int19 ) } > INT19 type = VECT_INIT + RESERVED20 : { * ( .int20 ) } > INT20 type = VECT_INIT + ADC12 : { * ( .int21 ) } > INT21 type = VECT_INIT + USCIAB0TX : { * ( .int22 ) } > INT22 type = VECT_INIT + USCIAB0RX : { * ( .int23 ) } > INT23 type = VECT_INIT + TIMERA1 : { * ( .int24 ) } > INT24 type = VECT_INIT + TIMERA0 : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2418.cmd + diff --git a/msp430/lnk_msp430f2419.cmd b/msp430/lnk_msp430f2419.cmd new file mode 100644 index 00000000..31ff9b10 --- /dev/null +++ b/msp430/lnk_msp430f2419.cmd @@ -0,0 +1,188 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2419.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2419 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x2100, length = 0xDEBE + FLASH2 : origin = 0x10000,length = 0x10000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + RESERVED0 : { * ( .int00 ) } > INT00 type = VECT_INIT + RESERVED1 : { * ( .int01 ) } > INT01 type = VECT_INIT + RESERVED2 : { * ( .int02 ) } > INT02 type = VECT_INIT + RESERVED3 : { * ( .int03 ) } > INT03 type = VECT_INIT + RESERVED4 : { * ( .int04 ) } > INT04 type = VECT_INIT + RESERVED5 : { * ( .int05 ) } > INT05 type = VECT_INIT + RESERVED6 : { * ( .int06 ) } > INT06 type = VECT_INIT + RESERVED7 : { * ( .int07 ) } > INT07 type = VECT_INIT + RESERVED8 : { * ( .int08 ) } > INT08 type = VECT_INIT + RESERVED9 : { * ( .int09 ) } > INT09 type = VECT_INIT + RESERVED10 : { * ( .int10 ) } > INT10 type = VECT_INIT + RESERVED11 : { * ( .int11 ) } > INT11 type = VECT_INIT + RESERVED12 : { * ( .int12 ) } > INT12 type = VECT_INIT + RESERVED13 : { * ( .int13 ) } > INT13 type = VECT_INIT + RESERVED14 : { * ( .int14 ) } > INT14 type = VECT_INIT + RESERVED15 : { * ( .int15 ) } > INT15 type = VECT_INIT + USCIAB1TX : { * ( .int16 ) } > INT16 type = VECT_INIT + USCIAB1RX : { * ( .int17 ) } > INT17 type = VECT_INIT + PORT1 : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT2 : { * ( .int19 ) } > INT19 type = VECT_INIT + RESERVED20 : { * ( .int20 ) } > INT20 type = VECT_INIT + ADC12 : { * ( .int21 ) } > INT21 type = VECT_INIT + USCIAB0TX : { * ( .int22 ) } > INT22 type = VECT_INIT + USCIAB0RX : { * ( .int23 ) } > INT23 type = VECT_INIT + TIMERA1 : { * ( .int24 ) } > INT24 type = VECT_INIT + TIMERA0 : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2419.cmd + diff --git a/msp430/lnk_msp430f247.cmd b/msp430/lnk_msp430f247.cmd new file mode 100644 index 00000000..a1ffddab --- /dev/null +++ b/msp430/lnk_msp430f247.cmd @@ -0,0 +1,176 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f247.cmd - LINKER COMMAND FILE FOR LINKING MSP430F247 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x8000, length = 0x7FC0 + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + RESERVED0 : { * ( .int00 ) } > INT00 type = VECT_INIT + RESERVED1 : { * ( .int01 ) } > INT01 type = VECT_INIT + RESERVED2 : { * ( .int02 ) } > INT02 type = VECT_INIT + RESERVED3 : { * ( .int03 ) } > INT03 type = VECT_INIT + RESERVED4 : { * ( .int04 ) } > INT04 type = VECT_INIT + RESERVED5 : { * ( .int05 ) } > INT05 type = VECT_INIT + RESERVED6 : { * ( .int06 ) } > INT06 type = VECT_INIT + RESERVED7 : { * ( .int07 ) } > INT07 type = VECT_INIT + RESERVED8 : { * ( .int08 ) } > INT08 type = VECT_INIT + RESERVED9 : { * ( .int09 ) } > INT09 type = VECT_INIT + RESERVED10 : { * ( .int10 ) } > INT10 type = VECT_INIT + RESERVED11 : { * ( .int11 ) } > INT11 type = VECT_INIT + RESERVED12 : { * ( .int12 ) } > INT12 type = VECT_INIT + RESERVED13 : { * ( .int13 ) } > INT13 type = VECT_INIT + RESERVED14 : { * ( .int14 ) } > INT14 type = VECT_INIT + USCIAB1TX : { * ( .int16 ) } > INT16 type = VECT_INIT + USCIAB1RX : { * ( .int17 ) } > INT17 type = VECT_INIT + PORT1 : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT2 : { * ( .int19 ) } > INT19 type = VECT_INIT + RESERVED20 : { * ( .int20 ) } > INT20 type = VECT_INIT + ADC12 : { * ( .int21 ) } > INT21 type = VECT_INIT + USCIAB0TX : { * ( .int22 ) } > INT22 type = VECT_INIT + USCIAB0RX : { * ( .int23 ) } > INT23 type = VECT_INIT + TIMERA1 : { * ( .int24 ) } > INT24 type = VECT_INIT + TIMERA0 : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f247.cmd + diff --git a/msp430/lnk_msp430f2471.cmd b/msp430/lnk_msp430f2471.cmd new file mode 100644 index 00000000..615a6c81 --- /dev/null +++ b/msp430/lnk_msp430f2471.cmd @@ -0,0 +1,176 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2471.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2471 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x8000, length = 0x7FC0 + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + RESERVED0 : { * ( .int00 ) } > INT00 type = VECT_INIT + RESERVED1 : { * ( .int01 ) } > INT01 type = VECT_INIT + RESERVED2 : { * ( .int02 ) } > INT02 type = VECT_INIT + RESERVED3 : { * ( .int03 ) } > INT03 type = VECT_INIT + RESERVED4 : { * ( .int04 ) } > INT04 type = VECT_INIT + RESERVED5 : { * ( .int05 ) } > INT05 type = VECT_INIT + RESERVED6 : { * ( .int06 ) } > INT06 type = VECT_INIT + RESERVED7 : { * ( .int07 ) } > INT07 type = VECT_INIT + RESERVED8 : { * ( .int08 ) } > INT08 type = VECT_INIT + RESERVED9 : { * ( .int09 ) } > INT09 type = VECT_INIT + RESERVED10 : { * ( .int10 ) } > INT10 type = VECT_INIT + RESERVED11 : { * ( .int11 ) } > INT11 type = VECT_INIT + RESERVED12 : { * ( .int12 ) } > INT12 type = VECT_INIT + RESERVED13 : { * ( .int13 ) } > INT13 type = VECT_INIT + RESERVED14 : { * ( .int14 ) } > INT14 type = VECT_INIT + USCIAB1TX : { * ( .int16 ) } > INT16 type = VECT_INIT + USCIAB1RX : { * ( .int17 ) } > INT17 type = VECT_INIT + PORT1 : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT2 : { * ( .int19 ) } > INT19 type = VECT_INIT + RESERVED20 : { * ( .int20 ) } > INT20 type = VECT_INIT + RESERVED21 : { * ( .int21 ) } > INT21 type = VECT_INIT + USCIAB0TX : { * ( .int22 ) } > INT22 type = VECT_INIT + USCIAB0RX : { * ( .int23 ) } > INT23 type = VECT_INIT + TIMERA1 : { * ( .int24 ) } > INT24 type = VECT_INIT + TIMERA0 : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2471.cmd + diff --git a/msp430/lnk_msp430f248.cmd b/msp430/lnk_msp430f248.cmd new file mode 100644 index 00000000..7387786b --- /dev/null +++ b/msp430/lnk_msp430f248.cmd @@ -0,0 +1,176 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f248.cmd - LINKER COMMAND FILE FOR LINKING MSP430F248 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x4000, length = 0xBFC0 + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + RESERVED0 : { * ( .int00 ) } > INT00 type = VECT_INIT + RESERVED1 : { * ( .int01 ) } > INT01 type = VECT_INIT + RESERVED2 : { * ( .int02 ) } > INT02 type = VECT_INIT + RESERVED3 : { * ( .int03 ) } > INT03 type = VECT_INIT + RESERVED4 : { * ( .int04 ) } > INT04 type = VECT_INIT + RESERVED5 : { * ( .int05 ) } > INT05 type = VECT_INIT + RESERVED6 : { * ( .int06 ) } > INT06 type = VECT_INIT + RESERVED7 : { * ( .int07 ) } > INT07 type = VECT_INIT + RESERVED8 : { * ( .int08 ) } > INT08 type = VECT_INIT + RESERVED9 : { * ( .int09 ) } > INT09 type = VECT_INIT + RESERVED10 : { * ( .int10 ) } > INT10 type = VECT_INIT + RESERVED11 : { * ( .int11 ) } > INT11 type = VECT_INIT + RESERVED12 : { * ( .int12 ) } > INT12 type = VECT_INIT + RESERVED13 : { * ( .int13 ) } > INT13 type = VECT_INIT + RESERVED14 : { * ( .int14 ) } > INT14 type = VECT_INIT + USCIAB1TX : { * ( .int16 ) } > INT16 type = VECT_INIT + USCIAB1RX : { * ( .int17 ) } > INT17 type = VECT_INIT + PORT1 : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT2 : { * ( .int19 ) } > INT19 type = VECT_INIT + RESERVED20 : { * ( .int20 ) } > INT20 type = VECT_INIT + ADC12 : { * ( .int21 ) } > INT21 type = VECT_INIT + USCIAB0TX : { * ( .int22 ) } > INT22 type = VECT_INIT + USCIAB0RX : { * ( .int23 ) } > INT23 type = VECT_INIT + TIMERA1 : { * ( .int24 ) } > INT24 type = VECT_INIT + TIMERA0 : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f248.cmd + diff --git a/msp430/lnk_msp430f2481.cmd b/msp430/lnk_msp430f2481.cmd new file mode 100644 index 00000000..5a2bec06 --- /dev/null +++ b/msp430/lnk_msp430f2481.cmd @@ -0,0 +1,176 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2481.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2481 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x4000, length = 0xBFC0 + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + RESERVED0 : { * ( .int00 ) } > INT00 type = VECT_INIT + RESERVED1 : { * ( .int01 ) } > INT01 type = VECT_INIT + RESERVED2 : { * ( .int02 ) } > INT02 type = VECT_INIT + RESERVED3 : { * ( .int03 ) } > INT03 type = VECT_INIT + RESERVED4 : { * ( .int04 ) } > INT04 type = VECT_INIT + RESERVED5 : { * ( .int05 ) } > INT05 type = VECT_INIT + RESERVED6 : { * ( .int06 ) } > INT06 type = VECT_INIT + RESERVED7 : { * ( .int07 ) } > INT07 type = VECT_INIT + RESERVED8 : { * ( .int08 ) } > INT08 type = VECT_INIT + RESERVED9 : { * ( .int09 ) } > INT09 type = VECT_INIT + RESERVED10 : { * ( .int10 ) } > INT10 type = VECT_INIT + RESERVED11 : { * ( .int11 ) } > INT11 type = VECT_INIT + RESERVED12 : { * ( .int12 ) } > INT12 type = VECT_INIT + RESERVED13 : { * ( .int13 ) } > INT13 type = VECT_INIT + RESERVED14 : { * ( .int14 ) } > INT14 type = VECT_INIT + USCIAB1TX : { * ( .int16 ) } > INT16 type = VECT_INIT + USCIAB1RX : { * ( .int17 ) } > INT17 type = VECT_INIT + PORT1 : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT2 : { * ( .int19 ) } > INT19 type = VECT_INIT + RESERVED20 : { * ( .int20 ) } > INT20 type = VECT_INIT + RESERVED21 : { * ( .int21 ) } > INT21 type = VECT_INIT + USCIAB0TX : { * ( .int22 ) } > INT22 type = VECT_INIT + USCIAB0RX : { * ( .int23 ) } > INT23 type = VECT_INIT + TIMERA1 : { * ( .int24 ) } > INT24 type = VECT_INIT + TIMERA0 : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2481.cmd + diff --git a/msp430/lnk_msp430f249.cmd b/msp430/lnk_msp430f249.cmd new file mode 100644 index 00000000..a87a9105 --- /dev/null +++ b/msp430/lnk_msp430f249.cmd @@ -0,0 +1,176 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f249.cmd - LINKER COMMAND FILE FOR LINKING MSP430F249 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x1100, length = 0xEEC0 + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + RESERVED0 : { * ( .int00 ) } > INT00 type = VECT_INIT + RESERVED1 : { * ( .int01 ) } > INT01 type = VECT_INIT + RESERVED2 : { * ( .int02 ) } > INT02 type = VECT_INIT + RESERVED3 : { * ( .int03 ) } > INT03 type = VECT_INIT + RESERVED4 : { * ( .int04 ) } > INT04 type = VECT_INIT + RESERVED5 : { * ( .int05 ) } > INT05 type = VECT_INIT + RESERVED6 : { * ( .int06 ) } > INT06 type = VECT_INIT + RESERVED7 : { * ( .int07 ) } > INT07 type = VECT_INIT + RESERVED8 : { * ( .int08 ) } > INT08 type = VECT_INIT + RESERVED9 : { * ( .int09 ) } > INT09 type = VECT_INIT + RESERVED10 : { * ( .int10 ) } > INT10 type = VECT_INIT + RESERVED11 : { * ( .int11 ) } > INT11 type = VECT_INIT + RESERVED12 : { * ( .int12 ) } > INT12 type = VECT_INIT + RESERVED13 : { * ( .int13 ) } > INT13 type = VECT_INIT + RESERVED14 : { * ( .int14 ) } > INT14 type = VECT_INIT + USCIAB1TX : { * ( .int16 ) } > INT16 type = VECT_INIT + USCIAB1RX : { * ( .int17 ) } > INT17 type = VECT_INIT + PORT1 : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT2 : { * ( .int19 ) } > INT19 type = VECT_INIT + RESERVED20 : { * ( .int20 ) } > INT20 type = VECT_INIT + ADC12 : { * ( .int21 ) } > INT21 type = VECT_INIT + USCIAB0TX : { * ( .int22 ) } > INT22 type = VECT_INIT + USCIAB0RX : { * ( .int23 ) } > INT23 type = VECT_INIT + TIMERA1 : { * ( .int24 ) } > INT24 type = VECT_INIT + TIMERA0 : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f249.cmd + diff --git a/msp430/lnk_msp430f2491.cmd b/msp430/lnk_msp430f2491.cmd new file mode 100644 index 00000000..8cf8a1b5 --- /dev/null +++ b/msp430/lnk_msp430f2491.cmd @@ -0,0 +1,176 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2491.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2491 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x1100, length = 0xEEC0 + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + RESERVED0 : { * ( .int00 ) } > INT00 type = VECT_INIT + RESERVED1 : { * ( .int01 ) } > INT01 type = VECT_INIT + RESERVED2 : { * ( .int02 ) } > INT02 type = VECT_INIT + RESERVED3 : { * ( .int03 ) } > INT03 type = VECT_INIT + RESERVED4 : { * ( .int04 ) } > INT04 type = VECT_INIT + RESERVED5 : { * ( .int05 ) } > INT05 type = VECT_INIT + RESERVED6 : { * ( .int06 ) } > INT06 type = VECT_INIT + RESERVED7 : { * ( .int07 ) } > INT07 type = VECT_INIT + RESERVED8 : { * ( .int08 ) } > INT08 type = VECT_INIT + RESERVED9 : { * ( .int09 ) } > INT09 type = VECT_INIT + RESERVED10 : { * ( .int10 ) } > INT10 type = VECT_INIT + RESERVED11 : { * ( .int11 ) } > INT11 type = VECT_INIT + RESERVED12 : { * ( .int12 ) } > INT12 type = VECT_INIT + RESERVED13 : { * ( .int13 ) } > INT13 type = VECT_INIT + RESERVED14 : { * ( .int14 ) } > INT14 type = VECT_INIT + USCIAB1TX : { * ( .int16 ) } > INT16 type = VECT_INIT + USCIAB1RX : { * ( .int17 ) } > INT17 type = VECT_INIT + PORT1 : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT2 : { * ( .int19 ) } > INT19 type = VECT_INIT + RESERVED20 : { * ( .int20 ) } > INT20 type = VECT_INIT + RESERVED21 : { * ( .int21 ) } > INT21 type = VECT_INIT + USCIAB0TX : { * ( .int22 ) } > INT22 type = VECT_INIT + USCIAB0RX : { * ( .int23 ) } > INT23 type = VECT_INIT + TIMERA1 : { * ( .int24 ) } > INT24 type = VECT_INIT + TIMERA0 : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2491.cmd + diff --git a/msp430/lnk_msp430f2616.cmd b/msp430/lnk_msp430f2616.cmd new file mode 100644 index 00000000..5ce91a41 --- /dev/null +++ b/msp430/lnk_msp430f2616.cmd @@ -0,0 +1,188 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2616.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2616 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x2100, length = 0xDEBE + FLASH2 : origin = 0x10000,length = 0x9000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + RESERVED0 : { * ( .int00 ) } > INT00 type = VECT_INIT + RESERVED1 : { * ( .int01 ) } > INT01 type = VECT_INIT + RESERVED2 : { * ( .int02 ) } > INT02 type = VECT_INIT + RESERVED3 : { * ( .int03 ) } > INT03 type = VECT_INIT + RESERVED4 : { * ( .int04 ) } > INT04 type = VECT_INIT + RESERVED5 : { * ( .int05 ) } > INT05 type = VECT_INIT + RESERVED6 : { * ( .int06 ) } > INT06 type = VECT_INIT + RESERVED7 : { * ( .int07 ) } > INT07 type = VECT_INIT + RESERVED8 : { * ( .int08 ) } > INT08 type = VECT_INIT + RESERVED9 : { * ( .int09 ) } > INT09 type = VECT_INIT + RESERVED10 : { * ( .int10 ) } > INT10 type = VECT_INIT + RESERVED11 : { * ( .int11 ) } > INT11 type = VECT_INIT + RESERVED12 : { * ( .int12 ) } > INT12 type = VECT_INIT + RESERVED13 : { * ( .int13 ) } > INT13 type = VECT_INIT + DAC12 : { * ( .int14 ) } > INT14 type = VECT_INIT + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + USCIAB1TX : { * ( .int16 ) } > INT16 type = VECT_INIT + USCIAB1RX : { * ( .int17 ) } > INT17 type = VECT_INIT + PORT1 : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT2 : { * ( .int19 ) } > INT19 type = VECT_INIT + RESERVED20 : { * ( .int20 ) } > INT20 type = VECT_INIT + ADC12 : { * ( .int21 ) } > INT21 type = VECT_INIT + USCIAB0TX : { * ( .int22 ) } > INT22 type = VECT_INIT + USCIAB0RX : { * ( .int23 ) } > INT23 type = VECT_INIT + TIMERA1 : { * ( .int24 ) } > INT24 type = VECT_INIT + TIMERA0 : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2616.cmd + diff --git a/msp430/lnk_msp430f2617.cmd b/msp430/lnk_msp430f2617.cmd new file mode 100644 index 00000000..d2d9b22a --- /dev/null +++ b/msp430/lnk_msp430f2617.cmd @@ -0,0 +1,188 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2617.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2617 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x2000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x3100, length = 0xCEBE + FLASH2 : origin = 0x10000,length = 0xA000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + RESERVED0 : { * ( .int00 ) } > INT00 type = VECT_INIT + RESERVED1 : { * ( .int01 ) } > INT01 type = VECT_INIT + RESERVED2 : { * ( .int02 ) } > INT02 type = VECT_INIT + RESERVED3 : { * ( .int03 ) } > INT03 type = VECT_INIT + RESERVED4 : { * ( .int04 ) } > INT04 type = VECT_INIT + RESERVED5 : { * ( .int05 ) } > INT05 type = VECT_INIT + RESERVED6 : { * ( .int06 ) } > INT06 type = VECT_INIT + RESERVED7 : { * ( .int07 ) } > INT07 type = VECT_INIT + RESERVED8 : { * ( .int08 ) } > INT08 type = VECT_INIT + RESERVED9 : { * ( .int09 ) } > INT09 type = VECT_INIT + RESERVED10 : { * ( .int10 ) } > INT10 type = VECT_INIT + RESERVED11 : { * ( .int11 ) } > INT11 type = VECT_INIT + RESERVED12 : { * ( .int12 ) } > INT12 type = VECT_INIT + RESERVED13 : { * ( .int13 ) } > INT13 type = VECT_INIT + DAC12 : { * ( .int14 ) } > INT14 type = VECT_INIT + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + USCIAB1TX : { * ( .int16 ) } > INT16 type = VECT_INIT + USCIAB1RX : { * ( .int17 ) } > INT17 type = VECT_INIT + PORT1 : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT2 : { * ( .int19 ) } > INT19 type = VECT_INIT + RESERVED20 : { * ( .int20 ) } > INT20 type = VECT_INIT + ADC12 : { * ( .int21 ) } > INT21 type = VECT_INIT + USCIAB0TX : { * ( .int22 ) } > INT22 type = VECT_INIT + USCIAB0RX : { * ( .int23 ) } > INT23 type = VECT_INIT + TIMERA1 : { * ( .int24 ) } > INT24 type = VECT_INIT + TIMERA0 : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2617.cmd + diff --git a/msp430/lnk_msp430f2618.cmd b/msp430/lnk_msp430f2618.cmd new file mode 100644 index 00000000..e90eb7f3 --- /dev/null +++ b/msp430/lnk_msp430f2618.cmd @@ -0,0 +1,188 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2618.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2618 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x2000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x3100, length = 0xCEBE + FLASH2 : origin = 0x10000,length = 0x10000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + RESERVED0 : { * ( .int00 ) } > INT00 type = VECT_INIT + RESERVED1 : { * ( .int01 ) } > INT01 type = VECT_INIT + RESERVED2 : { * ( .int02 ) } > INT02 type = VECT_INIT + RESERVED3 : { * ( .int03 ) } > INT03 type = VECT_INIT + RESERVED4 : { * ( .int04 ) } > INT04 type = VECT_INIT + RESERVED5 : { * ( .int05 ) } > INT05 type = VECT_INIT + RESERVED6 : { * ( .int06 ) } > INT06 type = VECT_INIT + RESERVED7 : { * ( .int07 ) } > INT07 type = VECT_INIT + RESERVED8 : { * ( .int08 ) } > INT08 type = VECT_INIT + RESERVED9 : { * ( .int09 ) } > INT09 type = VECT_INIT + RESERVED10 : { * ( .int10 ) } > INT10 type = VECT_INIT + RESERVED11 : { * ( .int11 ) } > INT11 type = VECT_INIT + RESERVED12 : { * ( .int12 ) } > INT12 type = VECT_INIT + RESERVED13 : { * ( .int13 ) } > INT13 type = VECT_INIT + DAC12 : { * ( .int14 ) } > INT14 type = VECT_INIT + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + USCIAB1TX : { * ( .int16 ) } > INT16 type = VECT_INIT + USCIAB1RX : { * ( .int17 ) } > INT17 type = VECT_INIT + PORT1 : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT2 : { * ( .int19 ) } > INT19 type = VECT_INIT + RESERVED20 : { * ( .int20 ) } > INT20 type = VECT_INIT + ADC12 : { * ( .int21 ) } > INT21 type = VECT_INIT + USCIAB0TX : { * ( .int22 ) } > INT22 type = VECT_INIT + USCIAB0RX : { * ( .int23 ) } > INT23 type = VECT_INIT + TIMERA1 : { * ( .int24 ) } > INT24 type = VECT_INIT + TIMERA0 : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2618.cmd + diff --git a/msp430/lnk_msp430f2619.cmd b/msp430/lnk_msp430f2619.cmd new file mode 100644 index 00000000..610fe704 --- /dev/null +++ b/msp430/lnk_msp430f2619.cmd @@ -0,0 +1,188 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f2619.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2619 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x2100, length = 0xDEBE + FLASH2 : origin = 0x10000,length = 0x10000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + RESERVED0 : { * ( .int00 ) } > INT00 type = VECT_INIT + RESERVED1 : { * ( .int01 ) } > INT01 type = VECT_INIT + RESERVED2 : { * ( .int02 ) } > INT02 type = VECT_INIT + RESERVED3 : { * ( .int03 ) } > INT03 type = VECT_INIT + RESERVED4 : { * ( .int04 ) } > INT04 type = VECT_INIT + RESERVED5 : { * ( .int05 ) } > INT05 type = VECT_INIT + RESERVED6 : { * ( .int06 ) } > INT06 type = VECT_INIT + RESERVED7 : { * ( .int07 ) } > INT07 type = VECT_INIT + RESERVED8 : { * ( .int08 ) } > INT08 type = VECT_INIT + RESERVED9 : { * ( .int09 ) } > INT09 type = VECT_INIT + RESERVED10 : { * ( .int10 ) } > INT10 type = VECT_INIT + RESERVED11 : { * ( .int11 ) } > INT11 type = VECT_INIT + RESERVED12 : { * ( .int12 ) } > INT12 type = VECT_INIT + RESERVED13 : { * ( .int13 ) } > INT13 type = VECT_INIT + DAC12 : { * ( .int14 ) } > INT14 type = VECT_INIT + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + USCIAB1TX : { * ( .int16 ) } > INT16 type = VECT_INIT + USCIAB1RX : { * ( .int17 ) } > INT17 type = VECT_INIT + PORT1 : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT2 : { * ( .int19 ) } > INT19 type = VECT_INIT + RESERVED20 : { * ( .int20 ) } > INT20 type = VECT_INIT + ADC12 : { * ( .int21 ) } > INT21 type = VECT_INIT + USCIAB0TX : { * ( .int22 ) } > INT22 type = VECT_INIT + USCIAB0RX : { * ( .int23 ) } > INT23 type = VECT_INIT + TIMERA1 : { * ( .int24 ) } > INT24 type = VECT_INIT + TIMERA0 : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f2619.cmd + diff --git a/msp430/lnk_msp430f412.cmd b/msp430/lnk_msp430f412.cmd new file mode 100644 index 00000000..e01f3163 --- /dev/null +++ b/msp430/lnk_msp430f412.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f412.cmd - LINKER COMMAND FILE FOR LINKING MSP430F412 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xF000, length = 0x0FBE + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f412.cmd + diff --git a/msp430/lnk_msp430f413.cmd b/msp430/lnk_msp430f413.cmd new file mode 100644 index 00000000..19bd12df --- /dev/null +++ b/msp430/lnk_msp430f413.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f413.cmd - LINKER COMMAND FILE FOR LINKING MSP430F413 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xE000, length = 0x1FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f413.cmd + diff --git a/msp430/lnk_msp430f4132.cmd b/msp430/lnk_msp430f4132.cmd new file mode 100644 index 00000000..1a64b129 --- /dev/null +++ b/msp430/lnk_msp430f4132.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f4132.cmd - LINKER COMMAND FILE FOR LINKING MSP430F4132 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xE000, length = 0x1FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMER0_A1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMER0_A0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC10 : { * ( .int07 ) } > INT07 type = VECT_INIT + USCIAB0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USCIAB0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f4132.cmd + diff --git a/msp430/lnk_msp430f415.cmd b/msp430/lnk_msp430f415.cmd new file mode 100644 index 00000000..0ef561d7 --- /dev/null +++ b/msp430/lnk_msp430f415.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f415.cmd - LINKER COMMAND FILE FOR LINKING MSP430F415 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMER0_A1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMER0_A0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f415.cmd + diff --git a/msp430/lnk_msp430f4152.cmd b/msp430/lnk_msp430f4152.cmd new file mode 100644 index 00000000..62725105 --- /dev/null +++ b/msp430/lnk_msp430f4152.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f4152.cmd - LINKER COMMAND FILE FOR LINKING MSP430F4152 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xC000, length = 0x3FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMER0_A1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMER0_A0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC10 : { * ( .int07 ) } > INT07 type = VECT_INIT + USCIAB0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USCIAB0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f4152.cmd + diff --git a/msp430/lnk_msp430f417.cmd b/msp430/lnk_msp430f417.cmd new file mode 100644 index 00000000..5a5ca831 --- /dev/null +++ b/msp430/lnk_msp430f417.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f417.cmd - LINKER COMMAND FILE FOR LINKING MSP430F417 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMER0_A1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMER0_A0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f417.cmd + diff --git a/msp430/lnk_msp430f423.cmd b/msp430/lnk_msp430f423.cmd new file mode 100644 index 00000000..b3f83aa8 --- /dev/null +++ b/msp430/lnk_msp430f423.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f423.cmd - LINKER COMMAND FILE FOR LINKING MSP430F423 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xE000, length = 0x1FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD16 : { * ( .int12 ) } > INT12 type = VECT_INIT + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f423.cmd + diff --git a/msp430/lnk_msp430f423a.cmd b/msp430/lnk_msp430f423a.cmd new file mode 100644 index 00000000..720da4ae --- /dev/null +++ b/msp430/lnk_msp430f423a.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f423a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F423A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xE000, length = 0x1FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD16 : { * ( .int12 ) } > INT12 type = VECT_INIT + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f423a.cmd + diff --git a/msp430/lnk_msp430f425.cmd b/msp430/lnk_msp430f425.cmd new file mode 100644 index 00000000..b92d6b55 --- /dev/null +++ b/msp430/lnk_msp430f425.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f425.cmd - LINKER COMMAND FILE FOR LINKING MSP430F425 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD16 : { * ( .int12 ) } > INT12 type = VECT_INIT + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f425.cmd + diff --git a/msp430/lnk_msp430f4250.cmd b/msp430/lnk_msp430f4250.cmd new file mode 100644 index 00000000..691a8ac9 --- /dev/null +++ b/msp430/lnk_msp430f4250.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f4250.cmd - LINKER COMMAND FILE FOR LINKING MSP430F4250 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + DAC12 : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD16 : { * ( .int12 ) } > INT12 type = VECT_INIT + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f4250.cmd + diff --git a/msp430/lnk_msp430f425a.cmd b/msp430/lnk_msp430f425a.cmd new file mode 100644 index 00000000..b0d46c30 --- /dev/null +++ b/msp430/lnk_msp430f425a.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f425a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F425A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD16 : { * ( .int12 ) } > INT12 type = VECT_INIT + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f425a.cmd + diff --git a/msp430/lnk_msp430f4260.cmd b/msp430/lnk_msp430f4260.cmd new file mode 100644 index 00000000..2a13a6d4 --- /dev/null +++ b/msp430/lnk_msp430f4260.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f4260.cmd - LINKER COMMAND FILE FOR LINKING MSP430F4260 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xA000, length = 0x5FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + DAC12 : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD16 : { * ( .int12 ) } > INT12 type = VECT_INIT + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f4260.cmd + diff --git a/msp430/lnk_msp430f427.cmd b/msp430/lnk_msp430f427.cmd new file mode 100644 index 00000000..cb253f2a --- /dev/null +++ b/msp430/lnk_msp430f427.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f427.cmd - LINKER COMMAND FILE FOR LINKING MSP430F427 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD16 : { * ( .int12 ) } > INT12 type = VECT_INIT + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f427.cmd + diff --git a/msp430/lnk_msp430f4270.cmd b/msp430/lnk_msp430f4270.cmd new file mode 100644 index 00000000..3184dda8 --- /dev/null +++ b/msp430/lnk_msp430f4270.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f4270.cmd - LINKER COMMAND FILE FOR LINKING MSP430F4270 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + DAC12 : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD16 : { * ( .int12 ) } > INT12 type = VECT_INIT + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f4270.cmd + diff --git a/msp430/lnk_msp430f427a.cmd b/msp430/lnk_msp430f427a.cmd new file mode 100644 index 00000000..f27d5cd8 --- /dev/null +++ b/msp430/lnk_msp430f427a.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f427a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F427A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD16 : { * ( .int12 ) } > INT12 type = VECT_INIT + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f427a.cmd + diff --git a/msp430/lnk_msp430f435.cmd b/msp430/lnk_msp430f435.cmd new file mode 100644 index 00000000..014fd7d6 --- /dev/null +++ b/msp430/lnk_msp430f435.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f435.cmd - LINKER COMMAND FILE FOR LINKING MSP430F435 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC12 : { * ( .int07 ) } > INT07 type = VECT_INIT + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f435.cmd + diff --git a/msp430/lnk_msp430f4351.cmd b/msp430/lnk_msp430f4351.cmd new file mode 100644 index 00000000..6422ef6e --- /dev/null +++ b/msp430/lnk_msp430f4351.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f4351.cmd - LINKER COMMAND FILE FOR LINKING MSP430F4351 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f4351.cmd + diff --git a/msp430/lnk_msp430f436.cmd b/msp430/lnk_msp430f436.cmd new file mode 100644 index 00000000..0b592c72 --- /dev/null +++ b/msp430/lnk_msp430f436.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f436.cmd - LINKER COMMAND FILE FOR LINKING MSP430F436 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xA000, length = 0x5FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC12 : { * ( .int07 ) } > INT07 type = VECT_INIT + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f436.cmd + diff --git a/msp430/lnk_msp430f4361.cmd b/msp430/lnk_msp430f4361.cmd new file mode 100644 index 00000000..2e9dada6 --- /dev/null +++ b/msp430/lnk_msp430f4361.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f4361.cmd - LINKER COMMAND FILE FOR LINKING MSP430F4361 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xA000, length = 0x5FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f4361.cmd + diff --git a/msp430/lnk_msp430f437.cmd b/msp430/lnk_msp430f437.cmd new file mode 100644 index 00000000..4c2960de --- /dev/null +++ b/msp430/lnk_msp430f437.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f437.cmd - LINKER COMMAND FILE FOR LINKING MSP430F437 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC12 : { * ( .int07 ) } > INT07 type = VECT_INIT + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f437.cmd + diff --git a/msp430/lnk_msp430f4371.cmd b/msp430/lnk_msp430f4371.cmd new file mode 100644 index 00000000..af4dfc6b --- /dev/null +++ b/msp430/lnk_msp430f4371.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f4371.cmd - LINKER COMMAND FILE FOR LINKING MSP430F4371 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f4371.cmd + diff --git a/msp430/lnk_msp430f438.cmd b/msp430/lnk_msp430f438.cmd new file mode 100644 index 00000000..9ff6d797 --- /dev/null +++ b/msp430/lnk_msp430f438.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f438.cmd - LINKER COMMAND FILE FOR LINKING MSP430F438 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBFE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + DAC12_DMA : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC12 : { * ( .int07 ) } > INT07 type = VECT_INIT + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f438.cmd + diff --git a/msp430/lnk_msp430f439.cmd b/msp430/lnk_msp430f439.cmd new file mode 100644 index 00000000..db0b22e2 --- /dev/null +++ b/msp430/lnk_msp430f439.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f439.cmd - LINKER COMMAND FILE FOR LINKING MSP430F439 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x1100, length = 0xEEE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + DAC12_DMA : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC12 : { * ( .int07 ) } > INT07 type = VECT_INIT + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f439.cmd + diff --git a/msp430/lnk_msp430f447.cmd b/msp430/lnk_msp430f447.cmd new file mode 100644 index 00000000..55bf1e25 --- /dev/null +++ b/msp430/lnk_msp430f447.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f447.cmd - LINKER COMMAND FILE FOR LINKING MSP430F447 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + USART1TX : { * ( .int02 ) } > INT02 type = VECT_INIT + USART1RX : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC12 : { * ( .int07 ) } > INT07 type = VECT_INIT + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f447.cmd + diff --git a/msp430/lnk_msp430f448.cmd b/msp430/lnk_msp430f448.cmd new file mode 100644 index 00000000..73f81b3b --- /dev/null +++ b/msp430/lnk_msp430f448.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f448.cmd - LINKER COMMAND FILE FOR LINKING MSP430F448 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBFE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + USART1TX : { * ( .int02 ) } > INT02 type = VECT_INIT + USART1RX : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC12 : { * ( .int07 ) } > INT07 type = VECT_INIT + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f448.cmd + diff --git a/msp430/lnk_msp430f4481.cmd b/msp430/lnk_msp430f4481.cmd new file mode 100644 index 00000000..7bf07323 --- /dev/null +++ b/msp430/lnk_msp430f4481.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f4481.cmd - LINKER COMMAND FILE FOR LINKING MSP430F4481 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBFE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + USART1TX : { * ( .int02 ) } > INT02 type = VECT_INIT + USART1RX : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f4481.cmd + diff --git a/msp430/lnk_msp430f449.cmd b/msp430/lnk_msp430f449.cmd new file mode 100644 index 00000000..711e5559 --- /dev/null +++ b/msp430/lnk_msp430f449.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f449.cmd - LINKER COMMAND FILE FOR LINKING MSP430F449 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x1100, length = 0xEEE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + USART1TX : { * ( .int02 ) } > INT02 type = VECT_INIT + USART1RX : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC12 : { * ( .int07 ) } > INT07 type = VECT_INIT + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f449.cmd + diff --git a/msp430/lnk_msp430f4491.cmd b/msp430/lnk_msp430f4491.cmd new file mode 100644 index 00000000..348dee01 --- /dev/null +++ b/msp430/lnk_msp430f4491.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f4491.cmd - LINKER COMMAND FILE FOR LINKING MSP430F4491 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x1100, length = 0xEEE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + USART1TX : { * ( .int02 ) } > INT02 type = VECT_INIT + USART1RX : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f4491.cmd + diff --git a/msp430/lnk_msp430f4616.cmd b/msp430/lnk_msp430f4616.cmd new file mode 100644 index 00000000..8df01978 --- /dev/null +++ b/msp430/lnk_msp430f4616.cmd @@ -0,0 +1,184 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f4616.cmd - LINKER COMMAND FILE FOR LINKING MSP430F4616 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x2100, length = 0xDEBE + FLASH2 : origin = 0x10000,length = 0x9000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USART1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USART1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + ADC12 : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f4616.cmd + diff --git a/msp430/lnk_msp430f46161.cmd b/msp430/lnk_msp430f46161.cmd new file mode 100644 index 00000000..8e9a0f33 --- /dev/null +++ b/msp430/lnk_msp430f46161.cmd @@ -0,0 +1,184 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f46161.cmd - LINKER COMMAND FILE FOR LINKING MSP430F46161 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x2100, length = 0xDEBE + FLASH2 : origin = 0x10000,length = 0x9000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USART1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USART1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + .int23 : {} > INT23 + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f46161.cmd + diff --git a/msp430/lnk_msp430f4617.cmd b/msp430/lnk_msp430f4617.cmd new file mode 100644 index 00000000..6844c27c --- /dev/null +++ b/msp430/lnk_msp430f4617.cmd @@ -0,0 +1,184 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f4617.cmd - LINKER COMMAND FILE FOR LINKING MSP430F4617 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x2000 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x3100, length = 0xCEBE + FLASH2 : origin = 0x10000,length = 0xA000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USART1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USART1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + ADC12 : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f4617.cmd + diff --git a/msp430/lnk_msp430f46171.cmd b/msp430/lnk_msp430f46171.cmd new file mode 100644 index 00000000..040baf99 --- /dev/null +++ b/msp430/lnk_msp430f46171.cmd @@ -0,0 +1,184 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f46171.cmd - LINKER COMMAND FILE FOR LINKING MSP430F46171 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x2000 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x3100, length = 0xCEBE + FLASH2 : origin = 0x10000,length = 0xA000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USART1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USART1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + .int23 : {} > INT23 + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f46171.cmd + diff --git a/msp430/lnk_msp430f4618.cmd b/msp430/lnk_msp430f4618.cmd new file mode 100644 index 00000000..6f2c6664 --- /dev/null +++ b/msp430/lnk_msp430f4618.cmd @@ -0,0 +1,184 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f4618.cmd - LINKER COMMAND FILE FOR LINKING MSP430F4618 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x2000 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x3100, length = 0xCEBE + FLASH2 : origin = 0x10000,length = 0x10000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USART1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USART1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + ADC12 : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f4618.cmd + diff --git a/msp430/lnk_msp430f46181.cmd b/msp430/lnk_msp430f46181.cmd new file mode 100644 index 00000000..8e14fc13 --- /dev/null +++ b/msp430/lnk_msp430f46181.cmd @@ -0,0 +1,184 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f46181.cmd - LINKER COMMAND FILE FOR LINKING MSP430F46181 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x2000 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x3100, length = 0xCEBE + FLASH2 : origin = 0x10000,length = 0x10000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USART1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USART1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + .int23 : {} > INT23 + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f46181.cmd + diff --git a/msp430/lnk_msp430f4619.cmd b/msp430/lnk_msp430f4619.cmd new file mode 100644 index 00000000..1a24d22b --- /dev/null +++ b/msp430/lnk_msp430f4619.cmd @@ -0,0 +1,184 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f4619.cmd - LINKER COMMAND FILE FOR LINKING MSP430F4619 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x2100, length = 0xDEBE + FLASH2 : origin = 0x10000,length = 0x10000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USART1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USART1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + ADC12 : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f4619.cmd + diff --git a/msp430/lnk_msp430f46191.cmd b/msp430/lnk_msp430f46191.cmd new file mode 100644 index 00000000..c5c61b3f --- /dev/null +++ b/msp430/lnk_msp430f46191.cmd @@ -0,0 +1,184 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f46191.cmd - LINKER COMMAND FILE FOR LINKING MSP430F46191 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x2100, length = 0xDEBE + FLASH2 : origin = 0x10000,length = 0x10000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USART1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USART1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + .int23 : {} > INT23 + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f46191.cmd + diff --git a/msp430/lnk_msp430f47126.cmd b/msp430/lnk_msp430f47126.cmd new file mode 100644 index 00000000..a9f210b5 --- /dev/null +++ b/msp430/lnk_msp430f47126.cmd @@ -0,0 +1,178 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f47126.cmd - LINKER COMMAND FILE FOR LINKING MSP430F47126 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x2100, length = 0xDEBE + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USCIAB1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USCIAB1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + SD16A : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f47126.cmd + diff --git a/msp430/lnk_msp430f47127.cmd b/msp430/lnk_msp430f47127.cmd new file mode 100644 index 00000000..d1fa7100 --- /dev/null +++ b/msp430/lnk_msp430f47127.cmd @@ -0,0 +1,178 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f47127.cmd - LINKER COMMAND FILE FOR LINKING MSP430F47127 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x2100, length = 0xDEBE + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USCIAB1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USCIAB1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + SD16A : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f47127.cmd + diff --git a/msp430/lnk_msp430f47163.cmd b/msp430/lnk_msp430f47163.cmd new file mode 100644 index 00000000..42969bcd --- /dev/null +++ b/msp430/lnk_msp430f47163.cmd @@ -0,0 +1,188 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f47163.cmd - LINKER COMMAND FILE FOR LINKING MSP430F47163 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x2100, length = 0xDEBE + FLASH2 : origin = 0x10000,length = 0x9000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USCIAB1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USCIAB1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + SD16A : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f47163.cmd + diff --git a/msp430/lnk_msp430f47166.cmd b/msp430/lnk_msp430f47166.cmd new file mode 100644 index 00000000..abce64f8 --- /dev/null +++ b/msp430/lnk_msp430f47166.cmd @@ -0,0 +1,188 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f47166.cmd - LINKER COMMAND FILE FOR LINKING MSP430F47166 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x2100, length = 0xDEBE + FLASH2 : origin = 0x10000,length = 0x9000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USCIAB1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USCIAB1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + SD16A : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f47166.cmd + diff --git a/msp430/lnk_msp430f47167.cmd b/msp430/lnk_msp430f47167.cmd new file mode 100644 index 00000000..9bd276ab --- /dev/null +++ b/msp430/lnk_msp430f47167.cmd @@ -0,0 +1,188 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f47167.cmd - LINKER COMMAND FILE FOR LINKING MSP430F47167 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x2100, length = 0xDEBE + FLASH2 : origin = 0x10000,length = 0x9000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USCIAB1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USCIAB1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + SD16A : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f47167.cmd + diff --git a/msp430/lnk_msp430f47173.cmd b/msp430/lnk_msp430f47173.cmd new file mode 100644 index 00000000..e7ea1350 --- /dev/null +++ b/msp430/lnk_msp430f47173.cmd @@ -0,0 +1,188 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f47173.cmd - LINKER COMMAND FILE FOR LINKING MSP430F47173 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x2000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x3100, length = 0xCEBE + FLASH2 : origin = 0x10000,length = 0xA000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USCIAB1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USCIAB1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + SD16A : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f47173.cmd + diff --git a/msp430/lnk_msp430f47176.cmd b/msp430/lnk_msp430f47176.cmd new file mode 100644 index 00000000..1fcc0075 --- /dev/null +++ b/msp430/lnk_msp430f47176.cmd @@ -0,0 +1,188 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f47176.cmd - LINKER COMMAND FILE FOR LINKING MSP430F47176 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x2000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x3100, length = 0xCEBE + FLASH2 : origin = 0x10000,length = 0xA000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USCIAB1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USCIAB1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + SD16A : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f47176.cmd + diff --git a/msp430/lnk_msp430f47177.cmd b/msp430/lnk_msp430f47177.cmd new file mode 100644 index 00000000..de4a3cb6 --- /dev/null +++ b/msp430/lnk_msp430f47177.cmd @@ -0,0 +1,188 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f47177.cmd - LINKER COMMAND FILE FOR LINKING MSP430F47177 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x2000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x3100, length = 0xCEBE + FLASH2 : origin = 0x10000,length = 0xA000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USCIAB1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USCIAB1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + SD16A : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f47177.cmd + diff --git a/msp430/lnk_msp430f47183.cmd b/msp430/lnk_msp430f47183.cmd new file mode 100644 index 00000000..adb623b2 --- /dev/null +++ b/msp430/lnk_msp430f47183.cmd @@ -0,0 +1,188 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f47183.cmd - LINKER COMMAND FILE FOR LINKING MSP430F47183 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x2000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x3100, length = 0xCEBE + FLASH2 : origin = 0x10000,length = 0x10000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USCIAB1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USCIAB1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + SD16A : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f47183.cmd + diff --git a/msp430/lnk_msp430f47186.cmd b/msp430/lnk_msp430f47186.cmd new file mode 100644 index 00000000..bd7c4024 --- /dev/null +++ b/msp430/lnk_msp430f47186.cmd @@ -0,0 +1,188 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f47186.cmd - LINKER COMMAND FILE FOR LINKING MSP430F47186 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x2000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x3100, length = 0xCEBE + FLASH2 : origin = 0x10000,length = 0x10000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USCIAB1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USCIAB1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + SD16A : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f47186.cmd + diff --git a/msp430/lnk_msp430f47187.cmd b/msp430/lnk_msp430f47187.cmd new file mode 100644 index 00000000..0a27b8e0 --- /dev/null +++ b/msp430/lnk_msp430f47187.cmd @@ -0,0 +1,188 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f47187.cmd - LINKER COMMAND FILE FOR LINKING MSP430F47187 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x2000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x3100, length = 0xCEBE + FLASH2 : origin = 0x10000,length = 0x10000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USCIAB1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USCIAB1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + SD16A : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f47187.cmd + diff --git a/msp430/lnk_msp430f47193.cmd b/msp430/lnk_msp430f47193.cmd new file mode 100644 index 00000000..3b2cb72f --- /dev/null +++ b/msp430/lnk_msp430f47193.cmd @@ -0,0 +1,188 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f47193.cmd - LINKER COMMAND FILE FOR LINKING MSP430F47193 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x2100, length = 0xDEBE + FLASH2 : origin = 0x10000,length = 0x10000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USCIAB1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USCIAB1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + SD16A : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f47193.cmd + diff --git a/msp430/lnk_msp430f47196.cmd b/msp430/lnk_msp430f47196.cmd new file mode 100644 index 00000000..a0c9a8c1 --- /dev/null +++ b/msp430/lnk_msp430f47196.cmd @@ -0,0 +1,188 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f47196.cmd - LINKER COMMAND FILE FOR LINKING MSP430F47196 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x2100, length = 0xDEBE + FLASH2 : origin = 0x10000,length = 0x10000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USCIAB1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USCIAB1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + SD16A : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f47196.cmd + diff --git a/msp430/lnk_msp430f47197.cmd b/msp430/lnk_msp430f47197.cmd new file mode 100644 index 00000000..c498a1c7 --- /dev/null +++ b/msp430/lnk_msp430f47197.cmd @@ -0,0 +1,188 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f47197.cmd - LINKER COMMAND FILE FOR LINKING MSP430F47197 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x2100, length = 0xDEBE + FLASH2 : origin = 0x10000,length = 0x10000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USCIAB1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USCIAB1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + SD16A : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f47197.cmd + diff --git a/msp430/lnk_msp430f477.cmd b/msp430/lnk_msp430f477.cmd new file mode 100644 index 00000000..6021e032 --- /dev/null +++ b/msp430/lnk_msp430f477.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f477.cmd - LINKER COMMAND FILE FOR LINKING MSP430F477 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x8000, length = 0x7FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + DAC12_DMA : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + SD16A : { * ( .int07 ) } > INT07 type = VECT_INIT + USCIAB0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USCIAB0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f477.cmd + diff --git a/msp430/lnk_msp430f478.cmd b/msp430/lnk_msp430f478.cmd new file mode 100644 index 00000000..2e384966 --- /dev/null +++ b/msp430/lnk_msp430f478.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f478.cmd - LINKER COMMAND FILE FOR LINKING MSP430F478 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x4000, length = 0xBFE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + DAC12_DMA : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + SD16A : { * ( .int07 ) } > INT07 type = VECT_INIT + USCIAB0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USCIAB0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f478.cmd + diff --git a/msp430/lnk_msp430f4783.cmd b/msp430/lnk_msp430f4783.cmd new file mode 100644 index 00000000..13335e06 --- /dev/null +++ b/msp430/lnk_msp430f4783.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f4783.cmd - LINKER COMMAND FILE FOR LINKING MSP430F4783 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x4000, length = 0xBFE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + USCIAB1TX : { * ( .int02 ) } > INT02 type = VECT_INIT + USCIAB1RX : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + SD16A : { * ( .int07 ) } > INT07 type = VECT_INIT + USCIAB0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USCIAB0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f4783.cmd + diff --git a/msp430/lnk_msp430f4784.cmd b/msp430/lnk_msp430f4784.cmd new file mode 100644 index 00000000..1c3ebc93 --- /dev/null +++ b/msp430/lnk_msp430f4784.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f4784.cmd - LINKER COMMAND FILE FOR LINKING MSP430F4784 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x4000, length = 0xBFE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + USCIAB1TX : { * ( .int02 ) } > INT02 type = VECT_INIT + USCIAB1RX : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + SD16A : { * ( .int07 ) } > INT07 type = VECT_INIT + USCIAB0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USCIAB0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f4784.cmd + diff --git a/msp430/lnk_msp430f479.cmd b/msp430/lnk_msp430f479.cmd new file mode 100644 index 00000000..da64af91 --- /dev/null +++ b/msp430/lnk_msp430f479.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f479.cmd - LINKER COMMAND FILE FOR LINKING MSP430F479 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x1100, length = 0xEEE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + DAC12_DMA : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + SD16A : { * ( .int07 ) } > INT07 type = VECT_INIT + USCIAB0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USCIAB0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f479.cmd + diff --git a/msp430/lnk_msp430f4793.cmd b/msp430/lnk_msp430f4793.cmd new file mode 100644 index 00000000..ed04ebd2 --- /dev/null +++ b/msp430/lnk_msp430f4793.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f4793.cmd - LINKER COMMAND FILE FOR LINKING MSP430F4793 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0A00 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x1100, length = 0xEEE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + USCIAB1TX : { * ( .int02 ) } > INT02 type = VECT_INIT + USCIAB1RX : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + SD16A : { * ( .int07 ) } > INT07 type = VECT_INIT + USCIAB0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USCIAB0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f4793.cmd + diff --git a/msp430/lnk_msp430f4794.cmd b/msp430/lnk_msp430f4794.cmd new file mode 100644 index 00000000..e557a57d --- /dev/null +++ b/msp430/lnk_msp430f4794.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f4794.cmd - LINKER COMMAND FILE FOR LINKING MSP430F4794 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0A00 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x1100, length = 0xEEE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + USCIAB1TX : { * ( .int02 ) } > INT02 type = VECT_INIT + USCIAB1RX : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + SD16A : { * ( .int07 ) } > INT07 type = VECT_INIT + USCIAB0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USCIAB0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f4794.cmd + diff --git a/msp430/lnk_msp430f5131.cmd b/msp430/lnk_msp430f5131.cmd new file mode 100644 index 00000000..1ba88408 --- /dev/null +++ b/msp430/lnk_msp430f5131.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5131.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5131 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xE000, length = 0x1F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + PORT2 : { * ( .int45 ) } > INT45 type = VECT_INIT + PORT1 : { * ( .int46 ) } > INT46 type = VECT_INIT + TIMER1_D1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_D0 : { * ( .int48 ) } > INT48 type = VECT_INIT + TEC1 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_A1 : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A0 : { * ( .int52 ) } > INT52 type = VECT_INIT + .int53 : {} > INT53 + USCI_B0 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + WDT : { * ( .int56 ) } > INT56 type = VECT_INIT + TIMER0_D1 : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_D0 : { * ( .int58 ) } > INT58 type = VECT_INIT + TEC0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5131.cmd + diff --git a/msp430/lnk_msp430f5132.cmd b/msp430/lnk_msp430f5132.cmd new file mode 100644 index 00000000..0596a33e --- /dev/null +++ b/msp430/lnk_msp430f5132.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5132.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5132 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xE000, length = 0x1F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + PORT2 : { * ( .int45 ) } > INT45 type = VECT_INIT + PORT1 : { * ( .int46 ) } > INT46 type = VECT_INIT + TIMER1_D1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_D0 : { * ( .int48 ) } > INT48 type = VECT_INIT + TEC1 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_A1 : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A0 : { * ( .int52 ) } > INT52 type = VECT_INIT + ADC10 : { * ( .int53 ) } > INT53 type = VECT_INIT + USCI_B0 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + WDT : { * ( .int56 ) } > INT56 type = VECT_INIT + TIMER0_D1 : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_D0 : { * ( .int58 ) } > INT58 type = VECT_INIT + TEC0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5132.cmd + diff --git a/msp430/lnk_msp430f5151.cmd b/msp430/lnk_msp430f5151.cmd new file mode 100644 index 00000000..3153c8eb --- /dev/null +++ b/msp430/lnk_msp430f5151.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5151.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5151 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + PORT2 : { * ( .int45 ) } > INT45 type = VECT_INIT + PORT1 : { * ( .int46 ) } > INT46 type = VECT_INIT + TIMER1_D1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_D0 : { * ( .int48 ) } > INT48 type = VECT_INIT + TEC1 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_A1 : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A0 : { * ( .int52 ) } > INT52 type = VECT_INIT + .int53 : {} > INT53 + USCI_B0 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + WDT : { * ( .int56 ) } > INT56 type = VECT_INIT + TIMER0_D1 : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_D0 : { * ( .int58 ) } > INT58 type = VECT_INIT + TEC0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5151.cmd + diff --git a/msp430/lnk_msp430f5152.cmd b/msp430/lnk_msp430f5152.cmd new file mode 100644 index 00000000..59a9ace0 --- /dev/null +++ b/msp430/lnk_msp430f5152.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5152.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5152 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + PORT2 : { * ( .int45 ) } > INT45 type = VECT_INIT + PORT1 : { * ( .int46 ) } > INT46 type = VECT_INIT + TIMER1_D1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_D0 : { * ( .int48 ) } > INT48 type = VECT_INIT + TEC1 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_A1 : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A0 : { * ( .int52 ) } > INT52 type = VECT_INIT + ADC10 : { * ( .int53 ) } > INT53 type = VECT_INIT + USCI_B0 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + WDT : { * ( .int56 ) } > INT56 type = VECT_INIT + TIMER0_D1 : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_D0 : { * ( .int58 ) } > INT58 type = VECT_INIT + TEC0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5152.cmd + diff --git a/msp430/lnk_msp430f5171.cmd b/msp430/lnk_msp430f5171.cmd new file mode 100644 index 00000000..6f2a60a7 --- /dev/null +++ b/msp430/lnk_msp430f5171.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5171.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5171 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + PORT2 : { * ( .int45 ) } > INT45 type = VECT_INIT + PORT1 : { * ( .int46 ) } > INT46 type = VECT_INIT + TIMER1_D1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_D0 : { * ( .int48 ) } > INT48 type = VECT_INIT + TEC1 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_A1 : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A0 : { * ( .int52 ) } > INT52 type = VECT_INIT + .int53 : {} > INT53 + USCI_B0 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + WDT : { * ( .int56 ) } > INT56 type = VECT_INIT + TIMER0_D1 : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_D0 : { * ( .int58 ) } > INT58 type = VECT_INIT + TEC0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5171.cmd + diff --git a/msp430/lnk_msp430f5172.cmd b/msp430/lnk_msp430f5172.cmd new file mode 100644 index 00000000..9253b250 --- /dev/null +++ b/msp430/lnk_msp430f5172.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5172.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5172 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + PORT2 : { * ( .int45 ) } > INT45 type = VECT_INIT + PORT1 : { * ( .int46 ) } > INT46 type = VECT_INIT + TIMER1_D1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_D0 : { * ( .int48 ) } > INT48 type = VECT_INIT + TEC1 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_A1 : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A0 : { * ( .int52 ) } > INT52 type = VECT_INIT + ADC10 : { * ( .int53 ) } > INT53 type = VECT_INIT + USCI_B0 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + WDT : { * ( .int56 ) } > INT56 type = VECT_INIT + TIMER0_D1 : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_D0 : { * ( .int58 ) } > INT58 type = VECT_INIT + TEC0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5172.cmd + diff --git a/msp430/lnk_msp430f5212.cmd b/msp430/lnk_msp430f5212.cmd new file mode 100644 index 00000000..d493c08f --- /dev/null +++ b/msp430/lnk_msp430f5212.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5212.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5212 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x43F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5212.cmd + diff --git a/msp430/lnk_msp430f5213.cmd b/msp430/lnk_msp430f5213.cmd new file mode 100644 index 00000000..f5e62531 --- /dev/null +++ b/msp430/lnk_msp430f5213.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5213.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5213 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0xC3F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5213.cmd + diff --git a/msp430/lnk_msp430f5214.cmd b/msp430/lnk_msp430f5214.cmd new file mode 100644 index 00000000..d35d0ae9 --- /dev/null +++ b/msp430/lnk_msp430f5214.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5214.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5214 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x143F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5214.cmd + diff --git a/msp430/lnk_msp430f5217.cmd b/msp430/lnk_msp430f5217.cmd new file mode 100644 index 00000000..693de585 --- /dev/null +++ b/msp430/lnk_msp430f5217.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5217.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5217 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x43F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5217.cmd + diff --git a/msp430/lnk_msp430f5218.cmd b/msp430/lnk_msp430f5218.cmd new file mode 100644 index 00000000..1f309370 --- /dev/null +++ b/msp430/lnk_msp430f5218.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5218.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5218 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0xC3F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5218.cmd + diff --git a/msp430/lnk_msp430f5219.cmd b/msp430/lnk_msp430f5219.cmd new file mode 100644 index 00000000..17b59155 --- /dev/null +++ b/msp430/lnk_msp430f5219.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5219.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5219 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x143F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5219.cmd + diff --git a/msp430/lnk_msp430f5222.cmd b/msp430/lnk_msp430f5222.cmd new file mode 100644 index 00000000..f09657c1 --- /dev/null +++ b/msp430/lnk_msp430f5222.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5222.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5222 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x43F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5222.cmd + diff --git a/msp430/lnk_msp430f5223.cmd b/msp430/lnk_msp430f5223.cmd new file mode 100644 index 00000000..b9be7af5 --- /dev/null +++ b/msp430/lnk_msp430f5223.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5223.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5223 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0xC3F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5223.cmd + diff --git a/msp430/lnk_msp430f5224.cmd b/msp430/lnk_msp430f5224.cmd new file mode 100644 index 00000000..638451bf --- /dev/null +++ b/msp430/lnk_msp430f5224.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5224.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5224 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x143F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5224.cmd + diff --git a/msp430/lnk_msp430f5227.cmd b/msp430/lnk_msp430f5227.cmd new file mode 100644 index 00000000..74a824bc --- /dev/null +++ b/msp430/lnk_msp430f5227.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5227.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5227 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x43F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5227.cmd + diff --git a/msp430/lnk_msp430f5228.cmd b/msp430/lnk_msp430f5228.cmd new file mode 100644 index 00000000..ae50c96b --- /dev/null +++ b/msp430/lnk_msp430f5228.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5228.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5228 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0xC3F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5228.cmd + diff --git a/msp430/lnk_msp430f5229.cmd b/msp430/lnk_msp430f5229.cmd new file mode 100644 index 00000000..ae60f909 --- /dev/null +++ b/msp430/lnk_msp430f5229.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5229.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5229 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x143F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5229.cmd + diff --git a/msp430/lnk_msp430f5232.cmd b/msp430/lnk_msp430f5232.cmd new file mode 100644 index 00000000..83683445 --- /dev/null +++ b/msp430/lnk_msp430f5232.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5232.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5232 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x43F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5232.cmd + diff --git a/msp430/lnk_msp430f5234.cmd b/msp430/lnk_msp430f5234.cmd new file mode 100644 index 00000000..f961b26b --- /dev/null +++ b/msp430/lnk_msp430f5234.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5234.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5234 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x143F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5234.cmd + diff --git a/msp430/lnk_msp430f5237.cmd b/msp430/lnk_msp430f5237.cmd new file mode 100644 index 00000000..46eff89d --- /dev/null +++ b/msp430/lnk_msp430f5237.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5237.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5237 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x43F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5237.cmd + diff --git a/msp430/lnk_msp430f5239.cmd b/msp430/lnk_msp430f5239.cmd new file mode 100644 index 00000000..7f84ee9e --- /dev/null +++ b/msp430/lnk_msp430f5239.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5239.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5239 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x143F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5239.cmd + diff --git a/msp430/lnk_msp430f5242.cmd b/msp430/lnk_msp430f5242.cmd new file mode 100644 index 00000000..36e1b7b7 --- /dev/null +++ b/msp430/lnk_msp430f5242.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5242.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5242 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x43F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5242.cmd + diff --git a/msp430/lnk_msp430f5244.cmd b/msp430/lnk_msp430f5244.cmd new file mode 100644 index 00000000..0775d852 --- /dev/null +++ b/msp430/lnk_msp430f5244.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5244.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5244 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x143F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5244.cmd + diff --git a/msp430/lnk_msp430f5247.cmd b/msp430/lnk_msp430f5247.cmd new file mode 100644 index 00000000..0f44cfa9 --- /dev/null +++ b/msp430/lnk_msp430f5247.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5247.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5247 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x43F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5247.cmd + diff --git a/msp430/lnk_msp430f5249.cmd b/msp430/lnk_msp430f5249.cmd new file mode 100644 index 00000000..3d154d96 --- /dev/null +++ b/msp430/lnk_msp430f5249.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5249.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5249 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x143F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5249.cmd + diff --git a/msp430/lnk_msp430f5252.cmd b/msp430/lnk_msp430f5252.cmd new file mode 100644 index 00000000..12a0c6e4 --- /dev/null +++ b/msp430/lnk_msp430f5252.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5252.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5252 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xA400, length = 0x5B80 + FLASH2 : origin = 0x10000,length = 0x1A3F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + PORT6 : { * ( .int36 ) } > INT36 type = VECT_INIT + RTC : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT2 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + PORT1 : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER1_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER1_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_B1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_B0 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B3 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + DMA : { * ( .int48 ) } > INT48 type = VECT_INIT + .int49 : {} > INT49 + TIMER0_A1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_A0 : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_B2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A2 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B1 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A1 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5252.cmd + diff --git a/msp430/lnk_msp430f5253.cmd b/msp430/lnk_msp430f5253.cmd new file mode 100644 index 00000000..7e47c331 --- /dev/null +++ b/msp430/lnk_msp430f5253.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5253.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5253 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xA400, length = 0x5B80 + FLASH2 : origin = 0x10000,length = 0x1A3F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + PORT6 : { * ( .int36 ) } > INT36 type = VECT_INIT + RTC : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT2 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + PORT1 : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER1_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER1_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_B1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_B0 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B3 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + DMA : { * ( .int48 ) } > INT48 type = VECT_INIT + .int49 : {} > INT49 + TIMER0_A1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_A0 : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_B2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A2 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B1 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A1 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5253.cmd + diff --git a/msp430/lnk_msp430f5254.cmd b/msp430/lnk_msp430f5254.cmd new file mode 100644 index 00000000..842e7a6f --- /dev/null +++ b/msp430/lnk_msp430f5254.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5254.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5254 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xA400, length = 0x5B80 + FLASH2 : origin = 0x10000,length = 0x1A3F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + PORT6 : { * ( .int36 ) } > INT36 type = VECT_INIT + RTC : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT2 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + PORT1 : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER1_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER1_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_B1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_B0 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B3 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + DMA : { * ( .int48 ) } > INT48 type = VECT_INIT + .int49 : {} > INT49 + TIMER0_A1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_A0 : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_B2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A2 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B1 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A1 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5254.cmd + diff --git a/msp430/lnk_msp430f5255.cmd b/msp430/lnk_msp430f5255.cmd new file mode 100644 index 00000000..6d83071a --- /dev/null +++ b/msp430/lnk_msp430f5255.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5255.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5255 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xA400, length = 0x5B80 + FLASH2 : origin = 0x10000,length = 0x1A3F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + PORT6 : { * ( .int36 ) } > INT36 type = VECT_INIT + RTC : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT2 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + PORT1 : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER1_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER1_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_B1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_B0 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B3 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + DMA : { * ( .int48 ) } > INT48 type = VECT_INIT + .int49 : {} > INT49 + TIMER0_A1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_A0 : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_B2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A2 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B1 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A1 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5255.cmd + diff --git a/msp430/lnk_msp430f5256.cmd b/msp430/lnk_msp430f5256.cmd new file mode 100644 index 00000000..16e65cd3 --- /dev/null +++ b/msp430/lnk_msp430f5256.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5256.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5256 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xA400, length = 0x5B80 + FLASH2 : origin = 0x10000,length = 0x1A3F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + PORT6 : { * ( .int36 ) } > INT36 type = VECT_INIT + RTC : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT2 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + PORT1 : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER1_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER1_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_B1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_B0 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B3 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + DMA : { * ( .int48 ) } > INT48 type = VECT_INIT + .int49 : {} > INT49 + TIMER0_A1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_A0 : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_B2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A2 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B1 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A1 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5256.cmd + diff --git a/msp430/lnk_msp430f5257.cmd b/msp430/lnk_msp430f5257.cmd new file mode 100644 index 00000000..8c504b93 --- /dev/null +++ b/msp430/lnk_msp430f5257.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5257.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5257 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xA400, length = 0x5B80 + FLASH2 : origin = 0x10000,length = 0x1A3F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + PORT6 : { * ( .int36 ) } > INT36 type = VECT_INIT + RTC : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT2 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + PORT1 : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER1_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER1_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_B1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_B0 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B3 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + DMA : { * ( .int48 ) } > INT48 type = VECT_INIT + .int49 : {} > INT49 + TIMER0_A1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_A0 : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_B2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A2 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B1 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A1 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5257.cmd + diff --git a/msp430/lnk_msp430f5258.cmd b/msp430/lnk_msp430f5258.cmd new file mode 100644 index 00000000..91ce8977 --- /dev/null +++ b/msp430/lnk_msp430f5258.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5258.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5258 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xA400, length = 0x5B80 + FLASH2 : origin = 0x10000,length = 0x1A3F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + PORT6 : { * ( .int36 ) } > INT36 type = VECT_INIT + RTC : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT2 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + PORT1 : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER1_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER1_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_B1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_B0 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B3 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + DMA : { * ( .int48 ) } > INT48 type = VECT_INIT + .int49 : {} > INT49 + TIMER0_A1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_A0 : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_B2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A2 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B1 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A1 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5258.cmd + diff --git a/msp430/lnk_msp430f5259.cmd b/msp430/lnk_msp430f5259.cmd new file mode 100644 index 00000000..13c6b358 --- /dev/null +++ b/msp430/lnk_msp430f5259.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5259.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5259 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xA400, length = 0x5B80 + FLASH2 : origin = 0x10000,length = 0x1A3F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + PORT6 : { * ( .int36 ) } > INT36 type = VECT_INIT + RTC : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT2 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + PORT1 : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER1_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER1_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_B1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_B0 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B3 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + DMA : { * ( .int48 ) } > INT48 type = VECT_INIT + .int49 : {} > INT49 + TIMER0_A1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_A0 : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_B2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A2 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B1 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A1 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5259.cmd + diff --git a/msp430/lnk_msp430f5304.cmd b/msp430/lnk_msp430f5304.cmd new file mode 100644 index 00000000..65e96a2a --- /dev/null +++ b/msp430/lnk_msp430f5304.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5304.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5304 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x1800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xE000, length = 0x1F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + LDO_PWR : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + .int60 : {} > INT60 + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5304.cmd + diff --git a/msp430/lnk_msp430f5308.cmd b/msp430/lnk_msp430f5308.cmd new file mode 100644 index 00000000..76957321 --- /dev/null +++ b/msp430/lnk_msp430f5308.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5308.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5308 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x1800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + LDO_PWR : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5308.cmd + diff --git a/msp430/lnk_msp430f5309.cmd b/msp430/lnk_msp430f5309.cmd new file mode 100644 index 00000000..fd5fcd0a --- /dev/null +++ b/msp430/lnk_msp430f5309.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5309.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5309 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x1800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xA000, length = 0x5F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + LDO_PWR : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5309.cmd + diff --git a/msp430/lnk_msp430f5310.cmd b/msp430/lnk_msp430f5310.cmd new file mode 100644 index 00000000..a6d7a3c7 --- /dev/null +++ b/msp430/lnk_msp430f5310.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5310.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5310 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x1800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + LDO_PWR : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5310.cmd + diff --git a/msp430/lnk_msp430f5324.cmd b/msp430/lnk_msp430f5324.cmd new file mode 100644 index 00000000..e9455a3c --- /dev/null +++ b/msp430/lnk_msp430f5324.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5324.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5324 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x1800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x43F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + LDO_PWR : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5324.cmd + diff --git a/msp430/lnk_msp430f5325.cmd b/msp430/lnk_msp430f5325.cmd new file mode 100644 index 00000000..57f05b57 --- /dev/null +++ b/msp430/lnk_msp430f5325.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5325.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5325 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x1800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x43F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + LDO_PWR : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5325.cmd + diff --git a/msp430/lnk_msp430f5326.cmd b/msp430/lnk_msp430f5326.cmd new file mode 100644 index 00000000..defaa7bb --- /dev/null +++ b/msp430/lnk_msp430f5326.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5326.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5326 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0xC3F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + LDO_PWR : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5326.cmd + diff --git a/msp430/lnk_msp430f5327.cmd b/msp430/lnk_msp430f5327.cmd new file mode 100644 index 00000000..b6735a75 --- /dev/null +++ b/msp430/lnk_msp430f5327.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5327.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5327 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0xC3F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + LDO_PWR : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5327.cmd + diff --git a/msp430/lnk_msp430f5328.cmd b/msp430/lnk_msp430f5328.cmd new file mode 100644 index 00000000..761637e3 --- /dev/null +++ b/msp430/lnk_msp430f5328.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5328.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5328 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x2800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x143F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + LDO_PWR : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5328.cmd + diff --git a/msp430/lnk_msp430f5329.cmd b/msp430/lnk_msp430f5329.cmd new file mode 100644 index 00000000..848e0cc3 --- /dev/null +++ b/msp430/lnk_msp430f5329.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5329.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5329 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x2800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x143F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + LDO_PWR : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5329.cmd + diff --git a/msp430/lnk_msp430f5333.cmd b/msp430/lnk_msp430f5333.cmd new file mode 100644 index 00000000..b2b8b387 --- /dev/null +++ b/msp430/lnk_msp430f5333.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5333.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5333 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x2800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x17FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + .int41 : {} > INT41 + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + LDO_PWR : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5333.cmd + diff --git a/msp430/lnk_msp430f5335.cmd b/msp430/lnk_msp430f5335.cmd new file mode 100644 index 00000000..49356a7f --- /dev/null +++ b/msp430/lnk_msp430f5335.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5335.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5335 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x37FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + .int41 : {} > INT41 + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + LDO_PWR : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5335.cmd + diff --git a/msp430/lnk_msp430f5336.cmd b/msp430/lnk_msp430f5336.cmd new file mode 100644 index 00000000..86bf80ad --- /dev/null +++ b/msp430/lnk_msp430f5336.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5336.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5336 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x17FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + DAC12 : { * ( .int41 ) } > INT41 type = VECT_INIT + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + LDO_PWR : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5336.cmd + diff --git a/msp430/lnk_msp430f5338.cmd b/msp430/lnk_msp430f5338.cmd new file mode 100644 index 00000000..f5b5815f --- /dev/null +++ b/msp430/lnk_msp430f5338.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5338.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5338 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x37FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + DAC12 : { * ( .int41 ) } > INT41 type = VECT_INIT + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + LDO_PWR : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5338.cmd + diff --git a/msp430/lnk_msp430f5340.cmd b/msp430/lnk_msp430f5340.cmd new file mode 100644 index 00000000..f87cbfd1 --- /dev/null +++ b/msp430/lnk_msp430f5340.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5340.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5340 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x1800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x43F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5340.cmd + diff --git a/msp430/lnk_msp430f5341.cmd b/msp430/lnk_msp430f5341.cmd new file mode 100644 index 00000000..5b565d62 --- /dev/null +++ b/msp430/lnk_msp430f5341.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5341.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5341 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0xC3F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5341.cmd + diff --git a/msp430/lnk_msp430f5342.cmd b/msp430/lnk_msp430f5342.cmd new file mode 100644 index 00000000..fb5d72fc --- /dev/null +++ b/msp430/lnk_msp430f5342.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5342.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5342 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x2800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x143F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5342.cmd + diff --git a/msp430/lnk_msp430f5358.cmd b/msp430/lnk_msp430f5358.cmd new file mode 100644 index 00000000..e80c48c9 --- /dev/null +++ b/msp430/lnk_msp430f5358.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5358.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5358 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4800 + RAM2 : origin = 0xF8000, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x57FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM | RAM2 /* Global & static vars */ + .data : {} > RAM | RAM2 /* Global & static vars */ + .TI.noinit : {} > RAM | RAM2 /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + USCI_B2 : { * ( .int35 ) } > INT35 type = VECT_INIT + USCI_A2 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + DAC12 : { * ( .int41 ) } > INT41 type = VECT_INIT + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + LDO_PWR : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5358.cmd + diff --git a/msp430/lnk_msp430f5359.cmd b/msp430/lnk_msp430f5359.cmd new file mode 100644 index 00000000..8c390c8b --- /dev/null +++ b/msp430/lnk_msp430f5359.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5359.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5359 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4800 + RAM2 : origin = 0xF0000, length = 0xC000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x77FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM | RAM2 /* Global & static vars */ + .data : {} > RAM | RAM2 /* Global & static vars */ + .TI.noinit : {} > RAM | RAM2 /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + USCI_B2 : { * ( .int35 ) } > INT35 type = VECT_INIT + USCI_A2 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + DAC12 : { * ( .int41 ) } > INT41 type = VECT_INIT + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + LDO_PWR : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5359.cmd + diff --git a/msp430/lnk_msp430f5418.cmd b/msp430/lnk_msp430f5418.cmd new file mode 100644 index 00000000..2edceec2 --- /dev/null +++ b/msp430/lnk_msp430f5418.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5418.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5418 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x5C00, length = 0xA380 + FLASH2 : origin = 0x10000,length = 0x15BF8 /* Boundaries changed to fix CPU20/CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + .int44 : {} > INT44 + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + .int52 : {} > INT52 + TIMER0_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + ADC12 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_B0 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_A0 : { * ( .int57 ) } > INT57 type = VECT_INIT + WDT : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B1 : { * ( .int59 ) } > INT59 type = VECT_INIT + TIMER0_B0 : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5418.cmd + diff --git a/msp430/lnk_msp430f5418a.cmd b/msp430/lnk_msp430f5418a.cmd new file mode 100644 index 00000000..f27ea9fa --- /dev/null +++ b/msp430/lnk_msp430f5418a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5418a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5418A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x5C00, length = 0xA380 + FLASH2 : origin = 0x10000,length = 0x15BF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + .int44 : {} > INT44 + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + .int52 : {} > INT52 + TIMER0_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + ADC12 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_B0 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_A0 : { * ( .int57 ) } > INT57 type = VECT_INIT + WDT : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B1 : { * ( .int59 ) } > INT59 type = VECT_INIT + TIMER0_B0 : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5418a.cmd + diff --git a/msp430/lnk_msp430f5419.cmd b/msp430/lnk_msp430f5419.cmd new file mode 100644 index 00000000..0fa87f3c --- /dev/null +++ b/msp430/lnk_msp430f5419.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5419.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5419 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x5C00, length = 0xA380 + FLASH2 : origin = 0x10000,length = 0x15BF8 /* Boundaries changed to fix CPU20/CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_B3 : { * ( .int43 ) } > INT43 type = VECT_INIT + USCI_A3 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USCI_B2 : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + ADC12 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_B0 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_A0 : { * ( .int57 ) } > INT57 type = VECT_INIT + WDT : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B1 : { * ( .int59 ) } > INT59 type = VECT_INIT + TIMER0_B0 : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5419.cmd + diff --git a/msp430/lnk_msp430f5419a.cmd b/msp430/lnk_msp430f5419a.cmd new file mode 100644 index 00000000..6eb8ef3e --- /dev/null +++ b/msp430/lnk_msp430f5419a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5419a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5419A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x5C00, length = 0xA380 + FLASH2 : origin = 0x10000,length = 0x15BF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_B3 : { * ( .int43 ) } > INT43 type = VECT_INIT + USCI_A3 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USCI_B2 : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + ADC12 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_B0 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_A0 : { * ( .int57 ) } > INT57 type = VECT_INIT + WDT : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B1 : { * ( .int59 ) } > INT59 type = VECT_INIT + TIMER0_B0 : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5419a.cmd + diff --git a/msp430/lnk_msp430f5435.cmd b/msp430/lnk_msp430f5435.cmd new file mode 100644 index 00000000..b8c140dd --- /dev/null +++ b/msp430/lnk_msp430f5435.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5435.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5435 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x5C00, length = 0xA380 + FLASH2 : origin = 0x10000,length = 0x25BF8 /* Boundaries changed to fix CPU20/CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + .int44 : {} > INT44 + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + .int52 : {} > INT52 + TIMER0_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + ADC12 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_B0 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_A0 : { * ( .int57 ) } > INT57 type = VECT_INIT + WDT : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B1 : { * ( .int59 ) } > INT59 type = VECT_INIT + TIMER0_B0 : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5435.cmd + diff --git a/msp430/lnk_msp430f5435a.cmd b/msp430/lnk_msp430f5435a.cmd new file mode 100644 index 00000000..0b082678 --- /dev/null +++ b/msp430/lnk_msp430f5435a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5435a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5435A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x5C00, length = 0xA380 + FLASH2 : origin = 0x10000,length = 0x25BF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + .int44 : {} > INT44 + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + .int52 : {} > INT52 + TIMER0_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + ADC12 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_B0 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_A0 : { * ( .int57 ) } > INT57 type = VECT_INIT + WDT : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B1 : { * ( .int59 ) } > INT59 type = VECT_INIT + TIMER0_B0 : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5435a.cmd + diff --git a/msp430/lnk_msp430f5436.cmd b/msp430/lnk_msp430f5436.cmd new file mode 100644 index 00000000..2554e66a --- /dev/null +++ b/msp430/lnk_msp430f5436.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5436.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5436 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x5C00, length = 0xA380 + FLASH2 : origin = 0x10000,length = 0x25BF8 /* Boundaries changed to fix CPU20/CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_B3 : { * ( .int43 ) } > INT43 type = VECT_INIT + USCI_A3 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USCI_B2 : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + ADC12 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_B0 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_A0 : { * ( .int57 ) } > INT57 type = VECT_INIT + WDT : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B1 : { * ( .int59 ) } > INT59 type = VECT_INIT + TIMER0_B0 : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5436.cmd + diff --git a/msp430/lnk_msp430f5436a.cmd b/msp430/lnk_msp430f5436a.cmd new file mode 100644 index 00000000..4e31f992 --- /dev/null +++ b/msp430/lnk_msp430f5436a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5436a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5436A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x5C00, length = 0xA380 + FLASH2 : origin = 0x10000,length = 0x25BF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_B3 : { * ( .int43 ) } > INT43 type = VECT_INIT + USCI_A3 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USCI_B2 : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + ADC12 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_B0 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_A0 : { * ( .int57 ) } > INT57 type = VECT_INIT + WDT : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B1 : { * ( .int59 ) } > INT59 type = VECT_INIT + TIMER0_B0 : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5436a.cmd + diff --git a/msp430/lnk_msp430f5437.cmd b/msp430/lnk_msp430f5437.cmd new file mode 100644 index 00000000..c6a3e4b8 --- /dev/null +++ b/msp430/lnk_msp430f5437.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5437.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5437 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x5C00, length = 0xA380 + FLASH2 : origin = 0x10000,length = 0x35BF8 /* Boundaries changed to fix CPU20/CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + .int44 : {} > INT44 + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + .int52 : {} > INT52 + TIMER0_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + ADC12 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_B0 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_A0 : { * ( .int57 ) } > INT57 type = VECT_INIT + WDT : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B1 : { * ( .int59 ) } > INT59 type = VECT_INIT + TIMER0_B0 : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5437.cmd + diff --git a/msp430/lnk_msp430f5437a.cmd b/msp430/lnk_msp430f5437a.cmd new file mode 100644 index 00000000..df032d9b --- /dev/null +++ b/msp430/lnk_msp430f5437a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5437a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5437A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x5C00, length = 0xA380 + FLASH2 : origin = 0x10000,length = 0x35BF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + .int44 : {} > INT44 + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + .int52 : {} > INT52 + TIMER0_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + ADC12 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_B0 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_A0 : { * ( .int57 ) } > INT57 type = VECT_INIT + WDT : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B1 : { * ( .int59 ) } > INT59 type = VECT_INIT + TIMER0_B0 : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5437a.cmd + diff --git a/msp430/lnk_msp430f5438.cmd b/msp430/lnk_msp430f5438.cmd new file mode 100644 index 00000000..1be79474 --- /dev/null +++ b/msp430/lnk_msp430f5438.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5438.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5438 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x5C00, length = 0xA380 + FLASH2 : origin = 0x10000,length = 0x35BF8 /* Boundaries changed to fix CPU20/CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_B3 : { * ( .int43 ) } > INT43 type = VECT_INIT + USCI_A3 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USCI_B2 : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + ADC12 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_B0 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_A0 : { * ( .int57 ) } > INT57 type = VECT_INIT + WDT : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B1 : { * ( .int59 ) } > INT59 type = VECT_INIT + TIMER0_B0 : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5438.cmd + diff --git a/msp430/lnk_msp430f5438a.cmd b/msp430/lnk_msp430f5438a.cmd new file mode 100644 index 00000000..19a9e5a3 --- /dev/null +++ b/msp430/lnk_msp430f5438a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5438a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5438A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x5C00, length = 0xA380 + FLASH2 : origin = 0x10000,length = 0x35BF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_B3 : { * ( .int43 ) } > INT43 type = VECT_INIT + USCI_A3 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USCI_B2 : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + ADC12 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_B0 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_A0 : { * ( .int57 ) } > INT57 type = VECT_INIT + WDT : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B1 : { * ( .int59 ) } > INT59 type = VECT_INIT + TIMER0_B0 : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5438a.cmd + diff --git a/msp430/lnk_msp430f5500.cmd b/msp430/lnk_msp430f5500.cmd new file mode 100644 index 00000000..1ca95628 --- /dev/null +++ b/msp430/lnk_msp430f5500.cmd @@ -0,0 +1,241 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5500.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5500 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x1000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xE000, length = 0x1F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5500.cmd + diff --git a/msp430/lnk_msp430f5501.cmd b/msp430/lnk_msp430f5501.cmd new file mode 100644 index 00000000..ff38de96 --- /dev/null +++ b/msp430/lnk_msp430f5501.cmd @@ -0,0 +1,241 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5501.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5501 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x1000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5501.cmd + diff --git a/msp430/lnk_msp430f5502.cmd b/msp430/lnk_msp430f5502.cmd new file mode 100644 index 00000000..78254dbf --- /dev/null +++ b/msp430/lnk_msp430f5502.cmd @@ -0,0 +1,241 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5502.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5502 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x1000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xA000, length = 0x5F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5502.cmd + diff --git a/msp430/lnk_msp430f5503.cmd b/msp430/lnk_msp430f5503.cmd new file mode 100644 index 00000000..cca2f400 --- /dev/null +++ b/msp430/lnk_msp430f5503.cmd @@ -0,0 +1,241 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5503.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5503 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x1000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5503.cmd + diff --git a/msp430/lnk_msp430f5504.cmd b/msp430/lnk_msp430f5504.cmd new file mode 100644 index 00000000..81e7fc69 --- /dev/null +++ b/msp430/lnk_msp430f5504.cmd @@ -0,0 +1,241 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5504.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5504 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x1000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xE000, length = 0x1F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + .int60 : {} > INT60 + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5504.cmd + diff --git a/msp430/lnk_msp430f5505.cmd b/msp430/lnk_msp430f5505.cmd new file mode 100644 index 00000000..f5b25c92 --- /dev/null +++ b/msp430/lnk_msp430f5505.cmd @@ -0,0 +1,241 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5505.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5505 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x1000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + .int60 : {} > INT60 + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5505.cmd + diff --git a/msp430/lnk_msp430f5506.cmd b/msp430/lnk_msp430f5506.cmd new file mode 100644 index 00000000..da3d9cfc --- /dev/null +++ b/msp430/lnk_msp430f5506.cmd @@ -0,0 +1,241 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5506.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5506 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x1000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xA000, length = 0x5F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + .int60 : {} > INT60 + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5506.cmd + diff --git a/msp430/lnk_msp430f5507.cmd b/msp430/lnk_msp430f5507.cmd new file mode 100644 index 00000000..0004dabc --- /dev/null +++ b/msp430/lnk_msp430f5507.cmd @@ -0,0 +1,241 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5507.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5507 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x1000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + .int60 : {} > INT60 + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5507.cmd + diff --git a/msp430/lnk_msp430f5508.cmd b/msp430/lnk_msp430f5508.cmd new file mode 100644 index 00000000..1ca5c92b --- /dev/null +++ b/msp430/lnk_msp430f5508.cmd @@ -0,0 +1,241 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5508.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5508 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x1000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5508.cmd + diff --git a/msp430/lnk_msp430f5509.cmd b/msp430/lnk_msp430f5509.cmd new file mode 100644 index 00000000..7f2a9c14 --- /dev/null +++ b/msp430/lnk_msp430f5509.cmd @@ -0,0 +1,241 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5509.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5509 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x1000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xA000, length = 0x5F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5509.cmd + diff --git a/msp430/lnk_msp430f5510.cmd b/msp430/lnk_msp430f5510.cmd new file mode 100644 index 00000000..7c4ba99b --- /dev/null +++ b/msp430/lnk_msp430f5510.cmd @@ -0,0 +1,241 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5510.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5510 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x1000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5510.cmd + diff --git a/msp430/lnk_msp430f5513.cmd b/msp430/lnk_msp430f5513.cmd new file mode 100644 index 00000000..17a43758 --- /dev/null +++ b/msp430/lnk_msp430f5513.cmd @@ -0,0 +1,241 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5513.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5513 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x1000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5513.cmd + diff --git a/msp430/lnk_msp430f5514.cmd b/msp430/lnk_msp430f5514.cmd new file mode 100644 index 00000000..d5f3a505 --- /dev/null +++ b/msp430/lnk_msp430f5514.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5514.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5514 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x1000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x43F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5514.cmd + diff --git a/msp430/lnk_msp430f5515.cmd b/msp430/lnk_msp430f5515.cmd new file mode 100644 index 00000000..2b34167e --- /dev/null +++ b/msp430/lnk_msp430f5515.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5515.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5515 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x1000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x43F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5515.cmd + diff --git a/msp430/lnk_msp430f5517.cmd b/msp430/lnk_msp430f5517.cmd new file mode 100644 index 00000000..07557e76 --- /dev/null +++ b/msp430/lnk_msp430f5517.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5517.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5517 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x1800 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0xC3F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5517.cmd + diff --git a/msp430/lnk_msp430f5519.cmd b/msp430/lnk_msp430f5519.cmd new file mode 100644 index 00000000..ea6851a4 --- /dev/null +++ b/msp430/lnk_msp430f5519.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5519.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5519 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x143F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5519.cmd + diff --git a/msp430/lnk_msp430f5521.cmd b/msp430/lnk_msp430f5521.cmd new file mode 100644 index 00000000..51ef2f37 --- /dev/null +++ b/msp430/lnk_msp430f5521.cmd @@ -0,0 +1,241 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5521.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5521 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x1800 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5521.cmd + diff --git a/msp430/lnk_msp430f5522.cmd b/msp430/lnk_msp430f5522.cmd new file mode 100644 index 00000000..c17922a5 --- /dev/null +++ b/msp430/lnk_msp430f5522.cmd @@ -0,0 +1,241 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5522.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5522 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5522.cmd + diff --git a/msp430/lnk_msp430f5524.cmd b/msp430/lnk_msp430f5524.cmd new file mode 100644 index 00000000..21c05608 --- /dev/null +++ b/msp430/lnk_msp430f5524.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5524.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5524 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x1000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x43F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5524.cmd + diff --git a/msp430/lnk_msp430f5525.cmd b/msp430/lnk_msp430f5525.cmd new file mode 100644 index 00000000..71f10803 --- /dev/null +++ b/msp430/lnk_msp430f5525.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5525.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5525 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x1000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x43F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5525.cmd + diff --git a/msp430/lnk_msp430f5526.cmd b/msp430/lnk_msp430f5526.cmd new file mode 100644 index 00000000..b97686e5 --- /dev/null +++ b/msp430/lnk_msp430f5526.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5526.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5526 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x1800 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0xC3F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5526.cmd + diff --git a/msp430/lnk_msp430f5527.cmd b/msp430/lnk_msp430f5527.cmd new file mode 100644 index 00000000..ea5b4ad7 --- /dev/null +++ b/msp430/lnk_msp430f5527.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5527.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5527 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x1800 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0xC3F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5527.cmd + diff --git a/msp430/lnk_msp430f5528.cmd b/msp430/lnk_msp430f5528.cmd new file mode 100644 index 00000000..b950a0eb --- /dev/null +++ b/msp430/lnk_msp430f5528.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5528.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5528 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x143F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5528.cmd + diff --git a/msp430/lnk_msp430f5529.cmd b/msp430/lnk_msp430f5529.cmd new file mode 100644 index 00000000..ae2bf3b0 --- /dev/null +++ b/msp430/lnk_msp430f5529.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5529.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5529 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x143F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5529.cmd + diff --git a/msp430/lnk_msp430f5630.cmd b/msp430/lnk_msp430f5630.cmd new file mode 100644 index 00000000..6ef3d83d --- /dev/null +++ b/msp430/lnk_msp430f5630.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5630.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5630 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x17FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + .int41 : {} > INT41 + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5630.cmd + diff --git a/msp430/lnk_msp430f5631.cmd b/msp430/lnk_msp430f5631.cmd new file mode 100644 index 00000000..f1f34145 --- /dev/null +++ b/msp430/lnk_msp430f5631.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5631.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5631 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x27FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + .int41 : {} > INT41 + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5631.cmd + diff --git a/msp430/lnk_msp430f5632.cmd b/msp430/lnk_msp430f5632.cmd new file mode 100644 index 00000000..f8c3e943 --- /dev/null +++ b/msp430/lnk_msp430f5632.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5632.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5632 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x37FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + .int41 : {} > INT41 + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5632.cmd + diff --git a/msp430/lnk_msp430f5633.cmd b/msp430/lnk_msp430f5633.cmd new file mode 100644 index 00000000..b00f06b2 --- /dev/null +++ b/msp430/lnk_msp430f5633.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5633.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5633 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x17FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + .int41 : {} > INT41 + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5633.cmd + diff --git a/msp430/lnk_msp430f5634.cmd b/msp430/lnk_msp430f5634.cmd new file mode 100644 index 00000000..c67711a3 --- /dev/null +++ b/msp430/lnk_msp430f5634.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5634.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5634 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x27FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + .int41 : {} > INT41 + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5634.cmd + diff --git a/msp430/lnk_msp430f5635.cmd b/msp430/lnk_msp430f5635.cmd new file mode 100644 index 00000000..6a8d7196 --- /dev/null +++ b/msp430/lnk_msp430f5635.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5635.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5635 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x37FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + .int41 : {} > INT41 + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5635.cmd + diff --git a/msp430/lnk_msp430f5636.cmd b/msp430/lnk_msp430f5636.cmd new file mode 100644 index 00000000..cce703ca --- /dev/null +++ b/msp430/lnk_msp430f5636.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5636.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5636 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x17FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + DAC12 : { * ( .int41 ) } > INT41 type = VECT_INIT + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5636.cmd + diff --git a/msp430/lnk_msp430f5637.cmd b/msp430/lnk_msp430f5637.cmd new file mode 100644 index 00000000..4177fb88 --- /dev/null +++ b/msp430/lnk_msp430f5637.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5637.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5637 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x27FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + DAC12 : { * ( .int41 ) } > INT41 type = VECT_INIT + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5637.cmd + diff --git a/msp430/lnk_msp430f5638.cmd b/msp430/lnk_msp430f5638.cmd new file mode 100644 index 00000000..079714d1 --- /dev/null +++ b/msp430/lnk_msp430f5638.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5638.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5638 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x37FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + DAC12 : { * ( .int41 ) } > INT41 type = VECT_INIT + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5638.cmd + diff --git a/msp430/lnk_msp430f5658.cmd b/msp430/lnk_msp430f5658.cmd new file mode 100644 index 00000000..24972efe --- /dev/null +++ b/msp430/lnk_msp430f5658.cmd @@ -0,0 +1,252 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5658.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5658 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + RAM2 : origin = 0xF8000, length = 0x4000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x57FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM | RAM2 /* Global & static vars */ + .data : {} > RAM | RAM2 /* Global & static vars */ + .TI.noinit : {} > RAM | RAM2 /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + USCI_B2 : { * ( .int35 ) } > INT35 type = VECT_INIT + USCI_A2 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + DAC12 : { * ( .int41 ) } > INT41 type = VECT_INIT + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5658.cmd + diff --git a/msp430/lnk_msp430f5659.cmd b/msp430/lnk_msp430f5659.cmd new file mode 100644 index 00000000..d9834253 --- /dev/null +++ b/msp430/lnk_msp430f5659.cmd @@ -0,0 +1,252 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f5659.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5659 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + RAM2 : origin = 0xF0000, length = 0xC000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x77FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM | RAM2 /* Global & static vars */ + .data : {} > RAM | RAM2 /* Global & static vars */ + .TI.noinit : {} > RAM | RAM2 /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + USCI_B2 : { * ( .int35 ) } > INT35 type = VECT_INIT + USCI_A2 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + DAC12 : { * ( .int41 ) } > INT41 type = VECT_INIT + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f5659.cmd + diff --git a/msp430/lnk_msp430f6433.cmd b/msp430/lnk_msp430f6433.cmd new file mode 100644 index 00000000..89c7c4bb --- /dev/null +++ b/msp430/lnk_msp430f6433.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6433.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6433 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x17FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + .int41 : {} > INT41 + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + LCD_B : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + LDO_PWR : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6433.cmd + diff --git a/msp430/lnk_msp430f6435.cmd b/msp430/lnk_msp430f6435.cmd new file mode 100644 index 00000000..54f4039d --- /dev/null +++ b/msp430/lnk_msp430f6435.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6435.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6435 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x37FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + .int41 : {} > INT41 + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + LCD_B : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + LDO_PWR : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6435.cmd + diff --git a/msp430/lnk_msp430f6436.cmd b/msp430/lnk_msp430f6436.cmd new file mode 100644 index 00000000..8179c34d --- /dev/null +++ b/msp430/lnk_msp430f6436.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6436.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6436 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x17FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + DAC12 : { * ( .int41 ) } > INT41 type = VECT_INIT + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + LCD_B : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + LDO_PWR : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6436.cmd + diff --git a/msp430/lnk_msp430f6438.cmd b/msp430/lnk_msp430f6438.cmd new file mode 100644 index 00000000..774e5f15 --- /dev/null +++ b/msp430/lnk_msp430f6438.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6438.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6438 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x37FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + DAC12 : { * ( .int41 ) } > INT41 type = VECT_INIT + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + LCD_B : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + LDO_PWR : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6438.cmd + diff --git a/msp430/lnk_msp430f6458.cmd b/msp430/lnk_msp430f6458.cmd new file mode 100644 index 00000000..dccb5e88 --- /dev/null +++ b/msp430/lnk_msp430f6458.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6458.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6458 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4800 + RAM2 : origin = 0xF8000, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x57FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM | RAM2 /* Global & static vars */ + .data : {} > RAM | RAM2 /* Global & static vars */ + .TI.noinit : {} > RAM | RAM2 /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + USCI_B2 : { * ( .int35 ) } > INT35 type = VECT_INIT + USCI_A2 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + DAC12 : { * ( .int41 ) } > INT41 type = VECT_INIT + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + LCD_B : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + LDO_PWR : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6458.cmd + diff --git a/msp430/lnk_msp430f6459.cmd b/msp430/lnk_msp430f6459.cmd new file mode 100644 index 00000000..beb6d38c --- /dev/null +++ b/msp430/lnk_msp430f6459.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6459.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6459 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4800 + RAM2 : origin = 0xF0000, length = 0xC000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x77FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM | RAM2 /* Global & static vars */ + .data : {} > RAM | RAM2 /* Global & static vars */ + .TI.noinit : {} > RAM | RAM2 /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + USCI_B2 : { * ( .int35 ) } > INT35 type = VECT_INIT + USCI_A2 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + DAC12 : { * ( .int41 ) } > INT41 type = VECT_INIT + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + LCD_B : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + LDO_PWR : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6459.cmd + diff --git a/msp430/lnk_msp430f6630.cmd b/msp430/lnk_msp430f6630.cmd new file mode 100644 index 00000000..c7c90a63 --- /dev/null +++ b/msp430/lnk_msp430f6630.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6630.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6630 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x17FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + .int41 : {} > INT41 + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + LCD_B : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6630.cmd + diff --git a/msp430/lnk_msp430f6631.cmd b/msp430/lnk_msp430f6631.cmd new file mode 100644 index 00000000..5f8ac965 --- /dev/null +++ b/msp430/lnk_msp430f6631.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6631.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6631 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x27FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + .int41 : {} > INT41 + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + LCD_B : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6631.cmd + diff --git a/msp430/lnk_msp430f6632.cmd b/msp430/lnk_msp430f6632.cmd new file mode 100644 index 00000000..52fae1a0 --- /dev/null +++ b/msp430/lnk_msp430f6632.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6632.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6632 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x37FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + .int41 : {} > INT41 + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + LCD_B : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + .int54 : {} > INT54 + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6632.cmd + diff --git a/msp430/lnk_msp430f6633.cmd b/msp430/lnk_msp430f6633.cmd new file mode 100644 index 00000000..5c825f14 --- /dev/null +++ b/msp430/lnk_msp430f6633.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6633.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6633 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x17FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + .int41 : {} > INT41 + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + LCD_B : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6633.cmd + diff --git a/msp430/lnk_msp430f6634.cmd b/msp430/lnk_msp430f6634.cmd new file mode 100644 index 00000000..94e4dfb6 --- /dev/null +++ b/msp430/lnk_msp430f6634.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6634.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6634 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x27FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + .int41 : {} > INT41 + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + LCD_B : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6634.cmd + diff --git a/msp430/lnk_msp430f6635.cmd b/msp430/lnk_msp430f6635.cmd new file mode 100644 index 00000000..ca961253 --- /dev/null +++ b/msp430/lnk_msp430f6635.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6635.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6635 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x37FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + .int41 : {} > INT41 + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + LCD_B : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6635.cmd + diff --git a/msp430/lnk_msp430f6636.cmd b/msp430/lnk_msp430f6636.cmd new file mode 100644 index 00000000..e7f3b988 --- /dev/null +++ b/msp430/lnk_msp430f6636.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6636.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6636 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x17FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + DAC12 : { * ( .int41 ) } > INT41 type = VECT_INIT + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + LCD_B : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6636.cmd + diff --git a/msp430/lnk_msp430f6637.cmd b/msp430/lnk_msp430f6637.cmd new file mode 100644 index 00000000..c15a6c89 --- /dev/null +++ b/msp430/lnk_msp430f6637.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6637.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6637 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x27FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + DAC12 : { * ( .int41 ) } > INT41 type = VECT_INIT + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + LCD_B : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6637.cmd + diff --git a/msp430/lnk_msp430f6638.cmd b/msp430/lnk_msp430f6638.cmd new file mode 100644 index 00000000..053ebdb9 --- /dev/null +++ b/msp430/lnk_msp430f6638.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6638.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6638 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x37FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + DAC12 : { * ( .int41 ) } > INT41 type = VECT_INIT + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + LCD_B : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6638.cmd + diff --git a/msp430/lnk_msp430f6658.cmd b/msp430/lnk_msp430f6658.cmd new file mode 100644 index 00000000..ac369027 --- /dev/null +++ b/msp430/lnk_msp430f6658.cmd @@ -0,0 +1,252 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6658.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6658 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + RAM2 : origin = 0xF8000, length = 0x4000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x57FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM | RAM2 /* Global & static vars */ + .data : {} > RAM | RAM2 /* Global & static vars */ + .TI.noinit : {} > RAM | RAM2 /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + USCI_B2 : { * ( .int35 ) } > INT35 type = VECT_INIT + USCI_A2 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + DAC12 : { * ( .int41 ) } > INT41 type = VECT_INIT + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + LCD_B : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6658.cmd + diff --git a/msp430/lnk_msp430f6659.cmd b/msp430/lnk_msp430f6659.cmd new file mode 100644 index 00000000..787e38cc --- /dev/null +++ b/msp430/lnk_msp430f6659.cmd @@ -0,0 +1,252 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6659.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6659 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x4000 + RAM2 : origin = 0xF0000, length = 0xC000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + FLASH2 : origin = 0x10000,length = 0x77FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM | RAM2 /* Global & static vars */ + .data : {} > RAM | RAM2 /* Global & static vars */ + .TI.noinit : {} > RAM | RAM2 /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + USCI_B2 : { * ( .int35 ) } > INT35 type = VECT_INIT + USCI_A2 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + DAC12 : { * ( .int41 ) } > INT41 type = VECT_INIT + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + LCD_B : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6659.cmd + diff --git a/msp430/lnk_msp430f6720.cmd b/msp430/lnk_msp430f6720.cmd new file mode 100644 index 00000000..898c3580 --- /dev/null +++ b/msp430/lnk_msp430f6720.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6720.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6720 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6720.cmd + diff --git a/msp430/lnk_msp430f6720a.cmd b/msp430/lnk_msp430f6720a.cmd new file mode 100644 index 00000000..1ffe2560 --- /dev/null +++ b/msp430/lnk_msp430f6720a.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6720a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6720A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6720a.cmd + diff --git a/msp430/lnk_msp430f6721.cmd b/msp430/lnk_msp430f6721.cmd new file mode 100644 index 00000000..3995d560 --- /dev/null +++ b/msp430/lnk_msp430f6721.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6721.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6721 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6721.cmd + diff --git a/msp430/lnk_msp430f6721a.cmd b/msp430/lnk_msp430f6721a.cmd new file mode 100644 index 00000000..c1eae2b7 --- /dev/null +++ b/msp430/lnk_msp430f6721a.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6721a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6721A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6721a.cmd + diff --git a/msp430/lnk_msp430f6723.cmd b/msp430/lnk_msp430f6723.cmd new file mode 100644 index 00000000..2cfd371a --- /dev/null +++ b/msp430/lnk_msp430f6723.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6723.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6723 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x1000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBF80 + FLASH2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6723.cmd + diff --git a/msp430/lnk_msp430f6723a.cmd b/msp430/lnk_msp430f6723a.cmd new file mode 100644 index 00000000..655952bf --- /dev/null +++ b/msp430/lnk_msp430f6723a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6723a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6723A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x1000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBF80 + FLASH2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6723a.cmd + diff --git a/msp430/lnk_msp430f6724.cmd b/msp430/lnk_msp430f6724.cmd new file mode 100644 index 00000000..b5386b90 --- /dev/null +++ b/msp430/lnk_msp430f6724.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6724.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6724 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x1000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBF80 + FLASH2 : origin = 0x10000,length = 0xBFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6724.cmd + diff --git a/msp430/lnk_msp430f6724a.cmd b/msp430/lnk_msp430f6724a.cmd new file mode 100644 index 00000000..f7134b31 --- /dev/null +++ b/msp430/lnk_msp430f6724a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6724a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6724A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x1000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBF80 + FLASH2 : origin = 0x10000,length = 0xBFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6724a.cmd + diff --git a/msp430/lnk_msp430f6725.cmd b/msp430/lnk_msp430f6725.cmd new file mode 100644 index 00000000..a5b8d171 --- /dev/null +++ b/msp430/lnk_msp430f6725.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6725.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6725 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x1000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBF80 + FLASH2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6725.cmd + diff --git a/msp430/lnk_msp430f6725a.cmd b/msp430/lnk_msp430f6725a.cmd new file mode 100644 index 00000000..f7bc5862 --- /dev/null +++ b/msp430/lnk_msp430f6725a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6725a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6725A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x1000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBF80 + FLASH2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6725a.cmd + diff --git a/msp430/lnk_msp430f6726.cmd b/msp430/lnk_msp430f6726.cmd new file mode 100644 index 00000000..78cb0637 --- /dev/null +++ b/msp430/lnk_msp430f6726.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6726.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6726 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBF80 + FLASH2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6726.cmd + diff --git a/msp430/lnk_msp430f6726a.cmd b/msp430/lnk_msp430f6726a.cmd new file mode 100644 index 00000000..4c4463ee --- /dev/null +++ b/msp430/lnk_msp430f6726a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6726a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6726A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBF80 + FLASH2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6726a.cmd + diff --git a/msp430/lnk_msp430f6730.cmd b/msp430/lnk_msp430f6730.cmd new file mode 100644 index 00000000..424eec51 --- /dev/null +++ b/msp430/lnk_msp430f6730.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6730.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6730 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6730.cmd + diff --git a/msp430/lnk_msp430f6730a.cmd b/msp430/lnk_msp430f6730a.cmd new file mode 100644 index 00000000..3fbe0e4a --- /dev/null +++ b/msp430/lnk_msp430f6730a.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6730a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6730A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6730a.cmd + diff --git a/msp430/lnk_msp430f6731.cmd b/msp430/lnk_msp430f6731.cmd new file mode 100644 index 00000000..d4e12121 --- /dev/null +++ b/msp430/lnk_msp430f6731.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6731.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6731 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6731.cmd + diff --git a/msp430/lnk_msp430f6731a.cmd b/msp430/lnk_msp430f6731a.cmd new file mode 100644 index 00000000..1ada9cb7 --- /dev/null +++ b/msp430/lnk_msp430f6731a.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6731a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6731A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6731a.cmd + diff --git a/msp430/lnk_msp430f6733.cmd b/msp430/lnk_msp430f6733.cmd new file mode 100644 index 00000000..3a45374e --- /dev/null +++ b/msp430/lnk_msp430f6733.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6733.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6733 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x1000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBF80 + FLASH2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6733.cmd + diff --git a/msp430/lnk_msp430f6733a.cmd b/msp430/lnk_msp430f6733a.cmd new file mode 100644 index 00000000..19422b6b --- /dev/null +++ b/msp430/lnk_msp430f6733a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6733a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6733A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x1000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBF80 + FLASH2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6733a.cmd + diff --git a/msp430/lnk_msp430f6734.cmd b/msp430/lnk_msp430f6734.cmd new file mode 100644 index 00000000..44784f93 --- /dev/null +++ b/msp430/lnk_msp430f6734.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6734.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6734 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x1000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBF80 + FLASH2 : origin = 0x10000,length = 0xBFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6734.cmd + diff --git a/msp430/lnk_msp430f6734a.cmd b/msp430/lnk_msp430f6734a.cmd new file mode 100644 index 00000000..db1028c0 --- /dev/null +++ b/msp430/lnk_msp430f6734a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6734a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6734A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x1000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBF80 + FLASH2 : origin = 0x10000,length = 0xBFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6734a.cmd + diff --git a/msp430/lnk_msp430f6735.cmd b/msp430/lnk_msp430f6735.cmd new file mode 100644 index 00000000..6d68aa9d --- /dev/null +++ b/msp430/lnk_msp430f6735.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6735.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6735 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x1000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBF80 + FLASH2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6735.cmd + diff --git a/msp430/lnk_msp430f6735a.cmd b/msp430/lnk_msp430f6735a.cmd new file mode 100644 index 00000000..3d5efa90 --- /dev/null +++ b/msp430/lnk_msp430f6735a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6735a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6735A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x1000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBF80 + FLASH2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6735a.cmd + diff --git a/msp430/lnk_msp430f6736.cmd b/msp430/lnk_msp430f6736.cmd new file mode 100644 index 00000000..b3701356 --- /dev/null +++ b/msp430/lnk_msp430f6736.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6736.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6736 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBF80 + FLASH2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6736.cmd + diff --git a/msp430/lnk_msp430f6736a.cmd b/msp430/lnk_msp430f6736a.cmd new file mode 100644 index 00000000..4c3e9c71 --- /dev/null +++ b/msp430/lnk_msp430f6736a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6736a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6736A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBF80 + FLASH2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6736a.cmd + diff --git a/msp430/lnk_msp430f6745.cmd b/msp430/lnk_msp430f6745.cmd new file mode 100644 index 00000000..abae3f9d --- /dev/null +++ b/msp430/lnk_msp430f6745.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6745.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6745 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x1BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6745.cmd + diff --git a/msp430/lnk_msp430f67451.cmd b/msp430/lnk_msp430f67451.cmd new file mode 100644 index 00000000..f67260ad --- /dev/null +++ b/msp430/lnk_msp430f67451.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67451.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67451 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x1BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67451.cmd + diff --git a/msp430/lnk_msp430f67451a.cmd b/msp430/lnk_msp430f67451a.cmd new file mode 100644 index 00000000..a23a113a --- /dev/null +++ b/msp430/lnk_msp430f67451a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67451a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67451A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x1BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67451a.cmd + diff --git a/msp430/lnk_msp430f6745a.cmd b/msp430/lnk_msp430f6745a.cmd new file mode 100644 index 00000000..141e6334 --- /dev/null +++ b/msp430/lnk_msp430f6745a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6745a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6745A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x1BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6745a.cmd + diff --git a/msp430/lnk_msp430f6746.cmd b/msp430/lnk_msp430f6746.cmd new file mode 100644 index 00000000..10cddc5e --- /dev/null +++ b/msp430/lnk_msp430f6746.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6746.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6746 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x3BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6746.cmd + diff --git a/msp430/lnk_msp430f67461.cmd b/msp430/lnk_msp430f67461.cmd new file mode 100644 index 00000000..6845b98f --- /dev/null +++ b/msp430/lnk_msp430f67461.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67461.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67461 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x3BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67461.cmd + diff --git a/msp430/lnk_msp430f67461a.cmd b/msp430/lnk_msp430f67461a.cmd new file mode 100644 index 00000000..bd615192 --- /dev/null +++ b/msp430/lnk_msp430f67461a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67461a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67461A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x3BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67461a.cmd + diff --git a/msp430/lnk_msp430f6746a.cmd b/msp430/lnk_msp430f6746a.cmd new file mode 100644 index 00000000..b452271c --- /dev/null +++ b/msp430/lnk_msp430f6746a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6746a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6746A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x3BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6746a.cmd + diff --git a/msp430/lnk_msp430f6747.cmd b/msp430/lnk_msp430f6747.cmd new file mode 100644 index 00000000..a3cd01e1 --- /dev/null +++ b/msp430/lnk_msp430f6747.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6747.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6747 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x3BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6747.cmd + diff --git a/msp430/lnk_msp430f67471.cmd b/msp430/lnk_msp430f67471.cmd new file mode 100644 index 00000000..819acaf7 --- /dev/null +++ b/msp430/lnk_msp430f67471.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67471.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67471 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x3BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67471.cmd + diff --git a/msp430/lnk_msp430f67471a.cmd b/msp430/lnk_msp430f67471a.cmd new file mode 100644 index 00000000..2a76024d --- /dev/null +++ b/msp430/lnk_msp430f67471a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67471a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67471A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x3BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67471a.cmd + diff --git a/msp430/lnk_msp430f6747a.cmd b/msp430/lnk_msp430f6747a.cmd new file mode 100644 index 00000000..6c258f11 --- /dev/null +++ b/msp430/lnk_msp430f6747a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6747a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6747A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x3BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6747a.cmd + diff --git a/msp430/lnk_msp430f6748.cmd b/msp430/lnk_msp430f6748.cmd new file mode 100644 index 00000000..ddec0c71 --- /dev/null +++ b/msp430/lnk_msp430f6748.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6748.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6748 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x7BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6748.cmd + diff --git a/msp430/lnk_msp430f67481.cmd b/msp430/lnk_msp430f67481.cmd new file mode 100644 index 00000000..bb01755f --- /dev/null +++ b/msp430/lnk_msp430f67481.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67481.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67481 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x7BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67481.cmd + diff --git a/msp430/lnk_msp430f67481a.cmd b/msp430/lnk_msp430f67481a.cmd new file mode 100644 index 00000000..3d848c90 --- /dev/null +++ b/msp430/lnk_msp430f67481a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67481a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67481A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x7BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67481a.cmd + diff --git a/msp430/lnk_msp430f6748a.cmd b/msp430/lnk_msp430f6748a.cmd new file mode 100644 index 00000000..b6a26777 --- /dev/null +++ b/msp430/lnk_msp430f6748a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6748a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6748A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x7BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6748a.cmd + diff --git a/msp430/lnk_msp430f6749.cmd b/msp430/lnk_msp430f6749.cmd new file mode 100644 index 00000000..95b979ea --- /dev/null +++ b/msp430/lnk_msp430f6749.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6749.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6749 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x7BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6749.cmd + diff --git a/msp430/lnk_msp430f67491.cmd b/msp430/lnk_msp430f67491.cmd new file mode 100644 index 00000000..5e600dfb --- /dev/null +++ b/msp430/lnk_msp430f67491.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67491.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67491 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x7BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67491.cmd + diff --git a/msp430/lnk_msp430f67491a.cmd b/msp430/lnk_msp430f67491a.cmd new file mode 100644 index 00000000..115044f7 --- /dev/null +++ b/msp430/lnk_msp430f67491a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67491a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67491A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x7BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67491a.cmd + diff --git a/msp430/lnk_msp430f6749a.cmd b/msp430/lnk_msp430f6749a.cmd new file mode 100644 index 00000000..35f1a221 --- /dev/null +++ b/msp430/lnk_msp430f6749a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6749a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6749A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x7BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6749a.cmd + diff --git a/msp430/lnk_msp430f67621.cmd b/msp430/lnk_msp430f67621.cmd new file mode 100644 index 00000000..9e7f1a0d --- /dev/null +++ b/msp430/lnk_msp430f67621.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67621.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67621 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x1000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBF80 + FLASH2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67621.cmd + diff --git a/msp430/lnk_msp430f67621a.cmd b/msp430/lnk_msp430f67621a.cmd new file mode 100644 index 00000000..8fe8593b --- /dev/null +++ b/msp430/lnk_msp430f67621a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67621a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67621A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x1000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBF80 + FLASH2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67621a.cmd + diff --git a/msp430/lnk_msp430f67641.cmd b/msp430/lnk_msp430f67641.cmd new file mode 100644 index 00000000..fb58c4d6 --- /dev/null +++ b/msp430/lnk_msp430f67641.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67641.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67641 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBF80 + FLASH2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67641.cmd + diff --git a/msp430/lnk_msp430f67641a.cmd b/msp430/lnk_msp430f67641a.cmd new file mode 100644 index 00000000..543ea225 --- /dev/null +++ b/msp430/lnk_msp430f67641a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67641a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67641A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x2000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBF80 + FLASH2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + RTC : { * ( .int40 ) } > INT40 type = VECT_INIT + LCD_C : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER3_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER3_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER2_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + TIMER2_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67641a.cmd + diff --git a/msp430/lnk_msp430f6765.cmd b/msp430/lnk_msp430f6765.cmd new file mode 100644 index 00000000..29e0094c --- /dev/null +++ b/msp430/lnk_msp430f6765.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6765.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6765 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x1BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6765.cmd + diff --git a/msp430/lnk_msp430f67651.cmd b/msp430/lnk_msp430f67651.cmd new file mode 100644 index 00000000..91afd72d --- /dev/null +++ b/msp430/lnk_msp430f67651.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67651.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67651 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x1BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67651.cmd + diff --git a/msp430/lnk_msp430f67651a.cmd b/msp430/lnk_msp430f67651a.cmd new file mode 100644 index 00000000..d8c3e938 --- /dev/null +++ b/msp430/lnk_msp430f67651a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67651a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67651A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x1BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67651a.cmd + diff --git a/msp430/lnk_msp430f6765a.cmd b/msp430/lnk_msp430f6765a.cmd new file mode 100644 index 00000000..46d4bb7e --- /dev/null +++ b/msp430/lnk_msp430f6765a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6765a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6765A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x1BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6765a.cmd + diff --git a/msp430/lnk_msp430f6766.cmd b/msp430/lnk_msp430f6766.cmd new file mode 100644 index 00000000..548a19a3 --- /dev/null +++ b/msp430/lnk_msp430f6766.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6766.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6766 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x3BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6766.cmd + diff --git a/msp430/lnk_msp430f67661.cmd b/msp430/lnk_msp430f67661.cmd new file mode 100644 index 00000000..e67e8637 --- /dev/null +++ b/msp430/lnk_msp430f67661.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67661.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67661 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x3BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67661.cmd + diff --git a/msp430/lnk_msp430f67661a.cmd b/msp430/lnk_msp430f67661a.cmd new file mode 100644 index 00000000..cbbd8406 --- /dev/null +++ b/msp430/lnk_msp430f67661a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67661a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67661A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x3BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67661a.cmd + diff --git a/msp430/lnk_msp430f6766a.cmd b/msp430/lnk_msp430f6766a.cmd new file mode 100644 index 00000000..38e486ed --- /dev/null +++ b/msp430/lnk_msp430f6766a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6766a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6766A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x3BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6766a.cmd + diff --git a/msp430/lnk_msp430f6767.cmd b/msp430/lnk_msp430f6767.cmd new file mode 100644 index 00000000..76bf16af --- /dev/null +++ b/msp430/lnk_msp430f6767.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6767.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6767 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x3BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6767.cmd + diff --git a/msp430/lnk_msp430f67671.cmd b/msp430/lnk_msp430f67671.cmd new file mode 100644 index 00000000..5713c00e --- /dev/null +++ b/msp430/lnk_msp430f67671.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67671.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67671 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x3BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67671.cmd + diff --git a/msp430/lnk_msp430f67671a.cmd b/msp430/lnk_msp430f67671a.cmd new file mode 100644 index 00000000..5d1ef9fa --- /dev/null +++ b/msp430/lnk_msp430f67671a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67671a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67671A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x3BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67671a.cmd + diff --git a/msp430/lnk_msp430f6767a.cmd b/msp430/lnk_msp430f6767a.cmd new file mode 100644 index 00000000..6c9775a4 --- /dev/null +++ b/msp430/lnk_msp430f6767a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6767a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6767A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x3BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6767a.cmd + diff --git a/msp430/lnk_msp430f6768.cmd b/msp430/lnk_msp430f6768.cmd new file mode 100644 index 00000000..8fd539cd --- /dev/null +++ b/msp430/lnk_msp430f6768.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6768.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6768 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x7BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6768.cmd + diff --git a/msp430/lnk_msp430f67681.cmd b/msp430/lnk_msp430f67681.cmd new file mode 100644 index 00000000..80bafb9e --- /dev/null +++ b/msp430/lnk_msp430f67681.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67681.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67681 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x7BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67681.cmd + diff --git a/msp430/lnk_msp430f67681a.cmd b/msp430/lnk_msp430f67681a.cmd new file mode 100644 index 00000000..b3916603 --- /dev/null +++ b/msp430/lnk_msp430f67681a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67681a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67681A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x7BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67681a.cmd + diff --git a/msp430/lnk_msp430f6768a.cmd b/msp430/lnk_msp430f6768a.cmd new file mode 100644 index 00000000..fa37a540 --- /dev/null +++ b/msp430/lnk_msp430f6768a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6768a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6768A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x7BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6768a.cmd + diff --git a/msp430/lnk_msp430f6769.cmd b/msp430/lnk_msp430f6769.cmd new file mode 100644 index 00000000..32b44fd6 --- /dev/null +++ b/msp430/lnk_msp430f6769.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6769.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6769 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x7BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6769.cmd + diff --git a/msp430/lnk_msp430f67691.cmd b/msp430/lnk_msp430f67691.cmd new file mode 100644 index 00000000..7564c6f1 --- /dev/null +++ b/msp430/lnk_msp430f67691.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67691.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67691 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x7BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67691.cmd + diff --git a/msp430/lnk_msp430f67691a.cmd b/msp430/lnk_msp430f67691a.cmd new file mode 100644 index 00000000..b4ce23e1 --- /dev/null +++ b/msp430/lnk_msp430f67691a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67691a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67691A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x7BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67691a.cmd + diff --git a/msp430/lnk_msp430f6769a.cmd b/msp430/lnk_msp430f6769a.cmd new file mode 100644 index 00000000..f92659d9 --- /dev/null +++ b/msp430/lnk_msp430f6769a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6769a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6769A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x7BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6769a.cmd + diff --git a/msp430/lnk_msp430f6775.cmd b/msp430/lnk_msp430f6775.cmd new file mode 100644 index 00000000..2863e49e --- /dev/null +++ b/msp430/lnk_msp430f6775.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6775.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6775 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x1BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6775.cmd + diff --git a/msp430/lnk_msp430f67751.cmd b/msp430/lnk_msp430f67751.cmd new file mode 100644 index 00000000..0c8da2f3 --- /dev/null +++ b/msp430/lnk_msp430f67751.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67751.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67751 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x1BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67751.cmd + diff --git a/msp430/lnk_msp430f67751a.cmd b/msp430/lnk_msp430f67751a.cmd new file mode 100644 index 00000000..0e612ada --- /dev/null +++ b/msp430/lnk_msp430f67751a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67751a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67751A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x1BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67751a.cmd + diff --git a/msp430/lnk_msp430f6775a.cmd b/msp430/lnk_msp430f6775a.cmd new file mode 100644 index 00000000..476407cf --- /dev/null +++ b/msp430/lnk_msp430f6775a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6775a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6775A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x1BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6775a.cmd + diff --git a/msp430/lnk_msp430f6776.cmd b/msp430/lnk_msp430f6776.cmd new file mode 100644 index 00000000..c33b39ee --- /dev/null +++ b/msp430/lnk_msp430f6776.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6776.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6776 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x3BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6776.cmd + diff --git a/msp430/lnk_msp430f67761.cmd b/msp430/lnk_msp430f67761.cmd new file mode 100644 index 00000000..5fce139c --- /dev/null +++ b/msp430/lnk_msp430f67761.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67761.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67761 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x3BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67761.cmd + diff --git a/msp430/lnk_msp430f67761a.cmd b/msp430/lnk_msp430f67761a.cmd new file mode 100644 index 00000000..0c676b97 --- /dev/null +++ b/msp430/lnk_msp430f67761a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67761a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67761A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x3BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67761a.cmd + diff --git a/msp430/lnk_msp430f6776a.cmd b/msp430/lnk_msp430f6776a.cmd new file mode 100644 index 00000000..2c4c000c --- /dev/null +++ b/msp430/lnk_msp430f6776a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6776a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6776A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x3BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6776a.cmd + diff --git a/msp430/lnk_msp430f6777.cmd b/msp430/lnk_msp430f6777.cmd new file mode 100644 index 00000000..89a3fdae --- /dev/null +++ b/msp430/lnk_msp430f6777.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6777.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6777 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x3BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6777.cmd + diff --git a/msp430/lnk_msp430f67771.cmd b/msp430/lnk_msp430f67771.cmd new file mode 100644 index 00000000..3439e7e9 --- /dev/null +++ b/msp430/lnk_msp430f67771.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67771.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67771 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x3BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67771.cmd + diff --git a/msp430/lnk_msp430f67771a.cmd b/msp430/lnk_msp430f67771a.cmd new file mode 100644 index 00000000..ffcf6083 --- /dev/null +++ b/msp430/lnk_msp430f67771a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67771a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67771A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x3BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67771a.cmd + diff --git a/msp430/lnk_msp430f6777a.cmd b/msp430/lnk_msp430f6777a.cmd new file mode 100644 index 00000000..b5c16728 --- /dev/null +++ b/msp430/lnk_msp430f6777a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6777a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6777A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x3BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6777a.cmd + diff --git a/msp430/lnk_msp430f6778.cmd b/msp430/lnk_msp430f6778.cmd new file mode 100644 index 00000000..a2fdce9c --- /dev/null +++ b/msp430/lnk_msp430f6778.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6778.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6778 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x7BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6778.cmd + diff --git a/msp430/lnk_msp430f67781.cmd b/msp430/lnk_msp430f67781.cmd new file mode 100644 index 00000000..0d2a4c0c --- /dev/null +++ b/msp430/lnk_msp430f67781.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67781.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67781 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x7BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67781.cmd + diff --git a/msp430/lnk_msp430f67781a.cmd b/msp430/lnk_msp430f67781a.cmd new file mode 100644 index 00000000..dc0db809 --- /dev/null +++ b/msp430/lnk_msp430f67781a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67781a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67781A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x7BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67781a.cmd + diff --git a/msp430/lnk_msp430f6778a.cmd b/msp430/lnk_msp430f6778a.cmd new file mode 100644 index 00000000..8ed79162 --- /dev/null +++ b/msp430/lnk_msp430f6778a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6778a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6778A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x7BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6778a.cmd + diff --git a/msp430/lnk_msp430f6779.cmd b/msp430/lnk_msp430f6779.cmd new file mode 100644 index 00000000..cb4382aa --- /dev/null +++ b/msp430/lnk_msp430f6779.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6779.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6779 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x7BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6779.cmd + diff --git a/msp430/lnk_msp430f67791.cmd b/msp430/lnk_msp430f67791.cmd new file mode 100644 index 00000000..97707f40 --- /dev/null +++ b/msp430/lnk_msp430f67791.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67791.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67791 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x7BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67791.cmd + diff --git a/msp430/lnk_msp430f67791a.cmd b/msp430/lnk_msp430f67791a.cmd new file mode 100644 index 00000000..ac57e72f --- /dev/null +++ b/msp430/lnk_msp430f67791a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f67791a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F67791A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x7BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f67791a.cmd + diff --git a/msp430/lnk_msp430f6779a.cmd b/msp430/lnk_msp430f6779a.cmd new file mode 100644 index 00000000..61391766 --- /dev/null +++ b/msp430/lnk_msp430f6779a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430f6779a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F6779A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x8000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + FLASH2 : origin = 0x10000,length = 0x7BFF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + AES : { * ( .int36 ) } > INT36 type = VECT_INIT + COMP_B : { * ( .int37 ) } > INT37 type = VECT_INIT + RTC : { * ( .int38 ) } > INT38 type = VECT_INIT + LCD_C : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER3_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER3_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + PORT1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B1 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A3 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + AUX : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + USCI_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A1 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + SD24B : { * ( .int56 ) } > INT56 type = VECT_INIT + ADC10 : { * ( .int57 ) } > INT57 type = VECT_INIT + USCI_B0 : { * ( .int58 ) } > INT58 type = VECT_INIT + USCI_A0 : { * ( .int59 ) } > INT59 type = VECT_INIT + WDT : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430f6779a.cmd + diff --git a/msp430/lnk_msp430fe423.cmd b/msp430/lnk_msp430fe423.cmd new file mode 100644 index 00000000..1452c42b --- /dev/null +++ b/msp430/lnk_msp430fe423.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fe423.cmd - LINKER COMMAND FILE FOR LINKING MSP430FE423 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xE000, length = 0x1FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD16 : { * ( .int12 ) } > INT12 type = VECT_INIT + ESP430 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fe423.cmd + diff --git a/msp430/lnk_msp430fe4232.cmd b/msp430/lnk_msp430fe4232.cmd new file mode 100644 index 00000000..f70cfa8b --- /dev/null +++ b/msp430/lnk_msp430fe4232.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fe4232.cmd - LINKER COMMAND FILE FOR LINKING MSP430FE4232 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xE000, length = 0x1FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD16 : { * ( .int12 ) } > INT12 type = VECT_INIT + ESP430 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fe4232.cmd + diff --git a/msp430/lnk_msp430fe423a.cmd b/msp430/lnk_msp430fe423a.cmd new file mode 100644 index 00000000..14dfd9d7 --- /dev/null +++ b/msp430/lnk_msp430fe423a.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fe423a.cmd - LINKER COMMAND FILE FOR LINKING MSP430FE423A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xE000, length = 0x1FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD16 : { * ( .int12 ) } > INT12 type = VECT_INIT + ESP430 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fe423a.cmd + diff --git a/msp430/lnk_msp430fe4242.cmd b/msp430/lnk_msp430fe4242.cmd new file mode 100644 index 00000000..d0124661 --- /dev/null +++ b/msp430/lnk_msp430fe4242.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fe4242.cmd - LINKER COMMAND FILE FOR LINKING MSP430FE4242 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xD000, length = 0x2FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD16 : { * ( .int12 ) } > INT12 type = VECT_INIT + ESP430 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fe4242.cmd + diff --git a/msp430/lnk_msp430fe425.cmd b/msp430/lnk_msp430fe425.cmd new file mode 100644 index 00000000..f4a5ff85 --- /dev/null +++ b/msp430/lnk_msp430fe425.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fe425.cmd - LINKER COMMAND FILE FOR LINKING MSP430FE425 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD16 : { * ( .int12 ) } > INT12 type = VECT_INIT + ESP430 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fe425.cmd + diff --git a/msp430/lnk_msp430fe4252.cmd b/msp430/lnk_msp430fe4252.cmd new file mode 100644 index 00000000..b39cb43e --- /dev/null +++ b/msp430/lnk_msp430fe4252.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fe4252.cmd - LINKER COMMAND FILE FOR LINKING MSP430FE4252 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD16 : { * ( .int12 ) } > INT12 type = VECT_INIT + ESP430 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fe4252.cmd + diff --git a/msp430/lnk_msp430fe425a.cmd b/msp430/lnk_msp430fe425a.cmd new file mode 100644 index 00000000..22b34c3b --- /dev/null +++ b/msp430/lnk_msp430fe425a.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fe425a.cmd - LINKER COMMAND FILE FOR LINKING MSP430FE425A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD16 : { * ( .int12 ) } > INT12 type = VECT_INIT + ESP430 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fe425a.cmd + diff --git a/msp430/lnk_msp430fe427.cmd b/msp430/lnk_msp430fe427.cmd new file mode 100644 index 00000000..7feaa6c2 --- /dev/null +++ b/msp430/lnk_msp430fe427.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fe427.cmd - LINKER COMMAND FILE FOR LINKING MSP430FE427 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD16 : { * ( .int12 ) } > INT12 type = VECT_INIT + ESP430 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fe427.cmd + diff --git a/msp430/lnk_msp430fe4272.cmd b/msp430/lnk_msp430fe4272.cmd new file mode 100644 index 00000000..e415e541 --- /dev/null +++ b/msp430/lnk_msp430fe4272.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fe4272.cmd - LINKER COMMAND FILE FOR LINKING MSP430FE4272 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD16 : { * ( .int12 ) } > INT12 type = VECT_INIT + ESP430 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fe4272.cmd + diff --git a/msp430/lnk_msp430fe427a.cmd b/msp430/lnk_msp430fe427a.cmd new file mode 100644 index 00000000..30568207 --- /dev/null +++ b/msp430/lnk_msp430fe427a.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fe427a.cmd - LINKER COMMAND FILE FOR LINKING MSP430FE427A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD16 : { * ( .int12 ) } > INT12 type = VECT_INIT + ESP430 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fe427a.cmd + diff --git a/msp430/lnk_msp430fg4250.cmd b/msp430/lnk_msp430fg4250.cmd new file mode 100644 index 00000000..91938268 --- /dev/null +++ b/msp430/lnk_msp430fg4250.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fg4250.cmd - LINKER COMMAND FILE FOR LINKING MSP430FG4250 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + DAC12 : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD16 : { * ( .int12 ) } > INT12 type = VECT_INIT + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fg4250.cmd + diff --git a/msp430/lnk_msp430fg4260.cmd b/msp430/lnk_msp430fg4260.cmd new file mode 100644 index 00000000..72949489 --- /dev/null +++ b/msp430/lnk_msp430fg4260.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fg4260.cmd - LINKER COMMAND FILE FOR LINKING MSP430FG4260 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xA000, length = 0x5FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + DAC12 : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD16 : { * ( .int12 ) } > INT12 type = VECT_INIT + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fg4260.cmd + diff --git a/msp430/lnk_msp430fg4270.cmd b/msp430/lnk_msp430fg4270.cmd new file mode 100644 index 00000000..9046b929 --- /dev/null +++ b/msp430/lnk_msp430fg4270.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fg4270.cmd - LINKER COMMAND FILE FOR LINKING MSP430FG4270 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + DAC12 : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + SD16 : { * ( .int12 ) } > INT12 type = VECT_INIT + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fg4270.cmd + diff --git a/msp430/lnk_msp430fg437.cmd b/msp430/lnk_msp430fg437.cmd new file mode 100644 index 00000000..cbfe056c --- /dev/null +++ b/msp430/lnk_msp430fg437.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fg437.cmd - LINKER COMMAND FILE FOR LINKING MSP430FG437 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + DAC12_DMA : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC12 : { * ( .int07 ) } > INT07 type = VECT_INIT + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fg437.cmd + diff --git a/msp430/lnk_msp430fg438.cmd b/msp430/lnk_msp430fg438.cmd new file mode 100644 index 00000000..9e3f9ad2 --- /dev/null +++ b/msp430/lnk_msp430fg438.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fg438.cmd - LINKER COMMAND FILE FOR LINKING MSP430FG438 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBFE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + DAC12_DMA : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC12 : { * ( .int07 ) } > INT07 type = VECT_INIT + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fg438.cmd + diff --git a/msp430/lnk_msp430fg439.cmd b/msp430/lnk_msp430fg439.cmd new file mode 100644 index 00000000..9907ce7d --- /dev/null +++ b/msp430/lnk_msp430fg439.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fg439.cmd - LINKER COMMAND FILE FOR LINKING MSP430FG439 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x1100, length = 0xEEE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + DAC12_DMA : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + ADC12 : { * ( .int07 ) } > INT07 type = VECT_INIT + USART0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USART0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fg439.cmd + diff --git a/msp430/lnk_msp430fg4616.cmd b/msp430/lnk_msp430fg4616.cmd new file mode 100644 index 00000000..802b0d1f --- /dev/null +++ b/msp430/lnk_msp430fg4616.cmd @@ -0,0 +1,184 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fg4616.cmd - LINKER COMMAND FILE FOR LINKING MSP430FG4616 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x2100, length = 0xDEBE + FLASH2 : origin = 0x10000,length = 0x9000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + DAC12 : { * ( .int14 ) } > INT14 type = VECT_INIT + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USART1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USART1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + ADC12 : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fg4616.cmd + diff --git a/msp430/lnk_msp430fg4617.cmd b/msp430/lnk_msp430fg4617.cmd new file mode 100644 index 00000000..7f1dc2c0 --- /dev/null +++ b/msp430/lnk_msp430fg4617.cmd @@ -0,0 +1,184 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fg4617.cmd - LINKER COMMAND FILE FOR LINKING MSP430FG4617 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x2000 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x3100, length = 0xCEBE + FLASH2 : origin = 0x10000,length = 0xA000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + DAC12 : { * ( .int14 ) } > INT14 type = VECT_INIT + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USART1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USART1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + ADC12 : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fg4617.cmd + diff --git a/msp430/lnk_msp430fg4618.cmd b/msp430/lnk_msp430fg4618.cmd new file mode 100644 index 00000000..4bd4c374 --- /dev/null +++ b/msp430/lnk_msp430fg4618.cmd @@ -0,0 +1,184 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fg4618.cmd - LINKER COMMAND FILE FOR LINKING MSP430FG4618 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x2000 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x3100, length = 0xCEBE + FLASH2 : origin = 0x10000,length = 0x10000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + DAC12 : { * ( .int14 ) } > INT14 type = VECT_INIT + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USART1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USART1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + ADC12 : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fg4618.cmd + diff --git a/msp430/lnk_msp430fg4619.cmd b/msp430/lnk_msp430fg4619.cmd new file mode 100644 index 00000000..5c3ce954 --- /dev/null +++ b/msp430/lnk_msp430fg4619.cmd @@ -0,0 +1,184 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fg4619.cmd - LINKER COMMAND FILE FOR LINKING MSP430FG4619 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x2100, length = 0xDEBE + FLASH2 : origin = 0x10000,length = 0x10000 + BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFC0, length = 0x0002 + INT01 : origin = 0xFFC2, length = 0x0002 + INT02 : origin = 0xFFC4, length = 0x0002 + INT03 : origin = 0xFFC6, length = 0x0002 + INT04 : origin = 0xFFC8, length = 0x0002 + INT05 : origin = 0xFFCA, length = 0x0002 + INT06 : origin = 0xFFCC, length = 0x0002 + INT07 : origin = 0xFFCE, length = 0x0002 + INT08 : origin = 0xFFD0, length = 0x0002 + INT09 : origin = 0xFFD2, length = 0x0002 + INT10 : origin = 0xFFD4, length = 0x0002 + INT11 : origin = 0xFFD6, length = 0x0002 + INT12 : origin = 0xFFD8, length = 0x0002 + INT13 : origin = 0xFFDA, length = 0x0002 + INT14 : origin = 0xFFDC, length = 0x0002 + INT15 : origin = 0xFFDE, length = 0x0002 + INT16 : origin = 0xFFE0, length = 0x0002 + INT17 : origin = 0xFFE2, length = 0x0002 + INT18 : origin = 0xFFE4, length = 0x0002 + INT19 : origin = 0xFFE6, length = 0x0002 + INT20 : origin = 0xFFE8, length = 0x0002 + INT21 : origin = 0xFFEA, length = 0x0002 + INT22 : origin = 0xFFEC, length = 0x0002 + INT23 : origin = 0xFFEE, length = 0x0002 + INT24 : origin = 0xFFF0, length = 0x0002 + INT25 : origin = 0xFFF2, length = 0x0002 + INT26 : origin = 0xFFF4, length = 0x0002 + INT27 : origin = 0xFFF6, length = 0x0002 + INT28 : origin = 0xFFF8, length = 0x0002 + INT29 : origin = 0xFFFA, length = 0x0002 + INT30 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + DAC12 : { * ( .int14 ) } > INT14 type = VECT_INIT + DMA : { * ( .int15 ) } > INT15 type = VECT_INIT + BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT + PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT + USART1TX : { * ( .int18 ) } > INT18 type = VECT_INIT + USART1RX : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT + TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT + TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT + ADC12 : { * ( .int23 ) } > INT23 type = VECT_INIT + USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT + USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT + WDT : { * ( .int26 ) } > INT26 type = VECT_INIT + COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT + NMI : { * ( .int30 ) } > INT30 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fg4619.cmd + diff --git a/msp430/lnk_msp430fg477.cmd b/msp430/lnk_msp430fg477.cmd new file mode 100644 index 00000000..8fcf932d --- /dev/null +++ b/msp430/lnk_msp430fg477.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fg477.cmd - LINKER COMMAND FILE FOR LINKING MSP430FG477 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x8000, length = 0x7FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + DAC12_DMA : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + SD16A : { * ( .int07 ) } > INT07 type = VECT_INIT + USCIAB0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USCIAB0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fg477.cmd + diff --git a/msp430/lnk_msp430fg478.cmd b/msp430/lnk_msp430fg478.cmd new file mode 100644 index 00000000..3ca03276 --- /dev/null +++ b/msp430/lnk_msp430fg478.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fg478.cmd - LINKER COMMAND FILE FOR LINKING MSP430FG478 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x4000, length = 0xBFE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + DAC12_DMA : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + SD16A : { * ( .int07 ) } > INT07 type = VECT_INIT + USCIAB0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USCIAB0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fg478.cmd + diff --git a/msp430/lnk_msp430fg479.cmd b/msp430/lnk_msp430fg479.cmd new file mode 100644 index 00000000..10afee3f --- /dev/null +++ b/msp430/lnk_msp430fg479.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fg479.cmd - LINKER COMMAND FILE FOR LINKING MSP430FG479 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x1100, length = 0xEEE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + DAC12_DMA : { * ( .int03 ) } > INT03 type = VECT_INIT + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMERA1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMERA0 : { * ( .int06 ) } > INT06 type = VECT_INIT + SD16A : { * ( .int07 ) } > INT07 type = VECT_INIT + USCIAB0TX : { * ( .int08 ) } > INT08 type = VECT_INIT + USCIAB0RX : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fg479.cmd + diff --git a/msp430/lnk_msp430fg6425.cmd b/msp430/lnk_msp430fg6425.cmd new file mode 100644 index 00000000..6a303a94 --- /dev/null +++ b/msp430/lnk_msp430fg6425.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fg6425.cmd - LINKER COMMAND FILE FOR LINKING MSP430FG6425 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x2800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x43F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + DAC12 : { * ( .int41 ) } > INT41 type = VECT_INIT + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + LCD_B : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + CTSD16 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fg6425.cmd + diff --git a/msp430/lnk_msp430fg6426.cmd b/msp430/lnk_msp430fg6426.cmd new file mode 100644 index 00000000..226f1b43 --- /dev/null +++ b/msp430/lnk_msp430fg6426.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fg6426.cmd - LINKER COMMAND FILE FOR LINKING MSP430FG6426 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x2800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x143F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + DAC12 : { * ( .int41 ) } > INT41 type = VECT_INIT + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + LCD_B : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + CTSD16 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fg6426.cmd + diff --git a/msp430/lnk_msp430fg6625.cmd b/msp430/lnk_msp430fg6625.cmd new file mode 100644 index 00000000..485c91c3 --- /dev/null +++ b/msp430/lnk_msp430fg6625.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fg6625.cmd - LINKER COMMAND FILE FOR LINKING MSP430FG6625 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x43F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + DAC12 : { * ( .int41 ) } > INT41 type = VECT_INIT + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + LCD_B : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + CTSD16 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fg6625.cmd + diff --git a/msp430/lnk_msp430fg6626.cmd b/msp430/lnk_msp430fg6626.cmd new file mode 100644 index 00000000..275404b2 --- /dev/null +++ b/msp430/lnk_msp430fg6626.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fg6626.cmd - LINKER COMMAND FILE FOR LINKING MSP430FG6626 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2400, length = 0x2000 + USBRAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x4400, length = 0xBB80 + FLASH2 : origin = 0x10000,length = 0x143F8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + PORT4 : { * ( .int37 ) } > INT37 type = VECT_INIT + PORT3 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER2_A0 : { * ( .int40 ) } > INT40 type = VECT_INIT + DAC12 : { * ( .int41 ) } > INT41 type = VECT_INIT + RTC : { * ( .int42 ) } > INT42 type = VECT_INIT + LCD_B : { * ( .int43 ) } > INT43 type = VECT_INIT + PORT2 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT + CTSD16 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + WDT : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fg6626.cmd + diff --git a/msp430/lnk_msp430fr2000.cmd b/msp430/lnk_msp430fr2000.cmd new file mode 100644 index 00000000..2b4cf2d6 --- /dev/null +++ b/msp430/lnk_msp430fr2000.cmd @@ -0,0 +1,244 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR2000 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + BSL0 : origin = 0x1000, length = 0x400 + RAM : origin = 0x2000, length = 0x200 + FRAM : origin = 0xFE00, length = 0x180 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFF88, length = 0x0002 + INT01 : origin = 0xFF8A, length = 0x0002 + INT02 : origin = 0xFF8C, length = 0x0002 + INT03 : origin = 0xFF8E, length = 0x0002 + INT04 : origin = 0xFF90, length = 0x0002 + INT05 : origin = 0xFF92, length = 0x0002 + INT06 : origin = 0xFF94, length = 0x0002 + INT07 : origin = 0xFF96, length = 0x0002 + INT08 : origin = 0xFF98, length = 0x0002 + INT09 : origin = 0xFF9A, length = 0x0002 + INT10 : origin = 0xFF9C, length = 0x0002 + INT11 : origin = 0xFF9E, length = 0x0002 + INT12 : origin = 0xFFA0, length = 0x0002 + INT13 : origin = 0xFFA2, length = 0x0002 + INT14 : origin = 0xFFA4, length = 0x0002 + INT15 : origin = 0xFFA6, length = 0x0002 + INT16 : origin = 0xFFA8, length = 0x0002 + INT17 : origin = 0xFFAA, length = 0x0002 + INT18 : origin = 0xFFAC, length = 0x0002 + INT19 : origin = 0xFFAE, length = 0x0002 + INT20 : origin = 0xFFB0, length = 0x0002 + INT21 : origin = 0xFFB2, length = 0x0002 + INT22 : origin = 0xFFB4, length = 0x0002 + INT23 : origin = 0xFFB6, length = 0x0002 + INT24 : origin = 0xFFB8, length = 0x0002 + INT25 : origin = 0xFFBA, length = 0x0002 + INT26 : origin = 0xFFBC, length = 0x0002 + INT27 : origin = 0xFFBE, length = 0x0002 + INT28 : origin = 0xFFC0, length = 0x0002 + INT29 : origin = 0xFFC2, length = 0x0002 + INT30 : origin = 0xFFC4, length = 0x0002 + INT31 : origin = 0xFFC6, length = 0x0002 + INT32 : origin = 0xFFC8, length = 0x0002 + INT33 : origin = 0xFFCA, length = 0x0002 + INT34 : origin = 0xFFCC, length = 0x0002 + INT35 : origin = 0xFFCE, length = 0x0002 + INT36 : origin = 0xFFD0, length = 0x0002 + INT37 : origin = 0xFFD2, length = 0x0002 + INT38 : origin = 0xFFD4, length = 0x0002 + INT39 : origin = 0xFFD6, length = 0x0002 + INT40 : origin = 0xFFD8, length = 0x0002 + INT41 : origin = 0xFFDA, length = 0x0002 + INT42 : origin = 0xFFDC, length = 0x0002 + INT43 : origin = 0xFFDE, length = 0x0002 + INT44 : origin = 0xFFE0, length = 0x0002 + INT45 : origin = 0xFFE2, length = 0x0002 + INT46 : origin = 0xFFE4, length = 0x0002 + INT47 : origin = 0xFFE6, length = 0x0002 + INT48 : origin = 0xFFE8, length = 0x0002 + INT49 : origin = 0xFFEA, length = 0x0002 + INT50 : origin = 0xFFEC, length = 0x0002 + INT51 : origin = 0xFFEE, length = 0x0002 + INT52 : origin = 0xFFF0, length = 0x0002 + INT53 : origin = 0xFFF2, length = 0x0002 + INT54 : origin = 0xFFF4, length = 0x0002 + INT55 : origin = 0xFFF6, length = 0x0002 + INT56 : origin = 0xFFF8, length = 0x0002 + INT57 : origin = 0xFFFA, length = 0x0002 + INT58 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + } + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + .text:_isr : {} /* Code ISRs */ + } + } > FRAM + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + .cio : {} > RAM /* C I/O buffer */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + .int45 : {} > INT45 + .int46 : {} > INT46 + .int47 : {} > INT47 + ECOMP0 : { * ( .int48 ) } > INT48 type = VECT_INIT + PORT2 : { * ( .int49 ) } > INT49 type = VECT_INIT + PORT1 : { * ( .int50 ) } > INT50 type = VECT_INIT + .int51 : {} > INT51 + EUSCI_A0 : { * ( .int52 ) } > INT52 type = VECT_INIT + WDT : { * ( .int53 ) } > INT53 type = VECT_INIT + RTC : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_B1 : { * ( .int55 ) } > INT55 type = VECT_INIT + TIMER0_B0 : { * ( .int56 ) } > INT56 type = VECT_INIT + UNMI : { * ( .int57 ) } > INT57 type = VECT_INIT + SYSNMI : { * ( .int58 ) } > INT58 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr2000.cmd + + diff --git a/msp430/lnk_msp430fr2032.cmd b/msp430/lnk_msp430fr2032.cmd new file mode 100644 index 00000000..904e1e45 --- /dev/null +++ b/msp430/lnk_msp430fr2032.cmd @@ -0,0 +1,246 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr2032.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR2032 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2000, length = 0x0400 + INFOA : origin = 0x1800, length = 0x0200 + FRAM : origin = 0xE000, length = 0x1F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFF88, length = 0x0002 + INT01 : origin = 0xFF8A, length = 0x0002 + INT02 : origin = 0xFF8C, length = 0x0002 + INT03 : origin = 0xFF8E, length = 0x0002 + INT04 : origin = 0xFF90, length = 0x0002 + INT05 : origin = 0xFF92, length = 0x0002 + INT06 : origin = 0xFF94, length = 0x0002 + INT07 : origin = 0xFF96, length = 0x0002 + INT08 : origin = 0xFF98, length = 0x0002 + INT09 : origin = 0xFF9A, length = 0x0002 + INT10 : origin = 0xFF9C, length = 0x0002 + INT11 : origin = 0xFF9E, length = 0x0002 + INT12 : origin = 0xFFA0, length = 0x0002 + INT13 : origin = 0xFFA2, length = 0x0002 + INT14 : origin = 0xFFA4, length = 0x0002 + INT15 : origin = 0xFFA6, length = 0x0002 + INT16 : origin = 0xFFA8, length = 0x0002 + INT17 : origin = 0xFFAA, length = 0x0002 + INT18 : origin = 0xFFAC, length = 0x0002 + INT19 : origin = 0xFFAE, length = 0x0002 + INT20 : origin = 0xFFB0, length = 0x0002 + INT21 : origin = 0xFFB2, length = 0x0002 + INT22 : origin = 0xFFB4, length = 0x0002 + INT23 : origin = 0xFFB6, length = 0x0002 + INT24 : origin = 0xFFB8, length = 0x0002 + INT25 : origin = 0xFFBA, length = 0x0002 + INT26 : origin = 0xFFBC, length = 0x0002 + INT27 : origin = 0xFFBE, length = 0x0002 + INT28 : origin = 0xFFC0, length = 0x0002 + INT29 : origin = 0xFFC2, length = 0x0002 + INT30 : origin = 0xFFC4, length = 0x0002 + INT31 : origin = 0xFFC6, length = 0x0002 + INT32 : origin = 0xFFC8, length = 0x0002 + INT33 : origin = 0xFFCA, length = 0x0002 + INT34 : origin = 0xFFCC, length = 0x0002 + INT35 : origin = 0xFFCE, length = 0x0002 + INT36 : origin = 0xFFD0, length = 0x0002 + INT37 : origin = 0xFFD2, length = 0x0002 + INT38 : origin = 0xFFD4, length = 0x0002 + INT39 : origin = 0xFFD6, length = 0x0002 + INT40 : origin = 0xFFD8, length = 0x0002 + INT41 : origin = 0xFFDA, length = 0x0002 + INT42 : origin = 0xFFDC, length = 0x0002 + INT43 : origin = 0xFFDE, length = 0x0002 + INT44 : origin = 0xFFE0, length = 0x0002 + INT45 : origin = 0xFFE2, length = 0x0002 + INT46 : origin = 0xFFE4, length = 0x0002 + INT47 : origin = 0xFFE6, length = 0x0002 + INT48 : origin = 0xFFE8, length = 0x0002 + INT49 : origin = 0xFFEA, length = 0x0002 + INT50 : origin = 0xFFEC, length = 0x0002 + INT51 : origin = 0xFFEE, length = 0x0002 + INT52 : origin = 0xFFF0, length = 0x0002 + INT53 : origin = 0xFFF2, length = 0x0002 + INT54 : origin = 0xFFF4, length = 0x0002 + INT55 : origin = 0xFFF6, length = 0x0002 + INT56 : origin = 0xFFF8, length = 0x0002 + INT57 : origin = 0xFFFA, length = 0x0002 + INT58 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + } + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .cio : {} > RAM /* C I/O buffer */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + .int45 : {} > INT45 + PORT2 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + ADC : { * ( .int48 ) } > INT48 type = VECT_INIT + USCI_B0 : { * ( .int49 ) } > INT49 type = VECT_INIT + USCI_A0 : { * ( .int50 ) } > INT50 type = VECT_INIT + WDT : { * ( .int51 ) } > INT51 type = VECT_INIT + RTC : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER1_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER1_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A1 : { * ( .int55 ) } > INT55 type = VECT_INIT + TIMER0_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + UNMI : { * ( .int57 ) } > INT57 type = VECT_INIT + SYSNMI : { * ( .int58 ) } > INT58 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr2032.cmd + diff --git a/msp430/lnk_msp430fr2033.cmd b/msp430/lnk_msp430fr2033.cmd new file mode 100644 index 00000000..0362da7f --- /dev/null +++ b/msp430/lnk_msp430fr2033.cmd @@ -0,0 +1,246 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr2033.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR2033 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2000, length = 0x0800 + INFOA : origin = 0x1800, length = 0x0200 + FRAM : origin = 0xC400, length = 0x3B80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFF88, length = 0x0002 + INT01 : origin = 0xFF8A, length = 0x0002 + INT02 : origin = 0xFF8C, length = 0x0002 + INT03 : origin = 0xFF8E, length = 0x0002 + INT04 : origin = 0xFF90, length = 0x0002 + INT05 : origin = 0xFF92, length = 0x0002 + INT06 : origin = 0xFF94, length = 0x0002 + INT07 : origin = 0xFF96, length = 0x0002 + INT08 : origin = 0xFF98, length = 0x0002 + INT09 : origin = 0xFF9A, length = 0x0002 + INT10 : origin = 0xFF9C, length = 0x0002 + INT11 : origin = 0xFF9E, length = 0x0002 + INT12 : origin = 0xFFA0, length = 0x0002 + INT13 : origin = 0xFFA2, length = 0x0002 + INT14 : origin = 0xFFA4, length = 0x0002 + INT15 : origin = 0xFFA6, length = 0x0002 + INT16 : origin = 0xFFA8, length = 0x0002 + INT17 : origin = 0xFFAA, length = 0x0002 + INT18 : origin = 0xFFAC, length = 0x0002 + INT19 : origin = 0xFFAE, length = 0x0002 + INT20 : origin = 0xFFB0, length = 0x0002 + INT21 : origin = 0xFFB2, length = 0x0002 + INT22 : origin = 0xFFB4, length = 0x0002 + INT23 : origin = 0xFFB6, length = 0x0002 + INT24 : origin = 0xFFB8, length = 0x0002 + INT25 : origin = 0xFFBA, length = 0x0002 + INT26 : origin = 0xFFBC, length = 0x0002 + INT27 : origin = 0xFFBE, length = 0x0002 + INT28 : origin = 0xFFC0, length = 0x0002 + INT29 : origin = 0xFFC2, length = 0x0002 + INT30 : origin = 0xFFC4, length = 0x0002 + INT31 : origin = 0xFFC6, length = 0x0002 + INT32 : origin = 0xFFC8, length = 0x0002 + INT33 : origin = 0xFFCA, length = 0x0002 + INT34 : origin = 0xFFCC, length = 0x0002 + INT35 : origin = 0xFFCE, length = 0x0002 + INT36 : origin = 0xFFD0, length = 0x0002 + INT37 : origin = 0xFFD2, length = 0x0002 + INT38 : origin = 0xFFD4, length = 0x0002 + INT39 : origin = 0xFFD6, length = 0x0002 + INT40 : origin = 0xFFD8, length = 0x0002 + INT41 : origin = 0xFFDA, length = 0x0002 + INT42 : origin = 0xFFDC, length = 0x0002 + INT43 : origin = 0xFFDE, length = 0x0002 + INT44 : origin = 0xFFE0, length = 0x0002 + INT45 : origin = 0xFFE2, length = 0x0002 + INT46 : origin = 0xFFE4, length = 0x0002 + INT47 : origin = 0xFFE6, length = 0x0002 + INT48 : origin = 0xFFE8, length = 0x0002 + INT49 : origin = 0xFFEA, length = 0x0002 + INT50 : origin = 0xFFEC, length = 0x0002 + INT51 : origin = 0xFFEE, length = 0x0002 + INT52 : origin = 0xFFF0, length = 0x0002 + INT53 : origin = 0xFFF2, length = 0x0002 + INT54 : origin = 0xFFF4, length = 0x0002 + INT55 : origin = 0xFFF6, length = 0x0002 + INT56 : origin = 0xFFF8, length = 0x0002 + INT57 : origin = 0xFFFA, length = 0x0002 + INT58 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + } + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .cio : {} > RAM /* C I/O buffer */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + .int45 : {} > INT45 + PORT2 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + ADC : { * ( .int48 ) } > INT48 type = VECT_INIT + USCI_B0 : { * ( .int49 ) } > INT49 type = VECT_INIT + USCI_A0 : { * ( .int50 ) } > INT50 type = VECT_INIT + WDT : { * ( .int51 ) } > INT51 type = VECT_INIT + RTC : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER1_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER1_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A1 : { * ( .int55 ) } > INT55 type = VECT_INIT + TIMER0_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + UNMI : { * ( .int57 ) } > INT57 type = VECT_INIT + SYSNMI : { * ( .int58 ) } > INT58 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr2033.cmd + diff --git a/msp430/lnk_msp430fr2100.cmd b/msp430/lnk_msp430fr2100.cmd new file mode 100644 index 00000000..3cf9203e --- /dev/null +++ b/msp430/lnk_msp430fr2100.cmd @@ -0,0 +1,244 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR2100 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + BSL0 : origin = 0x1000, length = 0x400 + RAM : origin = 0x2000, length = 0x200 + FRAM : origin = 0xFC00, length = 0x380 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFF88, length = 0x0002 + INT01 : origin = 0xFF8A, length = 0x0002 + INT02 : origin = 0xFF8C, length = 0x0002 + INT03 : origin = 0xFF8E, length = 0x0002 + INT04 : origin = 0xFF90, length = 0x0002 + INT05 : origin = 0xFF92, length = 0x0002 + INT06 : origin = 0xFF94, length = 0x0002 + INT07 : origin = 0xFF96, length = 0x0002 + INT08 : origin = 0xFF98, length = 0x0002 + INT09 : origin = 0xFF9A, length = 0x0002 + INT10 : origin = 0xFF9C, length = 0x0002 + INT11 : origin = 0xFF9E, length = 0x0002 + INT12 : origin = 0xFFA0, length = 0x0002 + INT13 : origin = 0xFFA2, length = 0x0002 + INT14 : origin = 0xFFA4, length = 0x0002 + INT15 : origin = 0xFFA6, length = 0x0002 + INT16 : origin = 0xFFA8, length = 0x0002 + INT17 : origin = 0xFFAA, length = 0x0002 + INT18 : origin = 0xFFAC, length = 0x0002 + INT19 : origin = 0xFFAE, length = 0x0002 + INT20 : origin = 0xFFB0, length = 0x0002 + INT21 : origin = 0xFFB2, length = 0x0002 + INT22 : origin = 0xFFB4, length = 0x0002 + INT23 : origin = 0xFFB6, length = 0x0002 + INT24 : origin = 0xFFB8, length = 0x0002 + INT25 : origin = 0xFFBA, length = 0x0002 + INT26 : origin = 0xFFBC, length = 0x0002 + INT27 : origin = 0xFFBE, length = 0x0002 + INT28 : origin = 0xFFC0, length = 0x0002 + INT29 : origin = 0xFFC2, length = 0x0002 + INT30 : origin = 0xFFC4, length = 0x0002 + INT31 : origin = 0xFFC6, length = 0x0002 + INT32 : origin = 0xFFC8, length = 0x0002 + INT33 : origin = 0xFFCA, length = 0x0002 + INT34 : origin = 0xFFCC, length = 0x0002 + INT35 : origin = 0xFFCE, length = 0x0002 + INT36 : origin = 0xFFD0, length = 0x0002 + INT37 : origin = 0xFFD2, length = 0x0002 + INT38 : origin = 0xFFD4, length = 0x0002 + INT39 : origin = 0xFFD6, length = 0x0002 + INT40 : origin = 0xFFD8, length = 0x0002 + INT41 : origin = 0xFFDA, length = 0x0002 + INT42 : origin = 0xFFDC, length = 0x0002 + INT43 : origin = 0xFFDE, length = 0x0002 + INT44 : origin = 0xFFE0, length = 0x0002 + INT45 : origin = 0xFFE2, length = 0x0002 + INT46 : origin = 0xFFE4, length = 0x0002 + INT47 : origin = 0xFFE6, length = 0x0002 + INT48 : origin = 0xFFE8, length = 0x0002 + INT49 : origin = 0xFFEA, length = 0x0002 + INT50 : origin = 0xFFEC, length = 0x0002 + INT51 : origin = 0xFFEE, length = 0x0002 + INT52 : origin = 0xFFF0, length = 0x0002 + INT53 : origin = 0xFFF2, length = 0x0002 + INT54 : origin = 0xFFF4, length = 0x0002 + INT55 : origin = 0xFFF6, length = 0x0002 + INT56 : origin = 0xFFF8, length = 0x0002 + INT57 : origin = 0xFFFA, length = 0x0002 + INT58 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + } + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + .text:_isr : {} /* Code ISRs */ + } + } > FRAM + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + .cio : {} > RAM /* C I/O buffer */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + .int45 : {} > INT45 + .int46 : {} > INT46 + .int47 : {} > INT47 + ECOMP0 : { * ( .int48 ) } > INT48 type = VECT_INIT + PORT2 : { * ( .int49 ) } > INT49 type = VECT_INIT + PORT1 : { * ( .int50 ) } > INT50 type = VECT_INIT + ADC : { * ( .int51 ) } > INT51 type = VECT_INIT + EUSCI_A0 : { * ( .int52 ) } > INT52 type = VECT_INIT + WDT : { * ( .int53 ) } > INT53 type = VECT_INIT + RTC : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_B1 : { * ( .int55 ) } > INT55 type = VECT_INIT + TIMER0_B0 : { * ( .int56 ) } > INT56 type = VECT_INIT + UNMI : { * ( .int57 ) } > INT57 type = VECT_INIT + SYSNMI : { * ( .int58 ) } > INT58 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr2100.cmd + + diff --git a/msp430/lnk_msp430fr2110.cmd b/msp430/lnk_msp430fr2110.cmd new file mode 100644 index 00000000..02261de6 --- /dev/null +++ b/msp430/lnk_msp430fr2110.cmd @@ -0,0 +1,244 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR2110 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + BSL0 : origin = 0x1000, length = 0x400 + RAM : origin = 0x2000, length = 0x400 + FRAM : origin = 0xF800, length = 0x780 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFF88, length = 0x0002 + INT01 : origin = 0xFF8A, length = 0x0002 + INT02 : origin = 0xFF8C, length = 0x0002 + INT03 : origin = 0xFF8E, length = 0x0002 + INT04 : origin = 0xFF90, length = 0x0002 + INT05 : origin = 0xFF92, length = 0x0002 + INT06 : origin = 0xFF94, length = 0x0002 + INT07 : origin = 0xFF96, length = 0x0002 + INT08 : origin = 0xFF98, length = 0x0002 + INT09 : origin = 0xFF9A, length = 0x0002 + INT10 : origin = 0xFF9C, length = 0x0002 + INT11 : origin = 0xFF9E, length = 0x0002 + INT12 : origin = 0xFFA0, length = 0x0002 + INT13 : origin = 0xFFA2, length = 0x0002 + INT14 : origin = 0xFFA4, length = 0x0002 + INT15 : origin = 0xFFA6, length = 0x0002 + INT16 : origin = 0xFFA8, length = 0x0002 + INT17 : origin = 0xFFAA, length = 0x0002 + INT18 : origin = 0xFFAC, length = 0x0002 + INT19 : origin = 0xFFAE, length = 0x0002 + INT20 : origin = 0xFFB0, length = 0x0002 + INT21 : origin = 0xFFB2, length = 0x0002 + INT22 : origin = 0xFFB4, length = 0x0002 + INT23 : origin = 0xFFB6, length = 0x0002 + INT24 : origin = 0xFFB8, length = 0x0002 + INT25 : origin = 0xFFBA, length = 0x0002 + INT26 : origin = 0xFFBC, length = 0x0002 + INT27 : origin = 0xFFBE, length = 0x0002 + INT28 : origin = 0xFFC0, length = 0x0002 + INT29 : origin = 0xFFC2, length = 0x0002 + INT30 : origin = 0xFFC4, length = 0x0002 + INT31 : origin = 0xFFC6, length = 0x0002 + INT32 : origin = 0xFFC8, length = 0x0002 + INT33 : origin = 0xFFCA, length = 0x0002 + INT34 : origin = 0xFFCC, length = 0x0002 + INT35 : origin = 0xFFCE, length = 0x0002 + INT36 : origin = 0xFFD0, length = 0x0002 + INT37 : origin = 0xFFD2, length = 0x0002 + INT38 : origin = 0xFFD4, length = 0x0002 + INT39 : origin = 0xFFD6, length = 0x0002 + INT40 : origin = 0xFFD8, length = 0x0002 + INT41 : origin = 0xFFDA, length = 0x0002 + INT42 : origin = 0xFFDC, length = 0x0002 + INT43 : origin = 0xFFDE, length = 0x0002 + INT44 : origin = 0xFFE0, length = 0x0002 + INT45 : origin = 0xFFE2, length = 0x0002 + INT46 : origin = 0xFFE4, length = 0x0002 + INT47 : origin = 0xFFE6, length = 0x0002 + INT48 : origin = 0xFFE8, length = 0x0002 + INT49 : origin = 0xFFEA, length = 0x0002 + INT50 : origin = 0xFFEC, length = 0x0002 + INT51 : origin = 0xFFEE, length = 0x0002 + INT52 : origin = 0xFFF0, length = 0x0002 + INT53 : origin = 0xFFF2, length = 0x0002 + INT54 : origin = 0xFFF4, length = 0x0002 + INT55 : origin = 0xFFF6, length = 0x0002 + INT56 : origin = 0xFFF8, length = 0x0002 + INT57 : origin = 0xFFFA, length = 0x0002 + INT58 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + } + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + .text:_isr : {} /* Code ISRs */ + } + } > FRAM + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + .cio : {} > RAM /* C I/O buffer */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + .int45 : {} > INT45 + .int46 : {} > INT46 + .int47 : {} > INT47 + ECOMP0 : { * ( .int48 ) } > INT48 type = VECT_INIT + PORT2 : { * ( .int49 ) } > INT49 type = VECT_INIT + PORT1 : { * ( .int50 ) } > INT50 type = VECT_INIT + ADC : { * ( .int51 ) } > INT51 type = VECT_INIT + EUSCI_A0 : { * ( .int52 ) } > INT52 type = VECT_INIT + WDT : { * ( .int53 ) } > INT53 type = VECT_INIT + RTC : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_B1 : { * ( .int55 ) } > INT55 type = VECT_INIT + TIMER0_B0 : { * ( .int56 ) } > INT56 type = VECT_INIT + UNMI : { * ( .int57 ) } > INT57 type = VECT_INIT + SYSNMI : { * ( .int58 ) } > INT58 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr2110.cmd + + diff --git a/msp430/lnk_msp430fr2111.cmd b/msp430/lnk_msp430fr2111.cmd new file mode 100644 index 00000000..0be50381 --- /dev/null +++ b/msp430/lnk_msp430fr2111.cmd @@ -0,0 +1,244 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR2111 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + BSL0 : origin = 0x1000, length = 0x400 + RAM : origin = 0x2000, length = 0x400 + FRAM : origin = 0xF100, length = 0xE80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFF88, length = 0x0002 + INT01 : origin = 0xFF8A, length = 0x0002 + INT02 : origin = 0xFF8C, length = 0x0002 + INT03 : origin = 0xFF8E, length = 0x0002 + INT04 : origin = 0xFF90, length = 0x0002 + INT05 : origin = 0xFF92, length = 0x0002 + INT06 : origin = 0xFF94, length = 0x0002 + INT07 : origin = 0xFF96, length = 0x0002 + INT08 : origin = 0xFF98, length = 0x0002 + INT09 : origin = 0xFF9A, length = 0x0002 + INT10 : origin = 0xFF9C, length = 0x0002 + INT11 : origin = 0xFF9E, length = 0x0002 + INT12 : origin = 0xFFA0, length = 0x0002 + INT13 : origin = 0xFFA2, length = 0x0002 + INT14 : origin = 0xFFA4, length = 0x0002 + INT15 : origin = 0xFFA6, length = 0x0002 + INT16 : origin = 0xFFA8, length = 0x0002 + INT17 : origin = 0xFFAA, length = 0x0002 + INT18 : origin = 0xFFAC, length = 0x0002 + INT19 : origin = 0xFFAE, length = 0x0002 + INT20 : origin = 0xFFB0, length = 0x0002 + INT21 : origin = 0xFFB2, length = 0x0002 + INT22 : origin = 0xFFB4, length = 0x0002 + INT23 : origin = 0xFFB6, length = 0x0002 + INT24 : origin = 0xFFB8, length = 0x0002 + INT25 : origin = 0xFFBA, length = 0x0002 + INT26 : origin = 0xFFBC, length = 0x0002 + INT27 : origin = 0xFFBE, length = 0x0002 + INT28 : origin = 0xFFC0, length = 0x0002 + INT29 : origin = 0xFFC2, length = 0x0002 + INT30 : origin = 0xFFC4, length = 0x0002 + INT31 : origin = 0xFFC6, length = 0x0002 + INT32 : origin = 0xFFC8, length = 0x0002 + INT33 : origin = 0xFFCA, length = 0x0002 + INT34 : origin = 0xFFCC, length = 0x0002 + INT35 : origin = 0xFFCE, length = 0x0002 + INT36 : origin = 0xFFD0, length = 0x0002 + INT37 : origin = 0xFFD2, length = 0x0002 + INT38 : origin = 0xFFD4, length = 0x0002 + INT39 : origin = 0xFFD6, length = 0x0002 + INT40 : origin = 0xFFD8, length = 0x0002 + INT41 : origin = 0xFFDA, length = 0x0002 + INT42 : origin = 0xFFDC, length = 0x0002 + INT43 : origin = 0xFFDE, length = 0x0002 + INT44 : origin = 0xFFE0, length = 0x0002 + INT45 : origin = 0xFFE2, length = 0x0002 + INT46 : origin = 0xFFE4, length = 0x0002 + INT47 : origin = 0xFFE6, length = 0x0002 + INT48 : origin = 0xFFE8, length = 0x0002 + INT49 : origin = 0xFFEA, length = 0x0002 + INT50 : origin = 0xFFEC, length = 0x0002 + INT51 : origin = 0xFFEE, length = 0x0002 + INT52 : origin = 0xFFF0, length = 0x0002 + INT53 : origin = 0xFFF2, length = 0x0002 + INT54 : origin = 0xFFF4, length = 0x0002 + INT55 : origin = 0xFFF6, length = 0x0002 + INT56 : origin = 0xFFF8, length = 0x0002 + INT57 : origin = 0xFFFA, length = 0x0002 + INT58 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + } + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + .text:_isr : {} /* Code ISRs */ + } + } > FRAM + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + .cio : {} > RAM /* C I/O buffer */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + .int45 : {} > INT45 + .int46 : {} > INT46 + .int47 : {} > INT47 + ECOMP0 : { * ( .int48 ) } > INT48 type = VECT_INIT + PORT2 : { * ( .int49 ) } > INT49 type = VECT_INIT + PORT1 : { * ( .int50 ) } > INT50 type = VECT_INIT + ADC : { * ( .int51 ) } > INT51 type = VECT_INIT + EUSCI_A0 : { * ( .int52 ) } > INT52 type = VECT_INIT + WDT : { * ( .int53 ) } > INT53 type = VECT_INIT + RTC : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_B1 : { * ( .int55 ) } > INT55 type = VECT_INIT + TIMER0_B0 : { * ( .int56 ) } > INT56 type = VECT_INIT + UNMI : { * ( .int57 ) } > INT57 type = VECT_INIT + SYSNMI : { * ( .int58 ) } > INT58 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr2111.cmd + + diff --git a/msp430/lnk_msp430fr2153.cmd b/msp430/lnk_msp430fr2153.cmd new file mode 100644 index 00000000..9d4abcfa --- /dev/null +++ b/msp430/lnk_msp430fr2153.cmd @@ -0,0 +1,250 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR2153 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x6, length = 0x1A + BSL0 : origin = 0x1000, length = 0x800 + INFO : origin = 0x1800, length = 0x200 + TLVMEM : origin = 0x1A00, length = 0x200 + BOOTCODE : origin = 0x1C00, length = 0x400 + RAM : origin = 0x2000, length = 0x800 + FRAM : origin = 0xC000, length = 0x3F80 + ROMLIB : origin = 0xFAC00, length = 0x5000 + BSL1 : origin = 0xFFC00, length = 0x400 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + BSLCONFIGURATIONSIGNATURE: origin = 0xFF88, length = 0x0002, fill = 0xFFFF + BSLCONFIGURATION : origin = 0xFF8A, length = 0x0002, fill = 0xFFFF + BSLI2CADDRESS : origin = 0xFFA0, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFA2, length = 0x0002 + INT01 : origin = 0xFFA4, length = 0x0002 + INT02 : origin = 0xFFA6, length = 0x0002 + INT03 : origin = 0xFFA8, length = 0x0002 + INT04 : origin = 0xFFAA, length = 0x0002 + INT05 : origin = 0xFFAC, length = 0x0002 + INT06 : origin = 0xFFAE, length = 0x0002 + INT07 : origin = 0xFFB0, length = 0x0002 + INT08 : origin = 0xFFB2, length = 0x0002 + INT09 : origin = 0xFFB4, length = 0x0002 + INT10 : origin = 0xFFB6, length = 0x0002 + INT11 : origin = 0xFFB8, length = 0x0002 + INT12 : origin = 0xFFBA, length = 0x0002 + INT13 : origin = 0xFFBC, length = 0x0002 + INT14 : origin = 0xFFBE, length = 0x0002 + INT15 : origin = 0xFFC0, length = 0x0002 + INT16 : origin = 0xFFC2, length = 0x0002 + INT17 : origin = 0xFFC4, length = 0x0002 + INT18 : origin = 0xFFC6, length = 0x0002 + INT19 : origin = 0xFFC8, length = 0x0002 + INT20 : origin = 0xFFCA, length = 0x0002 + INT21 : origin = 0xFFCC, length = 0x0002 + INT22 : origin = 0xFFCE, length = 0x0002 + INT23 : origin = 0xFFD0, length = 0x0002 + INT24 : origin = 0xFFD2, length = 0x0002 + INT25 : origin = 0xFFD4, length = 0x0002 + INT26 : origin = 0xFFD6, length = 0x0002 + INT27 : origin = 0xFFD8, length = 0x0002 + INT28 : origin = 0xFFDA, length = 0x0002 + INT29 : origin = 0xFFDC, length = 0x0002 + INT30 : origin = 0xFFDE, length = 0x0002 + INT31 : origin = 0xFFE0, length = 0x0002 + INT32 : origin = 0xFFE2, length = 0x0002 + INT33 : origin = 0xFFE4, length = 0x0002 + INT34 : origin = 0xFFE6, length = 0x0002 + INT35 : origin = 0xFFE8, length = 0x0002 + INT36 : origin = 0xFFEA, length = 0x0002 + INT37 : origin = 0xFFEC, length = 0x0002 + INT38 : origin = 0xFFEE, length = 0x0002 + INT39 : origin = 0xFFF0, length = 0x0002 + INT40 : origin = 0xFFF2, length = 0x0002 + INT41 : origin = 0xFFF4, length = 0x0002 + INT42 : origin = 0xFFF6, length = 0x0002 + INT43 : origin = 0xFFF8, length = 0x0002 + INT44 : origin = 0xFFFA, length = 0x0002 + INT45 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) RUN_END(fram_rx_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + .text:_isr : {} /* Code ISRs */ + } + } > FRAM + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + .bslconfigsignature : {} > BSLCONFIGURATIONSIGNATURE + .bslconfig : {} > BSLCONFIGURATION + .bsli2caddress : {} > BSLI2CADDRESS + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + /* MSP430 INFO memory segments */ + .info : type = NOINIT{} > INFO + + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + PORT4 : { * ( .int22 ) } > INT22 type = VECT_INIT + PORT3 : { * ( .int23 ) } > INT23 type = VECT_INIT + PORT2 : { * ( .int24 ) } > INT24 type = VECT_INIT + PORT1 : { * ( .int25 ) } > INT25 type = VECT_INIT + .int26 : {} > INT26 + .int27 : {} > INT27 + ECOMP0_ECOMP1: { * ( .int28 ) } > INT28 type = VECT_INIT + ADC : { * ( .int29 ) } > INT29 type = VECT_INIT + EUSCI_B1 : { * ( .int30 ) } > INT30 type = VECT_INIT + EUSCI_B0 : { * ( .int31 ) } > INT31 type = VECT_INIT + EUSCI_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + EUSCI_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + WDT : { * ( .int34 ) } > INT34 type = VECT_INIT + RTC : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER3_B1 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER3_B0 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_B1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_B0 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_B1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_B0 : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER0_B1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_B0 : { * ( .int43 ) } > INT43 type = VECT_INIT + UNMI : { * ( .int44 ) } > INT44 type = VECT_INIT + SYSNMI : { * ( .int45 ) } > INT45 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* FRAM WRITE PROTECTION SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _FRWP_ENABLE + __mpu_enable=1; + start_protection_offset_address = (fram_rx_start - fram_rw_start) >> 10; + program_fram_protection = 0x1; + #ifdef _INFO_FRWP_ENABLE + info_fram_protection = 0x1; + #else + info_fram_protection = 0x0; + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr2153.cmd + + diff --git a/msp430/lnk_msp430fr2155.cmd b/msp430/lnk_msp430fr2155.cmd new file mode 100644 index 00000000..95de1a1c --- /dev/null +++ b/msp430/lnk_msp430fr2155.cmd @@ -0,0 +1,250 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR2155 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x6, length = 0x1A + BSL0 : origin = 0x1000, length = 0x800 + INFO : origin = 0x1800, length = 0x200 + TLVMEM : origin = 0x1A00, length = 0x200 + BOOTCODE : origin = 0x1C00, length = 0x400 + RAM : origin = 0x2000, length = 0x1000 + FRAM : origin = 0x8000, length = 0x7F80 + ROMLIB : origin = 0xFAC00, length = 0x5000 + BSL1 : origin = 0xFFC00, length = 0x400 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + BSLCONFIGURATIONSIGNATURE: origin = 0xFF88, length = 0x0002, fill = 0xFFFF + BSLCONFIGURATION : origin = 0xFF8A, length = 0x0002, fill = 0xFFFF + BSLI2CADDRESS : origin = 0xFFA0, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFA2, length = 0x0002 + INT01 : origin = 0xFFA4, length = 0x0002 + INT02 : origin = 0xFFA6, length = 0x0002 + INT03 : origin = 0xFFA8, length = 0x0002 + INT04 : origin = 0xFFAA, length = 0x0002 + INT05 : origin = 0xFFAC, length = 0x0002 + INT06 : origin = 0xFFAE, length = 0x0002 + INT07 : origin = 0xFFB0, length = 0x0002 + INT08 : origin = 0xFFB2, length = 0x0002 + INT09 : origin = 0xFFB4, length = 0x0002 + INT10 : origin = 0xFFB6, length = 0x0002 + INT11 : origin = 0xFFB8, length = 0x0002 + INT12 : origin = 0xFFBA, length = 0x0002 + INT13 : origin = 0xFFBC, length = 0x0002 + INT14 : origin = 0xFFBE, length = 0x0002 + INT15 : origin = 0xFFC0, length = 0x0002 + INT16 : origin = 0xFFC2, length = 0x0002 + INT17 : origin = 0xFFC4, length = 0x0002 + INT18 : origin = 0xFFC6, length = 0x0002 + INT19 : origin = 0xFFC8, length = 0x0002 + INT20 : origin = 0xFFCA, length = 0x0002 + INT21 : origin = 0xFFCC, length = 0x0002 + INT22 : origin = 0xFFCE, length = 0x0002 + INT23 : origin = 0xFFD0, length = 0x0002 + INT24 : origin = 0xFFD2, length = 0x0002 + INT25 : origin = 0xFFD4, length = 0x0002 + INT26 : origin = 0xFFD6, length = 0x0002 + INT27 : origin = 0xFFD8, length = 0x0002 + INT28 : origin = 0xFFDA, length = 0x0002 + INT29 : origin = 0xFFDC, length = 0x0002 + INT30 : origin = 0xFFDE, length = 0x0002 + INT31 : origin = 0xFFE0, length = 0x0002 + INT32 : origin = 0xFFE2, length = 0x0002 + INT33 : origin = 0xFFE4, length = 0x0002 + INT34 : origin = 0xFFE6, length = 0x0002 + INT35 : origin = 0xFFE8, length = 0x0002 + INT36 : origin = 0xFFEA, length = 0x0002 + INT37 : origin = 0xFFEC, length = 0x0002 + INT38 : origin = 0xFFEE, length = 0x0002 + INT39 : origin = 0xFFF0, length = 0x0002 + INT40 : origin = 0xFFF2, length = 0x0002 + INT41 : origin = 0xFFF4, length = 0x0002 + INT42 : origin = 0xFFF6, length = 0x0002 + INT43 : origin = 0xFFF8, length = 0x0002 + INT44 : origin = 0xFFFA, length = 0x0002 + INT45 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) RUN_END(fram_rx_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + .text:_isr : {} /* Code ISRs */ + } + } > FRAM + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + .bslconfigsignature : {} > BSLCONFIGURATIONSIGNATURE + .bslconfig : {} > BSLCONFIGURATION + .bsli2caddress : {} > BSLI2CADDRESS + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + /* MSP430 INFO memory segments */ + .info : type = NOINIT{} > INFO + + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + PORT4 : { * ( .int22 ) } > INT22 type = VECT_INIT + PORT3 : { * ( .int23 ) } > INT23 type = VECT_INIT + PORT2 : { * ( .int24 ) } > INT24 type = VECT_INIT + PORT1 : { * ( .int25 ) } > INT25 type = VECT_INIT + .int26 : {} > INT26 + .int27 : {} > INT27 + ECOMP0_ECOMP1: { * ( .int28 ) } > INT28 type = VECT_INIT + ADC : { * ( .int29 ) } > INT29 type = VECT_INIT + EUSCI_B1 : { * ( .int30 ) } > INT30 type = VECT_INIT + EUSCI_B0 : { * ( .int31 ) } > INT31 type = VECT_INIT + EUSCI_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + EUSCI_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + WDT : { * ( .int34 ) } > INT34 type = VECT_INIT + RTC : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER3_B1 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER3_B0 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_B1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_B0 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_B1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_B0 : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER0_B1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_B0 : { * ( .int43 ) } > INT43 type = VECT_INIT + UNMI : { * ( .int44 ) } > INT44 type = VECT_INIT + SYSNMI : { * ( .int45 ) } > INT45 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* FRAM WRITE PROTECTION SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _FRWP_ENABLE + __mpu_enable=1; + start_protection_offset_address = (fram_rx_start - fram_rw_start) >> 10; + program_fram_protection = 0x1; + #ifdef _INFO_FRWP_ENABLE + info_fram_protection = 0x1; + #else + info_fram_protection = 0x0; + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr2155.cmd + + diff --git a/msp430/lnk_msp430fr2310.cmd b/msp430/lnk_msp430fr2310.cmd new file mode 100644 index 00000000..874394e4 --- /dev/null +++ b/msp430/lnk_msp430fr2310.cmd @@ -0,0 +1,245 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR2310 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + BSL0 : origin = 0x1000, length = 0x800 + RAM : origin = 0x2000, length = 0x400 + FRAM : origin = 0xF800, length = 0x780 + BSL1 : origin = 0xFFC00, length = 0x400 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFF88, length = 0x0002 + INT01 : origin = 0xFF8A, length = 0x0002 + INT02 : origin = 0xFF8C, length = 0x0002 + INT03 : origin = 0xFF8E, length = 0x0002 + INT04 : origin = 0xFF90, length = 0x0002 + INT05 : origin = 0xFF92, length = 0x0002 + INT06 : origin = 0xFF94, length = 0x0002 + INT07 : origin = 0xFF96, length = 0x0002 + INT08 : origin = 0xFF98, length = 0x0002 + INT09 : origin = 0xFF9A, length = 0x0002 + INT10 : origin = 0xFF9C, length = 0x0002 + INT11 : origin = 0xFF9E, length = 0x0002 + INT12 : origin = 0xFFA0, length = 0x0002 + INT13 : origin = 0xFFA2, length = 0x0002 + INT14 : origin = 0xFFA4, length = 0x0002 + INT15 : origin = 0xFFA6, length = 0x0002 + INT16 : origin = 0xFFA8, length = 0x0002 + INT17 : origin = 0xFFAA, length = 0x0002 + INT18 : origin = 0xFFAC, length = 0x0002 + INT19 : origin = 0xFFAE, length = 0x0002 + INT20 : origin = 0xFFB0, length = 0x0002 + INT21 : origin = 0xFFB2, length = 0x0002 + INT22 : origin = 0xFFB4, length = 0x0002 + INT23 : origin = 0xFFB6, length = 0x0002 + INT24 : origin = 0xFFB8, length = 0x0002 + INT25 : origin = 0xFFBA, length = 0x0002 + INT26 : origin = 0xFFBC, length = 0x0002 + INT27 : origin = 0xFFBE, length = 0x0002 + INT28 : origin = 0xFFC0, length = 0x0002 + INT29 : origin = 0xFFC2, length = 0x0002 + INT30 : origin = 0xFFC4, length = 0x0002 + INT31 : origin = 0xFFC6, length = 0x0002 + INT32 : origin = 0xFFC8, length = 0x0002 + INT33 : origin = 0xFFCA, length = 0x0002 + INT34 : origin = 0xFFCC, length = 0x0002 + INT35 : origin = 0xFFCE, length = 0x0002 + INT36 : origin = 0xFFD0, length = 0x0002 + INT37 : origin = 0xFFD2, length = 0x0002 + INT38 : origin = 0xFFD4, length = 0x0002 + INT39 : origin = 0xFFD6, length = 0x0002 + INT40 : origin = 0xFFD8, length = 0x0002 + INT41 : origin = 0xFFDA, length = 0x0002 + INT42 : origin = 0xFFDC, length = 0x0002 + INT43 : origin = 0xFFDE, length = 0x0002 + INT44 : origin = 0xFFE0, length = 0x0002 + INT45 : origin = 0xFFE2, length = 0x0002 + INT46 : origin = 0xFFE4, length = 0x0002 + INT47 : origin = 0xFFE6, length = 0x0002 + INT48 : origin = 0xFFE8, length = 0x0002 + INT49 : origin = 0xFFEA, length = 0x0002 + INT50 : origin = 0xFFEC, length = 0x0002 + INT51 : origin = 0xFFEE, length = 0x0002 + INT52 : origin = 0xFFF0, length = 0x0002 + INT53 : origin = 0xFFF2, length = 0x0002 + INT54 : origin = 0xFFF4, length = 0x0002 + INT55 : origin = 0xFFF6, length = 0x0002 + INT56 : origin = 0xFFF8, length = 0x0002 + INT57 : origin = 0xFFFA, length = 0x0002 + INT58 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + } + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + .text:_isr : {} /* Code ISRs */ + } + } > FRAM + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + .cio : {} > RAM /* C I/O buffer */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + ECOMP0 : { * ( .int45 ) } > INT45 type = VECT_INIT + PORT2 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + ADC : { * ( .int48 ) } > INT48 type = VECT_INIT + EUSCI_B0 : { * ( .int49 ) } > INT49 type = VECT_INIT + EUSCI_A0 : { * ( .int50 ) } > INT50 type = VECT_INIT + WDT : { * ( .int51 ) } > INT51 type = VECT_INIT + RTC : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER1_B1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER1_B0 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_B1 : { * ( .int55 ) } > INT55 type = VECT_INIT + TIMER0_B0 : { * ( .int56 ) } > INT56 type = VECT_INIT + UNMI : { * ( .int57 ) } > INT57 type = VECT_INIT + SYSNMI : { * ( .int58 ) } > INT58 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr2310.cmd + + diff --git a/msp430/lnk_msp430fr2311.cmd b/msp430/lnk_msp430fr2311.cmd new file mode 100644 index 00000000..b6e6b5b1 --- /dev/null +++ b/msp430/lnk_msp430fr2311.cmd @@ -0,0 +1,245 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR2311 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + BSL0 : origin = 0x1000, length = 0x800 + RAM : origin = 0x2000, length = 0x400 + FRAM : origin = 0xF100, length = 0xE80 + BSL1 : origin = 0xFFC00, length = 0x400 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFF88, length = 0x0002 + INT01 : origin = 0xFF8A, length = 0x0002 + INT02 : origin = 0xFF8C, length = 0x0002 + INT03 : origin = 0xFF8E, length = 0x0002 + INT04 : origin = 0xFF90, length = 0x0002 + INT05 : origin = 0xFF92, length = 0x0002 + INT06 : origin = 0xFF94, length = 0x0002 + INT07 : origin = 0xFF96, length = 0x0002 + INT08 : origin = 0xFF98, length = 0x0002 + INT09 : origin = 0xFF9A, length = 0x0002 + INT10 : origin = 0xFF9C, length = 0x0002 + INT11 : origin = 0xFF9E, length = 0x0002 + INT12 : origin = 0xFFA0, length = 0x0002 + INT13 : origin = 0xFFA2, length = 0x0002 + INT14 : origin = 0xFFA4, length = 0x0002 + INT15 : origin = 0xFFA6, length = 0x0002 + INT16 : origin = 0xFFA8, length = 0x0002 + INT17 : origin = 0xFFAA, length = 0x0002 + INT18 : origin = 0xFFAC, length = 0x0002 + INT19 : origin = 0xFFAE, length = 0x0002 + INT20 : origin = 0xFFB0, length = 0x0002 + INT21 : origin = 0xFFB2, length = 0x0002 + INT22 : origin = 0xFFB4, length = 0x0002 + INT23 : origin = 0xFFB6, length = 0x0002 + INT24 : origin = 0xFFB8, length = 0x0002 + INT25 : origin = 0xFFBA, length = 0x0002 + INT26 : origin = 0xFFBC, length = 0x0002 + INT27 : origin = 0xFFBE, length = 0x0002 + INT28 : origin = 0xFFC0, length = 0x0002 + INT29 : origin = 0xFFC2, length = 0x0002 + INT30 : origin = 0xFFC4, length = 0x0002 + INT31 : origin = 0xFFC6, length = 0x0002 + INT32 : origin = 0xFFC8, length = 0x0002 + INT33 : origin = 0xFFCA, length = 0x0002 + INT34 : origin = 0xFFCC, length = 0x0002 + INT35 : origin = 0xFFCE, length = 0x0002 + INT36 : origin = 0xFFD0, length = 0x0002 + INT37 : origin = 0xFFD2, length = 0x0002 + INT38 : origin = 0xFFD4, length = 0x0002 + INT39 : origin = 0xFFD6, length = 0x0002 + INT40 : origin = 0xFFD8, length = 0x0002 + INT41 : origin = 0xFFDA, length = 0x0002 + INT42 : origin = 0xFFDC, length = 0x0002 + INT43 : origin = 0xFFDE, length = 0x0002 + INT44 : origin = 0xFFE0, length = 0x0002 + INT45 : origin = 0xFFE2, length = 0x0002 + INT46 : origin = 0xFFE4, length = 0x0002 + INT47 : origin = 0xFFE6, length = 0x0002 + INT48 : origin = 0xFFE8, length = 0x0002 + INT49 : origin = 0xFFEA, length = 0x0002 + INT50 : origin = 0xFFEC, length = 0x0002 + INT51 : origin = 0xFFEE, length = 0x0002 + INT52 : origin = 0xFFF0, length = 0x0002 + INT53 : origin = 0xFFF2, length = 0x0002 + INT54 : origin = 0xFFF4, length = 0x0002 + INT55 : origin = 0xFFF6, length = 0x0002 + INT56 : origin = 0xFFF8, length = 0x0002 + INT57 : origin = 0xFFFA, length = 0x0002 + INT58 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + } + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + .text:_isr : {} /* Code ISRs */ + } + } > FRAM + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + .cio : {} > RAM /* C I/O buffer */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + ECOMP0 : { * ( .int45 ) } > INT45 type = VECT_INIT + PORT2 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + ADC : { * ( .int48 ) } > INT48 type = VECT_INIT + EUSCI_B0 : { * ( .int49 ) } > INT49 type = VECT_INIT + EUSCI_A0 : { * ( .int50 ) } > INT50 type = VECT_INIT + WDT : { * ( .int51 ) } > INT51 type = VECT_INIT + RTC : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER1_B1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER1_B0 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_B1 : { * ( .int55 ) } > INT55 type = VECT_INIT + TIMER0_B0 : { * ( .int56 ) } > INT56 type = VECT_INIT + UNMI : { * ( .int57 ) } > INT57 type = VECT_INIT + SYSNMI : { * ( .int58 ) } > INT58 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr2311.cmd + + diff --git a/msp430/lnk_msp430fr2353.cmd b/msp430/lnk_msp430fr2353.cmd new file mode 100644 index 00000000..5ae20111 --- /dev/null +++ b/msp430/lnk_msp430fr2353.cmd @@ -0,0 +1,250 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR2353 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x6, length = 0x1A + BSL0 : origin = 0x1000, length = 0x800 + INFO : origin = 0x1800, length = 0x200 + TLVMEM : origin = 0x1A00, length = 0x200 + BOOTCODE : origin = 0x1C00, length = 0x400 + RAM : origin = 0x2000, length = 0x800 + FRAM : origin = 0xC000, length = 0x3F80 + ROMLIB : origin = 0xFAC00, length = 0x5000 + BSL1 : origin = 0xFFC00, length = 0x400 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + BSLCONFIGURATIONSIGNATURE: origin = 0xFF88, length = 0x0002, fill = 0xFFFF + BSLCONFIGURATION : origin = 0xFF8A, length = 0x0002, fill = 0xFFFF + BSLI2CADDRESS : origin = 0xFFA0, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFA2, length = 0x0002 + INT01 : origin = 0xFFA4, length = 0x0002 + INT02 : origin = 0xFFA6, length = 0x0002 + INT03 : origin = 0xFFA8, length = 0x0002 + INT04 : origin = 0xFFAA, length = 0x0002 + INT05 : origin = 0xFFAC, length = 0x0002 + INT06 : origin = 0xFFAE, length = 0x0002 + INT07 : origin = 0xFFB0, length = 0x0002 + INT08 : origin = 0xFFB2, length = 0x0002 + INT09 : origin = 0xFFB4, length = 0x0002 + INT10 : origin = 0xFFB6, length = 0x0002 + INT11 : origin = 0xFFB8, length = 0x0002 + INT12 : origin = 0xFFBA, length = 0x0002 + INT13 : origin = 0xFFBC, length = 0x0002 + INT14 : origin = 0xFFBE, length = 0x0002 + INT15 : origin = 0xFFC0, length = 0x0002 + INT16 : origin = 0xFFC2, length = 0x0002 + INT17 : origin = 0xFFC4, length = 0x0002 + INT18 : origin = 0xFFC6, length = 0x0002 + INT19 : origin = 0xFFC8, length = 0x0002 + INT20 : origin = 0xFFCA, length = 0x0002 + INT21 : origin = 0xFFCC, length = 0x0002 + INT22 : origin = 0xFFCE, length = 0x0002 + INT23 : origin = 0xFFD0, length = 0x0002 + INT24 : origin = 0xFFD2, length = 0x0002 + INT25 : origin = 0xFFD4, length = 0x0002 + INT26 : origin = 0xFFD6, length = 0x0002 + INT27 : origin = 0xFFD8, length = 0x0002 + INT28 : origin = 0xFFDA, length = 0x0002 + INT29 : origin = 0xFFDC, length = 0x0002 + INT30 : origin = 0xFFDE, length = 0x0002 + INT31 : origin = 0xFFE0, length = 0x0002 + INT32 : origin = 0xFFE2, length = 0x0002 + INT33 : origin = 0xFFE4, length = 0x0002 + INT34 : origin = 0xFFE6, length = 0x0002 + INT35 : origin = 0xFFE8, length = 0x0002 + INT36 : origin = 0xFFEA, length = 0x0002 + INT37 : origin = 0xFFEC, length = 0x0002 + INT38 : origin = 0xFFEE, length = 0x0002 + INT39 : origin = 0xFFF0, length = 0x0002 + INT40 : origin = 0xFFF2, length = 0x0002 + INT41 : origin = 0xFFF4, length = 0x0002 + INT42 : origin = 0xFFF6, length = 0x0002 + INT43 : origin = 0xFFF8, length = 0x0002 + INT44 : origin = 0xFFFA, length = 0x0002 + INT45 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) RUN_END(fram_rx_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + .text:_isr : {} /* Code ISRs */ + } + } > FRAM + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + .bslconfigsignature : {} > BSLCONFIGURATIONSIGNATURE + .bslconfig : {} > BSLCONFIGURATION + .bsli2caddress : {} > BSLI2CADDRESS + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + /* MSP430 INFO memory segments */ + .info : type = NOINIT{} > INFO + + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + PORT4 : { * ( .int22 ) } > INT22 type = VECT_INIT + PORT3 : { * ( .int23 ) } > INT23 type = VECT_INIT + PORT2 : { * ( .int24 ) } > INT24 type = VECT_INIT + PORT1 : { * ( .int25 ) } > INT25 type = VECT_INIT + SAC1_SAC3 : { * ( .int26 ) } > INT26 type = VECT_INIT + SAC0_SAC2 : { * ( .int27 ) } > INT27 type = VECT_INIT + ECOMP0_ECOMP1: { * ( .int28 ) } > INT28 type = VECT_INIT + ADC : { * ( .int29 ) } > INT29 type = VECT_INIT + EUSCI_B1 : { * ( .int30 ) } > INT30 type = VECT_INIT + EUSCI_B0 : { * ( .int31 ) } > INT31 type = VECT_INIT + EUSCI_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + EUSCI_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + WDT : { * ( .int34 ) } > INT34 type = VECT_INIT + RTC : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER3_B1 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER3_B0 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_B1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_B0 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_B1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_B0 : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER0_B1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_B0 : { * ( .int43 ) } > INT43 type = VECT_INIT + UNMI : { * ( .int44 ) } > INT44 type = VECT_INIT + SYSNMI : { * ( .int45 ) } > INT45 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* FRAM WRITE PROTECTION SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _FRWP_ENABLE + __mpu_enable=1; + start_protection_offset_address = (fram_rx_start - fram_rw_start) >> 10; + program_fram_protection = 0x1; + #ifdef _INFO_FRWP_ENABLE + info_fram_protection = 0x1; + #else + info_fram_protection = 0x0; + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr2353.cmd + + diff --git a/msp430/lnk_msp430fr2355.cmd b/msp430/lnk_msp430fr2355.cmd new file mode 100644 index 00000000..d27b01b4 --- /dev/null +++ b/msp430/lnk_msp430fr2355.cmd @@ -0,0 +1,250 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR2355 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x6, length = 0x1A + BSL0 : origin = 0x1000, length = 0x800 + INFO : origin = 0x1800, length = 0x200 + TLVMEM : origin = 0x1A00, length = 0x200 + BOOTCODE : origin = 0x1C00, length = 0x400 + RAM : origin = 0x2000, length = 0x1000 + FRAM : origin = 0x8000, length = 0x7F80 + ROMLIB : origin = 0xFAC00, length = 0x5000 + BSL1 : origin = 0xFFC00, length = 0x400 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + BSLCONFIGURATIONSIGNATURE: origin = 0xFF88, length = 0x0002, fill = 0xFFFF + BSLCONFIGURATION : origin = 0xFF8A, length = 0x0002, fill = 0xFFFF + BSLI2CADDRESS : origin = 0xFFA0, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFA2, length = 0x0002 + INT01 : origin = 0xFFA4, length = 0x0002 + INT02 : origin = 0xFFA6, length = 0x0002 + INT03 : origin = 0xFFA8, length = 0x0002 + INT04 : origin = 0xFFAA, length = 0x0002 + INT05 : origin = 0xFFAC, length = 0x0002 + INT06 : origin = 0xFFAE, length = 0x0002 + INT07 : origin = 0xFFB0, length = 0x0002 + INT08 : origin = 0xFFB2, length = 0x0002 + INT09 : origin = 0xFFB4, length = 0x0002 + INT10 : origin = 0xFFB6, length = 0x0002 + INT11 : origin = 0xFFB8, length = 0x0002 + INT12 : origin = 0xFFBA, length = 0x0002 + INT13 : origin = 0xFFBC, length = 0x0002 + INT14 : origin = 0xFFBE, length = 0x0002 + INT15 : origin = 0xFFC0, length = 0x0002 + INT16 : origin = 0xFFC2, length = 0x0002 + INT17 : origin = 0xFFC4, length = 0x0002 + INT18 : origin = 0xFFC6, length = 0x0002 + INT19 : origin = 0xFFC8, length = 0x0002 + INT20 : origin = 0xFFCA, length = 0x0002 + INT21 : origin = 0xFFCC, length = 0x0002 + INT22 : origin = 0xFFCE, length = 0x0002 + INT23 : origin = 0xFFD0, length = 0x0002 + INT24 : origin = 0xFFD2, length = 0x0002 + INT25 : origin = 0xFFD4, length = 0x0002 + INT26 : origin = 0xFFD6, length = 0x0002 + INT27 : origin = 0xFFD8, length = 0x0002 + INT28 : origin = 0xFFDA, length = 0x0002 + INT29 : origin = 0xFFDC, length = 0x0002 + INT30 : origin = 0xFFDE, length = 0x0002 + INT31 : origin = 0xFFE0, length = 0x0002 + INT32 : origin = 0xFFE2, length = 0x0002 + INT33 : origin = 0xFFE4, length = 0x0002 + INT34 : origin = 0xFFE6, length = 0x0002 + INT35 : origin = 0xFFE8, length = 0x0002 + INT36 : origin = 0xFFEA, length = 0x0002 + INT37 : origin = 0xFFEC, length = 0x0002 + INT38 : origin = 0xFFEE, length = 0x0002 + INT39 : origin = 0xFFF0, length = 0x0002 + INT40 : origin = 0xFFF2, length = 0x0002 + INT41 : origin = 0xFFF4, length = 0x0002 + INT42 : origin = 0xFFF6, length = 0x0002 + INT43 : origin = 0xFFF8, length = 0x0002 + INT44 : origin = 0xFFFA, length = 0x0002 + INT45 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) RUN_END(fram_rx_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + .text:_isr : {} /* Code ISRs */ + } + } > FRAM + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + .bslconfigsignature : {} > BSLCONFIGURATIONSIGNATURE + .bslconfig : {} > BSLCONFIGURATION + .bsli2caddress : {} > BSLI2CADDRESS + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + /* MSP430 INFO memory segments */ + .info : type = NOINIT{} > INFO + + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + PORT4 : { * ( .int22 ) } > INT22 type = VECT_INIT + PORT3 : { * ( .int23 ) } > INT23 type = VECT_INIT + PORT2 : { * ( .int24 ) } > INT24 type = VECT_INIT + PORT1 : { * ( .int25 ) } > INT25 type = VECT_INIT + SAC1_SAC3 : { * ( .int26 ) } > INT26 type = VECT_INIT + SAC0_SAC2 : { * ( .int27 ) } > INT27 type = VECT_INIT + ECOMP0_ECOMP1: { * ( .int28 ) } > INT28 type = VECT_INIT + ADC : { * ( .int29 ) } > INT29 type = VECT_INIT + EUSCI_B1 : { * ( .int30 ) } > INT30 type = VECT_INIT + EUSCI_B0 : { * ( .int31 ) } > INT31 type = VECT_INIT + EUSCI_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + EUSCI_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + WDT : { * ( .int34 ) } > INT34 type = VECT_INIT + RTC : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER3_B1 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER3_B0 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_B1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_B0 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_B1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_B0 : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER0_B1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_B0 : { * ( .int43 ) } > INT43 type = VECT_INIT + UNMI : { * ( .int44 ) } > INT44 type = VECT_INIT + SYSNMI : { * ( .int45 ) } > INT45 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* FRAM WRITE PROTECTION SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _FRWP_ENABLE + __mpu_enable=1; + start_protection_offset_address = (fram_rx_start - fram_rw_start) >> 10; + program_fram_protection = 0x1; + #ifdef _INFO_FRWP_ENABLE + info_fram_protection = 0x1; + #else + info_fram_protection = 0x0; + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr2355.cmd + + diff --git a/msp430/lnk_msp430fr2422.cmd b/msp430/lnk_msp430fr2422.cmd new file mode 100644 index 00000000..96bb26ea --- /dev/null +++ b/msp430/lnk_msp430fr2422.cmd @@ -0,0 +1,250 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR2422 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + BSL0 : origin = 0x1000, length = 0x800 + INFO : origin = 0x1800, length = 0x100 + RAM : origin = 0x2000, length = 0x800 + FRAM : origin = 0xE300, length = 0x1C80 + BSL1 : origin = 0xFFC00, length = 0x400 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFF88, length = 0x0002 + INT01 : origin = 0xFF8A, length = 0x0002 + INT02 : origin = 0xFF8C, length = 0x0002 + INT03 : origin = 0xFF8E, length = 0x0002 + INT04 : origin = 0xFF90, length = 0x0002 + INT05 : origin = 0xFF92, length = 0x0002 + INT06 : origin = 0xFF94, length = 0x0002 + INT07 : origin = 0xFF96, length = 0x0002 + INT08 : origin = 0xFF98, length = 0x0002 + INT09 : origin = 0xFF9A, length = 0x0002 + INT10 : origin = 0xFF9C, length = 0x0002 + INT11 : origin = 0xFF9E, length = 0x0002 + INT12 : origin = 0xFFA0, length = 0x0002 + INT13 : origin = 0xFFA2, length = 0x0002 + INT14 : origin = 0xFFA4, length = 0x0002 + INT15 : origin = 0xFFA6, length = 0x0002 + INT16 : origin = 0xFFA8, length = 0x0002 + INT17 : origin = 0xFFAA, length = 0x0002 + INT18 : origin = 0xFFAC, length = 0x0002 + INT19 : origin = 0xFFAE, length = 0x0002 + INT20 : origin = 0xFFB0, length = 0x0002 + INT21 : origin = 0xFFB2, length = 0x0002 + INT22 : origin = 0xFFB4, length = 0x0002 + INT23 : origin = 0xFFB6, length = 0x0002 + INT24 : origin = 0xFFB8, length = 0x0002 + INT25 : origin = 0xFFBA, length = 0x0002 + INT26 : origin = 0xFFBC, length = 0x0002 + INT27 : origin = 0xFFBE, length = 0x0002 + INT28 : origin = 0xFFC0, length = 0x0002 + INT29 : origin = 0xFFC2, length = 0x0002 + INT30 : origin = 0xFFC4, length = 0x0002 + INT31 : origin = 0xFFC6, length = 0x0002 + INT32 : origin = 0xFFC8, length = 0x0002 + INT33 : origin = 0xFFCA, length = 0x0002 + INT34 : origin = 0xFFCC, length = 0x0002 + INT35 : origin = 0xFFCE, length = 0x0002 + INT36 : origin = 0xFFD0, length = 0x0002 + INT37 : origin = 0xFFD2, length = 0x0002 + INT38 : origin = 0xFFD4, length = 0x0002 + INT39 : origin = 0xFFD6, length = 0x0002 + INT40 : origin = 0xFFD8, length = 0x0002 + INT41 : origin = 0xFFDA, length = 0x0002 + INT42 : origin = 0xFFDC, length = 0x0002 + INT43 : origin = 0xFFDE, length = 0x0002 + INT44 : origin = 0xFFE0, length = 0x0002 + INT45 : origin = 0xFFE2, length = 0x0002 + INT46 : origin = 0xFFE4, length = 0x0002 + INT47 : origin = 0xFFE6, length = 0x0002 + INT48 : origin = 0xFFE8, length = 0x0002 + INT49 : origin = 0xFFEA, length = 0x0002 + INT50 : origin = 0xFFEC, length = 0x0002 + INT51 : origin = 0xFFEE, length = 0x0002 + INT52 : origin = 0xFFF0, length = 0x0002 + INT53 : origin = 0xFFF2, length = 0x0002 + INT54 : origin = 0xFFF4, length = 0x0002 + INT55 : origin = 0xFFF6, length = 0x0002 + INT56 : origin = 0xFFF8, length = 0x0002 + INT57 : origin = 0xFFFA, length = 0x0002 + INT58 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + } + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + .text:_isr : {} /* Code ISRs */ + } + } > FRAM + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + .cio : {} > RAM /* C I/O buffer */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + /* MSP430 INFO memory segments */ + .info : type = NOINIT{} > INFO + + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + .int45 : {} > INT45 + PORT2 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + ADC : { * ( .int48 ) } > INT48 type = VECT_INIT + EUSCI_B0 : { * ( .int49 ) } > INT49 type = VECT_INIT + EUSCI_A0 : { * ( .int50 ) } > INT50 type = VECT_INIT + WDT : { * ( .int51 ) } > INT51 type = VECT_INIT + RTC : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER1_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER1_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A1 : { * ( .int55 ) } > INT55 type = VECT_INIT + TIMER0_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + UNMI : { * ( .int57 ) } > INT57 type = VECT_INIT + SYSNMI : { * ( .int58 ) } > INT58 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr2422.cmd + + diff --git a/msp430/lnk_msp430fr2433.cmd b/msp430/lnk_msp430fr2433.cmd new file mode 100644 index 00000000..816fb246 --- /dev/null +++ b/msp430/lnk_msp430fr2433.cmd @@ -0,0 +1,246 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr2433.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR2433 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2000, length = 0x1000 + INFOA : origin = 0x1800, length = 0x0200 + FRAM : origin = 0xC400, length = 0x3B80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFF88, length = 0x0002 + INT01 : origin = 0xFF8A, length = 0x0002 + INT02 : origin = 0xFF8C, length = 0x0002 + INT03 : origin = 0xFF8E, length = 0x0002 + INT04 : origin = 0xFF90, length = 0x0002 + INT05 : origin = 0xFF92, length = 0x0002 + INT06 : origin = 0xFF94, length = 0x0002 + INT07 : origin = 0xFF96, length = 0x0002 + INT08 : origin = 0xFF98, length = 0x0002 + INT09 : origin = 0xFF9A, length = 0x0002 + INT10 : origin = 0xFF9C, length = 0x0002 + INT11 : origin = 0xFF9E, length = 0x0002 + INT12 : origin = 0xFFA0, length = 0x0002 + INT13 : origin = 0xFFA2, length = 0x0002 + INT14 : origin = 0xFFA4, length = 0x0002 + INT15 : origin = 0xFFA6, length = 0x0002 + INT16 : origin = 0xFFA8, length = 0x0002 + INT17 : origin = 0xFFAA, length = 0x0002 + INT18 : origin = 0xFFAC, length = 0x0002 + INT19 : origin = 0xFFAE, length = 0x0002 + INT20 : origin = 0xFFB0, length = 0x0002 + INT21 : origin = 0xFFB2, length = 0x0002 + INT22 : origin = 0xFFB4, length = 0x0002 + INT23 : origin = 0xFFB6, length = 0x0002 + INT24 : origin = 0xFFB8, length = 0x0002 + INT25 : origin = 0xFFBA, length = 0x0002 + INT26 : origin = 0xFFBC, length = 0x0002 + INT27 : origin = 0xFFBE, length = 0x0002 + INT28 : origin = 0xFFC0, length = 0x0002 + INT29 : origin = 0xFFC2, length = 0x0002 + INT30 : origin = 0xFFC4, length = 0x0002 + INT31 : origin = 0xFFC6, length = 0x0002 + INT32 : origin = 0xFFC8, length = 0x0002 + INT33 : origin = 0xFFCA, length = 0x0002 + INT34 : origin = 0xFFCC, length = 0x0002 + INT35 : origin = 0xFFCE, length = 0x0002 + INT36 : origin = 0xFFD0, length = 0x0002 + INT37 : origin = 0xFFD2, length = 0x0002 + INT38 : origin = 0xFFD4, length = 0x0002 + INT39 : origin = 0xFFD6, length = 0x0002 + INT40 : origin = 0xFFD8, length = 0x0002 + INT41 : origin = 0xFFDA, length = 0x0002 + INT42 : origin = 0xFFDC, length = 0x0002 + INT43 : origin = 0xFFDE, length = 0x0002 + INT44 : origin = 0xFFE0, length = 0x0002 + INT45 : origin = 0xFFE2, length = 0x0002 + INT46 : origin = 0xFFE4, length = 0x0002 + INT47 : origin = 0xFFE6, length = 0x0002 + INT48 : origin = 0xFFE8, length = 0x0002 + INT49 : origin = 0xFFEA, length = 0x0002 + INT50 : origin = 0xFFEC, length = 0x0002 + INT51 : origin = 0xFFEE, length = 0x0002 + INT52 : origin = 0xFFF0, length = 0x0002 + INT53 : origin = 0xFFF2, length = 0x0002 + INT54 : origin = 0xFFF4, length = 0x0002 + INT55 : origin = 0xFFF6, length = 0x0002 + INT56 : origin = 0xFFF8, length = 0x0002 + INT57 : origin = 0xFFFA, length = 0x0002 + INT58 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + } + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .cio : {} > RAM /* C I/O buffer */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + PORT2 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT1 : { * ( .int42 ) } > INT42 type = VECT_INIT + ADC : { * ( .int43 ) } > INT43 type = VECT_INIT + USCI_B0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + WDT : { * ( .int47 ) } > INT47 type = VECT_INIT + RTC : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER3_A1 : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER3_A0 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER2_A1 : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER2_A0 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER1_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER1_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A1 : { * ( .int55 ) } > INT55 type = VECT_INIT + TIMER0_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + UNMI : { * ( .int57 ) } > INT57 type = VECT_INIT + SYSNMI : { * ( .int58 ) } > INT58 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr2433.cmd + diff --git a/msp430/lnk_msp430fr2475.cmd b/msp430/lnk_msp430fr2475.cmd new file mode 100644 index 00000000..41b87747 --- /dev/null +++ b/msp430/lnk_msp430fr2475.cmd @@ -0,0 +1,250 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR2475 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x6, length = 0x1A + BSL0 : origin = 0x1000, length = 0x800 + INFO : origin = 0x1800, length = 0x200 + TLVMEM : origin = 0x1A00, length = 0x200 + BOOTCODE : origin = 0x1C00, length = 0x400 + RAM : origin = 0x2000, length = 0x1800 + FRAM : origin = 0x8000, length = 0x7F80 + ROMLIB : origin = 0xC0000, length = 0x4000 + BSL1 : origin = 0xFFC00, length = 0x400 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + BSLCONFIGURATIONSIGNATURE: origin = 0xFF88, length = 0x0002, fill = 0xFFFF + BSLCONFIGURATION : origin = 0xFF8A, length = 0x0002, fill = 0xFFFF + BSLI2CADDRESS : origin = 0xFFA0, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFA2, length = 0x0002 + INT01 : origin = 0xFFA4, length = 0x0002 + INT02 : origin = 0xFFA6, length = 0x0002 + INT03 : origin = 0xFFA8, length = 0x0002 + INT04 : origin = 0xFFAA, length = 0x0002 + INT05 : origin = 0xFFAC, length = 0x0002 + INT06 : origin = 0xFFAE, length = 0x0002 + INT07 : origin = 0xFFB0, length = 0x0002 + INT08 : origin = 0xFFB2, length = 0x0002 + INT09 : origin = 0xFFB4, length = 0x0002 + INT10 : origin = 0xFFB6, length = 0x0002 + INT11 : origin = 0xFFB8, length = 0x0002 + INT12 : origin = 0xFFBA, length = 0x0002 + INT13 : origin = 0xFFBC, length = 0x0002 + INT14 : origin = 0xFFBE, length = 0x0002 + INT15 : origin = 0xFFC0, length = 0x0002 + INT16 : origin = 0xFFC2, length = 0x0002 + INT17 : origin = 0xFFC4, length = 0x0002 + INT18 : origin = 0xFFC6, length = 0x0002 + INT19 : origin = 0xFFC8, length = 0x0002 + INT20 : origin = 0xFFCA, length = 0x0002 + INT21 : origin = 0xFFCC, length = 0x0002 + INT22 : origin = 0xFFCE, length = 0x0002 + INT23 : origin = 0xFFD0, length = 0x0002 + INT24 : origin = 0xFFD2, length = 0x0002 + INT25 : origin = 0xFFD4, length = 0x0002 + INT26 : origin = 0xFFD6, length = 0x0002 + INT27 : origin = 0xFFD8, length = 0x0002 + INT28 : origin = 0xFFDA, length = 0x0002 + INT29 : origin = 0xFFDC, length = 0x0002 + INT30 : origin = 0xFFDE, length = 0x0002 + INT31 : origin = 0xFFE0, length = 0x0002 + INT32 : origin = 0xFFE2, length = 0x0002 + INT33 : origin = 0xFFE4, length = 0x0002 + INT34 : origin = 0xFFE6, length = 0x0002 + INT35 : origin = 0xFFE8, length = 0x0002 + INT36 : origin = 0xFFEA, length = 0x0002 + INT37 : origin = 0xFFEC, length = 0x0002 + INT38 : origin = 0xFFEE, length = 0x0002 + INT39 : origin = 0xFFF0, length = 0x0002 + INT40 : origin = 0xFFF2, length = 0x0002 + INT41 : origin = 0xFFF4, length = 0x0002 + INT42 : origin = 0xFFF6, length = 0x0002 + INT43 : origin = 0xFFF8, length = 0x0002 + INT44 : origin = 0xFFFA, length = 0x0002 + INT45 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) RUN_END(fram_rx_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + .text:_isr : {} /* Code ISRs */ + } + } > FRAM + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + .bslconfigsignature : {} > BSLCONFIGURATIONSIGNATURE + .bslconfig : {} > BSLCONFIGURATION + .bsli2caddress : {} > BSLI2CADDRESS + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + /* MSP430 INFO memory segments */ + .info : type = NOINIT{} > INFO + + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + ECOMP0 : { * ( .int20 ) } > INT20 type = VECT_INIT + PORT6 : { * ( .int21 ) } > INT21 type = VECT_INIT + PORT5 : { * ( .int22 ) } > INT22 type = VECT_INIT + PORT4 : { * ( .int23 ) } > INT23 type = VECT_INIT + PORT3 : { * ( .int24 ) } > INT24 type = VECT_INIT + PORT2 : { * ( .int25 ) } > INT25 type = VECT_INIT + PORT1 : { * ( .int26 ) } > INT26 type = VECT_INIT + ADC : { * ( .int27 ) } > INT27 type = VECT_INIT + EUSCI_B1 : { * ( .int28 ) } > INT28 type = VECT_INIT + EUSCI_B0 : { * ( .int29 ) } > INT29 type = VECT_INIT + EUSCI_A1 : { * ( .int30 ) } > INT30 type = VECT_INIT + EUSCI_A0 : { * ( .int31 ) } > INT31 type = VECT_INIT + WDT : { * ( .int32 ) } > INT32 type = VECT_INIT + RTC : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER0_B1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER0_B0 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER3_A1 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER3_A0 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER0_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + UNMI : { * ( .int44 ) } > INT44 type = VECT_INIT + SYSNMI : { * ( .int45 ) } > INT45 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* FRAM WRITE PROTECTION SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _FRWP_ENABLE + __mpu_enable=1; + start_protection_offset_address = (fram_rx_start - fram_rw_start) >> 10; + program_fram_protection = 0x1; + #ifdef _INFO_FRWP_ENABLE + info_fram_protection = 0x1; + #else + info_fram_protection = 0x0; + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr2475.cmd + + diff --git a/msp430/lnk_msp430fr2476.cmd b/msp430/lnk_msp430fr2476.cmd new file mode 100644 index 00000000..23152fbb --- /dev/null +++ b/msp430/lnk_msp430fr2476.cmd @@ -0,0 +1,266 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR2476 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x6, length = 0x1A + BSL0 : origin = 0x1000, length = 0x800 + INFO : origin = 0x1800, length = 0x200 + TLVMEM : origin = 0x1A00, length = 0x200 + BOOTCODE : origin = 0x1C00, length = 0x400 + RAM : origin = 0x2000, length = 0x2000 + FRAM : origin = 0x8000, length = 0x7F80 + FRAM2 : origin = 0x10000,length = 0x8000 + ROMLIB : origin = 0xC0000, length = 0x4000 + BSL1 : origin = 0xFFC00, length = 0x400 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + BSLCONFIGURATIONSIGNATURE: origin = 0xFF88, length = 0x0002, fill = 0xFFFF + BSLCONFIGURATION : origin = 0xFF8A, length = 0x0002, fill = 0xFFFF + BSLI2CADDRESS : origin = 0xFFA0, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFA2, length = 0x0002 + INT01 : origin = 0xFFA4, length = 0x0002 + INT02 : origin = 0xFFA6, length = 0x0002 + INT03 : origin = 0xFFA8, length = 0x0002 + INT04 : origin = 0xFFAA, length = 0x0002 + INT05 : origin = 0xFFAC, length = 0x0002 + INT06 : origin = 0xFFAE, length = 0x0002 + INT07 : origin = 0xFFB0, length = 0x0002 + INT08 : origin = 0xFFB2, length = 0x0002 + INT09 : origin = 0xFFB4, length = 0x0002 + INT10 : origin = 0xFFB6, length = 0x0002 + INT11 : origin = 0xFFB8, length = 0x0002 + INT12 : origin = 0xFFBA, length = 0x0002 + INT13 : origin = 0xFFBC, length = 0x0002 + INT14 : origin = 0xFFBE, length = 0x0002 + INT15 : origin = 0xFFC0, length = 0x0002 + INT16 : origin = 0xFFC2, length = 0x0002 + INT17 : origin = 0xFFC4, length = 0x0002 + INT18 : origin = 0xFFC6, length = 0x0002 + INT19 : origin = 0xFFC8, length = 0x0002 + INT20 : origin = 0xFFCA, length = 0x0002 + INT21 : origin = 0xFFCC, length = 0x0002 + INT22 : origin = 0xFFCE, length = 0x0002 + INT23 : origin = 0xFFD0, length = 0x0002 + INT24 : origin = 0xFFD2, length = 0x0002 + INT25 : origin = 0xFFD4, length = 0x0002 + INT26 : origin = 0xFFD6, length = 0x0002 + INT27 : origin = 0xFFD8, length = 0x0002 + INT28 : origin = 0xFFDA, length = 0x0002 + INT29 : origin = 0xFFDC, length = 0x0002 + INT30 : origin = 0xFFDE, length = 0x0002 + INT31 : origin = 0xFFE0, length = 0x0002 + INT32 : origin = 0xFFE2, length = 0x0002 + INT33 : origin = 0xFFE4, length = 0x0002 + INT34 : origin = 0xFFE6, length = 0x0002 + INT35 : origin = 0xFFE8, length = 0x0002 + INT36 : origin = 0xFFEA, length = 0x0002 + INT37 : origin = 0xFFEC, length = 0x0002 + INT38 : origin = 0xFFEE, length = 0x0002 + INT39 : origin = 0xFFF0, length = 0x0002 + INT40 : origin = 0xFFF2, length = 0x0002 + INT41 : origin = 0xFFF4, length = 0x0002 + INT42 : origin = 0xFFF6, length = 0x0002 + INT43 : origin = 0xFFF8, length = 0x0002 + INT44 : origin = 0xFFFA, length = 0x0002 + INT45 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) RUN_END(fram_rx_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text:_isr : {} /* Code ISRs */ + } + } > FRAM + +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + .bslconfigsignature : {} > BSLCONFIGURATIONSIGNATURE + .bslconfig : {} > BSLCONFIGURATION + .bsli2caddress : {} > BSLI2CADDRESS + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + /* MSP430 INFO memory segments */ + .info : type = NOINIT{} > INFO + + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + ECOMP0 : { * ( .int20 ) } > INT20 type = VECT_INIT + PORT6 : { * ( .int21 ) } > INT21 type = VECT_INIT + PORT5 : { * ( .int22 ) } > INT22 type = VECT_INIT + PORT4 : { * ( .int23 ) } > INT23 type = VECT_INIT + PORT3 : { * ( .int24 ) } > INT24 type = VECT_INIT + PORT2 : { * ( .int25 ) } > INT25 type = VECT_INIT + PORT1 : { * ( .int26 ) } > INT26 type = VECT_INIT + ADC : { * ( .int27 ) } > INT27 type = VECT_INIT + EUSCI_B1 : { * ( .int28 ) } > INT28 type = VECT_INIT + EUSCI_B0 : { * ( .int29 ) } > INT29 type = VECT_INIT + EUSCI_A1 : { * ( .int30 ) } > INT30 type = VECT_INIT + EUSCI_A0 : { * ( .int31 ) } > INT31 type = VECT_INIT + WDT : { * ( .int32 ) } > INT32 type = VECT_INIT + RTC : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER0_B1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER0_B0 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER3_A1 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER3_A0 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER0_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + UNMI : { * ( .int44 ) } > INT44 type = VECT_INIT + SYSNMI : { * ( .int45 ) } > INT45 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* FRAM WRITE PROTECTION SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _FRWP_ENABLE + __mpu_enable=1; + start_protection_offset_address = (fram_rx_start - fram_rw_start) >> 10; + program_fram_protection = 0x1; + #ifdef _INFO_FRWP_ENABLE + info_fram_protection = 0x1; + #else + info_fram_protection = 0x0; + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr2476.cmd + + diff --git a/msp430/lnk_msp430fr2512.cmd b/msp430/lnk_msp430fr2512.cmd new file mode 100644 index 00000000..49004433 --- /dev/null +++ b/msp430/lnk_msp430fr2512.cmd @@ -0,0 +1,250 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR2512 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + BSL0 : origin = 0x1000, length = 0x800 + INFO : origin = 0x1800, length = 0x100 + RAM : origin = 0x2000, length = 0x800 + FRAM : origin = 0xE300, length = 0x1C80 + BSL1 : origin = 0xFFC00, length = 0x400 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFF88, length = 0x0002 + INT01 : origin = 0xFF8A, length = 0x0002 + INT02 : origin = 0xFF8C, length = 0x0002 + INT03 : origin = 0xFF8E, length = 0x0002 + INT04 : origin = 0xFF90, length = 0x0002 + INT05 : origin = 0xFF92, length = 0x0002 + INT06 : origin = 0xFF94, length = 0x0002 + INT07 : origin = 0xFF96, length = 0x0002 + INT08 : origin = 0xFF98, length = 0x0002 + INT09 : origin = 0xFF9A, length = 0x0002 + INT10 : origin = 0xFF9C, length = 0x0002 + INT11 : origin = 0xFF9E, length = 0x0002 + INT12 : origin = 0xFFA0, length = 0x0002 + INT13 : origin = 0xFFA2, length = 0x0002 + INT14 : origin = 0xFFA4, length = 0x0002 + INT15 : origin = 0xFFA6, length = 0x0002 + INT16 : origin = 0xFFA8, length = 0x0002 + INT17 : origin = 0xFFAA, length = 0x0002 + INT18 : origin = 0xFFAC, length = 0x0002 + INT19 : origin = 0xFFAE, length = 0x0002 + INT20 : origin = 0xFFB0, length = 0x0002 + INT21 : origin = 0xFFB2, length = 0x0002 + INT22 : origin = 0xFFB4, length = 0x0002 + INT23 : origin = 0xFFB6, length = 0x0002 + INT24 : origin = 0xFFB8, length = 0x0002 + INT25 : origin = 0xFFBA, length = 0x0002 + INT26 : origin = 0xFFBC, length = 0x0002 + INT27 : origin = 0xFFBE, length = 0x0002 + INT28 : origin = 0xFFC0, length = 0x0002 + INT29 : origin = 0xFFC2, length = 0x0002 + INT30 : origin = 0xFFC4, length = 0x0002 + INT31 : origin = 0xFFC6, length = 0x0002 + INT32 : origin = 0xFFC8, length = 0x0002 + INT33 : origin = 0xFFCA, length = 0x0002 + INT34 : origin = 0xFFCC, length = 0x0002 + INT35 : origin = 0xFFCE, length = 0x0002 + INT36 : origin = 0xFFD0, length = 0x0002 + INT37 : origin = 0xFFD2, length = 0x0002 + INT38 : origin = 0xFFD4, length = 0x0002 + INT39 : origin = 0xFFD6, length = 0x0002 + INT40 : origin = 0xFFD8, length = 0x0002 + INT41 : origin = 0xFFDA, length = 0x0002 + INT42 : origin = 0xFFDC, length = 0x0002 + INT43 : origin = 0xFFDE, length = 0x0002 + INT44 : origin = 0xFFE0, length = 0x0002 + INT45 : origin = 0xFFE2, length = 0x0002 + INT46 : origin = 0xFFE4, length = 0x0002 + INT47 : origin = 0xFFE6, length = 0x0002 + INT48 : origin = 0xFFE8, length = 0x0002 + INT49 : origin = 0xFFEA, length = 0x0002 + INT50 : origin = 0xFFEC, length = 0x0002 + INT51 : origin = 0xFFEE, length = 0x0002 + INT52 : origin = 0xFFF0, length = 0x0002 + INT53 : origin = 0xFFF2, length = 0x0002 + INT54 : origin = 0xFFF4, length = 0x0002 + INT55 : origin = 0xFFF6, length = 0x0002 + INT56 : origin = 0xFFF8, length = 0x0002 + INT57 : origin = 0xFFFA, length = 0x0002 + INT58 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + } + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + .text:_isr : {} /* Code ISRs */ + } + } > FRAM + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + .cio : {} > RAM /* C I/O buffer */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + /* MSP430 INFO memory segments */ + .info : type = NOINIT{} > INFO + + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + CAPTIVATE : { * ( .int45 ) } > INT45 type = VECT_INIT + PORT2 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + ADC : { * ( .int48 ) } > INT48 type = VECT_INIT + EUSCI_B0 : { * ( .int49 ) } > INT49 type = VECT_INIT + EUSCI_A0 : { * ( .int50 ) } > INT50 type = VECT_INIT + WDT : { * ( .int51 ) } > INT51 type = VECT_INIT + RTC : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER1_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER1_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A1 : { * ( .int55 ) } > INT55 type = VECT_INIT + TIMER0_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + UNMI : { * ( .int57 ) } > INT57 type = VECT_INIT + SYSNMI : { * ( .int58 ) } > INT58 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr2512.cmd + + diff --git a/msp430/lnk_msp430fr2522.cmd b/msp430/lnk_msp430fr2522.cmd new file mode 100644 index 00000000..0b11af86 --- /dev/null +++ b/msp430/lnk_msp430fr2522.cmd @@ -0,0 +1,250 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR2522 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + BSL0 : origin = 0x1000, length = 0x800 + INFO : origin = 0x1800, length = 0x100 + RAM : origin = 0x2000, length = 0x800 + FRAM : origin = 0xE300, length = 0x1C80 + BSL1 : origin = 0xFFC00, length = 0x400 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFF88, length = 0x0002 + INT01 : origin = 0xFF8A, length = 0x0002 + INT02 : origin = 0xFF8C, length = 0x0002 + INT03 : origin = 0xFF8E, length = 0x0002 + INT04 : origin = 0xFF90, length = 0x0002 + INT05 : origin = 0xFF92, length = 0x0002 + INT06 : origin = 0xFF94, length = 0x0002 + INT07 : origin = 0xFF96, length = 0x0002 + INT08 : origin = 0xFF98, length = 0x0002 + INT09 : origin = 0xFF9A, length = 0x0002 + INT10 : origin = 0xFF9C, length = 0x0002 + INT11 : origin = 0xFF9E, length = 0x0002 + INT12 : origin = 0xFFA0, length = 0x0002 + INT13 : origin = 0xFFA2, length = 0x0002 + INT14 : origin = 0xFFA4, length = 0x0002 + INT15 : origin = 0xFFA6, length = 0x0002 + INT16 : origin = 0xFFA8, length = 0x0002 + INT17 : origin = 0xFFAA, length = 0x0002 + INT18 : origin = 0xFFAC, length = 0x0002 + INT19 : origin = 0xFFAE, length = 0x0002 + INT20 : origin = 0xFFB0, length = 0x0002 + INT21 : origin = 0xFFB2, length = 0x0002 + INT22 : origin = 0xFFB4, length = 0x0002 + INT23 : origin = 0xFFB6, length = 0x0002 + INT24 : origin = 0xFFB8, length = 0x0002 + INT25 : origin = 0xFFBA, length = 0x0002 + INT26 : origin = 0xFFBC, length = 0x0002 + INT27 : origin = 0xFFBE, length = 0x0002 + INT28 : origin = 0xFFC0, length = 0x0002 + INT29 : origin = 0xFFC2, length = 0x0002 + INT30 : origin = 0xFFC4, length = 0x0002 + INT31 : origin = 0xFFC6, length = 0x0002 + INT32 : origin = 0xFFC8, length = 0x0002 + INT33 : origin = 0xFFCA, length = 0x0002 + INT34 : origin = 0xFFCC, length = 0x0002 + INT35 : origin = 0xFFCE, length = 0x0002 + INT36 : origin = 0xFFD0, length = 0x0002 + INT37 : origin = 0xFFD2, length = 0x0002 + INT38 : origin = 0xFFD4, length = 0x0002 + INT39 : origin = 0xFFD6, length = 0x0002 + INT40 : origin = 0xFFD8, length = 0x0002 + INT41 : origin = 0xFFDA, length = 0x0002 + INT42 : origin = 0xFFDC, length = 0x0002 + INT43 : origin = 0xFFDE, length = 0x0002 + INT44 : origin = 0xFFE0, length = 0x0002 + INT45 : origin = 0xFFE2, length = 0x0002 + INT46 : origin = 0xFFE4, length = 0x0002 + INT47 : origin = 0xFFE6, length = 0x0002 + INT48 : origin = 0xFFE8, length = 0x0002 + INT49 : origin = 0xFFEA, length = 0x0002 + INT50 : origin = 0xFFEC, length = 0x0002 + INT51 : origin = 0xFFEE, length = 0x0002 + INT52 : origin = 0xFFF0, length = 0x0002 + INT53 : origin = 0xFFF2, length = 0x0002 + INT54 : origin = 0xFFF4, length = 0x0002 + INT55 : origin = 0xFFF6, length = 0x0002 + INT56 : origin = 0xFFF8, length = 0x0002 + INT57 : origin = 0xFFFA, length = 0x0002 + INT58 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + } + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + .text:_isr : {} /* Code ISRs */ + } + } > FRAM + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + .cio : {} > RAM /* C I/O buffer */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + /* MSP430 INFO memory segments */ + .info : type = NOINIT{} > INFO + + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + CAPTIVATE : { * ( .int45 ) } > INT45 type = VECT_INIT + PORT2 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + ADC : { * ( .int48 ) } > INT48 type = VECT_INIT + EUSCI_B0 : { * ( .int49 ) } > INT49 type = VECT_INIT + EUSCI_A0 : { * ( .int50 ) } > INT50 type = VECT_INIT + WDT : { * ( .int51 ) } > INT51 type = VECT_INIT + RTC : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER1_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER1_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A1 : { * ( .int55 ) } > INT55 type = VECT_INIT + TIMER0_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + UNMI : { * ( .int57 ) } > INT57 type = VECT_INIT + SYSNMI : { * ( .int58 ) } > INT58 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr2522.cmd + + diff --git a/msp430/lnk_msp430fr2532.cmd b/msp430/lnk_msp430fr2532.cmd new file mode 100644 index 00000000..18f04b65 --- /dev/null +++ b/msp430/lnk_msp430fr2532.cmd @@ -0,0 +1,246 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr2532.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR2532 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2000, length = 0x0400 + INFOA : origin = 0x1800, length = 0x0200 + FRAM : origin = 0xE000, length = 0x1F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFF88, length = 0x0002 + INT01 : origin = 0xFF8A, length = 0x0002 + INT02 : origin = 0xFF8C, length = 0x0002 + INT03 : origin = 0xFF8E, length = 0x0002 + INT04 : origin = 0xFF90, length = 0x0002 + INT05 : origin = 0xFF92, length = 0x0002 + INT06 : origin = 0xFF94, length = 0x0002 + INT07 : origin = 0xFF96, length = 0x0002 + INT08 : origin = 0xFF98, length = 0x0002 + INT09 : origin = 0xFF9A, length = 0x0002 + INT10 : origin = 0xFF9C, length = 0x0002 + INT11 : origin = 0xFF9E, length = 0x0002 + INT12 : origin = 0xFFA0, length = 0x0002 + INT13 : origin = 0xFFA2, length = 0x0002 + INT14 : origin = 0xFFA4, length = 0x0002 + INT15 : origin = 0xFFA6, length = 0x0002 + INT16 : origin = 0xFFA8, length = 0x0002 + INT17 : origin = 0xFFAA, length = 0x0002 + INT18 : origin = 0xFFAC, length = 0x0002 + INT19 : origin = 0xFFAE, length = 0x0002 + INT20 : origin = 0xFFB0, length = 0x0002 + INT21 : origin = 0xFFB2, length = 0x0002 + INT22 : origin = 0xFFB4, length = 0x0002 + INT23 : origin = 0xFFB6, length = 0x0002 + INT24 : origin = 0xFFB8, length = 0x0002 + INT25 : origin = 0xFFBA, length = 0x0002 + INT26 : origin = 0xFFBC, length = 0x0002 + INT27 : origin = 0xFFBE, length = 0x0002 + INT28 : origin = 0xFFC0, length = 0x0002 + INT29 : origin = 0xFFC2, length = 0x0002 + INT30 : origin = 0xFFC4, length = 0x0002 + INT31 : origin = 0xFFC6, length = 0x0002 + INT32 : origin = 0xFFC8, length = 0x0002 + INT33 : origin = 0xFFCA, length = 0x0002 + INT34 : origin = 0xFFCC, length = 0x0002 + INT35 : origin = 0xFFCE, length = 0x0002 + INT36 : origin = 0xFFD0, length = 0x0002 + INT37 : origin = 0xFFD2, length = 0x0002 + INT38 : origin = 0xFFD4, length = 0x0002 + INT39 : origin = 0xFFD6, length = 0x0002 + INT40 : origin = 0xFFD8, length = 0x0002 + INT41 : origin = 0xFFDA, length = 0x0002 + INT42 : origin = 0xFFDC, length = 0x0002 + INT43 : origin = 0xFFDE, length = 0x0002 + INT44 : origin = 0xFFE0, length = 0x0002 + INT45 : origin = 0xFFE2, length = 0x0002 + INT46 : origin = 0xFFE4, length = 0x0002 + INT47 : origin = 0xFFE6, length = 0x0002 + INT48 : origin = 0xFFE8, length = 0x0002 + INT49 : origin = 0xFFEA, length = 0x0002 + INT50 : origin = 0xFFEC, length = 0x0002 + INT51 : origin = 0xFFEE, length = 0x0002 + INT52 : origin = 0xFFF0, length = 0x0002 + INT53 : origin = 0xFFF2, length = 0x0002 + INT54 : origin = 0xFFF4, length = 0x0002 + INT55 : origin = 0xFFF6, length = 0x0002 + INT56 : origin = 0xFFF8, length = 0x0002 + INT57 : origin = 0xFFFA, length = 0x0002 + INT58 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + } + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .cio : {} > RAM /* C I/O buffer */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + CAPTIVATE : { * ( .int40 ) } > INT40 type = VECT_INIT + PORT2 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT1 : { * ( .int42 ) } > INT42 type = VECT_INIT + ADC : { * ( .int43 ) } > INT43 type = VECT_INIT + USCI_B0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + WDT : { * ( .int47 ) } > INT47 type = VECT_INIT + RTC : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER3_A1 : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER3_A0 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER2_A1 : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER2_A0 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER1_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER1_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A1 : { * ( .int55 ) } > INT55 type = VECT_INIT + TIMER0_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + UNMI : { * ( .int57 ) } > INT57 type = VECT_INIT + SYSNMI : { * ( .int58 ) } > INT58 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr2532.cmd + diff --git a/msp430/lnk_msp430fr2533.cmd b/msp430/lnk_msp430fr2533.cmd new file mode 100644 index 00000000..3cb37597 --- /dev/null +++ b/msp430/lnk_msp430fr2533.cmd @@ -0,0 +1,246 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr2533.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR2533 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2000, length = 0x0800 + INFOA : origin = 0x1800, length = 0x0200 + FRAM : origin = 0xC400, length = 0x3B80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFF88, length = 0x0002 + INT01 : origin = 0xFF8A, length = 0x0002 + INT02 : origin = 0xFF8C, length = 0x0002 + INT03 : origin = 0xFF8E, length = 0x0002 + INT04 : origin = 0xFF90, length = 0x0002 + INT05 : origin = 0xFF92, length = 0x0002 + INT06 : origin = 0xFF94, length = 0x0002 + INT07 : origin = 0xFF96, length = 0x0002 + INT08 : origin = 0xFF98, length = 0x0002 + INT09 : origin = 0xFF9A, length = 0x0002 + INT10 : origin = 0xFF9C, length = 0x0002 + INT11 : origin = 0xFF9E, length = 0x0002 + INT12 : origin = 0xFFA0, length = 0x0002 + INT13 : origin = 0xFFA2, length = 0x0002 + INT14 : origin = 0xFFA4, length = 0x0002 + INT15 : origin = 0xFFA6, length = 0x0002 + INT16 : origin = 0xFFA8, length = 0x0002 + INT17 : origin = 0xFFAA, length = 0x0002 + INT18 : origin = 0xFFAC, length = 0x0002 + INT19 : origin = 0xFFAE, length = 0x0002 + INT20 : origin = 0xFFB0, length = 0x0002 + INT21 : origin = 0xFFB2, length = 0x0002 + INT22 : origin = 0xFFB4, length = 0x0002 + INT23 : origin = 0xFFB6, length = 0x0002 + INT24 : origin = 0xFFB8, length = 0x0002 + INT25 : origin = 0xFFBA, length = 0x0002 + INT26 : origin = 0xFFBC, length = 0x0002 + INT27 : origin = 0xFFBE, length = 0x0002 + INT28 : origin = 0xFFC0, length = 0x0002 + INT29 : origin = 0xFFC2, length = 0x0002 + INT30 : origin = 0xFFC4, length = 0x0002 + INT31 : origin = 0xFFC6, length = 0x0002 + INT32 : origin = 0xFFC8, length = 0x0002 + INT33 : origin = 0xFFCA, length = 0x0002 + INT34 : origin = 0xFFCC, length = 0x0002 + INT35 : origin = 0xFFCE, length = 0x0002 + INT36 : origin = 0xFFD0, length = 0x0002 + INT37 : origin = 0xFFD2, length = 0x0002 + INT38 : origin = 0xFFD4, length = 0x0002 + INT39 : origin = 0xFFD6, length = 0x0002 + INT40 : origin = 0xFFD8, length = 0x0002 + INT41 : origin = 0xFFDA, length = 0x0002 + INT42 : origin = 0xFFDC, length = 0x0002 + INT43 : origin = 0xFFDE, length = 0x0002 + INT44 : origin = 0xFFE0, length = 0x0002 + INT45 : origin = 0xFFE2, length = 0x0002 + INT46 : origin = 0xFFE4, length = 0x0002 + INT47 : origin = 0xFFE6, length = 0x0002 + INT48 : origin = 0xFFE8, length = 0x0002 + INT49 : origin = 0xFFEA, length = 0x0002 + INT50 : origin = 0xFFEC, length = 0x0002 + INT51 : origin = 0xFFEE, length = 0x0002 + INT52 : origin = 0xFFF0, length = 0x0002 + INT53 : origin = 0xFFF2, length = 0x0002 + INT54 : origin = 0xFFF4, length = 0x0002 + INT55 : origin = 0xFFF6, length = 0x0002 + INT56 : origin = 0xFFF8, length = 0x0002 + INT57 : origin = 0xFFFA, length = 0x0002 + INT58 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + } + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .cio : {} > RAM /* C I/O buffer */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + CAPTIVATE : { * ( .int40 ) } > INT40 type = VECT_INIT + PORT2 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT1 : { * ( .int42 ) } > INT42 type = VECT_INIT + ADC : { * ( .int43 ) } > INT43 type = VECT_INIT + USCI_B0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + WDT : { * ( .int47 ) } > INT47 type = VECT_INIT + RTC : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER3_A1 : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER3_A0 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER2_A1 : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER2_A0 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER1_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER1_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A1 : { * ( .int55 ) } > INT55 type = VECT_INIT + TIMER0_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + UNMI : { * ( .int57 ) } > INT57 type = VECT_INIT + SYSNMI : { * ( .int58 ) } > INT58 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr2533.cmd + diff --git a/msp430/lnk_msp430fr2632.cmd b/msp430/lnk_msp430fr2632.cmd new file mode 100644 index 00000000..c4cfd94d --- /dev/null +++ b/msp430/lnk_msp430fr2632.cmd @@ -0,0 +1,246 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr2632.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR2632 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2000, length = 0x0800 + INFOA : origin = 0x1800, length = 0x0200 + FRAM : origin = 0xE000, length = 0x1F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFF88, length = 0x0002 + INT01 : origin = 0xFF8A, length = 0x0002 + INT02 : origin = 0xFF8C, length = 0x0002 + INT03 : origin = 0xFF8E, length = 0x0002 + INT04 : origin = 0xFF90, length = 0x0002 + INT05 : origin = 0xFF92, length = 0x0002 + INT06 : origin = 0xFF94, length = 0x0002 + INT07 : origin = 0xFF96, length = 0x0002 + INT08 : origin = 0xFF98, length = 0x0002 + INT09 : origin = 0xFF9A, length = 0x0002 + INT10 : origin = 0xFF9C, length = 0x0002 + INT11 : origin = 0xFF9E, length = 0x0002 + INT12 : origin = 0xFFA0, length = 0x0002 + INT13 : origin = 0xFFA2, length = 0x0002 + INT14 : origin = 0xFFA4, length = 0x0002 + INT15 : origin = 0xFFA6, length = 0x0002 + INT16 : origin = 0xFFA8, length = 0x0002 + INT17 : origin = 0xFFAA, length = 0x0002 + INT18 : origin = 0xFFAC, length = 0x0002 + INT19 : origin = 0xFFAE, length = 0x0002 + INT20 : origin = 0xFFB0, length = 0x0002 + INT21 : origin = 0xFFB2, length = 0x0002 + INT22 : origin = 0xFFB4, length = 0x0002 + INT23 : origin = 0xFFB6, length = 0x0002 + INT24 : origin = 0xFFB8, length = 0x0002 + INT25 : origin = 0xFFBA, length = 0x0002 + INT26 : origin = 0xFFBC, length = 0x0002 + INT27 : origin = 0xFFBE, length = 0x0002 + INT28 : origin = 0xFFC0, length = 0x0002 + INT29 : origin = 0xFFC2, length = 0x0002 + INT30 : origin = 0xFFC4, length = 0x0002 + INT31 : origin = 0xFFC6, length = 0x0002 + INT32 : origin = 0xFFC8, length = 0x0002 + INT33 : origin = 0xFFCA, length = 0x0002 + INT34 : origin = 0xFFCC, length = 0x0002 + INT35 : origin = 0xFFCE, length = 0x0002 + INT36 : origin = 0xFFD0, length = 0x0002 + INT37 : origin = 0xFFD2, length = 0x0002 + INT38 : origin = 0xFFD4, length = 0x0002 + INT39 : origin = 0xFFD6, length = 0x0002 + INT40 : origin = 0xFFD8, length = 0x0002 + INT41 : origin = 0xFFDA, length = 0x0002 + INT42 : origin = 0xFFDC, length = 0x0002 + INT43 : origin = 0xFFDE, length = 0x0002 + INT44 : origin = 0xFFE0, length = 0x0002 + INT45 : origin = 0xFFE2, length = 0x0002 + INT46 : origin = 0xFFE4, length = 0x0002 + INT47 : origin = 0xFFE6, length = 0x0002 + INT48 : origin = 0xFFE8, length = 0x0002 + INT49 : origin = 0xFFEA, length = 0x0002 + INT50 : origin = 0xFFEC, length = 0x0002 + INT51 : origin = 0xFFEE, length = 0x0002 + INT52 : origin = 0xFFF0, length = 0x0002 + INT53 : origin = 0xFFF2, length = 0x0002 + INT54 : origin = 0xFFF4, length = 0x0002 + INT55 : origin = 0xFFF6, length = 0x0002 + INT56 : origin = 0xFFF8, length = 0x0002 + INT57 : origin = 0xFFFA, length = 0x0002 + INT58 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + } + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .cio : {} > RAM /* C I/O buffer */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + CAPTIVATE : { * ( .int40 ) } > INT40 type = VECT_INIT + PORT2 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT1 : { * ( .int42 ) } > INT42 type = VECT_INIT + ADC : { * ( .int43 ) } > INT43 type = VECT_INIT + USCI_B0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + WDT : { * ( .int47 ) } > INT47 type = VECT_INIT + RTC : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER3_A1 : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER3_A0 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER2_A1 : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER2_A0 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER1_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER1_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A1 : { * ( .int55 ) } > INT55 type = VECT_INIT + TIMER0_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + UNMI : { * ( .int57 ) } > INT57 type = VECT_INIT + SYSNMI : { * ( .int58 ) } > INT58 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr2632.cmd + diff --git a/msp430/lnk_msp430fr2633.cmd b/msp430/lnk_msp430fr2633.cmd new file mode 100644 index 00000000..eb5349c3 --- /dev/null +++ b/msp430/lnk_msp430fr2633.cmd @@ -0,0 +1,246 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr2633.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR2633 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2000, length = 0x1000 + INFOA : origin = 0x1800, length = 0x0200 + FRAM : origin = 0xC400, length = 0x3B80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFF88, length = 0x0002 + INT01 : origin = 0xFF8A, length = 0x0002 + INT02 : origin = 0xFF8C, length = 0x0002 + INT03 : origin = 0xFF8E, length = 0x0002 + INT04 : origin = 0xFF90, length = 0x0002 + INT05 : origin = 0xFF92, length = 0x0002 + INT06 : origin = 0xFF94, length = 0x0002 + INT07 : origin = 0xFF96, length = 0x0002 + INT08 : origin = 0xFF98, length = 0x0002 + INT09 : origin = 0xFF9A, length = 0x0002 + INT10 : origin = 0xFF9C, length = 0x0002 + INT11 : origin = 0xFF9E, length = 0x0002 + INT12 : origin = 0xFFA0, length = 0x0002 + INT13 : origin = 0xFFA2, length = 0x0002 + INT14 : origin = 0xFFA4, length = 0x0002 + INT15 : origin = 0xFFA6, length = 0x0002 + INT16 : origin = 0xFFA8, length = 0x0002 + INT17 : origin = 0xFFAA, length = 0x0002 + INT18 : origin = 0xFFAC, length = 0x0002 + INT19 : origin = 0xFFAE, length = 0x0002 + INT20 : origin = 0xFFB0, length = 0x0002 + INT21 : origin = 0xFFB2, length = 0x0002 + INT22 : origin = 0xFFB4, length = 0x0002 + INT23 : origin = 0xFFB6, length = 0x0002 + INT24 : origin = 0xFFB8, length = 0x0002 + INT25 : origin = 0xFFBA, length = 0x0002 + INT26 : origin = 0xFFBC, length = 0x0002 + INT27 : origin = 0xFFBE, length = 0x0002 + INT28 : origin = 0xFFC0, length = 0x0002 + INT29 : origin = 0xFFC2, length = 0x0002 + INT30 : origin = 0xFFC4, length = 0x0002 + INT31 : origin = 0xFFC6, length = 0x0002 + INT32 : origin = 0xFFC8, length = 0x0002 + INT33 : origin = 0xFFCA, length = 0x0002 + INT34 : origin = 0xFFCC, length = 0x0002 + INT35 : origin = 0xFFCE, length = 0x0002 + INT36 : origin = 0xFFD0, length = 0x0002 + INT37 : origin = 0xFFD2, length = 0x0002 + INT38 : origin = 0xFFD4, length = 0x0002 + INT39 : origin = 0xFFD6, length = 0x0002 + INT40 : origin = 0xFFD8, length = 0x0002 + INT41 : origin = 0xFFDA, length = 0x0002 + INT42 : origin = 0xFFDC, length = 0x0002 + INT43 : origin = 0xFFDE, length = 0x0002 + INT44 : origin = 0xFFE0, length = 0x0002 + INT45 : origin = 0xFFE2, length = 0x0002 + INT46 : origin = 0xFFE4, length = 0x0002 + INT47 : origin = 0xFFE6, length = 0x0002 + INT48 : origin = 0xFFE8, length = 0x0002 + INT49 : origin = 0xFFEA, length = 0x0002 + INT50 : origin = 0xFFEC, length = 0x0002 + INT51 : origin = 0xFFEE, length = 0x0002 + INT52 : origin = 0xFFF0, length = 0x0002 + INT53 : origin = 0xFFF2, length = 0x0002 + INT54 : origin = 0xFFF4, length = 0x0002 + INT55 : origin = 0xFFF6, length = 0x0002 + INT56 : origin = 0xFFF8, length = 0x0002 + INT57 : origin = 0xFFFA, length = 0x0002 + INT58 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + } + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .cio : {} > RAM /* C I/O buffer */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + CAPTIVATE : { * ( .int40 ) } > INT40 type = VECT_INIT + PORT2 : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT1 : { * ( .int42 ) } > INT42 type = VECT_INIT + ADC : { * ( .int43 ) } > INT43 type = VECT_INIT + USCI_B0 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_A1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A0 : { * ( .int46 ) } > INT46 type = VECT_INIT + WDT : { * ( .int47 ) } > INT47 type = VECT_INIT + RTC : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER3_A1 : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER3_A0 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER2_A1 : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER2_A0 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER1_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER1_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A1 : { * ( .int55 ) } > INT55 type = VECT_INIT + TIMER0_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + UNMI : { * ( .int57 ) } > INT57 type = VECT_INIT + SYSNMI : { * ( .int58 ) } > INT58 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr2633.cmd + diff --git a/msp430/lnk_msp430fr2672.cmd b/msp430/lnk_msp430fr2672.cmd new file mode 100644 index 00000000..be858c6d --- /dev/null +++ b/msp430/lnk_msp430fr2672.cmd @@ -0,0 +1,250 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR2672 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x6, length = 0x1A + BSL0 : origin = 0x1000, length = 0x800 + INFO : origin = 0x1800, length = 0x200 + TLVMEM : origin = 0x1A00, length = 0x200 + BOOTCODE : origin = 0x1C00, length = 0x400 + RAM : origin = 0x2000, length = 0x800 + FRAM : origin = 0xE000, length = 0x1F80 + ROMLIB : origin = 0xC0000, length = 0x4000 + BSL1 : origin = 0xFFC00, length = 0x400 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + BSLCONFIGURATIONSIGNATURE: origin = 0xFF88, length = 0x0002, fill = 0xFFFF + BSLCONFIGURATION : origin = 0xFF8A, length = 0x0002, fill = 0xFFFF + BSLI2CADDRESS : origin = 0xFFA0, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFA2, length = 0x0002 + INT01 : origin = 0xFFA4, length = 0x0002 + INT02 : origin = 0xFFA6, length = 0x0002 + INT03 : origin = 0xFFA8, length = 0x0002 + INT04 : origin = 0xFFAA, length = 0x0002 + INT05 : origin = 0xFFAC, length = 0x0002 + INT06 : origin = 0xFFAE, length = 0x0002 + INT07 : origin = 0xFFB0, length = 0x0002 + INT08 : origin = 0xFFB2, length = 0x0002 + INT09 : origin = 0xFFB4, length = 0x0002 + INT10 : origin = 0xFFB6, length = 0x0002 + INT11 : origin = 0xFFB8, length = 0x0002 + INT12 : origin = 0xFFBA, length = 0x0002 + INT13 : origin = 0xFFBC, length = 0x0002 + INT14 : origin = 0xFFBE, length = 0x0002 + INT15 : origin = 0xFFC0, length = 0x0002 + INT16 : origin = 0xFFC2, length = 0x0002 + INT17 : origin = 0xFFC4, length = 0x0002 + INT18 : origin = 0xFFC6, length = 0x0002 + INT19 : origin = 0xFFC8, length = 0x0002 + INT20 : origin = 0xFFCA, length = 0x0002 + INT21 : origin = 0xFFCC, length = 0x0002 + INT22 : origin = 0xFFCE, length = 0x0002 + INT23 : origin = 0xFFD0, length = 0x0002 + INT24 : origin = 0xFFD2, length = 0x0002 + INT25 : origin = 0xFFD4, length = 0x0002 + INT26 : origin = 0xFFD6, length = 0x0002 + INT27 : origin = 0xFFD8, length = 0x0002 + INT28 : origin = 0xFFDA, length = 0x0002 + INT29 : origin = 0xFFDC, length = 0x0002 + INT30 : origin = 0xFFDE, length = 0x0002 + INT31 : origin = 0xFFE0, length = 0x0002 + INT32 : origin = 0xFFE2, length = 0x0002 + INT33 : origin = 0xFFE4, length = 0x0002 + INT34 : origin = 0xFFE6, length = 0x0002 + INT35 : origin = 0xFFE8, length = 0x0002 + INT36 : origin = 0xFFEA, length = 0x0002 + INT37 : origin = 0xFFEC, length = 0x0002 + INT38 : origin = 0xFFEE, length = 0x0002 + INT39 : origin = 0xFFF0, length = 0x0002 + INT40 : origin = 0xFFF2, length = 0x0002 + INT41 : origin = 0xFFF4, length = 0x0002 + INT42 : origin = 0xFFF6, length = 0x0002 + INT43 : origin = 0xFFF8, length = 0x0002 + INT44 : origin = 0xFFFA, length = 0x0002 + INT45 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) RUN_END(fram_rx_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + .text:_isr : {} /* Code ISRs */ + } + } > FRAM + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + .bslconfigsignature : {} > BSLCONFIGURATIONSIGNATURE + .bslconfig : {} > BSLCONFIGURATION + .bsli2caddress : {} > BSLI2CADDRESS + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + /* MSP430 INFO memory segments */ + .info : type = NOINIT{} > INFO + + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + CAPTIVATE : { * ( .int19 ) } > INT19 type = VECT_INIT + ECOMP0 : { * ( .int20 ) } > INT20 type = VECT_INIT + PORT6 : { * ( .int21 ) } > INT21 type = VECT_INIT + PORT5 : { * ( .int22 ) } > INT22 type = VECT_INIT + PORT4 : { * ( .int23 ) } > INT23 type = VECT_INIT + PORT3 : { * ( .int24 ) } > INT24 type = VECT_INIT + PORT2 : { * ( .int25 ) } > INT25 type = VECT_INIT + PORT1 : { * ( .int26 ) } > INT26 type = VECT_INIT + ADC : { * ( .int27 ) } > INT27 type = VECT_INIT + EUSCI_B1 : { * ( .int28 ) } > INT28 type = VECT_INIT + EUSCI_B0 : { * ( .int29 ) } > INT29 type = VECT_INIT + EUSCI_A1 : { * ( .int30 ) } > INT30 type = VECT_INIT + EUSCI_A0 : { * ( .int31 ) } > INT31 type = VECT_INIT + WDT : { * ( .int32 ) } > INT32 type = VECT_INIT + RTC : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER0_B1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER0_B0 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER3_A1 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER3_A0 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER0_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + UNMI : { * ( .int44 ) } > INT44 type = VECT_INIT + SYSNMI : { * ( .int45 ) } > INT45 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* FRAM WRITE PROTECTION SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _FRWP_ENABLE + __mpu_enable=1; + start_protection_offset_address = (fram_rx_start - fram_rw_start) >> 10; + program_fram_protection = 0x1; + #ifdef _INFO_FRWP_ENABLE + info_fram_protection = 0x1; + #else + info_fram_protection = 0x0; + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr2672.cmd + + diff --git a/msp430/lnk_msp430fr2673.cmd b/msp430/lnk_msp430fr2673.cmd new file mode 100644 index 00000000..a84984aa --- /dev/null +++ b/msp430/lnk_msp430fr2673.cmd @@ -0,0 +1,250 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR2673 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x6, length = 0x1A + BSL0 : origin = 0x1000, length = 0x800 + INFO : origin = 0x1800, length = 0x200 + TLVMEM : origin = 0x1A00, length = 0x200 + BOOTCODE : origin = 0x1C00, length = 0x400 + RAM : origin = 0x2000, length = 0x1000 + FRAM : origin = 0xC000, length = 0x3F80 + ROMLIB : origin = 0xC0000, length = 0x4000 + BSL1 : origin = 0xFFC00, length = 0x400 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + BSLCONFIGURATIONSIGNATURE: origin = 0xFF88, length = 0x0002, fill = 0xFFFF + BSLCONFIGURATION : origin = 0xFF8A, length = 0x0002, fill = 0xFFFF + BSLI2CADDRESS : origin = 0xFFA0, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFA2, length = 0x0002 + INT01 : origin = 0xFFA4, length = 0x0002 + INT02 : origin = 0xFFA6, length = 0x0002 + INT03 : origin = 0xFFA8, length = 0x0002 + INT04 : origin = 0xFFAA, length = 0x0002 + INT05 : origin = 0xFFAC, length = 0x0002 + INT06 : origin = 0xFFAE, length = 0x0002 + INT07 : origin = 0xFFB0, length = 0x0002 + INT08 : origin = 0xFFB2, length = 0x0002 + INT09 : origin = 0xFFB4, length = 0x0002 + INT10 : origin = 0xFFB6, length = 0x0002 + INT11 : origin = 0xFFB8, length = 0x0002 + INT12 : origin = 0xFFBA, length = 0x0002 + INT13 : origin = 0xFFBC, length = 0x0002 + INT14 : origin = 0xFFBE, length = 0x0002 + INT15 : origin = 0xFFC0, length = 0x0002 + INT16 : origin = 0xFFC2, length = 0x0002 + INT17 : origin = 0xFFC4, length = 0x0002 + INT18 : origin = 0xFFC6, length = 0x0002 + INT19 : origin = 0xFFC8, length = 0x0002 + INT20 : origin = 0xFFCA, length = 0x0002 + INT21 : origin = 0xFFCC, length = 0x0002 + INT22 : origin = 0xFFCE, length = 0x0002 + INT23 : origin = 0xFFD0, length = 0x0002 + INT24 : origin = 0xFFD2, length = 0x0002 + INT25 : origin = 0xFFD4, length = 0x0002 + INT26 : origin = 0xFFD6, length = 0x0002 + INT27 : origin = 0xFFD8, length = 0x0002 + INT28 : origin = 0xFFDA, length = 0x0002 + INT29 : origin = 0xFFDC, length = 0x0002 + INT30 : origin = 0xFFDE, length = 0x0002 + INT31 : origin = 0xFFE0, length = 0x0002 + INT32 : origin = 0xFFE2, length = 0x0002 + INT33 : origin = 0xFFE4, length = 0x0002 + INT34 : origin = 0xFFE6, length = 0x0002 + INT35 : origin = 0xFFE8, length = 0x0002 + INT36 : origin = 0xFFEA, length = 0x0002 + INT37 : origin = 0xFFEC, length = 0x0002 + INT38 : origin = 0xFFEE, length = 0x0002 + INT39 : origin = 0xFFF0, length = 0x0002 + INT40 : origin = 0xFFF2, length = 0x0002 + INT41 : origin = 0xFFF4, length = 0x0002 + INT42 : origin = 0xFFF6, length = 0x0002 + INT43 : origin = 0xFFF8, length = 0x0002 + INT44 : origin = 0xFFFA, length = 0x0002 + INT45 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) RUN_END(fram_rx_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + .text:_isr : {} /* Code ISRs */ + } + } > FRAM + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + .bslconfigsignature : {} > BSLCONFIGURATIONSIGNATURE + .bslconfig : {} > BSLCONFIGURATION + .bsli2caddress : {} > BSLI2CADDRESS + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + /* MSP430 INFO memory segments */ + .info : type = NOINIT{} > INFO + + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + CAPTIVATE : { * ( .int19 ) } > INT19 type = VECT_INIT + ECOMP0 : { * ( .int20 ) } > INT20 type = VECT_INIT + PORT6 : { * ( .int21 ) } > INT21 type = VECT_INIT + PORT5 : { * ( .int22 ) } > INT22 type = VECT_INIT + PORT4 : { * ( .int23 ) } > INT23 type = VECT_INIT + PORT3 : { * ( .int24 ) } > INT24 type = VECT_INIT + PORT2 : { * ( .int25 ) } > INT25 type = VECT_INIT + PORT1 : { * ( .int26 ) } > INT26 type = VECT_INIT + ADC : { * ( .int27 ) } > INT27 type = VECT_INIT + EUSCI_B1 : { * ( .int28 ) } > INT28 type = VECT_INIT + EUSCI_B0 : { * ( .int29 ) } > INT29 type = VECT_INIT + EUSCI_A1 : { * ( .int30 ) } > INT30 type = VECT_INIT + EUSCI_A0 : { * ( .int31 ) } > INT31 type = VECT_INIT + WDT : { * ( .int32 ) } > INT32 type = VECT_INIT + RTC : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER0_B1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER0_B0 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER3_A1 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER3_A0 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER0_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + UNMI : { * ( .int44 ) } > INT44 type = VECT_INIT + SYSNMI : { * ( .int45 ) } > INT45 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* FRAM WRITE PROTECTION SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _FRWP_ENABLE + __mpu_enable=1; + start_protection_offset_address = (fram_rx_start - fram_rw_start) >> 10; + program_fram_protection = 0x1; + #ifdef _INFO_FRWP_ENABLE + info_fram_protection = 0x1; + #else + info_fram_protection = 0x0; + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr2673.cmd + + diff --git a/msp430/lnk_msp430fr2675.cmd b/msp430/lnk_msp430fr2675.cmd new file mode 100644 index 00000000..e1b564d0 --- /dev/null +++ b/msp430/lnk_msp430fr2675.cmd @@ -0,0 +1,250 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR2675 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x6, length = 0x1A + BSL0 : origin = 0x1000, length = 0x800 + INFO : origin = 0x1800, length = 0x200 + TLVMEM : origin = 0x1A00, length = 0x200 + BOOTCODE : origin = 0x1C00, length = 0x400 + RAM : origin = 0x2000, length = 0x1800 + FRAM : origin = 0x8000, length = 0x7F80 + ROMLIB : origin = 0xC0000, length = 0x4000 + BSL1 : origin = 0xFFC00, length = 0x400 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + BSLCONFIGURATIONSIGNATURE: origin = 0xFF88, length = 0x0002, fill = 0xFFFF + BSLCONFIGURATION : origin = 0xFF8A, length = 0x0002, fill = 0xFFFF + BSLI2CADDRESS : origin = 0xFFA0, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFA2, length = 0x0002 + INT01 : origin = 0xFFA4, length = 0x0002 + INT02 : origin = 0xFFA6, length = 0x0002 + INT03 : origin = 0xFFA8, length = 0x0002 + INT04 : origin = 0xFFAA, length = 0x0002 + INT05 : origin = 0xFFAC, length = 0x0002 + INT06 : origin = 0xFFAE, length = 0x0002 + INT07 : origin = 0xFFB0, length = 0x0002 + INT08 : origin = 0xFFB2, length = 0x0002 + INT09 : origin = 0xFFB4, length = 0x0002 + INT10 : origin = 0xFFB6, length = 0x0002 + INT11 : origin = 0xFFB8, length = 0x0002 + INT12 : origin = 0xFFBA, length = 0x0002 + INT13 : origin = 0xFFBC, length = 0x0002 + INT14 : origin = 0xFFBE, length = 0x0002 + INT15 : origin = 0xFFC0, length = 0x0002 + INT16 : origin = 0xFFC2, length = 0x0002 + INT17 : origin = 0xFFC4, length = 0x0002 + INT18 : origin = 0xFFC6, length = 0x0002 + INT19 : origin = 0xFFC8, length = 0x0002 + INT20 : origin = 0xFFCA, length = 0x0002 + INT21 : origin = 0xFFCC, length = 0x0002 + INT22 : origin = 0xFFCE, length = 0x0002 + INT23 : origin = 0xFFD0, length = 0x0002 + INT24 : origin = 0xFFD2, length = 0x0002 + INT25 : origin = 0xFFD4, length = 0x0002 + INT26 : origin = 0xFFD6, length = 0x0002 + INT27 : origin = 0xFFD8, length = 0x0002 + INT28 : origin = 0xFFDA, length = 0x0002 + INT29 : origin = 0xFFDC, length = 0x0002 + INT30 : origin = 0xFFDE, length = 0x0002 + INT31 : origin = 0xFFE0, length = 0x0002 + INT32 : origin = 0xFFE2, length = 0x0002 + INT33 : origin = 0xFFE4, length = 0x0002 + INT34 : origin = 0xFFE6, length = 0x0002 + INT35 : origin = 0xFFE8, length = 0x0002 + INT36 : origin = 0xFFEA, length = 0x0002 + INT37 : origin = 0xFFEC, length = 0x0002 + INT38 : origin = 0xFFEE, length = 0x0002 + INT39 : origin = 0xFFF0, length = 0x0002 + INT40 : origin = 0xFFF2, length = 0x0002 + INT41 : origin = 0xFFF4, length = 0x0002 + INT42 : origin = 0xFFF6, length = 0x0002 + INT43 : origin = 0xFFF8, length = 0x0002 + INT44 : origin = 0xFFFA, length = 0x0002 + INT45 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) RUN_END(fram_rx_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + .text:_isr : {} /* Code ISRs */ + } + } > FRAM + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + .bslconfigsignature : {} > BSLCONFIGURATIONSIGNATURE + .bslconfig : {} > BSLCONFIGURATION + .bsli2caddress : {} > BSLI2CADDRESS + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + /* MSP430 INFO memory segments */ + .info : type = NOINIT{} > INFO + + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + CAPTIVATE : { * ( .int19 ) } > INT19 type = VECT_INIT + ECOMP0 : { * ( .int20 ) } > INT20 type = VECT_INIT + PORT6 : { * ( .int21 ) } > INT21 type = VECT_INIT + PORT5 : { * ( .int22 ) } > INT22 type = VECT_INIT + PORT4 : { * ( .int23 ) } > INT23 type = VECT_INIT + PORT3 : { * ( .int24 ) } > INT24 type = VECT_INIT + PORT2 : { * ( .int25 ) } > INT25 type = VECT_INIT + PORT1 : { * ( .int26 ) } > INT26 type = VECT_INIT + ADC : { * ( .int27 ) } > INT27 type = VECT_INIT + EUSCI_B1 : { * ( .int28 ) } > INT28 type = VECT_INIT + EUSCI_B0 : { * ( .int29 ) } > INT29 type = VECT_INIT + EUSCI_A1 : { * ( .int30 ) } > INT30 type = VECT_INIT + EUSCI_A0 : { * ( .int31 ) } > INT31 type = VECT_INIT + WDT : { * ( .int32 ) } > INT32 type = VECT_INIT + RTC : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER0_B1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER0_B0 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER3_A1 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER3_A0 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER0_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + UNMI : { * ( .int44 ) } > INT44 type = VECT_INIT + SYSNMI : { * ( .int45 ) } > INT45 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* FRAM WRITE PROTECTION SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _FRWP_ENABLE + __mpu_enable=1; + start_protection_offset_address = (fram_rx_start - fram_rw_start) >> 10; + program_fram_protection = 0x1; + #ifdef _INFO_FRWP_ENABLE + info_fram_protection = 0x1; + #else + info_fram_protection = 0x0; + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr2675.cmd + + diff --git a/msp430/lnk_msp430fr2676.cmd b/msp430/lnk_msp430fr2676.cmd new file mode 100644 index 00000000..4f02b255 --- /dev/null +++ b/msp430/lnk_msp430fr2676.cmd @@ -0,0 +1,266 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR2676 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x6, length = 0x1A + BSL0 : origin = 0x1000, length = 0x800 + INFO : origin = 0x1800, length = 0x200 + TLVMEM : origin = 0x1A00, length = 0x200 + BOOTCODE : origin = 0x1C00, length = 0x400 + RAM : origin = 0x2000, length = 0x2000 + FRAM : origin = 0x8000, length = 0x7F80 + FRAM2 : origin = 0x10000,length = 0x8000 + ROMLIB : origin = 0xC0000, length = 0x4000 + BSL1 : origin = 0xFFC00, length = 0x400 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + BSLCONFIGURATIONSIGNATURE: origin = 0xFF88, length = 0x0002, fill = 0xFFFF + BSLCONFIGURATION : origin = 0xFF8A, length = 0x0002, fill = 0xFFFF + BSLI2CADDRESS : origin = 0xFFA0, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFA2, length = 0x0002 + INT01 : origin = 0xFFA4, length = 0x0002 + INT02 : origin = 0xFFA6, length = 0x0002 + INT03 : origin = 0xFFA8, length = 0x0002 + INT04 : origin = 0xFFAA, length = 0x0002 + INT05 : origin = 0xFFAC, length = 0x0002 + INT06 : origin = 0xFFAE, length = 0x0002 + INT07 : origin = 0xFFB0, length = 0x0002 + INT08 : origin = 0xFFB2, length = 0x0002 + INT09 : origin = 0xFFB4, length = 0x0002 + INT10 : origin = 0xFFB6, length = 0x0002 + INT11 : origin = 0xFFB8, length = 0x0002 + INT12 : origin = 0xFFBA, length = 0x0002 + INT13 : origin = 0xFFBC, length = 0x0002 + INT14 : origin = 0xFFBE, length = 0x0002 + INT15 : origin = 0xFFC0, length = 0x0002 + INT16 : origin = 0xFFC2, length = 0x0002 + INT17 : origin = 0xFFC4, length = 0x0002 + INT18 : origin = 0xFFC6, length = 0x0002 + INT19 : origin = 0xFFC8, length = 0x0002 + INT20 : origin = 0xFFCA, length = 0x0002 + INT21 : origin = 0xFFCC, length = 0x0002 + INT22 : origin = 0xFFCE, length = 0x0002 + INT23 : origin = 0xFFD0, length = 0x0002 + INT24 : origin = 0xFFD2, length = 0x0002 + INT25 : origin = 0xFFD4, length = 0x0002 + INT26 : origin = 0xFFD6, length = 0x0002 + INT27 : origin = 0xFFD8, length = 0x0002 + INT28 : origin = 0xFFDA, length = 0x0002 + INT29 : origin = 0xFFDC, length = 0x0002 + INT30 : origin = 0xFFDE, length = 0x0002 + INT31 : origin = 0xFFE0, length = 0x0002 + INT32 : origin = 0xFFE2, length = 0x0002 + INT33 : origin = 0xFFE4, length = 0x0002 + INT34 : origin = 0xFFE6, length = 0x0002 + INT35 : origin = 0xFFE8, length = 0x0002 + INT36 : origin = 0xFFEA, length = 0x0002 + INT37 : origin = 0xFFEC, length = 0x0002 + INT38 : origin = 0xFFEE, length = 0x0002 + INT39 : origin = 0xFFF0, length = 0x0002 + INT40 : origin = 0xFFF2, length = 0x0002 + INT41 : origin = 0xFFF4, length = 0x0002 + INT42 : origin = 0xFFF6, length = 0x0002 + INT43 : origin = 0xFFF8, length = 0x0002 + INT44 : origin = 0xFFFA, length = 0x0002 + INT45 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) RUN_END(fram_rx_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text:_isr : {} /* Code ISRs */ + } + } > FRAM + +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + .bslconfigsignature : {} > BSLCONFIGURATIONSIGNATURE + .bslconfig : {} > BSLCONFIGURATION + .bsli2caddress : {} > BSLI2CADDRESS + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + /* MSP430 INFO memory segments */ + .info : type = NOINIT{} > INFO + + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + CAPTIVATE : { * ( .int19 ) } > INT19 type = VECT_INIT + ECOMP0 : { * ( .int20 ) } > INT20 type = VECT_INIT + PORT6 : { * ( .int21 ) } > INT21 type = VECT_INIT + PORT5 : { * ( .int22 ) } > INT22 type = VECT_INIT + PORT4 : { * ( .int23 ) } > INT23 type = VECT_INIT + PORT3 : { * ( .int24 ) } > INT24 type = VECT_INIT + PORT2 : { * ( .int25 ) } > INT25 type = VECT_INIT + PORT1 : { * ( .int26 ) } > INT26 type = VECT_INIT + ADC : { * ( .int27 ) } > INT27 type = VECT_INIT + EUSCI_B1 : { * ( .int28 ) } > INT28 type = VECT_INIT + EUSCI_B0 : { * ( .int29 ) } > INT29 type = VECT_INIT + EUSCI_A1 : { * ( .int30 ) } > INT30 type = VECT_INIT + EUSCI_A0 : { * ( .int31 ) } > INT31 type = VECT_INIT + WDT : { * ( .int32 ) } > INT32 type = VECT_INIT + RTC : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER0_B1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER0_B0 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER3_A1 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER3_A0 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER2_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + TIMER0_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A0 : { * ( .int43 ) } > INT43 type = VECT_INIT + UNMI : { * ( .int44 ) } > INT44 type = VECT_INIT + SYSNMI : { * ( .int45 ) } > INT45 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* FRAM WRITE PROTECTION SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _FRWP_ENABLE + __mpu_enable=1; + start_protection_offset_address = (fram_rx_start - fram_rw_start) >> 10; + program_fram_protection = 0x1; + #ifdef _INFO_FRWP_ENABLE + info_fram_protection = 0x1; + #else + info_fram_protection = 0x0; + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr2676.cmd + + diff --git a/msp430/lnk_msp430fr4131.cmd b/msp430/lnk_msp430fr4131.cmd new file mode 100644 index 00000000..5a2cbc5d --- /dev/null +++ b/msp430/lnk_msp430fr4131.cmd @@ -0,0 +1,246 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr4131.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR4131 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2000, length = 0x0200 + INFOA : origin = 0x1800, length = 0x0200 + FRAM : origin = 0xF000, length = 0x0F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFF88, length = 0x0002 + INT01 : origin = 0xFF8A, length = 0x0002 + INT02 : origin = 0xFF8C, length = 0x0002 + INT03 : origin = 0xFF8E, length = 0x0002 + INT04 : origin = 0xFF90, length = 0x0002 + INT05 : origin = 0xFF92, length = 0x0002 + INT06 : origin = 0xFF94, length = 0x0002 + INT07 : origin = 0xFF96, length = 0x0002 + INT08 : origin = 0xFF98, length = 0x0002 + INT09 : origin = 0xFF9A, length = 0x0002 + INT10 : origin = 0xFF9C, length = 0x0002 + INT11 : origin = 0xFF9E, length = 0x0002 + INT12 : origin = 0xFFA0, length = 0x0002 + INT13 : origin = 0xFFA2, length = 0x0002 + INT14 : origin = 0xFFA4, length = 0x0002 + INT15 : origin = 0xFFA6, length = 0x0002 + INT16 : origin = 0xFFA8, length = 0x0002 + INT17 : origin = 0xFFAA, length = 0x0002 + INT18 : origin = 0xFFAC, length = 0x0002 + INT19 : origin = 0xFFAE, length = 0x0002 + INT20 : origin = 0xFFB0, length = 0x0002 + INT21 : origin = 0xFFB2, length = 0x0002 + INT22 : origin = 0xFFB4, length = 0x0002 + INT23 : origin = 0xFFB6, length = 0x0002 + INT24 : origin = 0xFFB8, length = 0x0002 + INT25 : origin = 0xFFBA, length = 0x0002 + INT26 : origin = 0xFFBC, length = 0x0002 + INT27 : origin = 0xFFBE, length = 0x0002 + INT28 : origin = 0xFFC0, length = 0x0002 + INT29 : origin = 0xFFC2, length = 0x0002 + INT30 : origin = 0xFFC4, length = 0x0002 + INT31 : origin = 0xFFC6, length = 0x0002 + INT32 : origin = 0xFFC8, length = 0x0002 + INT33 : origin = 0xFFCA, length = 0x0002 + INT34 : origin = 0xFFCC, length = 0x0002 + INT35 : origin = 0xFFCE, length = 0x0002 + INT36 : origin = 0xFFD0, length = 0x0002 + INT37 : origin = 0xFFD2, length = 0x0002 + INT38 : origin = 0xFFD4, length = 0x0002 + INT39 : origin = 0xFFD6, length = 0x0002 + INT40 : origin = 0xFFD8, length = 0x0002 + INT41 : origin = 0xFFDA, length = 0x0002 + INT42 : origin = 0xFFDC, length = 0x0002 + INT43 : origin = 0xFFDE, length = 0x0002 + INT44 : origin = 0xFFE0, length = 0x0002 + INT45 : origin = 0xFFE2, length = 0x0002 + INT46 : origin = 0xFFE4, length = 0x0002 + INT47 : origin = 0xFFE6, length = 0x0002 + INT48 : origin = 0xFFE8, length = 0x0002 + INT49 : origin = 0xFFEA, length = 0x0002 + INT50 : origin = 0xFFEC, length = 0x0002 + INT51 : origin = 0xFFEE, length = 0x0002 + INT52 : origin = 0xFFF0, length = 0x0002 + INT53 : origin = 0xFFF2, length = 0x0002 + INT54 : origin = 0xFFF4, length = 0x0002 + INT55 : origin = 0xFFF6, length = 0x0002 + INT56 : origin = 0xFFF8, length = 0x0002 + INT57 : origin = 0xFFFA, length = 0x0002 + INT58 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + } + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .cio : {} > RAM /* C I/O buffer */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + LCD_E : { * ( .int45 ) } > INT45 type = VECT_INIT + PORT2 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + ADC : { * ( .int48 ) } > INT48 type = VECT_INIT + USCI_B0 : { * ( .int49 ) } > INT49 type = VECT_INIT + USCI_A0 : { * ( .int50 ) } > INT50 type = VECT_INIT + WDT : { * ( .int51 ) } > INT51 type = VECT_INIT + RTC : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER1_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER1_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A1 : { * ( .int55 ) } > INT55 type = VECT_INIT + TIMER0_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + UNMI : { * ( .int57 ) } > INT57 type = VECT_INIT + SYSNMI : { * ( .int58 ) } > INT58 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr4131.cmd + diff --git a/msp430/lnk_msp430fr4132.cmd b/msp430/lnk_msp430fr4132.cmd new file mode 100644 index 00000000..0987ec90 --- /dev/null +++ b/msp430/lnk_msp430fr4132.cmd @@ -0,0 +1,246 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr4132.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR4132 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2000, length = 0x0400 + INFOA : origin = 0x1800, length = 0x0200 + FRAM : origin = 0xE000, length = 0x1F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFF88, length = 0x0002 + INT01 : origin = 0xFF8A, length = 0x0002 + INT02 : origin = 0xFF8C, length = 0x0002 + INT03 : origin = 0xFF8E, length = 0x0002 + INT04 : origin = 0xFF90, length = 0x0002 + INT05 : origin = 0xFF92, length = 0x0002 + INT06 : origin = 0xFF94, length = 0x0002 + INT07 : origin = 0xFF96, length = 0x0002 + INT08 : origin = 0xFF98, length = 0x0002 + INT09 : origin = 0xFF9A, length = 0x0002 + INT10 : origin = 0xFF9C, length = 0x0002 + INT11 : origin = 0xFF9E, length = 0x0002 + INT12 : origin = 0xFFA0, length = 0x0002 + INT13 : origin = 0xFFA2, length = 0x0002 + INT14 : origin = 0xFFA4, length = 0x0002 + INT15 : origin = 0xFFA6, length = 0x0002 + INT16 : origin = 0xFFA8, length = 0x0002 + INT17 : origin = 0xFFAA, length = 0x0002 + INT18 : origin = 0xFFAC, length = 0x0002 + INT19 : origin = 0xFFAE, length = 0x0002 + INT20 : origin = 0xFFB0, length = 0x0002 + INT21 : origin = 0xFFB2, length = 0x0002 + INT22 : origin = 0xFFB4, length = 0x0002 + INT23 : origin = 0xFFB6, length = 0x0002 + INT24 : origin = 0xFFB8, length = 0x0002 + INT25 : origin = 0xFFBA, length = 0x0002 + INT26 : origin = 0xFFBC, length = 0x0002 + INT27 : origin = 0xFFBE, length = 0x0002 + INT28 : origin = 0xFFC0, length = 0x0002 + INT29 : origin = 0xFFC2, length = 0x0002 + INT30 : origin = 0xFFC4, length = 0x0002 + INT31 : origin = 0xFFC6, length = 0x0002 + INT32 : origin = 0xFFC8, length = 0x0002 + INT33 : origin = 0xFFCA, length = 0x0002 + INT34 : origin = 0xFFCC, length = 0x0002 + INT35 : origin = 0xFFCE, length = 0x0002 + INT36 : origin = 0xFFD0, length = 0x0002 + INT37 : origin = 0xFFD2, length = 0x0002 + INT38 : origin = 0xFFD4, length = 0x0002 + INT39 : origin = 0xFFD6, length = 0x0002 + INT40 : origin = 0xFFD8, length = 0x0002 + INT41 : origin = 0xFFDA, length = 0x0002 + INT42 : origin = 0xFFDC, length = 0x0002 + INT43 : origin = 0xFFDE, length = 0x0002 + INT44 : origin = 0xFFE0, length = 0x0002 + INT45 : origin = 0xFFE2, length = 0x0002 + INT46 : origin = 0xFFE4, length = 0x0002 + INT47 : origin = 0xFFE6, length = 0x0002 + INT48 : origin = 0xFFE8, length = 0x0002 + INT49 : origin = 0xFFEA, length = 0x0002 + INT50 : origin = 0xFFEC, length = 0x0002 + INT51 : origin = 0xFFEE, length = 0x0002 + INT52 : origin = 0xFFF0, length = 0x0002 + INT53 : origin = 0xFFF2, length = 0x0002 + INT54 : origin = 0xFFF4, length = 0x0002 + INT55 : origin = 0xFFF6, length = 0x0002 + INT56 : origin = 0xFFF8, length = 0x0002 + INT57 : origin = 0xFFFA, length = 0x0002 + INT58 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + } + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .cio : {} > RAM /* C I/O buffer */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + LCD_E : { * ( .int45 ) } > INT45 type = VECT_INIT + PORT2 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + ADC : { * ( .int48 ) } > INT48 type = VECT_INIT + USCI_B0 : { * ( .int49 ) } > INT49 type = VECT_INIT + USCI_A0 : { * ( .int50 ) } > INT50 type = VECT_INIT + WDT : { * ( .int51 ) } > INT51 type = VECT_INIT + RTC : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER1_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER1_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A1 : { * ( .int55 ) } > INT55 type = VECT_INIT + TIMER0_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + UNMI : { * ( .int57 ) } > INT57 type = VECT_INIT + SYSNMI : { * ( .int58 ) } > INT58 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr4132.cmd + diff --git a/msp430/lnk_msp430fr4133.cmd b/msp430/lnk_msp430fr4133.cmd new file mode 100644 index 00000000..9e0f0d28 --- /dev/null +++ b/msp430/lnk_msp430fr4133.cmd @@ -0,0 +1,246 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr4133.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR4133 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2000, length = 0x0800 + INFOA : origin = 0x1800, length = 0x0200 + FRAM : origin = 0xC400, length = 0x3B80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFF88, length = 0x0002 + INT01 : origin = 0xFF8A, length = 0x0002 + INT02 : origin = 0xFF8C, length = 0x0002 + INT03 : origin = 0xFF8E, length = 0x0002 + INT04 : origin = 0xFF90, length = 0x0002 + INT05 : origin = 0xFF92, length = 0x0002 + INT06 : origin = 0xFF94, length = 0x0002 + INT07 : origin = 0xFF96, length = 0x0002 + INT08 : origin = 0xFF98, length = 0x0002 + INT09 : origin = 0xFF9A, length = 0x0002 + INT10 : origin = 0xFF9C, length = 0x0002 + INT11 : origin = 0xFF9E, length = 0x0002 + INT12 : origin = 0xFFA0, length = 0x0002 + INT13 : origin = 0xFFA2, length = 0x0002 + INT14 : origin = 0xFFA4, length = 0x0002 + INT15 : origin = 0xFFA6, length = 0x0002 + INT16 : origin = 0xFFA8, length = 0x0002 + INT17 : origin = 0xFFAA, length = 0x0002 + INT18 : origin = 0xFFAC, length = 0x0002 + INT19 : origin = 0xFFAE, length = 0x0002 + INT20 : origin = 0xFFB0, length = 0x0002 + INT21 : origin = 0xFFB2, length = 0x0002 + INT22 : origin = 0xFFB4, length = 0x0002 + INT23 : origin = 0xFFB6, length = 0x0002 + INT24 : origin = 0xFFB8, length = 0x0002 + INT25 : origin = 0xFFBA, length = 0x0002 + INT26 : origin = 0xFFBC, length = 0x0002 + INT27 : origin = 0xFFBE, length = 0x0002 + INT28 : origin = 0xFFC0, length = 0x0002 + INT29 : origin = 0xFFC2, length = 0x0002 + INT30 : origin = 0xFFC4, length = 0x0002 + INT31 : origin = 0xFFC6, length = 0x0002 + INT32 : origin = 0xFFC8, length = 0x0002 + INT33 : origin = 0xFFCA, length = 0x0002 + INT34 : origin = 0xFFCC, length = 0x0002 + INT35 : origin = 0xFFCE, length = 0x0002 + INT36 : origin = 0xFFD0, length = 0x0002 + INT37 : origin = 0xFFD2, length = 0x0002 + INT38 : origin = 0xFFD4, length = 0x0002 + INT39 : origin = 0xFFD6, length = 0x0002 + INT40 : origin = 0xFFD8, length = 0x0002 + INT41 : origin = 0xFFDA, length = 0x0002 + INT42 : origin = 0xFFDC, length = 0x0002 + INT43 : origin = 0xFFDE, length = 0x0002 + INT44 : origin = 0xFFE0, length = 0x0002 + INT45 : origin = 0xFFE2, length = 0x0002 + INT46 : origin = 0xFFE4, length = 0x0002 + INT47 : origin = 0xFFE6, length = 0x0002 + INT48 : origin = 0xFFE8, length = 0x0002 + INT49 : origin = 0xFFEA, length = 0x0002 + INT50 : origin = 0xFFEC, length = 0x0002 + INT51 : origin = 0xFFEE, length = 0x0002 + INT52 : origin = 0xFFF0, length = 0x0002 + INT53 : origin = 0xFFF2, length = 0x0002 + INT54 : origin = 0xFFF4, length = 0x0002 + INT55 : origin = 0xFFF6, length = 0x0002 + INT56 : origin = 0xFFF8, length = 0x0002 + INT57 : origin = 0xFFFA, length = 0x0002 + INT58 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + } + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .cio : {} > RAM /* C I/O buffer */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + LCD_E : { * ( .int45 ) } > INT45 type = VECT_INIT + PORT2 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + ADC : { * ( .int48 ) } > INT48 type = VECT_INIT + USCI_B0 : { * ( .int49 ) } > INT49 type = VECT_INIT + USCI_A0 : { * ( .int50 ) } > INT50 type = VECT_INIT + WDT : { * ( .int51 ) } > INT51 type = VECT_INIT + RTC : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER1_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER1_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + TIMER0_A1 : { * ( .int55 ) } > INT55 type = VECT_INIT + TIMER0_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT + UNMI : { * ( .int57 ) } > INT57 type = VECT_INIT + SYSNMI : { * ( .int58 ) } > INT58 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr4133.cmd + diff --git a/msp430/lnk_msp430fr5041.cmd b/msp430/lnk_msp430fr5041.cmd new file mode 100644 index 00000000..bd5bd6be --- /dev/null +++ b/msp430/lnk_msp430fr5041.cmd @@ -0,0 +1,349 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR5041 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0xA, length = 0x16 + BSL : origin = 0x1000, length = 0x800 + CAL_CONF : origin = 0x1900, length = 0x100 + TLVMEM : origin = 0x1A00, length = 0x100 + BOOTROM : origin = 0x1B00, length = 0x100 + RAM : origin = 0x1C00, length = 0x1000 + FRAM : origin = 0x8000, length = 0x7F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the LEA memory map */ +/****************************************************************************/ + +#define LEASTACK_SIZE 0x138 + +MEMORY +{ + LEARAM_0 : origin = 0x4000, length = 0x1000 + LEARAM : origin = 0x5000, length = 0x1000 - LEASTACK_SIZE + LEASTACK : origin = 0x6000 - LEASTACK_SIZE, length = LEASTACK_SIZE +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + + GROUP(READ_WRITE_MEMORY) + { + + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + + } > 0x8000 + + .cinit : {} > FRAM /* Initialization tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .text:_isr : {} > FRAM /* Code ISRs */ + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .leaRAM : {} > LEARAM /* LEA RAM */ + .leaStack : {} > LEASTACK (HIGH) /* LEA STACK */ + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + SDHS : { * ( .int16 ) } > INT16 type = VECT_INIT + SAPH_A : { * ( .int17 ) } > INT17 type = VECT_INIT + HSPLL : { * ( .int18 ) } > INT18 type = VECT_INIT + UUPS : { * ( .int19 ) } > INT19 type = VECT_INIT + LEA : { * ( .int20 ) } > INT20 type = VECT_INIT + PORT7 : { * ( .int21 ) } > INT21 type = VECT_INIT + EUSCI_B1 : { * ( .int22 ) } > INT22 type = VECT_INIT + EUSCI_A3 : { * ( .int23 ) } > INT23 type = VECT_INIT + EUSCI_A2 : { * ( .int24 ) } > INT24 type = VECT_INIT + PORT6 : { * ( .int25 ) } > INT25 type = VECT_INIT + PORT5 : { * ( .int26 ) } > INT26 type = VECT_INIT + TIMER4_A1 : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMER4_A0 : { * ( .int28 ) } > INT28 type = VECT_INIT + AES256 : { * ( .int29 ) } > INT29 type = VECT_INIT + RTC_C : { * ( .int30 ) } > INT30 type = VECT_INIT + .int31 : {} > INT31 + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + EUSCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12_B : { * ( .int46 ) } > INT46 type = VECT_INIT + EUSCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + EUSCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* MPU/IPE SPECIFIC MEMORY SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr5041.cmd + + diff --git a/msp430/lnk_msp430fr5043.cmd b/msp430/lnk_msp430fr5043.cmd new file mode 100644 index 00000000..105f35c2 --- /dev/null +++ b/msp430/lnk_msp430fr5043.cmd @@ -0,0 +1,366 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR5043 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0xA, length = 0x16 + BSL : origin = 0x1000, length = 0x800 + CAL_CONF : origin = 0x1900, length = 0x100 + TLVMEM : origin = 0x1A00, length = 0x100 + BOOTROM : origin = 0x1B00, length = 0x100 + RAM : origin = 0x1C00, length = 0x1000 + FRAM : origin = 0x6000, length = 0x9F80 + FRAM2 : origin = 0x10000,length = 0x5FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the LEA memory map */ +/****************************************************************************/ + +#define LEASTACK_SIZE 0x138 + +MEMORY +{ + LEARAM_0 : origin = 0x4000, length = 0x1000 + LEARAM : origin = 0x5000, length = 0x1000 - LEASTACK_SIZE + LEASTACK : origin = 0x6000 - LEASTACK_SIZE, length = LEASTACK_SIZE +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + + GROUP(READ_WRITE_MEMORY) + { + + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + + } > 0x6000 + + .cinit : {} > FRAM /* Initialization tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .text:_isr : {} > FRAM /* Code ISRs */ + +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .leaRAM : {} > LEARAM /* LEA RAM */ + .leaStack : {} > LEASTACK (HIGH) /* LEA STACK */ + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + SDHS : { * ( .int16 ) } > INT16 type = VECT_INIT + SAPH_A : { * ( .int17 ) } > INT17 type = VECT_INIT + HSPLL : { * ( .int18 ) } > INT18 type = VECT_INIT + UUPS : { * ( .int19 ) } > INT19 type = VECT_INIT + LEA : { * ( .int20 ) } > INT20 type = VECT_INIT + PORT7 : { * ( .int21 ) } > INT21 type = VECT_INIT + EUSCI_B1 : { * ( .int22 ) } > INT22 type = VECT_INIT + EUSCI_A3 : { * ( .int23 ) } > INT23 type = VECT_INIT + EUSCI_A2 : { * ( .int24 ) } > INT24 type = VECT_INIT + PORT6 : { * ( .int25 ) } > INT25 type = VECT_INIT + PORT5 : { * ( .int26 ) } > INT26 type = VECT_INIT + TIMER4_A1 : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMER4_A0 : { * ( .int28 ) } > INT28 type = VECT_INIT + AES256 : { * ( .int29 ) } > INT29 type = VECT_INIT + RTC_C : { * ( .int30 ) } > INT30 type = VECT_INIT + .int31 : {} > INT31 + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + EUSCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12_B : { * ( .int46 ) } > INT46 type = VECT_INIT + EUSCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + EUSCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* MPU/IPE SPECIFIC MEMORY SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr5043.cmd + + diff --git a/msp430/lnk_msp430fr50431.cmd b/msp430/lnk_msp430fr50431.cmd new file mode 100644 index 00000000..ff624067 --- /dev/null +++ b/msp430/lnk_msp430fr50431.cmd @@ -0,0 +1,366 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR50431 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0xA, length = 0x16 + BSL : origin = 0x1000, length = 0x800 + CAL_CONF : origin = 0x1900, length = 0x100 + TLVMEM : origin = 0x1A00, length = 0x100 + BOOTROM : origin = 0x1B00, length = 0x100 + RAM : origin = 0x1C00, length = 0x1000 + FRAM : origin = 0x6000, length = 0x9F80 + FRAM2 : origin = 0x10000,length = 0x5FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the LEA memory map */ +/****************************************************************************/ + +#define LEASTACK_SIZE 0x138 + +MEMORY +{ + LEARAM_0 : origin = 0x4000, length = 0x1000 + LEARAM : origin = 0x5000, length = 0x1000 - LEASTACK_SIZE + LEASTACK : origin = 0x6000 - LEASTACK_SIZE, length = LEASTACK_SIZE +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + + GROUP(READ_WRITE_MEMORY) + { + + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + + } > 0x6000 + + .cinit : {} > FRAM /* Initialization tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .text:_isr : {} > FRAM /* Code ISRs */ + +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .leaRAM : {} > LEARAM /* LEA RAM */ + .leaStack : {} > LEASTACK (HIGH) /* LEA STACK */ + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + SDHS : { * ( .int16 ) } > INT16 type = VECT_INIT + SAPH_A : { * ( .int17 ) } > INT17 type = VECT_INIT + HSPLL : { * ( .int18 ) } > INT18 type = VECT_INIT + UUPS : { * ( .int19 ) } > INT19 type = VECT_INIT + LEA : { * ( .int20 ) } > INT20 type = VECT_INIT + PORT7 : { * ( .int21 ) } > INT21 type = VECT_INIT + EUSCI_B1 : { * ( .int22 ) } > INT22 type = VECT_INIT + EUSCI_A3 : { * ( .int23 ) } > INT23 type = VECT_INIT + EUSCI_A2 : { * ( .int24 ) } > INT24 type = VECT_INIT + PORT6 : { * ( .int25 ) } > INT25 type = VECT_INIT + PORT5 : { * ( .int26 ) } > INT26 type = VECT_INIT + TIMER4_A1 : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMER4_A0 : { * ( .int28 ) } > INT28 type = VECT_INIT + AES256 : { * ( .int29 ) } > INT29 type = VECT_INIT + RTC_C : { * ( .int30 ) } > INT30 type = VECT_INIT + .int31 : {} > INT31 + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + EUSCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12_B : { * ( .int46 ) } > INT46 type = VECT_INIT + EUSCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + EUSCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* MPU/IPE SPECIFIC MEMORY SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr50431.cmd + + diff --git a/msp430/lnk_msp430fr5720.cmd b/msp430/lnk_msp430fr5720.cmd new file mode 100644 index 00000000..752e06a5 --- /dev/null +++ b/msp430/lnk_msp430fr5720.cmd @@ -0,0 +1,265 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5720.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5720 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1880, length = 0x0080 + INFOB : origin = 0x1800, length = 0x0080 + FRAM : origin = 0xF000, length = 0x0F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } ALIGN(0x0080), RUN_START(fram_rw_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } ALIGN(0x0080), RUN_START(fram_ro_start) + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } ALIGN(0x0080), RUN_START(fram_rx_start) + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + .int37 : {} > INT37 + .int38 : {} > INT38 + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC10 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_D : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _MPU_ENABLE + #ifdef _MPU_MANUAL + mpusb1 = (_MPU_SEGB1 + 0x1000 - 0xFFFF - 1) * 32 / 0x1000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (_MPU_SEGB2 + 0x1000 - 0xFFFF - 1) * 32 / 0x1000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = (_MPU_SAM0 << 12) + (_MPU_SAM3 << 8) + (_MPU_SAM2 << 4) + _MPU_SAM1; + #else + mpusb1 = (fram_ro_start + 0x1000 - 0xFFFF - 1) * 32 / 0x1000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (fram_rx_start + 0x1000 - 0xFFFF - 1) * 32 / 0x1000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = 0x7513; + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5720.cmd + diff --git a/msp430/lnk_msp430fr5721.cmd b/msp430/lnk_msp430fr5721.cmd new file mode 100644 index 00000000..a231a78b --- /dev/null +++ b/msp430/lnk_msp430fr5721.cmd @@ -0,0 +1,265 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5721.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5721 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1880, length = 0x0080 + INFOB : origin = 0x1800, length = 0x0080 + FRAM : origin = 0xF000, length = 0x0F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } ALIGN(0x0080), RUN_START(fram_rw_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } ALIGN(0x0080), RUN_START(fram_ro_start) + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } ALIGN(0x0080), RUN_START(fram_rx_start) + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER2_B1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_B0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER1_B1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_B0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC10 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_D : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _MPU_ENABLE + #ifdef _MPU_MANUAL + mpusb1 = (_MPU_SEGB1 + 0x1000 - 0xFFFF - 1) * 32 / 0x1000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (_MPU_SEGB2 + 0x1000 - 0xFFFF - 1) * 32 / 0x1000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = (_MPU_SAM0 << 12) + (_MPU_SAM3 << 8) + (_MPU_SAM2 << 4) + _MPU_SAM1; + #else + mpusb1 = (fram_ro_start + 0x1000 - 0xFFFF - 1) * 32 / 0x1000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (fram_rx_start + 0x1000 - 0xFFFF - 1) * 32 / 0x1000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = 0x7513; + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5721.cmd + diff --git a/msp430/lnk_msp430fr5722.cmd b/msp430/lnk_msp430fr5722.cmd new file mode 100644 index 00000000..5e66eda0 --- /dev/null +++ b/msp430/lnk_msp430fr5722.cmd @@ -0,0 +1,265 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5722.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5722 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1880, length = 0x0080 + INFOB : origin = 0x1800, length = 0x0080 + FRAM : origin = 0xE000, length = 0x1F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } ALIGN(0x0100), RUN_START(fram_rw_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } ALIGN(0x0100), RUN_START(fram_ro_start) + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } ALIGN(0x0100), RUN_START(fram_rx_start) + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + .int37 : {} > INT37 + .int38 : {} > INT38 + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + .int46 : {} > INT46 + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_D : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _MPU_ENABLE + #ifdef _MPU_MANUAL + mpusb1 = (_MPU_SEGB1 + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (_MPU_SEGB2 + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = (_MPU_SAM0 << 12) + (_MPU_SAM3 << 8) + (_MPU_SAM2 << 4) + _MPU_SAM1; + #else + mpusb1 = (fram_ro_start + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (fram_rx_start + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = 0x7513; + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5722.cmd + diff --git a/msp430/lnk_msp430fr5723.cmd b/msp430/lnk_msp430fr5723.cmd new file mode 100644 index 00000000..492eebab --- /dev/null +++ b/msp430/lnk_msp430fr5723.cmd @@ -0,0 +1,265 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5723.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5723 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1880, length = 0x0080 + INFOB : origin = 0x1800, length = 0x0080 + FRAM : origin = 0xE000, length = 0x1F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } ALIGN(0x0100), RUN_START(fram_rw_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } ALIGN(0x0100), RUN_START(fram_ro_start) + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } ALIGN(0x0100), RUN_START(fram_rx_start) + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER2_B1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_B0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER1_B1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_B0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + .int46 : {} > INT46 + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_D : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _MPU_ENABLE + #ifdef _MPU_MANUAL + mpusb1 = (_MPU_SEGB1 + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (_MPU_SEGB2 + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = (_MPU_SAM0 << 12) + (_MPU_SAM3 << 8) + (_MPU_SAM2 << 4) + _MPU_SAM1; + #else + mpusb1 = (fram_ro_start + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (fram_rx_start + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = 0x7513; + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5723.cmd + diff --git a/msp430/lnk_msp430fr5724.cmd b/msp430/lnk_msp430fr5724.cmd new file mode 100644 index 00000000..15c4acd3 --- /dev/null +++ b/msp430/lnk_msp430fr5724.cmd @@ -0,0 +1,265 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5724.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5724 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1880, length = 0x0080 + INFOB : origin = 0x1800, length = 0x0080 + FRAM : origin = 0xE000, length = 0x1F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } ALIGN(0x0100), RUN_START(fram_rw_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } ALIGN(0x0100), RUN_START(fram_ro_start) + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } ALIGN(0x0100), RUN_START(fram_rx_start) + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + .int37 : {} > INT37 + .int38 : {} > INT38 + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC10 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_D : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _MPU_ENABLE + #ifdef _MPU_MANUAL + mpusb1 = (_MPU_SEGB1 + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (_MPU_SEGB2 + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = (_MPU_SAM0 << 12) + (_MPU_SAM3 << 8) + (_MPU_SAM2 << 4) + _MPU_SAM1; + #else + mpusb1 = (fram_ro_start + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (fram_rx_start + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = 0x7513; + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5724.cmd + diff --git a/msp430/lnk_msp430fr5725.cmd b/msp430/lnk_msp430fr5725.cmd new file mode 100644 index 00000000..c07d3c47 --- /dev/null +++ b/msp430/lnk_msp430fr5725.cmd @@ -0,0 +1,265 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5725.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5725 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1880, length = 0x0080 + INFOB : origin = 0x1800, length = 0x0080 + FRAM : origin = 0xE000, length = 0x1F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } ALIGN(0x0100), RUN_START(fram_rw_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } ALIGN(0x0100), RUN_START(fram_ro_start) + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } ALIGN(0x0100), RUN_START(fram_rx_start) + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER2_B1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_B0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER1_B1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_B0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC10 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_D : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _MPU_ENABLE + #ifdef _MPU_MANUAL + mpusb1 = (_MPU_SEGB1 + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (_MPU_SEGB2 + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = (_MPU_SAM0 << 12) + (_MPU_SAM3 << 8) + (_MPU_SAM2 << 4) + _MPU_SAM1; + #else + mpusb1 = (fram_ro_start + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (fram_rx_start + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = 0x7513; + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5725.cmd + diff --git a/msp430/lnk_msp430fr5726.cmd b/msp430/lnk_msp430fr5726.cmd new file mode 100644 index 00000000..be4a478b --- /dev/null +++ b/msp430/lnk_msp430fr5726.cmd @@ -0,0 +1,265 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5726.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5726 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1880, length = 0x0080 + INFOB : origin = 0x1800, length = 0x0080 + FRAM : origin = 0xC200, length = 0x3D80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } ALIGN(0x0200), RUN_START(fram_rw_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } ALIGN(0x0200), RUN_START(fram_ro_start) + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } ALIGN(0x0200), RUN_START(fram_rx_start) + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + .int37 : {} > INT37 + .int38 : {} > INT38 + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + .int46 : {} > INT46 + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_D : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _MPU_ENABLE + #ifdef _MPU_MANUAL + mpusb1 = (_MPU_SEGB1 + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (_MPU_SEGB2 + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = (_MPU_SAM0 << 12) + (_MPU_SAM3 << 8) + (_MPU_SAM2 << 4) + _MPU_SAM1; + #else + mpusb1 = (fram_ro_start + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (fram_rx_start + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = 0x7513; + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5726.cmd + diff --git a/msp430/lnk_msp430fr5727.cmd b/msp430/lnk_msp430fr5727.cmd new file mode 100644 index 00000000..a58a9619 --- /dev/null +++ b/msp430/lnk_msp430fr5727.cmd @@ -0,0 +1,265 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5727.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5727 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1880, length = 0x0080 + INFOB : origin = 0x1800, length = 0x0080 + FRAM : origin = 0xC200, length = 0x3D80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } ALIGN(0x0200), RUN_START(fram_rw_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } ALIGN(0x0200), RUN_START(fram_ro_start) + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } ALIGN(0x0200), RUN_START(fram_rx_start) + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER2_B1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_B0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER1_B1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_B0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + .int46 : {} > INT46 + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_D : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _MPU_ENABLE + #ifdef _MPU_MANUAL + mpusb1 = (_MPU_SEGB1 + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (_MPU_SEGB2 + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = (_MPU_SAM0 << 12) + (_MPU_SAM3 << 8) + (_MPU_SAM2 << 4) + _MPU_SAM1; + #else + mpusb1 = (fram_ro_start + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (fram_rx_start + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = 0x7513; + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5727.cmd + diff --git a/msp430/lnk_msp430fr5728.cmd b/msp430/lnk_msp430fr5728.cmd new file mode 100644 index 00000000..2fdb323e --- /dev/null +++ b/msp430/lnk_msp430fr5728.cmd @@ -0,0 +1,265 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5728.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5728 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1880, length = 0x0080 + INFOB : origin = 0x1800, length = 0x0080 + FRAM : origin = 0xC200, length = 0x3D80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } ALIGN(0x0200), RUN_START(fram_rw_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } ALIGN(0x0200), RUN_START(fram_ro_start) + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } ALIGN(0x0200), RUN_START(fram_rx_start) + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + .int37 : {} > INT37 + .int38 : {} > INT38 + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC10 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_D : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _MPU_ENABLE + #ifdef _MPU_MANUAL + mpusb1 = (_MPU_SEGB1 + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (_MPU_SEGB2 + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = (_MPU_SAM0 << 12) + (_MPU_SAM3 << 8) + (_MPU_SAM2 << 4) + _MPU_SAM1; + #else + mpusb1 = (fram_ro_start + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (fram_rx_start + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = 0x7513; + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5728.cmd + diff --git a/msp430/lnk_msp430fr5729.cmd b/msp430/lnk_msp430fr5729.cmd new file mode 100644 index 00000000..6b726784 --- /dev/null +++ b/msp430/lnk_msp430fr5729.cmd @@ -0,0 +1,265 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5729.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5729 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1880, length = 0x0080 + INFOB : origin = 0x1800, length = 0x0080 + FRAM : origin = 0xC200, length = 0x3D80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } ALIGN(0x0200), RUN_START(fram_rw_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } ALIGN(0x0200), RUN_START(fram_ro_start) + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } ALIGN(0x0200), RUN_START(fram_rx_start) + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER2_B1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_B0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER1_B1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_B0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC10 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_D : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _MPU_ENABLE + #ifdef _MPU_MANUAL + mpusb1 = (_MPU_SEGB1 + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (_MPU_SEGB2 + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = (_MPU_SAM0 << 12) + (_MPU_SAM3 << 8) + (_MPU_SAM2 << 4) + _MPU_SAM1; + #else + mpusb1 = (fram_ro_start + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (fram_rx_start + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = 0x7513; + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5729.cmd + diff --git a/msp430/lnk_msp430fr5730.cmd b/msp430/lnk_msp430fr5730.cmd new file mode 100644 index 00000000..b4ac54c8 --- /dev/null +++ b/msp430/lnk_msp430fr5730.cmd @@ -0,0 +1,265 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5730.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5730 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1880, length = 0x0080 + INFOB : origin = 0x1800, length = 0x0080 + FRAM : origin = 0xF000, length = 0x0F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } ALIGN(0x0080), RUN_START(fram_rw_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } ALIGN(0x0080), RUN_START(fram_ro_start) + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } ALIGN(0x0080), RUN_START(fram_rx_start) + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + .int37 : {} > INT37 + .int38 : {} > INT38 + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC10 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_D : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _MPU_ENABLE + #ifdef _MPU_MANUAL + mpusb1 = (_MPU_SEGB1 + 0x1000 - 0xFFFF - 1) * 32 / 0x1000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (_MPU_SEGB2 + 0x1000 - 0xFFFF - 1) * 32 / 0x1000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = (_MPU_SAM0 << 12) + (_MPU_SAM3 << 8) + (_MPU_SAM2 << 4) + _MPU_SAM1; + #else + mpusb1 = (fram_ro_start + 0x1000 - 0xFFFF - 1) * 32 / 0x1000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (fram_rx_start + 0x1000 - 0xFFFF - 1) * 32 / 0x1000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = 0x7513; + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5730.cmd + diff --git a/msp430/lnk_msp430fr5731.cmd b/msp430/lnk_msp430fr5731.cmd new file mode 100644 index 00000000..22726799 --- /dev/null +++ b/msp430/lnk_msp430fr5731.cmd @@ -0,0 +1,265 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5731.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5731 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1880, length = 0x0080 + INFOB : origin = 0x1800, length = 0x0080 + FRAM : origin = 0xF000, length = 0x0F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } ALIGN(0x0080), RUN_START(fram_rw_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } ALIGN(0x0080), RUN_START(fram_ro_start) + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } ALIGN(0x0080), RUN_START(fram_rx_start) + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER2_B1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_B0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER1_B1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_B0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC10 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_D : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _MPU_ENABLE + #ifdef _MPU_MANUAL + mpusb1 = (_MPU_SEGB1 + 0x1000 - 0xFFFF - 1) * 32 / 0x1000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (_MPU_SEGB2 + 0x1000 - 0xFFFF - 1) * 32 / 0x1000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = (_MPU_SAM0 << 12) + (_MPU_SAM3 << 8) + (_MPU_SAM2 << 4) + _MPU_SAM1; + #else + mpusb1 = (fram_ro_start + 0x1000 - 0xFFFF - 1) * 32 / 0x1000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (fram_rx_start + 0x1000 - 0xFFFF - 1) * 32 / 0x1000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = 0x7513; + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5731.cmd + diff --git a/msp430/lnk_msp430fr5732.cmd b/msp430/lnk_msp430fr5732.cmd new file mode 100644 index 00000000..42494cb8 --- /dev/null +++ b/msp430/lnk_msp430fr5732.cmd @@ -0,0 +1,265 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5732.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5732 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1880, length = 0x0080 + INFOB : origin = 0x1800, length = 0x0080 + FRAM : origin = 0xE000, length = 0x1F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } ALIGN(0x0100), RUN_START(fram_rw_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } ALIGN(0x0100), RUN_START(fram_ro_start) + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } ALIGN(0x0100), RUN_START(fram_rx_start) + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + .int37 : {} > INT37 + .int38 : {} > INT38 + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + .int46 : {} > INT46 + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_D : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _MPU_ENABLE + #ifdef _MPU_MANUAL + mpusb1 = (_MPU_SEGB1 + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (_MPU_SEGB2 + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = (_MPU_SAM0 << 12) + (_MPU_SAM3 << 8) + (_MPU_SAM2 << 4) + _MPU_SAM1; + #else + mpusb1 = (fram_ro_start + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (fram_rx_start + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = 0x7513; + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5732.cmd + diff --git a/msp430/lnk_msp430fr5733.cmd b/msp430/lnk_msp430fr5733.cmd new file mode 100644 index 00000000..aa748f11 --- /dev/null +++ b/msp430/lnk_msp430fr5733.cmd @@ -0,0 +1,265 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5733.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5733 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1880, length = 0x0080 + INFOB : origin = 0x1800, length = 0x0080 + FRAM : origin = 0xE000, length = 0x1F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } ALIGN(0x0100), RUN_START(fram_rw_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } ALIGN(0x0100), RUN_START(fram_ro_start) + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } ALIGN(0x0100), RUN_START(fram_rx_start) + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER2_B1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_B0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER1_B1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_B0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + .int46 : {} > INT46 + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_D : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _MPU_ENABLE + #ifdef _MPU_MANUAL + mpusb1 = (_MPU_SEGB1 + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (_MPU_SEGB2 + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = (_MPU_SAM0 << 12) + (_MPU_SAM3 << 8) + (_MPU_SAM2 << 4) + _MPU_SAM1; + #else + mpusb1 = (fram_ro_start + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (fram_rx_start + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = 0x7513; + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5733.cmd + diff --git a/msp430/lnk_msp430fr5734.cmd b/msp430/lnk_msp430fr5734.cmd new file mode 100644 index 00000000..e74a40ed --- /dev/null +++ b/msp430/lnk_msp430fr5734.cmd @@ -0,0 +1,265 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5734.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5734 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1880, length = 0x0080 + INFOB : origin = 0x1800, length = 0x0080 + FRAM : origin = 0xE000, length = 0x1F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } ALIGN(0x0100), RUN_START(fram_rw_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } ALIGN(0x0100), RUN_START(fram_ro_start) + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } ALIGN(0x0100), RUN_START(fram_rx_start) + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + .int37 : {} > INT37 + .int38 : {} > INT38 + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC10 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_D : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _MPU_ENABLE + #ifdef _MPU_MANUAL + mpusb1 = (_MPU_SEGB1 + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (_MPU_SEGB2 + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = (_MPU_SAM0 << 12) + (_MPU_SAM3 << 8) + (_MPU_SAM2 << 4) + _MPU_SAM1; + #else + mpusb1 = (fram_ro_start + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (fram_rx_start + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = 0x7513; + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5734.cmd + diff --git a/msp430/lnk_msp430fr5735.cmd b/msp430/lnk_msp430fr5735.cmd new file mode 100644 index 00000000..a9c45e24 --- /dev/null +++ b/msp430/lnk_msp430fr5735.cmd @@ -0,0 +1,265 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5735.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5735 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1880, length = 0x0080 + INFOB : origin = 0x1800, length = 0x0080 + FRAM : origin = 0xE000, length = 0x1F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } ALIGN(0x0100), RUN_START(fram_rw_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } ALIGN(0x0100), RUN_START(fram_ro_start) + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } ALIGN(0x0100), RUN_START(fram_rx_start) + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER2_B1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_B0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER1_B1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_B0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC10 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_D : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _MPU_ENABLE + #ifdef _MPU_MANUAL + mpusb1 = (_MPU_SEGB1 + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (_MPU_SEGB2 + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = (_MPU_SAM0 << 12) + (_MPU_SAM3 << 8) + (_MPU_SAM2 << 4) + _MPU_SAM1; + #else + mpusb1 = (fram_ro_start + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (fram_rx_start + 0x2000 - 0xFFFF - 1) * 32 / 0x2000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = 0x7513; + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5735.cmd + diff --git a/msp430/lnk_msp430fr5736.cmd b/msp430/lnk_msp430fr5736.cmd new file mode 100644 index 00000000..4c79a239 --- /dev/null +++ b/msp430/lnk_msp430fr5736.cmd @@ -0,0 +1,265 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5736.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5736 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1880, length = 0x0080 + INFOB : origin = 0x1800, length = 0x0080 + FRAM : origin = 0xC200, length = 0x3D80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } ALIGN(0x0200), RUN_START(fram_rw_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } ALIGN(0x0200), RUN_START(fram_ro_start) + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } ALIGN(0x0200), RUN_START(fram_rx_start) + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + .int37 : {} > INT37 + .int38 : {} > INT38 + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + .int46 : {} > INT46 + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_D : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _MPU_ENABLE + #ifdef _MPU_MANUAL + mpusb1 = (_MPU_SEGB1 + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (_MPU_SEGB2 + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = (_MPU_SAM0 << 12) + (_MPU_SAM3 << 8) + (_MPU_SAM2 << 4) + _MPU_SAM1; + #else + mpusb1 = (fram_ro_start + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (fram_rx_start + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = 0x7513; + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5736.cmd + diff --git a/msp430/lnk_msp430fr5737.cmd b/msp430/lnk_msp430fr5737.cmd new file mode 100644 index 00000000..275e32e8 --- /dev/null +++ b/msp430/lnk_msp430fr5737.cmd @@ -0,0 +1,265 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5737.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5737 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1880, length = 0x0080 + INFOB : origin = 0x1800, length = 0x0080 + FRAM : origin = 0xC200, length = 0x3D80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } ALIGN(0x0200), RUN_START(fram_rw_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } ALIGN(0x0200), RUN_START(fram_ro_start) + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } ALIGN(0x0200), RUN_START(fram_rx_start) + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER2_B1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_B0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER1_B1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_B0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + .int46 : {} > INT46 + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_D : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _MPU_ENABLE + #ifdef _MPU_MANUAL + mpusb1 = (_MPU_SEGB1 + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (_MPU_SEGB2 + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = (_MPU_SAM0 << 12) + (_MPU_SAM3 << 8) + (_MPU_SAM2 << 4) + _MPU_SAM1; + #else + mpusb1 = (fram_ro_start + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (fram_rx_start + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = 0x7513; + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5737.cmd + diff --git a/msp430/lnk_msp430fr5738.cmd b/msp430/lnk_msp430fr5738.cmd new file mode 100644 index 00000000..d60280e6 --- /dev/null +++ b/msp430/lnk_msp430fr5738.cmd @@ -0,0 +1,265 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5738.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5738 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1880, length = 0x0080 + INFOB : origin = 0x1800, length = 0x0080 + FRAM : origin = 0xC200, length = 0x3D80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } ALIGN(0x0200), RUN_START(fram_rw_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } ALIGN(0x0200), RUN_START(fram_ro_start) + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } ALIGN(0x0200), RUN_START(fram_rx_start) + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + .int37 : {} > INT37 + .int38 : {} > INT38 + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + .int43 : {} > INT43 + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC10 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_D : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _MPU_ENABLE + #ifdef _MPU_MANUAL + mpusb1 = (_MPU_SEGB1 + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (_MPU_SEGB2 + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = (_MPU_SAM0 << 12) + (_MPU_SAM3 << 8) + (_MPU_SAM2 << 4) + _MPU_SAM1; + #else + mpusb1 = (fram_ro_start + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (fram_rx_start + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = 0x7513; + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5738.cmd + diff --git a/msp430/lnk_msp430fr5739.cmd b/msp430/lnk_msp430fr5739.cmd new file mode 100644 index 00000000..55c902e3 --- /dev/null +++ b/msp430/lnk_msp430fr5739.cmd @@ -0,0 +1,265 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5739.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5739 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1880, length = 0x0080 + INFOB : origin = 0x1800, length = 0x0080 + FRAM : origin = 0xC200, length = 0x3D80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } ALIGN(0x0200), RUN_START(fram_rw_start) + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } ALIGN(0x0200), RUN_START(fram_ro_start) + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } ALIGN(0x0200), RUN_START(fram_rx_start) + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER2_B1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_B0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER1_B1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_B0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC10 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_D : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _MPU_ENABLE + #ifdef _MPU_MANUAL + mpusb1 = (_MPU_SEGB1 + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (_MPU_SEGB2 + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = (_MPU_SAM0 << 12) + (_MPU_SAM3 << 8) + (_MPU_SAM2 << 4) + _MPU_SAM1; + #else + mpusb1 = (fram_ro_start + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + mpusb2 = (fram_rx_start + 0x4000 - 0xFFFF - 1) * 32 / 0x4000 - 1 + 1; // Increment by 1 for Memory Size of x.5 + __mpuseg = (mpusb2 << 8) | mpusb1; + __mpusam = 0x7513; + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5739.cmd + diff --git a/msp430/lnk_msp430fr5847.cmd b/msp430/lnk_msp430fr5847.cmd new file mode 100644 index 00000000..ce7eaea7 --- /dev/null +++ b/msp430/lnk_msp430fr5847.cmd @@ -0,0 +1,336 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5847.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5847 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x8000, length = 0x7F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x8000 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .const : {} > FRAM /* Constant data */ + + .text:_isr : {} > FRAM /* Code ISRs */ + .text : {} > FRAM /* Code */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5847.cmd + diff --git a/msp430/lnk_msp430fr58471.cmd b/msp430/lnk_msp430fr58471.cmd new file mode 100644 index 00000000..f35352b6 --- /dev/null +++ b/msp430/lnk_msp430fr58471.cmd @@ -0,0 +1,336 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr58471.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR58471 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x8000, length = 0x7F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x8000 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .const : {} > FRAM /* Constant data */ + + .text:_isr : {} > FRAM /* Code ISRs */ + .text : {} > FRAM /* Code */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr58471.cmd + diff --git a/msp430/lnk_msp430fr5848.cmd b/msp430/lnk_msp430fr5848.cmd new file mode 100644 index 00000000..ef2d9bd9 --- /dev/null +++ b/msp430/lnk_msp430fr5848.cmd @@ -0,0 +1,336 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5848.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5848 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .const : {} > FRAM /* Constant data */ + + .text:_isr : {} > FRAM /* Code ISRs */ + .text : {} > FRAM /* Code */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5848.cmd + diff --git a/msp430/lnk_msp430fr5849.cmd b/msp430/lnk_msp430fr5849.cmd new file mode 100644 index 00000000..3e5d2b29 --- /dev/null +++ b/msp430/lnk_msp430fr5849.cmd @@ -0,0 +1,345 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5849.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5849 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5849.cmd + diff --git a/msp430/lnk_msp430fr5857.cmd b/msp430/lnk_msp430fr5857.cmd new file mode 100644 index 00000000..46b0d67d --- /dev/null +++ b/msp430/lnk_msp430fr5857.cmd @@ -0,0 +1,336 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5857.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5857 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x8000, length = 0x7F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x8000 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .const : {} > FRAM /* Constant data */ + + .text:_isr : {} > FRAM /* Code ISRs */ + .text : {} > FRAM /* Code */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5857.cmd + diff --git a/msp430/lnk_msp430fr5858.cmd b/msp430/lnk_msp430fr5858.cmd new file mode 100644 index 00000000..33de1331 --- /dev/null +++ b/msp430/lnk_msp430fr5858.cmd @@ -0,0 +1,336 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5858.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5858 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .const : {} > FRAM /* Constant data */ + + .text:_isr : {} > FRAM /* Code ISRs */ + .text : {} > FRAM /* Code */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5858.cmd + diff --git a/msp430/lnk_msp430fr5859.cmd b/msp430/lnk_msp430fr5859.cmd new file mode 100644 index 00000000..3d62c7e8 --- /dev/null +++ b/msp430/lnk_msp430fr5859.cmd @@ -0,0 +1,345 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5859.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5859 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5859.cmd + diff --git a/msp430/lnk_msp430fr5867.cmd b/msp430/lnk_msp430fr5867.cmd new file mode 100644 index 00000000..989e16b3 --- /dev/null +++ b/msp430/lnk_msp430fr5867.cmd @@ -0,0 +1,336 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5867.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5867 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x8000, length = 0x7F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x8000 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .const : {} > FRAM /* Constant data */ + + .text:_isr : {} > FRAM /* Code ISRs */ + .text : {} > FRAM /* Code */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5867.cmd + diff --git a/msp430/lnk_msp430fr58671.cmd b/msp430/lnk_msp430fr58671.cmd new file mode 100644 index 00000000..c1f98ae2 --- /dev/null +++ b/msp430/lnk_msp430fr58671.cmd @@ -0,0 +1,336 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr58671.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR58671 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x8000, length = 0x7F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x8000 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .const : {} > FRAM /* Constant data */ + + .text:_isr : {} > FRAM /* Code ISRs */ + .text : {} > FRAM /* Code */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr58671.cmd + diff --git a/msp430/lnk_msp430fr5868.cmd b/msp430/lnk_msp430fr5868.cmd new file mode 100644 index 00000000..b18bb6dd --- /dev/null +++ b/msp430/lnk_msp430fr5868.cmd @@ -0,0 +1,336 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5868.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5868 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .const : {} > FRAM /* Constant data */ + + .text:_isr : {} > FRAM /* Code ISRs */ + .text : {} > FRAM /* Code */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5868.cmd + diff --git a/msp430/lnk_msp430fr5869.cmd b/msp430/lnk_msp430fr5869.cmd new file mode 100644 index 00000000..2ac89333 --- /dev/null +++ b/msp430/lnk_msp430fr5869.cmd @@ -0,0 +1,345 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5869.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5869 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5869.cmd + diff --git a/msp430/lnk_msp430fr5870.cmd b/msp430/lnk_msp430fr5870.cmd new file mode 100644 index 00000000..106eaee3 --- /dev/null +++ b/msp430/lnk_msp430fr5870.cmd @@ -0,0 +1,337 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5870.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5870 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x8000, length = 0x7F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x8000 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .const : {} > FRAM /* Constant data */ + + .text:_isr : {} > FRAM /* Code ISRs */ + .text : {} > FRAM /* Code */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + .int29 : {} > INT29 + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5870.cmd + diff --git a/msp430/lnk_msp430fr5872.cmd b/msp430/lnk_msp430fr5872.cmd new file mode 100644 index 00000000..3a5b40f6 --- /dev/null +++ b/msp430/lnk_msp430fr5872.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5872.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5872 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + .int29 : {} > INT29 + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5872.cmd + diff --git a/msp430/lnk_msp430fr58721.cmd b/msp430/lnk_msp430fr58721.cmd new file mode 100644 index 00000000..4c81a88e --- /dev/null +++ b/msp430/lnk_msp430fr58721.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr58721.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR58721 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + .int29 : {} > INT29 + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr58721.cmd + diff --git a/msp430/lnk_msp430fr5887.cmd b/msp430/lnk_msp430fr5887.cmd new file mode 100644 index 00000000..60b8a558 --- /dev/null +++ b/msp430/lnk_msp430fr5887.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5887.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5887 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + .int29 : {} > INT29 + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + ESCAN_IF : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5887.cmd + diff --git a/msp430/lnk_msp430fr5888.cmd b/msp430/lnk_msp430fr5888.cmd new file mode 100644 index 00000000..89fd33ea --- /dev/null +++ b/msp430/lnk_msp430fr5888.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5888.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5888 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0xBFF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + .int29 : {} > INT29 + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + ESCAN_IF : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5888.cmd + diff --git a/msp430/lnk_msp430fr5889.cmd b/msp430/lnk_msp430fr5889.cmd new file mode 100644 index 00000000..f5863690 --- /dev/null +++ b/msp430/lnk_msp430fr5889.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5889.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5889 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + .int29 : {} > INT29 + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + ESCAN_IF : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5889.cmd + diff --git a/msp430/lnk_msp430fr58891.cmd b/msp430/lnk_msp430fr58891.cmd new file mode 100644 index 00000000..0c3e128d --- /dev/null +++ b/msp430/lnk_msp430fr58891.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr58891.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR58891 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + .int29 : {} > INT29 + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + ESCAN_IF : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr58891.cmd + diff --git a/msp430/lnk_msp430fr5922.cmd b/msp430/lnk_msp430fr5922.cmd new file mode 100644 index 00000000..29520227 --- /dev/null +++ b/msp430/lnk_msp430fr5922.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5922.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5922 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + .int29 : {} > INT29 + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5922.cmd + diff --git a/msp430/lnk_msp430fr59221.cmd b/msp430/lnk_msp430fr59221.cmd new file mode 100644 index 00000000..c6d30d40 --- /dev/null +++ b/msp430/lnk_msp430fr59221.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr59221.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR59221 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + .int29 : {} > INT29 + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr59221.cmd + diff --git a/msp430/lnk_msp430fr5947.cmd b/msp430/lnk_msp430fr5947.cmd new file mode 100644 index 00000000..586611b9 --- /dev/null +++ b/msp430/lnk_msp430fr5947.cmd @@ -0,0 +1,336 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5947.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5947 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x8000, length = 0x7F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x8000 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .const : {} > FRAM /* Constant data */ + + .text:_isr : {} > FRAM /* Code ISRs */ + .text : {} > FRAM /* Code */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + AES256 : { * ( .int30 ) } > INT30 type = VECT_INIT + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5947.cmd + diff --git a/msp430/lnk_msp430fr59471.cmd b/msp430/lnk_msp430fr59471.cmd new file mode 100644 index 00000000..fe59fa38 --- /dev/null +++ b/msp430/lnk_msp430fr59471.cmd @@ -0,0 +1,336 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr59471.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR59471 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x8000, length = 0x7F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x8000 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .const : {} > FRAM /* Constant data */ + + .text:_isr : {} > FRAM /* Code ISRs */ + .text : {} > FRAM /* Code */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + AES256 : { * ( .int30 ) } > INT30 type = VECT_INIT + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr59471.cmd + diff --git a/msp430/lnk_msp430fr5948.cmd b/msp430/lnk_msp430fr5948.cmd new file mode 100644 index 00000000..2c65550a --- /dev/null +++ b/msp430/lnk_msp430fr5948.cmd @@ -0,0 +1,336 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5948.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5948 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .const : {} > FRAM /* Constant data */ + + .text:_isr : {} > FRAM /* Code ISRs */ + .text : {} > FRAM /* Code */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + AES256 : { * ( .int30 ) } > INT30 type = VECT_INIT + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5948.cmd + diff --git a/msp430/lnk_msp430fr5949.cmd b/msp430/lnk_msp430fr5949.cmd new file mode 100644 index 00000000..8cf765a5 --- /dev/null +++ b/msp430/lnk_msp430fr5949.cmd @@ -0,0 +1,345 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5949.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5949 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + AES256 : { * ( .int30 ) } > INT30 type = VECT_INIT + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5949.cmd + diff --git a/msp430/lnk_msp430fr5957.cmd b/msp430/lnk_msp430fr5957.cmd new file mode 100644 index 00000000..a0a75a71 --- /dev/null +++ b/msp430/lnk_msp430fr5957.cmd @@ -0,0 +1,336 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5957.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5957 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x8000, length = 0x7F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x8000 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .const : {} > FRAM /* Constant data */ + + .text:_isr : {} > FRAM /* Code ISRs */ + .text : {} > FRAM /* Code */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + AES256 : { * ( .int30 ) } > INT30 type = VECT_INIT + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5957.cmd + diff --git a/msp430/lnk_msp430fr5958.cmd b/msp430/lnk_msp430fr5958.cmd new file mode 100644 index 00000000..ceee4acd --- /dev/null +++ b/msp430/lnk_msp430fr5958.cmd @@ -0,0 +1,336 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5958.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5958 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .const : {} > FRAM /* Constant data */ + + .text:_isr : {} > FRAM /* Code ISRs */ + .text : {} > FRAM /* Code */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + AES256 : { * ( .int30 ) } > INT30 type = VECT_INIT + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5958.cmd + diff --git a/msp430/lnk_msp430fr5959.cmd b/msp430/lnk_msp430fr5959.cmd new file mode 100644 index 00000000..39e0d530 --- /dev/null +++ b/msp430/lnk_msp430fr5959.cmd @@ -0,0 +1,345 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5959.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5959 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + AES256 : { * ( .int30 ) } > INT30 type = VECT_INIT + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5959.cmd + diff --git a/msp430/lnk_msp430fr5962.cmd b/msp430/lnk_msp430fr5962.cmd new file mode 100644 index 00000000..bee6cf9e --- /dev/null +++ b/msp430/lnk_msp430fr5962.cmd @@ -0,0 +1,358 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR5962 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0xA, length = 0x16 + BSL : origin = 0x1000, length = 0x800 + INFOD : origin = 0x1800, length = 0x80 + INFOC : origin = 0x1880, length = 0x80 + INFOB : origin = 0x1900, length = 0x80 + INFOA : origin = 0x1980, length = 0x80 + RAM : origin = 0x1C00, length = 0x2000 + FRAM : origin = 0x4000, length = 0xBF80 + FRAM2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + + GROUP(READ_WRITE_MEMORY) + { + + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + + } > 0x4000 + + .cinit : {} > FRAM /* Initialization tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .text:_isr : {} > FRAM /* Code ISRs */ + +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + /* MSP430 INFO memory segments */ + .infoA : type = NOINIT{} > INFOA + .infoB : type = NOINIT{} > INFOB + .infoC : type = NOINIT{} > INFOC + .infoD : type = NOINIT{} > INFOD + + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + PORT8 : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT7 : { * ( .int20 ) } > INT20 type = VECT_INIT + EUSCI_B3 : { * ( .int21 ) } > INT21 type = VECT_INIT + EUSCI_B2 : { * ( .int22 ) } > INT22 type = VECT_INIT + EUSCI_B1 : { * ( .int23 ) } > INT23 type = VECT_INIT + EUSCI_A3 : { * ( .int24 ) } > INT24 type = VECT_INIT + EUSCI_A2 : { * ( .int25 ) } > INT25 type = VECT_INIT + PORT6 : { * ( .int26 ) } > INT26 type = VECT_INIT + PORT5 : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMER4_A1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMER4_A0 : { * ( .int29 ) } > INT29 type = VECT_INIT + AES256 : { * ( .int30 ) } > INT30 type = VECT_INIT + RTC_C : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + EUSCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12_B : { * ( .int46 ) } > INT46 type = VECT_INIT + EUSCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + EUSCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* MPU/IPE SPECIFIC MEMORY SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr5962.cmd + + diff --git a/msp430/lnk_msp430fr5964.cmd b/msp430/lnk_msp430fr5964.cmd new file mode 100644 index 00000000..731ad482 --- /dev/null +++ b/msp430/lnk_msp430fr5964.cmd @@ -0,0 +1,358 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR5964 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0xA, length = 0x16 + BSL : origin = 0x1000, length = 0x800 + INFOD : origin = 0x1800, length = 0x80 + INFOC : origin = 0x1880, length = 0x80 + INFOB : origin = 0x1900, length = 0x80 + INFOA : origin = 0x1980, length = 0x80 + RAM : origin = 0x1C00, length = 0x2000 + FRAM : origin = 0x4000, length = 0xBF80 + FRAM2 : origin = 0x10000,length = 0x33FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + + GROUP(READ_WRITE_MEMORY) + { + + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + + } > 0x4000 + + .cinit : {} > FRAM /* Initialization tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .text:_isr : {} > FRAM /* Code ISRs */ + +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + /* MSP430 INFO memory segments */ + .infoA : type = NOINIT{} > INFOA + .infoB : type = NOINIT{} > INFOB + .infoC : type = NOINIT{} > INFOC + .infoD : type = NOINIT{} > INFOD + + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + PORT8 : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT7 : { * ( .int20 ) } > INT20 type = VECT_INIT + EUSCI_B3 : { * ( .int21 ) } > INT21 type = VECT_INIT + EUSCI_B2 : { * ( .int22 ) } > INT22 type = VECT_INIT + EUSCI_B1 : { * ( .int23 ) } > INT23 type = VECT_INIT + EUSCI_A3 : { * ( .int24 ) } > INT24 type = VECT_INIT + EUSCI_A2 : { * ( .int25 ) } > INT25 type = VECT_INIT + PORT6 : { * ( .int26 ) } > INT26 type = VECT_INIT + PORT5 : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMER4_A1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMER4_A0 : { * ( .int29 ) } > INT29 type = VECT_INIT + AES256 : { * ( .int30 ) } > INT30 type = VECT_INIT + RTC_C : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + EUSCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12_B : { * ( .int46 ) } > INT46 type = VECT_INIT + EUSCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + EUSCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* MPU/IPE SPECIFIC MEMORY SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr5964.cmd + + diff --git a/msp430/lnk_msp430fr5967.cmd b/msp430/lnk_msp430fr5967.cmd new file mode 100644 index 00000000..ff09456f --- /dev/null +++ b/msp430/lnk_msp430fr5967.cmd @@ -0,0 +1,336 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5967.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5967 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x8000, length = 0x7F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x8000 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .const : {} > FRAM /* Constant data */ + + .text:_isr : {} > FRAM /* Code ISRs */ + .text : {} > FRAM /* Code */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + AES256 : { * ( .int30 ) } > INT30 type = VECT_INIT + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5967.cmd + diff --git a/msp430/lnk_msp430fr5968.cmd b/msp430/lnk_msp430fr5968.cmd new file mode 100644 index 00000000..1d223448 --- /dev/null +++ b/msp430/lnk_msp430fr5968.cmd @@ -0,0 +1,336 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5968.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5968 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .const : {} > FRAM /* Constant data */ + + .text:_isr : {} > FRAM /* Code ISRs */ + .text : {} > FRAM /* Code */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + AES256 : { * ( .int30 ) } > INT30 type = VECT_INIT + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5968.cmd + diff --git a/msp430/lnk_msp430fr5969.cmd b/msp430/lnk_msp430fr5969.cmd new file mode 100644 index 00000000..7ef558a7 --- /dev/null +++ b/msp430/lnk_msp430fr5969.cmd @@ -0,0 +1,345 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5969.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5969 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + AES256 : { * ( .int30 ) } > INT30 type = VECT_INIT + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5969.cmd + diff --git a/msp430/lnk_msp430fr59691.cmd b/msp430/lnk_msp430fr59691.cmd new file mode 100644 index 00000000..d8761bac --- /dev/null +++ b/msp430/lnk_msp430fr59691.cmd @@ -0,0 +1,345 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr59691.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR59691 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + AES256 : { * ( .int30 ) } > INT30 type = VECT_INIT + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr59691.cmd + diff --git a/msp430/lnk_msp430fr5970.cmd b/msp430/lnk_msp430fr5970.cmd new file mode 100644 index 00000000..ade87898 --- /dev/null +++ b/msp430/lnk_msp430fr5970.cmd @@ -0,0 +1,337 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5970.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5970 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x8000, length = 0x7F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x8000 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .const : {} > FRAM /* Constant data */ + + .text:_isr : {} > FRAM /* Code ISRs */ + .text : {} > FRAM /* Code */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + .int29 : {} > INT29 + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5970.cmd + diff --git a/msp430/lnk_msp430fr5972.cmd b/msp430/lnk_msp430fr5972.cmd new file mode 100644 index 00000000..857d2a31 --- /dev/null +++ b/msp430/lnk_msp430fr5972.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5972.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5972 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + .int29 : {} > INT29 + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5972.cmd + diff --git a/msp430/lnk_msp430fr59721.cmd b/msp430/lnk_msp430fr59721.cmd new file mode 100644 index 00000000..94daea5d --- /dev/null +++ b/msp430/lnk_msp430fr59721.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr59721.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR59721 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + .int29 : {} > INT29 + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr59721.cmd + diff --git a/msp430/lnk_msp430fr5986.cmd b/msp430/lnk_msp430fr5986.cmd new file mode 100644 index 00000000..332abf93 --- /dev/null +++ b/msp430/lnk_msp430fr5986.cmd @@ -0,0 +1,337 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5986.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5986 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .const : {} > FRAM /* Constant data */ + + .text:_isr : {} > FRAM /* Code ISRs */ + .text : {} > FRAM /* Code */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + .int29 : {} > INT29 + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + ESCAN_IF : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5986.cmd + diff --git a/msp430/lnk_msp430fr5987.cmd b/msp430/lnk_msp430fr5987.cmd new file mode 100644 index 00000000..c29b2afc --- /dev/null +++ b/msp430/lnk_msp430fr5987.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5987.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5987 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + .int29 : {} > INT29 + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + ESCAN_IF : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5987.cmd + diff --git a/msp430/lnk_msp430fr5988.cmd b/msp430/lnk_msp430fr5988.cmd new file mode 100644 index 00000000..b064838b --- /dev/null +++ b/msp430/lnk_msp430fr5988.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5988.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5988 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0xBFF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + .int29 : {} > INT29 + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + ESCAN_IF : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5988.cmd + diff --git a/msp430/lnk_msp430fr5989.cmd b/msp430/lnk_msp430fr5989.cmd new file mode 100644 index 00000000..745a5c6c --- /dev/null +++ b/msp430/lnk_msp430fr5989.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5989.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5989 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + .int29 : {} > INT29 + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + ESCAN_IF : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5989.cmd + diff --git a/msp430/lnk_msp430fr59891.cmd b/msp430/lnk_msp430fr59891.cmd new file mode 100644 index 00000000..302e08a2 --- /dev/null +++ b/msp430/lnk_msp430fr59891.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr59891.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR59891 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + .int29 : {} > INT29 + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + ESCAN_IF : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr59891.cmd + diff --git a/msp430/lnk_msp430fr5992.cmd b/msp430/lnk_msp430fr5992.cmd new file mode 100644 index 00000000..86142eb1 --- /dev/null +++ b/msp430/lnk_msp430fr5992.cmd @@ -0,0 +1,373 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR5992 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0xA, length = 0x16 + BSL : origin = 0x1000, length = 0x800 + INFOD : origin = 0x1800, length = 0x80 + INFOC : origin = 0x1880, length = 0x80 + INFOB : origin = 0x1900, length = 0x80 + INFOA : origin = 0x1980, length = 0x80 + RAM : origin = 0x1C00, length = 0x1000 + FRAM : origin = 0x4000, length = 0xBF80 + FRAM2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the LEA memory map */ +/****************************************************************************/ + +#define LEASTACK_SIZE 0x138 + +MEMORY +{ + LEARAM : origin = 0x2C00, length = 0x1000 - LEASTACK_SIZE + LEASTACK : origin = 0x3C00 - LEASTACK_SIZE, length = LEASTACK_SIZE +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + + GROUP(READ_WRITE_MEMORY) + { + + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + + } > 0x4000 + + .cinit : {} > FRAM /* Initialization tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .text:_isr : {} > FRAM /* Code ISRs */ + +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + /* MSP430 INFO memory segments */ + .infoA : type = NOINIT{} > INFOA + .infoB : type = NOINIT{} > INFOB + .infoC : type = NOINIT{} > INFOC + .infoD : type = NOINIT{} > INFOD + + + .leaRAM : {} > LEARAM /* LEA RAM */ + .leaStack : {} > LEASTACK (HIGH) /* LEA STACK */ + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + LEA : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT8 : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT7 : { * ( .int20 ) } > INT20 type = VECT_INIT + EUSCI_B3 : { * ( .int21 ) } > INT21 type = VECT_INIT + EUSCI_B2 : { * ( .int22 ) } > INT22 type = VECT_INIT + EUSCI_B1 : { * ( .int23 ) } > INT23 type = VECT_INIT + EUSCI_A3 : { * ( .int24 ) } > INT24 type = VECT_INIT + EUSCI_A2 : { * ( .int25 ) } > INT25 type = VECT_INIT + PORT6 : { * ( .int26 ) } > INT26 type = VECT_INIT + PORT5 : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMER4_A1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMER4_A0 : { * ( .int29 ) } > INT29 type = VECT_INIT + AES256 : { * ( .int30 ) } > INT30 type = VECT_INIT + RTC_C : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + EUSCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12_B : { * ( .int46 ) } > INT46 type = VECT_INIT + EUSCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + EUSCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* MPU/IPE SPECIFIC MEMORY SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr5992.cmd + + diff --git a/msp430/lnk_msp430fr5994.cmd b/msp430/lnk_msp430fr5994.cmd new file mode 100644 index 00000000..4c1723e7 --- /dev/null +++ b/msp430/lnk_msp430fr5994.cmd @@ -0,0 +1,373 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR5994 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0xA, length = 0x16 + BSL : origin = 0x1000, length = 0x800 + INFOD : origin = 0x1800, length = 0x80 + INFOC : origin = 0x1880, length = 0x80 + INFOB : origin = 0x1900, length = 0x80 + INFOA : origin = 0x1980, length = 0x80 + RAM : origin = 0x1C00, length = 0x1000 + FRAM : origin = 0x4000, length = 0xBF80 + FRAM2 : origin = 0x10000,length = 0x33FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the LEA memory map */ +/****************************************************************************/ + +#define LEASTACK_SIZE 0x138 + +MEMORY +{ + LEARAM : origin = 0x2C00, length = 0x1000 - LEASTACK_SIZE + LEASTACK : origin = 0x3C00 - LEASTACK_SIZE, length = LEASTACK_SIZE +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + + GROUP(READ_WRITE_MEMORY) + { + + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + + } > 0x4000 + + .cinit : {} > FRAM /* Initialization tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .text:_isr : {} > FRAM /* Code ISRs */ + +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + /* MSP430 INFO memory segments */ + .infoA : type = NOINIT{} > INFOA + .infoB : type = NOINIT{} > INFOB + .infoC : type = NOINIT{} > INFOC + .infoD : type = NOINIT{} > INFOD + + + .leaRAM : {} > LEARAM /* LEA RAM */ + .leaStack : {} > LEASTACK (HIGH) /* LEA STACK */ + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + LEA : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT8 : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT7 : { * ( .int20 ) } > INT20 type = VECT_INIT + EUSCI_B3 : { * ( .int21 ) } > INT21 type = VECT_INIT + EUSCI_B2 : { * ( .int22 ) } > INT22 type = VECT_INIT + EUSCI_B1 : { * ( .int23 ) } > INT23 type = VECT_INIT + EUSCI_A3 : { * ( .int24 ) } > INT24 type = VECT_INIT + EUSCI_A2 : { * ( .int25 ) } > INT25 type = VECT_INIT + PORT6 : { * ( .int26 ) } > INT26 type = VECT_INIT + PORT5 : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMER4_A1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMER4_A0 : { * ( .int29 ) } > INT29 type = VECT_INIT + AES256 : { * ( .int30 ) } > INT30 type = VECT_INIT + RTC_C : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + EUSCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12_B : { * ( .int46 ) } > INT46 type = VECT_INIT + EUSCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + EUSCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* MPU/IPE SPECIFIC MEMORY SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr5994.cmd + + diff --git a/msp430/lnk_msp430fr59941.cmd b/msp430/lnk_msp430fr59941.cmd new file mode 100644 index 00000000..64f763c8 --- /dev/null +++ b/msp430/lnk_msp430fr59941.cmd @@ -0,0 +1,373 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR59941 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0xA, length = 0x16 + BSL : origin = 0x1000, length = 0x800 + INFOD : origin = 0x1800, length = 0x80 + INFOC : origin = 0x1880, length = 0x80 + INFOB : origin = 0x1900, length = 0x80 + INFOA : origin = 0x1980, length = 0x80 + RAM : origin = 0x1C00, length = 0x1000 + FRAM : origin = 0x4000, length = 0xBF80 + FRAM2 : origin = 0x10000,length = 0x33FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the LEA memory map */ +/****************************************************************************/ + +#define LEASTACK_SIZE 0x138 + +MEMORY +{ + LEARAM : origin = 0x2C00, length = 0x1000 - LEASTACK_SIZE + LEASTACK : origin = 0x3C00 - LEASTACK_SIZE, length = LEASTACK_SIZE +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + + GROUP(READ_WRITE_MEMORY) + { + + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + + } > 0x4000 + + .cinit : {} > FRAM /* Initialization tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .text:_isr : {} > FRAM /* Code ISRs */ + +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + /* MSP430 INFO memory segments */ + .infoA : type = NOINIT{} > INFOA + .infoB : type = NOINIT{} > INFOB + .infoC : type = NOINIT{} > INFOC + .infoD : type = NOINIT{} > INFOD + + + .leaRAM : {} > LEARAM /* LEA RAM */ + .leaStack : {} > LEASTACK (HIGH) /* LEA STACK */ + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + LEA : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT8 : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT7 : { * ( .int20 ) } > INT20 type = VECT_INIT + EUSCI_B3 : { * ( .int21 ) } > INT21 type = VECT_INIT + EUSCI_B2 : { * ( .int22 ) } > INT22 type = VECT_INIT + EUSCI_B1 : { * ( .int23 ) } > INT23 type = VECT_INIT + EUSCI_A3 : { * ( .int24 ) } > INT24 type = VECT_INIT + EUSCI_A2 : { * ( .int25 ) } > INT25 type = VECT_INIT + PORT6 : { * ( .int26 ) } > INT26 type = VECT_INIT + PORT5 : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMER4_A1 : { * ( .int28 ) } > INT28 type = VECT_INIT + TIMER4_A0 : { * ( .int29 ) } > INT29 type = VECT_INIT + AES256 : { * ( .int30 ) } > INT30 type = VECT_INIT + RTC_C : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + EUSCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12_B : { * ( .int46 ) } > INT46 type = VECT_INIT + EUSCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + EUSCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* MPU/IPE SPECIFIC MEMORY SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr59941.cmd + + diff --git a/msp430/lnk_msp430fr6005.cmd b/msp430/lnk_msp430fr6005.cmd new file mode 100644 index 00000000..9f1fbb41 --- /dev/null +++ b/msp430/lnk_msp430fr6005.cmd @@ -0,0 +1,365 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR6005 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0xA, length = 0x16 + BSL : origin = 0x1000, length = 0x800 + CAL_CONF : origin = 0x1900, length = 0x100 + TLVMEM : origin = 0x1A00, length = 0x100 + BOOTROM : origin = 0x1B00, length = 0x100 + RAM : origin = 0x1C00, length = 0x1000 + FRAM : origin = 0x4000, length = 0xBF80 + FRAM2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the LEA memory map */ +/****************************************************************************/ + +#define LEASTACK_SIZE 0x138 + +MEMORY +{ + LEARAM : origin = 0x2C00, length = 0x1000 - LEASTACK_SIZE + LEASTACK : origin = 0x3C00 - LEASTACK_SIZE, length = LEASTACK_SIZE +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + + GROUP(READ_WRITE_MEMORY) + { + + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + + } > 0x4000 + + .cinit : {} > FRAM /* Initialization tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .text:_isr : {} > FRAM /* Code ISRs */ + +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .leaRAM : {} > LEARAM /* LEA RAM */ + .leaStack : {} > LEASTACK (HIGH) /* LEA STACK */ + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + SDHS : { * ( .int14 ) } > INT14 type = VECT_INIT + SAPH : { * ( .int15 ) } > INT15 type = VECT_INIT + HSPLL : { * ( .int16 ) } > INT16 type = VECT_INIT + UUPS : { * ( .int17 ) } > INT17 type = VECT_INIT + LEA : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT9 : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT8 : { * ( .int20 ) } > INT20 type = VECT_INIT + PORT7 : { * ( .int21 ) } > INT21 type = VECT_INIT + EUSCI_B1 : { * ( .int22 ) } > INT22 type = VECT_INIT + EUSCI_A3 : { * ( .int23 ) } > INT23 type = VECT_INIT + EUSCI_A2 : { * ( .int24 ) } > INT24 type = VECT_INIT + PORT6 : { * ( .int25 ) } > INT25 type = VECT_INIT + PORT5 : { * ( .int26 ) } > INT26 type = VECT_INIT + TIMER4_A1 : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMER4_A0 : { * ( .int28 ) } > INT28 type = VECT_INIT + AES256 : { * ( .int29 ) } > INT29 type = VECT_INIT + RTC_C : { * ( .int30 ) } > INT30 type = VECT_INIT + LCD_C : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + EUSCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12_B : { * ( .int46 ) } > INT46 type = VECT_INIT + EUSCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + EUSCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* MPU/IPE SPECIFIC MEMORY SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr6005.cmd + + diff --git a/msp430/lnk_msp430fr6007.cmd b/msp430/lnk_msp430fr6007.cmd new file mode 100644 index 00000000..573acac4 --- /dev/null +++ b/msp430/lnk_msp430fr6007.cmd @@ -0,0 +1,365 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR6007 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0xA, length = 0x16 + BSL : origin = 0x1000, length = 0x800 + CAL_CONF : origin = 0x1900, length = 0x100 + TLVMEM : origin = 0x1A00, length = 0x100 + BOOTROM : origin = 0x1B00, length = 0x100 + RAM : origin = 0x1C00, length = 0x1000 + FRAM : origin = 0x4000, length = 0xBF80 + FRAM2 : origin = 0x10000,length = 0x33FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the LEA memory map */ +/****************************************************************************/ + +#define LEASTACK_SIZE 0x138 + +MEMORY +{ + LEARAM : origin = 0x2C00, length = 0x1000 - LEASTACK_SIZE + LEASTACK : origin = 0x3C00 - LEASTACK_SIZE, length = LEASTACK_SIZE +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + + GROUP(READ_WRITE_MEMORY) + { + + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + + } > 0x4000 + + .cinit : {} > FRAM /* Initialization tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .text:_isr : {} > FRAM /* Code ISRs */ + +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .leaRAM : {} > LEARAM /* LEA RAM */ + .leaStack : {} > LEASTACK (HIGH) /* LEA STACK */ + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + SDHS : { * ( .int14 ) } > INT14 type = VECT_INIT + SAPH : { * ( .int15 ) } > INT15 type = VECT_INIT + HSPLL : { * ( .int16 ) } > INT16 type = VECT_INIT + UUPS : { * ( .int17 ) } > INT17 type = VECT_INIT + LEA : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT9 : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT8 : { * ( .int20 ) } > INT20 type = VECT_INIT + PORT7 : { * ( .int21 ) } > INT21 type = VECT_INIT + EUSCI_B1 : { * ( .int22 ) } > INT22 type = VECT_INIT + EUSCI_A3 : { * ( .int23 ) } > INT23 type = VECT_INIT + EUSCI_A2 : { * ( .int24 ) } > INT24 type = VECT_INIT + PORT6 : { * ( .int25 ) } > INT25 type = VECT_INIT + PORT5 : { * ( .int26 ) } > INT26 type = VECT_INIT + TIMER4_A1 : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMER4_A0 : { * ( .int28 ) } > INT28 type = VECT_INIT + AES256 : { * ( .int29 ) } > INT29 type = VECT_INIT + RTC_C : { * ( .int30 ) } > INT30 type = VECT_INIT + LCD_C : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + EUSCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12_B : { * ( .int46 ) } > INT46 type = VECT_INIT + EUSCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + EUSCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* MPU/IPE SPECIFIC MEMORY SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr6007.cmd + + diff --git a/msp430/lnk_msp430fr6035.cmd b/msp430/lnk_msp430fr6035.cmd new file mode 100644 index 00000000..5e67fd33 --- /dev/null +++ b/msp430/lnk_msp430fr6035.cmd @@ -0,0 +1,365 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR6035 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0xA, length = 0x16 + BSL : origin = 0x1000, length = 0x800 + CAL_CONF : origin = 0x1900, length = 0x100 + TLVMEM : origin = 0x1A00, length = 0x100 + BOOTROM : origin = 0x1B00, length = 0x100 + RAM : origin = 0x1C00, length = 0x1000 + FRAM : origin = 0x4000, length = 0xBF80 + FRAM2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the LEA memory map */ +/****************************************************************************/ + +#define LEASTACK_SIZE 0x138 + +MEMORY +{ + LEARAM : origin = 0x2C00, length = 0x1000 - LEASTACK_SIZE + LEASTACK : origin = 0x3C00 - LEASTACK_SIZE, length = LEASTACK_SIZE +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + + GROUP(READ_WRITE_MEMORY) + { + + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + + } > 0x4000 + + .cinit : {} > FRAM /* Initialization tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .text:_isr : {} > FRAM /* Code ISRs */ + +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .leaRAM : {} > LEARAM /* LEA RAM */ + .leaStack : {} > LEASTACK (HIGH) /* LEA STACK */ + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + LEA : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT9 : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT8 : { * ( .int20 ) } > INT20 type = VECT_INIT + PORT7 : { * ( .int21 ) } > INT21 type = VECT_INIT + EUSCI_B1 : { * ( .int22 ) } > INT22 type = VECT_INIT + EUSCI_A3 : { * ( .int23 ) } > INT23 type = VECT_INIT + EUSCI_A2 : { * ( .int24 ) } > INT24 type = VECT_INIT + PORT6 : { * ( .int25 ) } > INT25 type = VECT_INIT + PORT5 : { * ( .int26 ) } > INT26 type = VECT_INIT + TIMER4_A1 : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMER4_A0 : { * ( .int28 ) } > INT28 type = VECT_INIT + AES256 : { * ( .int29 ) } > INT29 type = VECT_INIT + RTC_C : { * ( .int30 ) } > INT30 type = VECT_INIT + LCD_C : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + EUSCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12_B : { * ( .int46 ) } > INT46 type = VECT_INIT + EUSCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + EUSCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* MPU/IPE SPECIFIC MEMORY SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr6035.cmd + + diff --git a/msp430/lnk_msp430fr6037.cmd b/msp430/lnk_msp430fr6037.cmd new file mode 100644 index 00000000..65e039ce --- /dev/null +++ b/msp430/lnk_msp430fr6037.cmd @@ -0,0 +1,365 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR6037 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0xA, length = 0x16 + BSL : origin = 0x1000, length = 0x800 + CAL_CONF : origin = 0x1900, length = 0x100 + TLVMEM : origin = 0x1A00, length = 0x100 + BOOTROM : origin = 0x1B00, length = 0x100 + RAM : origin = 0x1C00, length = 0x1000 + FRAM : origin = 0x4000, length = 0xBF80 + FRAM2 : origin = 0x10000,length = 0x33FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the LEA memory map */ +/****************************************************************************/ + +#define LEASTACK_SIZE 0x138 + +MEMORY +{ + LEARAM : origin = 0x2C00, length = 0x1000 - LEASTACK_SIZE + LEASTACK : origin = 0x3C00 - LEASTACK_SIZE, length = LEASTACK_SIZE +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + + GROUP(READ_WRITE_MEMORY) + { + + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + + } > 0x4000 + + .cinit : {} > FRAM /* Initialization tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .text:_isr : {} > FRAM /* Code ISRs */ + +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .leaRAM : {} > LEARAM /* LEA RAM */ + .leaStack : {} > LEASTACK (HIGH) /* LEA STACK */ + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + LEA : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT9 : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT8 : { * ( .int20 ) } > INT20 type = VECT_INIT + PORT7 : { * ( .int21 ) } > INT21 type = VECT_INIT + EUSCI_B1 : { * ( .int22 ) } > INT22 type = VECT_INIT + EUSCI_A3 : { * ( .int23 ) } > INT23 type = VECT_INIT + EUSCI_A2 : { * ( .int24 ) } > INT24 type = VECT_INIT + PORT6 : { * ( .int25 ) } > INT25 type = VECT_INIT + PORT5 : { * ( .int26 ) } > INT26 type = VECT_INIT + TIMER4_A1 : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMER4_A0 : { * ( .int28 ) } > INT28 type = VECT_INIT + AES256 : { * ( .int29 ) } > INT29 type = VECT_INIT + RTC_C : { * ( .int30 ) } > INT30 type = VECT_INIT + LCD_C : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + EUSCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12_B : { * ( .int46 ) } > INT46 type = VECT_INIT + EUSCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + EUSCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* MPU/IPE SPECIFIC MEMORY SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr6037.cmd + + diff --git a/msp430/lnk_msp430fr60371.cmd b/msp430/lnk_msp430fr60371.cmd new file mode 100644 index 00000000..47edbbb0 --- /dev/null +++ b/msp430/lnk_msp430fr60371.cmd @@ -0,0 +1,365 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR60371 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0xA, length = 0x16 + BSL : origin = 0x1000, length = 0x800 + CAL_CONF : origin = 0x1900, length = 0x100 + TLVMEM : origin = 0x1A00, length = 0x100 + BOOTROM : origin = 0x1B00, length = 0x100 + RAM : origin = 0x1C00, length = 0x1000 + FRAM : origin = 0x4000, length = 0xBF80 + FRAM2 : origin = 0x10000,length = 0x33FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the LEA memory map */ +/****************************************************************************/ + +#define LEASTACK_SIZE 0x138 + +MEMORY +{ + LEARAM : origin = 0x2C00, length = 0x1000 - LEASTACK_SIZE + LEASTACK : origin = 0x3C00 - LEASTACK_SIZE, length = LEASTACK_SIZE +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + + GROUP(READ_WRITE_MEMORY) + { + + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + + } > 0x4000 + + .cinit : {} > FRAM /* Initialization tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .text:_isr : {} > FRAM /* Code ISRs */ + +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .leaRAM : {} > LEARAM /* LEA RAM */ + .leaStack : {} > LEASTACK (HIGH) /* LEA STACK */ + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + LEA : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT9 : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT8 : { * ( .int20 ) } > INT20 type = VECT_INIT + PORT7 : { * ( .int21 ) } > INT21 type = VECT_INIT + EUSCI_B1 : { * ( .int22 ) } > INT22 type = VECT_INIT + EUSCI_A3 : { * ( .int23 ) } > INT23 type = VECT_INIT + EUSCI_A2 : { * ( .int24 ) } > INT24 type = VECT_INIT + PORT6 : { * ( .int25 ) } > INT25 type = VECT_INIT + PORT5 : { * ( .int26 ) } > INT26 type = VECT_INIT + TIMER4_A1 : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMER4_A0 : { * ( .int28 ) } > INT28 type = VECT_INIT + AES256 : { * ( .int29 ) } > INT29 type = VECT_INIT + RTC_C : { * ( .int30 ) } > INT30 type = VECT_INIT + LCD_C : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + EUSCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12_B : { * ( .int46 ) } > INT46 type = VECT_INIT + EUSCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + EUSCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* MPU/IPE SPECIFIC MEMORY SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr60371.cmd + + diff --git a/msp430/lnk_msp430fr6041.cmd b/msp430/lnk_msp430fr6041.cmd new file mode 100644 index 00000000..bb45c5af --- /dev/null +++ b/msp430/lnk_msp430fr6041.cmd @@ -0,0 +1,349 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR6041 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0xA, length = 0x16 + BSL : origin = 0x1000, length = 0x800 + CAL_CONF : origin = 0x1900, length = 0x100 + TLVMEM : origin = 0x1A00, length = 0x100 + BOOTROM : origin = 0x1B00, length = 0x100 + RAM : origin = 0x1C00, length = 0x1000 + FRAM : origin = 0x8000, length = 0x7F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the LEA memory map */ +/****************************************************************************/ + +#define LEASTACK_SIZE 0x138 + +MEMORY +{ + LEARAM_0 : origin = 0x4000, length = 0x1000 + LEARAM : origin = 0x5000, length = 0x1000 - LEASTACK_SIZE + LEASTACK : origin = 0x6000 - LEASTACK_SIZE, length = LEASTACK_SIZE +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + + GROUP(READ_WRITE_MEMORY) + { + + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + + } > 0x8000 + + .cinit : {} > FRAM /* Initialization tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .text:_isr : {} > FRAM /* Code ISRs */ + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .leaRAM : {} > LEARAM /* LEA RAM */ + .leaStack : {} > LEASTACK (HIGH) /* LEA STACK */ + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + SDHS : { * ( .int16 ) } > INT16 type = VECT_INIT + SAPH_A : { * ( .int17 ) } > INT17 type = VECT_INIT + HSPLL : { * ( .int18 ) } > INT18 type = VECT_INIT + UUPS : { * ( .int19 ) } > INT19 type = VECT_INIT + LEA : { * ( .int20 ) } > INT20 type = VECT_INIT + PORT7 : { * ( .int21 ) } > INT21 type = VECT_INIT + EUSCI_B1 : { * ( .int22 ) } > INT22 type = VECT_INIT + EUSCI_A3 : { * ( .int23 ) } > INT23 type = VECT_INIT + EUSCI_A2 : { * ( .int24 ) } > INT24 type = VECT_INIT + PORT6 : { * ( .int25 ) } > INT25 type = VECT_INIT + PORT5 : { * ( .int26 ) } > INT26 type = VECT_INIT + TIMER4_A1 : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMER4_A0 : { * ( .int28 ) } > INT28 type = VECT_INIT + AES256 : { * ( .int29 ) } > INT29 type = VECT_INIT + RTC_C : { * ( .int30 ) } > INT30 type = VECT_INIT + LCD_C : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + EUSCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12_B : { * ( .int46 ) } > INT46 type = VECT_INIT + EUSCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + EUSCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* MPU/IPE SPECIFIC MEMORY SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr6041.cmd + + diff --git a/msp430/lnk_msp430fr6043.cmd b/msp430/lnk_msp430fr6043.cmd new file mode 100644 index 00000000..acf63947 --- /dev/null +++ b/msp430/lnk_msp430fr6043.cmd @@ -0,0 +1,366 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR6043 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0xA, length = 0x16 + BSL : origin = 0x1000, length = 0x800 + CAL_CONF : origin = 0x1900, length = 0x100 + TLVMEM : origin = 0x1A00, length = 0x100 + BOOTROM : origin = 0x1B00, length = 0x100 + RAM : origin = 0x1C00, length = 0x1000 + FRAM : origin = 0x6000, length = 0x9F80 + FRAM2 : origin = 0x10000,length = 0x5FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the LEA memory map */ +/****************************************************************************/ + +#define LEASTACK_SIZE 0x138 + +MEMORY +{ + LEARAM_0 : origin = 0x4000, length = 0x1000 + LEARAM : origin = 0x5000, length = 0x1000 - LEASTACK_SIZE + LEASTACK : origin = 0x6000 - LEASTACK_SIZE, length = LEASTACK_SIZE +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + + GROUP(READ_WRITE_MEMORY) + { + + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + + } > 0x6000 + + .cinit : {} > FRAM /* Initialization tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .text:_isr : {} > FRAM /* Code ISRs */ + +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .leaRAM : {} > LEARAM /* LEA RAM */ + .leaStack : {} > LEASTACK (HIGH) /* LEA STACK */ + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + SDHS : { * ( .int16 ) } > INT16 type = VECT_INIT + SAPH_A : { * ( .int17 ) } > INT17 type = VECT_INIT + HSPLL : { * ( .int18 ) } > INT18 type = VECT_INIT + UUPS : { * ( .int19 ) } > INT19 type = VECT_INIT + LEA : { * ( .int20 ) } > INT20 type = VECT_INIT + PORT7 : { * ( .int21 ) } > INT21 type = VECT_INIT + EUSCI_B1 : { * ( .int22 ) } > INT22 type = VECT_INIT + EUSCI_A3 : { * ( .int23 ) } > INT23 type = VECT_INIT + EUSCI_A2 : { * ( .int24 ) } > INT24 type = VECT_INIT + PORT6 : { * ( .int25 ) } > INT25 type = VECT_INIT + PORT5 : { * ( .int26 ) } > INT26 type = VECT_INIT + TIMER4_A1 : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMER4_A0 : { * ( .int28 ) } > INT28 type = VECT_INIT + AES256 : { * ( .int29 ) } > INT29 type = VECT_INIT + RTC_C : { * ( .int30 ) } > INT30 type = VECT_INIT + LCD_C : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + EUSCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12_B : { * ( .int46 ) } > INT46 type = VECT_INIT + EUSCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + EUSCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* MPU/IPE SPECIFIC MEMORY SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr6043.cmd + + diff --git a/msp430/lnk_msp430fr60431.cmd b/msp430/lnk_msp430fr60431.cmd new file mode 100644 index 00000000..9201c5d9 --- /dev/null +++ b/msp430/lnk_msp430fr60431.cmd @@ -0,0 +1,366 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR60431 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0xA, length = 0x16 + BSL : origin = 0x1000, length = 0x800 + CAL_CONF : origin = 0x1900, length = 0x100 + TLVMEM : origin = 0x1A00, length = 0x100 + BOOTROM : origin = 0x1B00, length = 0x100 + RAM : origin = 0x1C00, length = 0x1000 + FRAM : origin = 0x6000, length = 0x9F80 + FRAM2 : origin = 0x10000,length = 0x5FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the LEA memory map */ +/****************************************************************************/ + +#define LEASTACK_SIZE 0x138 + +MEMORY +{ + LEARAM_0 : origin = 0x4000, length = 0x1000 + LEARAM : origin = 0x5000, length = 0x1000 - LEASTACK_SIZE + LEASTACK : origin = 0x6000 - LEASTACK_SIZE, length = LEASTACK_SIZE +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + + GROUP(READ_WRITE_MEMORY) + { + + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + + } > 0x6000 + + .cinit : {} > FRAM /* Initialization tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .text:_isr : {} > FRAM /* Code ISRs */ + +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .leaRAM : {} > LEARAM /* LEA RAM */ + .leaStack : {} > LEASTACK (HIGH) /* LEA STACK */ + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + SDHS : { * ( .int16 ) } > INT16 type = VECT_INIT + SAPH_A : { * ( .int17 ) } > INT17 type = VECT_INIT + HSPLL : { * ( .int18 ) } > INT18 type = VECT_INIT + UUPS : { * ( .int19 ) } > INT19 type = VECT_INIT + LEA : { * ( .int20 ) } > INT20 type = VECT_INIT + PORT7 : { * ( .int21 ) } > INT21 type = VECT_INIT + EUSCI_B1 : { * ( .int22 ) } > INT22 type = VECT_INIT + EUSCI_A3 : { * ( .int23 ) } > INT23 type = VECT_INIT + EUSCI_A2 : { * ( .int24 ) } > INT24 type = VECT_INIT + PORT6 : { * ( .int25 ) } > INT25 type = VECT_INIT + PORT5 : { * ( .int26 ) } > INT26 type = VECT_INIT + TIMER4_A1 : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMER4_A0 : { * ( .int28 ) } > INT28 type = VECT_INIT + AES256 : { * ( .int29 ) } > INT29 type = VECT_INIT + RTC_C : { * ( .int30 ) } > INT30 type = VECT_INIT + LCD_C : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + EUSCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12_B : { * ( .int46 ) } > INT46 type = VECT_INIT + EUSCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + EUSCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* MPU/IPE SPECIFIC MEMORY SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr60431.cmd + + diff --git a/msp430/lnk_msp430fr6045.cmd b/msp430/lnk_msp430fr6045.cmd new file mode 100644 index 00000000..043212e2 --- /dev/null +++ b/msp430/lnk_msp430fr6045.cmd @@ -0,0 +1,365 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR6045 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0xA, length = 0x16 + BSL : origin = 0x1000, length = 0x800 + CAL_CONF : origin = 0x1900, length = 0x100 + TLVMEM : origin = 0x1A00, length = 0x100 + BOOTROM : origin = 0x1B00, length = 0x100 + RAM : origin = 0x1C00, length = 0x1000 + FRAM : origin = 0x4000, length = 0xBF80 + FRAM2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the LEA memory map */ +/****************************************************************************/ + +#define LEASTACK_SIZE 0x138 + +MEMORY +{ + LEARAM : origin = 0x2C00, length = 0x1000 - LEASTACK_SIZE + LEASTACK : origin = 0x3C00 - LEASTACK_SIZE, length = LEASTACK_SIZE +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + + GROUP(READ_WRITE_MEMORY) + { + + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + + } > 0x4000 + + .cinit : {} > FRAM /* Initialization tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .text:_isr : {} > FRAM /* Code ISRs */ + +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .leaRAM : {} > LEARAM /* LEA RAM */ + .leaStack : {} > LEASTACK (HIGH) /* LEA STACK */ + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + SDHS : { * ( .int14 ) } > INT14 type = VECT_INIT + SAPH : { * ( .int15 ) } > INT15 type = VECT_INIT + HSPLL : { * ( .int16 ) } > INT16 type = VECT_INIT + UUPS : { * ( .int17 ) } > INT17 type = VECT_INIT + LEA : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT9 : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT8 : { * ( .int20 ) } > INT20 type = VECT_INIT + PORT7 : { * ( .int21 ) } > INT21 type = VECT_INIT + EUSCI_B1 : { * ( .int22 ) } > INT22 type = VECT_INIT + EUSCI_A3 : { * ( .int23 ) } > INT23 type = VECT_INIT + EUSCI_A2 : { * ( .int24 ) } > INT24 type = VECT_INIT + PORT6 : { * ( .int25 ) } > INT25 type = VECT_INIT + PORT5 : { * ( .int26 ) } > INT26 type = VECT_INIT + TIMER4_A1 : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMER4_A0 : { * ( .int28 ) } > INT28 type = VECT_INIT + AES256 : { * ( .int29 ) } > INT29 type = VECT_INIT + RTC_C : { * ( .int30 ) } > INT30 type = VECT_INIT + LCD_C : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + EUSCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12_B : { * ( .int46 ) } > INT46 type = VECT_INIT + EUSCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + EUSCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* MPU/IPE SPECIFIC MEMORY SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr6045.cmd + + diff --git a/msp430/lnk_msp430fr6047.cmd b/msp430/lnk_msp430fr6047.cmd new file mode 100644 index 00000000..a258a412 --- /dev/null +++ b/msp430/lnk_msp430fr6047.cmd @@ -0,0 +1,365 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR6047 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0xA, length = 0x16 + BSL : origin = 0x1000, length = 0x800 + CAL_CONF : origin = 0x1900, length = 0x100 + TLVMEM : origin = 0x1A00, length = 0x100 + BOOTROM : origin = 0x1B00, length = 0x100 + RAM : origin = 0x1C00, length = 0x1000 + FRAM : origin = 0x4000, length = 0xBF80 + FRAM2 : origin = 0x10000,length = 0x33FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the LEA memory map */ +/****************************************************************************/ + +#define LEASTACK_SIZE 0x138 + +MEMORY +{ + LEARAM : origin = 0x2C00, length = 0x1000 - LEASTACK_SIZE + LEASTACK : origin = 0x3C00 - LEASTACK_SIZE, length = LEASTACK_SIZE +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + + GROUP(READ_WRITE_MEMORY) + { + + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + + } > 0x4000 + + .cinit : {} > FRAM /* Initialization tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .text:_isr : {} > FRAM /* Code ISRs */ + +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .leaRAM : {} > LEARAM /* LEA RAM */ + .leaStack : {} > LEASTACK (HIGH) /* LEA STACK */ + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + SDHS : { * ( .int14 ) } > INT14 type = VECT_INIT + SAPH : { * ( .int15 ) } > INT15 type = VECT_INIT + HSPLL : { * ( .int16 ) } > INT16 type = VECT_INIT + UUPS : { * ( .int17 ) } > INT17 type = VECT_INIT + LEA : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT9 : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT8 : { * ( .int20 ) } > INT20 type = VECT_INIT + PORT7 : { * ( .int21 ) } > INT21 type = VECT_INIT + EUSCI_B1 : { * ( .int22 ) } > INT22 type = VECT_INIT + EUSCI_A3 : { * ( .int23 ) } > INT23 type = VECT_INIT + EUSCI_A2 : { * ( .int24 ) } > INT24 type = VECT_INIT + PORT6 : { * ( .int25 ) } > INT25 type = VECT_INIT + PORT5 : { * ( .int26 ) } > INT26 type = VECT_INIT + TIMER4_A1 : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMER4_A0 : { * ( .int28 ) } > INT28 type = VECT_INIT + AES256 : { * ( .int29 ) } > INT29 type = VECT_INIT + RTC_C : { * ( .int30 ) } > INT30 type = VECT_INIT + LCD_C : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + EUSCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12_B : { * ( .int46 ) } > INT46 type = VECT_INIT + EUSCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + EUSCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* MPU/IPE SPECIFIC MEMORY SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr6047.cmd + + diff --git a/msp430/lnk_msp430fr60471.cmd b/msp430/lnk_msp430fr60471.cmd new file mode 100644 index 00000000..f5468ee6 --- /dev/null +++ b/msp430/lnk_msp430fr60471.cmd @@ -0,0 +1,365 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +* Default linker command file for Texas Instruments MSP430FR60471 +* +*****************************************************************************/ + +/******************************************************************************/ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0xA, length = 0x16 + BSL : origin = 0x1000, length = 0x800 + CAL_CONF : origin = 0x1900, length = 0x100 + TLVMEM : origin = 0x1A00, length = 0x100 + BOOTROM : origin = 0x1B00, length = 0x100 + RAM : origin = 0x1C00, length = 0x1000 + FRAM : origin = 0x4000, length = 0xBF80 + FRAM2 : origin = 0x10000,length = 0x33FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the LEA memory map */ +/****************************************************************************/ + +#define LEASTACK_SIZE 0x138 + +MEMORY +{ + LEARAM : origin = 0x2C00, length = 0x1000 - LEASTACK_SIZE + LEASTACK : origin = 0x3C00 - LEASTACK_SIZE, length = LEASTACK_SIZE +} + +/****************************************************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + + GROUP(READ_WRITE_MEMORY) + { + + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + + } > 0x4000 + + .cinit : {} > FRAM /* Initialization tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .text:_isr : {} > FRAM /* Code ISRs */ + +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif + + #ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif + #endif + + .jtagsignature : {} > JTAGSIGNATURE + .bslsignature : {} > BSLSIGNATURE + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .leaRAM : {} > LEARAM /* LEA RAM */ + .leaStack : {} > LEASTACK (HIGH) /* LEA STACK */ + + /* MSP430 interrupt vectors */ + + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + SDHS : { * ( .int14 ) } > INT14 type = VECT_INIT + SAPH : { * ( .int15 ) } > INT15 type = VECT_INIT + HSPLL : { * ( .int16 ) } > INT16 type = VECT_INIT + UUPS : { * ( .int17 ) } > INT17 type = VECT_INIT + LEA : { * ( .int18 ) } > INT18 type = VECT_INIT + PORT9 : { * ( .int19 ) } > INT19 type = VECT_INIT + PORT8 : { * ( .int20 ) } > INT20 type = VECT_INIT + PORT7 : { * ( .int21 ) } > INT21 type = VECT_INIT + EUSCI_B1 : { * ( .int22 ) } > INT22 type = VECT_INIT + EUSCI_A3 : { * ( .int23 ) } > INT23 type = VECT_INIT + EUSCI_A2 : { * ( .int24 ) } > INT24 type = VECT_INIT + PORT6 : { * ( .int25 ) } > INT25 type = VECT_INIT + PORT5 : { * ( .int26 ) } > INT26 type = VECT_INIT + TIMER4_A1 : { * ( .int27 ) } > INT27 type = VECT_INIT + TIMER4_A0 : { * ( .int28 ) } > INT28 type = VECT_INIT + AES256 : { * ( .int29 ) } > INT29 type = VECT_INIT + RTC_C : { * ( .int30 ) } > INT30 type = VECT_INIT + LCD_C : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + EUSCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12_B : { * ( .int46 ) } > INT46 type = VECT_INIT + EUSCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + EUSCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 reset vector */ + +} +/****************************************************************************/ +/* MPU/IPE SPECIFIC MEMORY SEGMENT DEFINITONS */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* INCLUDE PERIPHERALS MEMORY MAP */ +/****************************************************************************/ + +-l msp430fr60471.cmd + + diff --git a/msp430/lnk_msp430fr6820.cmd b/msp430/lnk_msp430fr6820.cmd new file mode 100644 index 00000000..65c4963b --- /dev/null +++ b/msp430/lnk_msp430fr6820.cmd @@ -0,0 +1,337 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr6820.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR6820 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x8000, length = 0x7F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x8000 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .const : {} > FRAM /* Constant data */ + + .text:_isr : {} > FRAM /* Code ISRs */ + .text : {} > FRAM /* Code */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr6820.cmd + diff --git a/msp430/lnk_msp430fr6822.cmd b/msp430/lnk_msp430fr6822.cmd new file mode 100644 index 00000000..f3a6e7e2 --- /dev/null +++ b/msp430/lnk_msp430fr6822.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr6822.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR6822 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr6822.cmd + diff --git a/msp430/lnk_msp430fr68221.cmd b/msp430/lnk_msp430fr68221.cmd new file mode 100644 index 00000000..f691f50a --- /dev/null +++ b/msp430/lnk_msp430fr68221.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr68221.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR68221 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr68221.cmd + diff --git a/msp430/lnk_msp430fr6870.cmd b/msp430/lnk_msp430fr6870.cmd new file mode 100644 index 00000000..3c142098 --- /dev/null +++ b/msp430/lnk_msp430fr6870.cmd @@ -0,0 +1,337 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr6870.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR6870 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x8000, length = 0x7F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x8000 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .const : {} > FRAM /* Constant data */ + + .text:_isr : {} > FRAM /* Code ISRs */ + .text : {} > FRAM /* Code */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr6870.cmd + diff --git a/msp430/lnk_msp430fr6872.cmd b/msp430/lnk_msp430fr6872.cmd new file mode 100644 index 00000000..a7ac934f --- /dev/null +++ b/msp430/lnk_msp430fr6872.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr6872.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR6872 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr6872.cmd + diff --git a/msp430/lnk_msp430fr68721.cmd b/msp430/lnk_msp430fr68721.cmd new file mode 100644 index 00000000..d216249d --- /dev/null +++ b/msp430/lnk_msp430fr68721.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr68721.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR68721 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr68721.cmd + diff --git a/msp430/lnk_msp430fr6877.cmd b/msp430/lnk_msp430fr6877.cmd new file mode 100644 index 00000000..2e85233c --- /dev/null +++ b/msp430/lnk_msp430fr6877.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr6877.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR6877 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr6877.cmd + diff --git a/msp430/lnk_msp430fr6879.cmd b/msp430/lnk_msp430fr6879.cmd new file mode 100644 index 00000000..a9e55655 --- /dev/null +++ b/msp430/lnk_msp430fr6879.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr6879.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR6879 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr6879.cmd + diff --git a/msp430/lnk_msp430fr68791.cmd b/msp430/lnk_msp430fr68791.cmd new file mode 100644 index 00000000..4d8e288c --- /dev/null +++ b/msp430/lnk_msp430fr68791.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr68791.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR68791 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr68791.cmd + diff --git a/msp430/lnk_msp430fr6887.cmd b/msp430/lnk_msp430fr6887.cmd new file mode 100644 index 00000000..3b2a97fb --- /dev/null +++ b/msp430/lnk_msp430fr6887.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr6887.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR6887 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + ESCAN_IF : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr6887.cmd + diff --git a/msp430/lnk_msp430fr6888.cmd b/msp430/lnk_msp430fr6888.cmd new file mode 100644 index 00000000..759fc491 --- /dev/null +++ b/msp430/lnk_msp430fr6888.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr6888.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR6888 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0xBFF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + ESCAN_IF : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr6888.cmd + diff --git a/msp430/lnk_msp430fr6889.cmd b/msp430/lnk_msp430fr6889.cmd new file mode 100644 index 00000000..d0fc57e2 --- /dev/null +++ b/msp430/lnk_msp430fr6889.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr6889.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR6889 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + ESCAN_IF : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr6889.cmd + diff --git a/msp430/lnk_msp430fr68891.cmd b/msp430/lnk_msp430fr68891.cmd new file mode 100644 index 00000000..aac6f843 --- /dev/null +++ b/msp430/lnk_msp430fr68891.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr68891.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR68891 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + ESCAN_IF : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr68891.cmd + diff --git a/msp430/lnk_msp430fr6920.cmd b/msp430/lnk_msp430fr6920.cmd new file mode 100644 index 00000000..39c021e7 --- /dev/null +++ b/msp430/lnk_msp430fr6920.cmd @@ -0,0 +1,337 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr6920.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR6920 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x8000, length = 0x7F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x8000 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .const : {} > FRAM /* Constant data */ + + .text:_isr : {} > FRAM /* Code ISRs */ + .text : {} > FRAM /* Code */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr6920.cmd + diff --git a/msp430/lnk_msp430fr6922.cmd b/msp430/lnk_msp430fr6922.cmd new file mode 100644 index 00000000..c54ad5cf --- /dev/null +++ b/msp430/lnk_msp430fr6922.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr6922.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR6922 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr6922.cmd + diff --git a/msp430/lnk_msp430fr69221.cmd b/msp430/lnk_msp430fr69221.cmd new file mode 100644 index 00000000..f7e033a2 --- /dev/null +++ b/msp430/lnk_msp430fr69221.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr69221.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR69221 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr69221.cmd + diff --git a/msp430/lnk_msp430fr6927.cmd b/msp430/lnk_msp430fr6927.cmd new file mode 100644 index 00000000..4781d530 --- /dev/null +++ b/msp430/lnk_msp430fr6927.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr6927.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR6927 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr6927.cmd + diff --git a/msp430/lnk_msp430fr69271.cmd b/msp430/lnk_msp430fr69271.cmd new file mode 100644 index 00000000..1caade6e --- /dev/null +++ b/msp430/lnk_msp430fr69271.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr69271.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR69271 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr69271.cmd + diff --git a/msp430/lnk_msp430fr6928.cmd b/msp430/lnk_msp430fr6928.cmd new file mode 100644 index 00000000..1e0f11e7 --- /dev/null +++ b/msp430/lnk_msp430fr6928.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr6928.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR6928 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0xBFF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr6928.cmd + diff --git a/msp430/lnk_msp430fr6970.cmd b/msp430/lnk_msp430fr6970.cmd new file mode 100644 index 00000000..4aad16e7 --- /dev/null +++ b/msp430/lnk_msp430fr6970.cmd @@ -0,0 +1,337 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr6970.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR6970 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x8000, length = 0x7F80 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x8000 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ + .const : {} > FRAM /* Constant data */ + + .text:_isr : {} > FRAM /* Code ISRs */ + .text : {} > FRAM /* Code */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr6970.cmd + diff --git a/msp430/lnk_msp430fr6972.cmd b/msp430/lnk_msp430fr6972.cmd new file mode 100644 index 00000000..b8ae99ea --- /dev/null +++ b/msp430/lnk_msp430fr6972.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr6972.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR6972 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr6972.cmd + diff --git a/msp430/lnk_msp430fr69721.cmd b/msp430/lnk_msp430fr69721.cmd new file mode 100644 index 00000000..940f1f05 --- /dev/null +++ b/msp430/lnk_msp430fr69721.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr69721.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR69721 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr69721.cmd + diff --git a/msp430/lnk_msp430fr6977.cmd b/msp430/lnk_msp430fr6977.cmd new file mode 100644 index 00000000..bd9bb14c --- /dev/null +++ b/msp430/lnk_msp430fr6977.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr6977.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR6977 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr6977.cmd + diff --git a/msp430/lnk_msp430fr6979.cmd b/msp430/lnk_msp430fr6979.cmd new file mode 100644 index 00000000..783e1d3f --- /dev/null +++ b/msp430/lnk_msp430fr6979.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr6979.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR6979 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr6979.cmd + diff --git a/msp430/lnk_msp430fr69791.cmd b/msp430/lnk_msp430fr69791.cmd new file mode 100644 index 00000000..4dff667c --- /dev/null +++ b/msp430/lnk_msp430fr69791.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr69791.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR69791 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + .int48 : {} > INT48 + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr69791.cmd + diff --git a/msp430/lnk_msp430fr6987.cmd b/msp430/lnk_msp430fr6987.cmd new file mode 100644 index 00000000..d199ad20 --- /dev/null +++ b/msp430/lnk_msp430fr6987.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr6987.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR6987 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x3FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + ESCAN_IF : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr6987.cmd + diff --git a/msp430/lnk_msp430fr6988.cmd b/msp430/lnk_msp430fr6988.cmd new file mode 100644 index 00000000..2059d8e3 --- /dev/null +++ b/msp430/lnk_msp430fr6988.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr6988.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR6988 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0xBFF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + ESCAN_IF : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr6988.cmd + diff --git a/msp430/lnk_msp430fr6989.cmd b/msp430/lnk_msp430fr6989.cmd new file mode 100644 index 00000000..5c7b3290 --- /dev/null +++ b/msp430/lnk_msp430fr6989.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr6989.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR6989 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + ESCAN_IF : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr6989.cmd + diff --git a/msp430/lnk_msp430fr69891.cmd b/msp430/lnk_msp430fr69891.cmd new file mode 100644 index 00000000..b65dd033 --- /dev/null +++ b/msp430/lnk_msp430fr69891.cmd @@ -0,0 +1,346 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr69891.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR69891 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + TINYRAM : origin = 0x0006, length = 0x001A + PERIPHERALS_8BIT : origin = 0x0020, length = 0x00E0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x13FF8 /* Boundaries changed to fix CPU47 */ + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + .tinyram : {} > TINYRAM /* Tiny RAM */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + AES256 : { * ( .int27 ) } > INT27 type = VECT_INIT + RTC : { * ( .int28 ) } > INT28 type = VECT_INIT + LCD_C : { * ( .int29 ) } > INT29 type = VECT_INIT + PORT4 : { * ( .int30 ) } > INT30 type = VECT_INIT + PORT3 : { * ( .int31 ) } > INT31 type = VECT_INIT + TIMER3_A1 : { * ( .int32 ) } > INT32 type = VECT_INIT + TIMER3_A0 : { * ( .int33 ) } > INT33 type = VECT_INIT + PORT2 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER2_A1 : { * ( .int35 ) } > INT35 type = VECT_INIT + TIMER2_A0 : { * ( .int36 ) } > INT36 type = VECT_INIT + PORT1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER1_A1 : { * ( .int38 ) } > INT38 type = VECT_INIT + TIMER1_A0 : { * ( .int39 ) } > INT39 type = VECT_INIT + DMA : { * ( .int40 ) } > INT40 type = VECT_INIT + USCI_B1 : { * ( .int41 ) } > INT41 type = VECT_INIT + USCI_A1 : { * ( .int42 ) } > INT42 type = VECT_INIT + TIMER0_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT + ADC12 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_B0 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_A0 : { * ( .int47 ) } > INT47 type = VECT_INIT + ESCAN_IF : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr69891.cmd + diff --git a/msp430/lnk_msp430fw423.cmd b/msp430/lnk_msp430fw423.cmd new file mode 100644 index 00000000..621ab545 --- /dev/null +++ b/msp430/lnk_msp430fw423.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fw423.cmd - LINKER COMMAND FILE FOR LINKING MSP430FW423 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xE000, length = 0x1FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMER0_A1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMER0_A0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + .int08 : {} > INT08 + SCANIF : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fw423.cmd + diff --git a/msp430/lnk_msp430fw425.cmd b/msp430/lnk_msp430fw425.cmd new file mode 100644 index 00000000..b0e21c57 --- /dev/null +++ b/msp430/lnk_msp430fw425.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fw425.cmd - LINKER COMMAND FILE FOR LINKING MSP430FW425 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMER0_A1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMER0_A0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + .int08 : {} > INT08 + SCANIF : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fw425.cmd + diff --git a/msp430/lnk_msp430fw427.cmd b/msp430/lnk_msp430fw427.cmd new file mode 100644 index 00000000..c3b52392 --- /dev/null +++ b/msp430/lnk_msp430fw427.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fw427.cmd - LINKER COMMAND FILE FOR LINKING MSP430FW427 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMER0_A1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMER0_A0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + .int08 : {} > INT08 + SCANIF : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fw427.cmd + diff --git a/msp430/lnk_msp430fw428.cmd b/msp430/lnk_msp430fw428.cmd new file mode 100644 index 00000000..577d8b5d --- /dev/null +++ b/msp430/lnk_msp430fw428.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fw428.cmd - LINKER COMMAND FILE FOR LINKING MSP430FW428 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x4000, length = 0xBFE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMER0_A1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMER0_A0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + .int08 : {} > INT08 + SCANIF : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fw428.cmd + diff --git a/msp430/lnk_msp430fw429.cmd b/msp430/lnk_msp430fw429.cmd new file mode 100644 index 00000000..4a87d84b --- /dev/null +++ b/msp430/lnk_msp430fw429.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fw429.cmd - LINKER COMMAND FILE FOR LINKING MSP430FW429 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x1080, length = 0x0080 + INFOB : origin = 0x1000, length = 0x0080 + FLASH : origin = 0x1100, length = 0xEEE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + + /* MSP430 Interrupt vectors */ + BASICTIMER : { * ( .int00 ) } > INT00 type = VECT_INIT + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMER0_A1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMER0_A0 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + .int08 : {} > INT08 + SCANIF : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fw429.cmd + diff --git a/msp430/lnk_msp430g2001.cmd b/msp430/lnk_msp430g2001.cmd new file mode 100644 index 00000000..6fb09990 --- /dev/null +++ b/msp430/lnk_msp430g2001.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2001.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2001 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xFE00, length = 0x01E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2001.cmd + diff --git a/msp430/lnk_msp430g2101.cmd b/msp430/lnk_msp430g2101.cmd new file mode 100644 index 00000000..cf41a968 --- /dev/null +++ b/msp430/lnk_msp430g2101.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2101.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2101 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xFC00, length = 0x03E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2101.cmd + diff --git a/msp430/lnk_msp430g2102.cmd b/msp430/lnk_msp430g2102.cmd new file mode 100644 index 00000000..ab3c557a --- /dev/null +++ b/msp430/lnk_msp430g2102.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2102.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2102 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xFC00, length = 0x03E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + USI : { * ( .int04 ) } > INT04 type = VECT_INIT + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2102.cmd + diff --git a/msp430/lnk_msp430g2111.cmd b/msp430/lnk_msp430g2111.cmd new file mode 100644 index 00000000..2e957404 --- /dev/null +++ b/msp430/lnk_msp430g2111.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2111.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2111 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xFC00, length = 0x03E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2111.cmd + diff --git a/msp430/lnk_msp430g2112.cmd b/msp430/lnk_msp430g2112.cmd new file mode 100644 index 00000000..dcd4828f --- /dev/null +++ b/msp430/lnk_msp430g2112.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2112.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2112 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xFC00, length = 0x03E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + USI : { * ( .int04 ) } > INT04 type = VECT_INIT + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2112.cmd + diff --git a/msp430/lnk_msp430g2113.cmd b/msp430/lnk_msp430g2113.cmd new file mode 100644 index 00000000..84719211 --- /dev/null +++ b/msp430/lnk_msp430g2113.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2113.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2113 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xFC00, length = 0x03DE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + TRAPINT : { * ( .int00 ) } > INT00 type = VECT_INIT + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2113.cmd + diff --git a/msp430/lnk_msp430g2121.cmd b/msp430/lnk_msp430g2121.cmd new file mode 100644 index 00000000..5d0dc3b3 --- /dev/null +++ b/msp430/lnk_msp430g2121.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2121.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2121 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xFC00, length = 0x03E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + USI : { * ( .int04 ) } > INT04 type = VECT_INIT + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2121.cmd + diff --git a/msp430/lnk_msp430g2131.cmd b/msp430/lnk_msp430g2131.cmd new file mode 100644 index 00000000..516fa375 --- /dev/null +++ b/msp430/lnk_msp430g2131.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2131.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2131 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xFC00, length = 0x03E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + USI : { * ( .int04 ) } > INT04 type = VECT_INIT + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2131.cmd + diff --git a/msp430/lnk_msp430g2132.cmd b/msp430/lnk_msp430g2132.cmd new file mode 100644 index 00000000..40ea4297 --- /dev/null +++ b/msp430/lnk_msp430g2132.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2132.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2132 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xFC00, length = 0x03E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + USI : { * ( .int04 ) } > INT04 type = VECT_INIT + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2132.cmd + diff --git a/msp430/lnk_msp430g2152.cmd b/msp430/lnk_msp430g2152.cmd new file mode 100644 index 00000000..87f5c35c --- /dev/null +++ b/msp430/lnk_msp430g2152.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2152.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2152 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xFC00, length = 0x03E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + USI : { * ( .int04 ) } > INT04 type = VECT_INIT + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2152.cmd + diff --git a/msp430/lnk_msp430g2153.cmd b/msp430/lnk_msp430g2153.cmd new file mode 100644 index 00000000..9c0bfe14 --- /dev/null +++ b/msp430/lnk_msp430g2153.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2153.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2153 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xFC00, length = 0x03DE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + TRAPINT : { * ( .int00 ) } > INT00 type = VECT_INIT + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2153.cmd + diff --git a/msp430/lnk_msp430g2201.cmd b/msp430/lnk_msp430g2201.cmd new file mode 100644 index 00000000..3cddca69 --- /dev/null +++ b/msp430/lnk_msp430g2201.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2201.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2201 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF800, length = 0x07E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2201.cmd + diff --git a/msp430/lnk_msp430g2202.cmd b/msp430/lnk_msp430g2202.cmd new file mode 100644 index 00000000..92f62f6b --- /dev/null +++ b/msp430/lnk_msp430g2202.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2202.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2202 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF800, length = 0x07E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + USI : { * ( .int04 ) } > INT04 type = VECT_INIT + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2202.cmd + diff --git a/msp430/lnk_msp430g2203.cmd b/msp430/lnk_msp430g2203.cmd new file mode 100644 index 00000000..f5ba7a30 --- /dev/null +++ b/msp430/lnk_msp430g2203.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2203.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2203 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF800, length = 0x07DE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + TRAPINT : { * ( .int00 ) } > INT00 type = VECT_INIT + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2203.cmd + diff --git a/msp430/lnk_msp430g2210.cmd b/msp430/lnk_msp430g2210.cmd new file mode 100644 index 00000000..30c03c1d --- /dev/null +++ b/msp430/lnk_msp430g2210.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2210.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2210 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF800, length = 0x07E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2210.cmd + diff --git a/msp430/lnk_msp430g2211.cmd b/msp430/lnk_msp430g2211.cmd new file mode 100644 index 00000000..53903ebf --- /dev/null +++ b/msp430/lnk_msp430g2211.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2211.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2211 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF800, length = 0x07E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2211.cmd + diff --git a/msp430/lnk_msp430g2212.cmd b/msp430/lnk_msp430g2212.cmd new file mode 100644 index 00000000..6ed9d8e1 --- /dev/null +++ b/msp430/lnk_msp430g2212.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2212.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2212 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF800, length = 0x07E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + USI : { * ( .int04 ) } > INT04 type = VECT_INIT + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2212.cmd + diff --git a/msp430/lnk_msp430g2213.cmd b/msp430/lnk_msp430g2213.cmd new file mode 100644 index 00000000..e7aa9155 --- /dev/null +++ b/msp430/lnk_msp430g2213.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2213.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2213 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF800, length = 0x07DE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + TRAPINT : { * ( .int00 ) } > INT00 type = VECT_INIT + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2213.cmd + diff --git a/msp430/lnk_msp430g2221.cmd b/msp430/lnk_msp430g2221.cmd new file mode 100644 index 00000000..5c12a96c --- /dev/null +++ b/msp430/lnk_msp430g2221.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2221.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2221 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF800, length = 0x07E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + USI : { * ( .int04 ) } > INT04 type = VECT_INIT + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2221.cmd + diff --git a/msp430/lnk_msp430g2230.cmd b/msp430/lnk_msp430g2230.cmd new file mode 100644 index 00000000..0d92317f --- /dev/null +++ b/msp430/lnk_msp430g2230.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2230.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2230 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF800, length = 0x07E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + USI : { * ( .int04 ) } > INT04 type = VECT_INIT + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2230.cmd + diff --git a/msp430/lnk_msp430g2231.cmd b/msp430/lnk_msp430g2231.cmd new file mode 100644 index 00000000..97f3b755 --- /dev/null +++ b/msp430/lnk_msp430g2231.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2231.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2231 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0080 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF800, length = 0x07E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + USI : { * ( .int04 ) } > INT04 type = VECT_INIT + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2231.cmd + diff --git a/msp430/lnk_msp430g2232.cmd b/msp430/lnk_msp430g2232.cmd new file mode 100644 index 00000000..cc0d6f25 --- /dev/null +++ b/msp430/lnk_msp430g2232.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2232.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2232 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF800, length = 0x07E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + USI : { * ( .int04 ) } > INT04 type = VECT_INIT + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2232.cmd + diff --git a/msp430/lnk_msp430g2233.cmd b/msp430/lnk_msp430g2233.cmd new file mode 100644 index 00000000..629dfb5d --- /dev/null +++ b/msp430/lnk_msp430g2233.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2233.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2233 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF800, length = 0x07DE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + TRAPINT : { * ( .int00 ) } > INT00 type = VECT_INIT + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2233.cmd + diff --git a/msp430/lnk_msp430g2252.cmd b/msp430/lnk_msp430g2252.cmd new file mode 100644 index 00000000..98c2cb2d --- /dev/null +++ b/msp430/lnk_msp430g2252.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2252.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2252 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF800, length = 0x07E0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + USI : { * ( .int04 ) } > INT04 type = VECT_INIT + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2252.cmd + diff --git a/msp430/lnk_msp430g2253.cmd b/msp430/lnk_msp430g2253.cmd new file mode 100644 index 00000000..4924e963 --- /dev/null +++ b/msp430/lnk_msp430g2253.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2253.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2253 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF800, length = 0x07DE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + TRAPINT : { * ( .int00 ) } > INT00 type = VECT_INIT + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2253.cmd + diff --git a/msp430/lnk_msp430g2302.cmd b/msp430/lnk_msp430g2302.cmd new file mode 100644 index 00000000..9cc8cdd9 --- /dev/null +++ b/msp430/lnk_msp430g2302.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2302.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2302 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF000, length = 0x0FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + USI : { * ( .int04 ) } > INT04 type = VECT_INIT + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2302.cmd + diff --git a/msp430/lnk_msp430g2303.cmd b/msp430/lnk_msp430g2303.cmd new file mode 100644 index 00000000..b7e937b7 --- /dev/null +++ b/msp430/lnk_msp430g2303.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2303.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2303 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF000, length = 0x0FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + TRAPINT : { * ( .int00 ) } > INT00 type = VECT_INIT + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2303.cmd + diff --git a/msp430/lnk_msp430g2312.cmd b/msp430/lnk_msp430g2312.cmd new file mode 100644 index 00000000..bfff19b3 --- /dev/null +++ b/msp430/lnk_msp430g2312.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2312.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2312 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF000, length = 0x0FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + USI : { * ( .int04 ) } > INT04 type = VECT_INIT + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2312.cmd + diff --git a/msp430/lnk_msp430g2313.cmd b/msp430/lnk_msp430g2313.cmd new file mode 100644 index 00000000..e45daf6f --- /dev/null +++ b/msp430/lnk_msp430g2313.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2313.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2313 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF000, length = 0x0FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + TRAPINT : { * ( .int00 ) } > INT00 type = VECT_INIT + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2313.cmd + diff --git a/msp430/lnk_msp430g2332.cmd b/msp430/lnk_msp430g2332.cmd new file mode 100644 index 00000000..554abd7b --- /dev/null +++ b/msp430/lnk_msp430g2332.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2332.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2332 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF000, length = 0x0FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + USI : { * ( .int04 ) } > INT04 type = VECT_INIT + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2332.cmd + diff --git a/msp430/lnk_msp430g2333.cmd b/msp430/lnk_msp430g2333.cmd new file mode 100644 index 00000000..b4e0efeb --- /dev/null +++ b/msp430/lnk_msp430g2333.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2333.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2333 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF000, length = 0x0FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + TRAPINT : { * ( .int00 ) } > INT00 type = VECT_INIT + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2333.cmd + diff --git a/msp430/lnk_msp430g2352.cmd b/msp430/lnk_msp430g2352.cmd new file mode 100644 index 00000000..e7d888aa --- /dev/null +++ b/msp430/lnk_msp430g2352.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2352.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2352 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF000, length = 0x0FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + USI : { * ( .int04 ) } > INT04 type = VECT_INIT + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2352.cmd + diff --git a/msp430/lnk_msp430g2353.cmd b/msp430/lnk_msp430g2353.cmd new file mode 100644 index 00000000..4d66a08b --- /dev/null +++ b/msp430/lnk_msp430g2353.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2353.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2353 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xF000, length = 0x0FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + TRAPINT : { * ( .int00 ) } > INT00 type = VECT_INIT + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2353.cmd + diff --git a/msp430/lnk_msp430g2402.cmd b/msp430/lnk_msp430g2402.cmd new file mode 100644 index 00000000..2520f784 --- /dev/null +++ b/msp430/lnk_msp430g2402.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2402.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2402 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xE000, length = 0x1FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + USI : { * ( .int04 ) } > INT04 type = VECT_INIT + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2402.cmd + diff --git a/msp430/lnk_msp430g2403.cmd b/msp430/lnk_msp430g2403.cmd new file mode 100644 index 00000000..119d03eb --- /dev/null +++ b/msp430/lnk_msp430g2403.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2403.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2403 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xE000, length = 0x1FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + TRAPINT : { * ( .int00 ) } > INT00 type = VECT_INIT + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2403.cmd + diff --git a/msp430/lnk_msp430g2412.cmd b/msp430/lnk_msp430g2412.cmd new file mode 100644 index 00000000..5b0c418b --- /dev/null +++ b/msp430/lnk_msp430g2412.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2412.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2412 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xE000, length = 0x1FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + USI : { * ( .int04 ) } > INT04 type = VECT_INIT + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2412.cmd + diff --git a/msp430/lnk_msp430g2413.cmd b/msp430/lnk_msp430g2413.cmd new file mode 100644 index 00000000..7b9246cb --- /dev/null +++ b/msp430/lnk_msp430g2413.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2413.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2413 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xE000, length = 0x1FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + TRAPINT : { * ( .int00 ) } > INT00 type = VECT_INIT + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2413.cmd + diff --git a/msp430/lnk_msp430g2432.cmd b/msp430/lnk_msp430g2432.cmd new file mode 100644 index 00000000..905cb25d --- /dev/null +++ b/msp430/lnk_msp430g2432.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2432.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2432 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xE000, length = 0x1FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + USI : { * ( .int04 ) } > INT04 type = VECT_INIT + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2432.cmd + diff --git a/msp430/lnk_msp430g2433.cmd b/msp430/lnk_msp430g2433.cmd new file mode 100644 index 00000000..328e542f --- /dev/null +++ b/msp430/lnk_msp430g2433.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2433.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2433 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xE000, length = 0x1FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + TRAPINT : { * ( .int00 ) } > INT00 type = VECT_INIT + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2433.cmd + diff --git a/msp430/lnk_msp430g2444.cmd b/msp430/lnk_msp430g2444.cmd new file mode 100644 index 00000000..edaafefd --- /dev/null +++ b/msp430/lnk_msp430g2444.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2444.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2444 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xE000, length = 0x1FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2444.cmd + diff --git a/msp430/lnk_msp430g2452.cmd b/msp430/lnk_msp430g2452.cmd new file mode 100644 index 00000000..20fa6851 --- /dev/null +++ b/msp430/lnk_msp430g2452.cmd @@ -0,0 +1,144 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2452.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2452 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xE000, length = 0x1FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + USI : { * ( .int04 ) } > INT04 type = VECT_INIT + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2452.cmd + diff --git a/msp430/lnk_msp430g2453.cmd b/msp430/lnk_msp430g2453.cmd new file mode 100644 index 00000000..3264bbfc --- /dev/null +++ b/msp430/lnk_msp430g2453.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2453.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2453 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xE000, length = 0x1FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + TRAPINT : { * ( .int00 ) } > INT00 type = VECT_INIT + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2453.cmd + diff --git a/msp430/lnk_msp430g2513.cmd b/msp430/lnk_msp430g2513.cmd new file mode 100644 index 00000000..4e8f714f --- /dev/null +++ b/msp430/lnk_msp430g2513.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2513.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2513 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xC000, length = 0x3FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + TRAPINT : { * ( .int00 ) } > INT00 type = VECT_INIT + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2513.cmd + diff --git a/msp430/lnk_msp430g2533.cmd b/msp430/lnk_msp430g2533.cmd new file mode 100644 index 00000000..12ff9fb4 --- /dev/null +++ b/msp430/lnk_msp430g2533.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2533.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2533 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xC000, length = 0x3FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + TRAPINT : { * ( .int00 ) } > INT00 type = VECT_INIT + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2533.cmd + diff --git a/msp430/lnk_msp430g2544.cmd b/msp430/lnk_msp430g2544.cmd new file mode 100644 index 00000000..2dc6ebcc --- /dev/null +++ b/msp430/lnk_msp430g2544.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2544.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2544 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xC000, length = 0x3FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2544.cmd + diff --git a/msp430/lnk_msp430g2553.cmd b/msp430/lnk_msp430g2553.cmd new file mode 100644 index 00000000..2ffe08ff --- /dev/null +++ b/msp430/lnk_msp430g2553.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2553.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2553 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xC000, length = 0x3FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + TRAPINT : { * ( .int00 ) } > INT00 type = VECT_INIT + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2553.cmd + diff --git a/msp430/lnk_msp430g2744.cmd b/msp430/lnk_msp430g2744.cmd new file mode 100644 index 00000000..22c369ba --- /dev/null +++ b/msp430/lnk_msp430g2744.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2744.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2744 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x8000, length = 0x7FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2744.cmd + diff --git a/msp430/lnk_msp430g2755.cmd b/msp430/lnk_msp430g2755.cmd new file mode 100644 index 00000000..a1e1964a --- /dev/null +++ b/msp430/lnk_msp430g2755.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2755.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2755 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x8000, length = 0x7FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + TIMER1_A1 : { * ( .int00 ) } > INT00 type = VECT_INIT + TIMER1_A0 : { * ( .int01 ) } > INT01 type = VECT_INIT + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + TRAPINT : { * ( .int04 ) } > INT04 type = VECT_INIT + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2755.cmd + diff --git a/msp430/lnk_msp430g2855.cmd b/msp430/lnk_msp430g2855.cmd new file mode 100644 index 00000000..5de0c537 --- /dev/null +++ b/msp430/lnk_msp430g2855.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2855.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2855 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x4000, length = 0xBFDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + TIMER1_A1 : { * ( .int00 ) } > INT00 type = VECT_INIT + TIMER1_A0 : { * ( .int01 ) } > INT01 type = VECT_INIT + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + TRAPINT : { * ( .int04 ) } > INT04 type = VECT_INIT + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2855.cmd + diff --git a/msp430/lnk_msp430g2955.cmd b/msp430/lnk_msp430g2955.cmd new file mode 100644 index 00000000..7fc2515b --- /dev/null +++ b/msp430/lnk_msp430g2955.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430g2955.cmd - LINKER COMMAND FILE FOR LINKING MSP430G2955 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1100, length = 0x1000 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0x2100, length = 0xDEDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + TIMER1_A1 : { * ( .int00 ) } > INT00 type = VECT_INIT + TIMER1_A0 : { * ( .int01 ) } > INT01 type = VECT_INIT + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + TRAPINT : { * ( .int04 ) } > INT04 type = VECT_INIT + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMERB1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMERB0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430g2955.cmd + diff --git a/msp430/lnk_msp430i2020.cmd b/msp430/lnk_msp430i2020.cmd new file mode 100644 index 00000000..36de88de --- /dev/null +++ b/msp430/lnk_msp430i2020.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430i2020.cmd - LINKER COMMAND FILE FOR LINKING MSP430i2020 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x1000, length = 0x0400 + FLASH : origin = 0xC000, length = 0x3FDC + JTAGSIGNATURE : origin = 0xFFDC, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMER0_A1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMER0_A0 : { * ( .int06 ) } > INT06 type = VECT_INIT + SD24 : { * ( .int07 ) } > INT07 type = VECT_INIT + USCI_B0 : { * ( .int08 ) } > INT08 type = VECT_INIT + USCI_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + VMON : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430i2020.cmd + diff --git a/msp430/lnk_msp430i2021.cmd b/msp430/lnk_msp430i2021.cmd new file mode 100644 index 00000000..047d5cd6 --- /dev/null +++ b/msp430/lnk_msp430i2021.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430i2021.cmd - LINKER COMMAND FILE FOR LINKING MSP430i2021 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x1000, length = 0x0400 + FLASH : origin = 0x8000, length = 0x7FDC + JTAGSIGNATURE : origin = 0xFFDC, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMER0_A1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMER0_A0 : { * ( .int06 ) } > INT06 type = VECT_INIT + SD24 : { * ( .int07 ) } > INT07 type = VECT_INIT + USCI_B0 : { * ( .int08 ) } > INT08 type = VECT_INIT + USCI_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + VMON : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430i2021.cmd + diff --git a/msp430/lnk_msp430i2030.cmd b/msp430/lnk_msp430i2030.cmd new file mode 100644 index 00000000..1f900a0d --- /dev/null +++ b/msp430/lnk_msp430i2030.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430i2030.cmd - LINKER COMMAND FILE FOR LINKING MSP430i2030 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x1000, length = 0x0400 + FLASH : origin = 0xC000, length = 0x3FDC + JTAGSIGNATURE : origin = 0xFFDC, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMER0_A1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMER0_A0 : { * ( .int06 ) } > INT06 type = VECT_INIT + SD24 : { * ( .int07 ) } > INT07 type = VECT_INIT + USCI_B0 : { * ( .int08 ) } > INT08 type = VECT_INIT + USCI_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + VMON : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430i2030.cmd + diff --git a/msp430/lnk_msp430i2031.cmd b/msp430/lnk_msp430i2031.cmd new file mode 100644 index 00000000..ecefb1eb --- /dev/null +++ b/msp430/lnk_msp430i2031.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430i2031.cmd - LINKER COMMAND FILE FOR LINKING MSP430i2031 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x1000, length = 0x0400 + FLASH : origin = 0x8000, length = 0x7FDC + JTAGSIGNATURE : origin = 0xFFDC, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMER0_A1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMER0_A0 : { * ( .int06 ) } > INT06 type = VECT_INIT + SD24 : { * ( .int07 ) } > INT07 type = VECT_INIT + USCI_B0 : { * ( .int08 ) } > INT08 type = VECT_INIT + USCI_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + VMON : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430i2031.cmd + diff --git a/msp430/lnk_msp430i2040.cmd b/msp430/lnk_msp430i2040.cmd new file mode 100644 index 00000000..cd2b3583 --- /dev/null +++ b/msp430/lnk_msp430i2040.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430i2040.cmd - LINKER COMMAND FILE FOR LINKING MSP430i2040 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + INFOA : origin = 0x1000, length = 0x0400 + FLASH : origin = 0xC000, length = 0x3FDC + JTAGSIGNATURE : origin = 0xFFDC, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMER0_A1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMER0_A0 : { * ( .int06 ) } > INT06 type = VECT_INIT + SD24 : { * ( .int07 ) } > INT07 type = VECT_INIT + USCI_B0 : { * ( .int08 ) } > INT08 type = VECT_INIT + USCI_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + VMON : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430i2040.cmd + diff --git a/msp430/lnk_msp430i2041.cmd b/msp430/lnk_msp430i2041.cmd new file mode 100644 index 00000000..6ecf3781 --- /dev/null +++ b/msp430/lnk_msp430i2041.cmd @@ -0,0 +1,140 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430i2041.cmd - LINKER COMMAND FILE FOR LINKING MSP430i2041 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0800 + INFOA : origin = 0x1000, length = 0x0400 + FLASH : origin = 0x8000, length = 0x7FDC + JTAGSIGNATURE : origin = 0xFFDC, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + PORT2 : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + PORT1 : { * ( .int04 ) } > INT04 type = VECT_INIT + TIMER0_A1 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMER0_A0 : { * ( .int06 ) } > INT06 type = VECT_INIT + SD24 : { * ( .int07 ) } > INT07 type = VECT_INIT + USCI_B0 : { * ( .int08 ) } > INT08 type = VECT_INIT + USCI_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + VMON : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430i2041.cmd + diff --git a/msp430/lnk_msp430l092.cmd b/msp430/lnk_msp430l092.cmd new file mode 100644 index 00000000..1bb231f4 --- /dev/null +++ b/msp430/lnk_msp430l092.cmd @@ -0,0 +1,138 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430l092.cmd - LINKER COMMAND FILE FOR LINKING MSP430L092 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x2380, length = 0x0080 + INFOA : origin = 0x1C00, length = 0x0060 + FLASH : origin = 0x1C80, length = 0x0700 + INT00 : origin = 0x1C60, length = 0x0002 + INT01 : origin = 0x1C62, length = 0x0002 + INT02 : origin = 0x1C64, length = 0x0002 + INT03 : origin = 0x1C66, length = 0x0002 + INT04 : origin = 0x1C68, length = 0x0002 + INT05 : origin = 0x1C6A, length = 0x0002 + INT06 : origin = 0x1C6C, length = 0x0002 + INT07 : origin = 0x1C6E, length = 0x0002 + INT08 : origin = 0x1C70, length = 0x0002 + INT09 : origin = 0x1C72, length = 0x0002 + INT10 : origin = 0x1C74, length = 0x0002 + INT11 : origin = 0x1C76, length = 0x0002 + INT12 : origin = 0x1C78, length = 0x0002 + INT13 : origin = 0x1C7A, length = 0x0002 + INT14 : origin = 0x1C7C, length = 0x0002 + RESET : origin = 0x1C7E, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + PORT2 : { * ( .int05 ) } > INT05 type = VECT_INIT + TIMER0_A1 : { * ( .int06 ) } > INT06 type = VECT_INIT + TIMER0_A0 : { * ( .int07 ) } > INT07 type = VECT_INIT + PORT1 : { * ( .int08 ) } > INT08 type = VECT_INIT + APOOL : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + TIMER1_A1 : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A0 : { * ( .int12 ) } > INT12 type = VECT_INIT + UNMI : { * ( .int13 ) } > INT13 type = VECT_INIT + SYSNMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430l092.cmd + diff --git a/msp430/lnk_msp430p112.cmd b/msp430/lnk_msp430p112.cmd new file mode 100644 index 00000000..6cce7659 --- /dev/null +++ b/msp430/lnk_msp430p112.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430p112.cmd - LINKER COMMAND FILE FOR LINKING MSP430P112 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + FLASH : origin = 0xF000, length = 0x0FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430p112.cmd + diff --git a/msp430/lnk_msp430p313.cmd b/msp430/lnk_msp430p313.cmd new file mode 100644 index 00000000..ccbf6123 --- /dev/null +++ b/msp430/lnk_msp430p313.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430p313.cmd - LINKER COMMAND FILE FOR LINKING MSP430P313 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0100 + FLASH : origin = 0xE000, length = 0x1FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + PORT0 : { * ( .int00 ) } > INT00 type = VECT_INIT + BASICTIMER : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + TIMERPORT : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + IO1 : { * ( .int12 ) } > INT12 type = VECT_INIT + IO0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430p313.cmd + diff --git a/msp430/lnk_msp430p315.cmd b/msp430/lnk_msp430p315.cmd new file mode 100644 index 00000000..c3feb8d8 --- /dev/null +++ b/msp430/lnk_msp430p315.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430p315.cmd - LINKER COMMAND FILE FOR LINKING MSP430P315 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + FLASH : origin = 0xC000, length = 0x3FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + PORT0 : { * ( .int00 ) } > INT00 type = VECT_INIT + BASICTIMER : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + TIMERPORT : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + IO1 : { * ( .int12 ) } > INT12 type = VECT_INIT + IO0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430p315.cmd + diff --git a/msp430/lnk_msp430p315s.cmd b/msp430/lnk_msp430p315s.cmd new file mode 100644 index 00000000..a8c820cd --- /dev/null +++ b/msp430/lnk_msp430p315s.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430p315s.cmd - LINKER COMMAND FILE FOR LINKING MSP430P315S PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + FLASH : origin = 0xC000, length = 0x3FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + PORT0 : { * ( .int00 ) } > INT00 type = VECT_INIT + BASICTIMER : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + TIMERPORT : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + IO1 : { * ( .int12 ) } > INT12 type = VECT_INIT + IO0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430p315s.cmd + diff --git a/msp430/lnk_msp430p325.cmd b/msp430/lnk_msp430p325.cmd new file mode 100644 index 00000000..b1ae2594 --- /dev/null +++ b/msp430/lnk_msp430p325.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430p325.cmd - LINKER COMMAND FILE FOR LINKING MSP430P325 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + FLASH : origin = 0xC000, length = 0x3FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + PORT0 : { * ( .int00 ) } > INT00 type = VECT_INIT + BASICTIMER : { * ( .int01 ) } > INT01 type = VECT_INIT + .int02 : {} > INT02 + .int03 : {} > INT03 + TIMERPORT : { * ( .int04 ) } > INT04 type = VECT_INIT + ADC : { * ( .int05 ) } > INT05 type = VECT_INIT + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + IO1 : { * ( .int12 ) } > INT12 type = VECT_INIT + IO0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430p325.cmd + diff --git a/msp430/lnk_msp430p337.cmd b/msp430/lnk_msp430p337.cmd new file mode 100644 index 00000000..d7fc3df8 --- /dev/null +++ b/msp430/lnk_msp430p337.cmd @@ -0,0 +1,136 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430p337.cmd - LINKER COMMAND FILE FOR LINKING MSP430P337 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0400 + FLASH : origin = 0x8000, length = 0x7FE0 + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + + /* MSP430 Interrupt vectors */ + PORT0 : { * ( .int00 ) } > INT00 type = VECT_INIT + BASICTIMER : { * ( .int01 ) } > INT01 type = VECT_INIT + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + TIMERPORT : { * ( .int04 ) } > INT04 type = VECT_INIT + .int05 : {} > INT05 + USARTTX : { * ( .int06 ) } > INT06 type = VECT_INIT + USARTRX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMERA1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMERA0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + .int11 : {} > INT11 + IO1 : { * ( .int12 ) } > INT12 type = VECT_INIT + IO0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430p337.cmd + diff --git a/msp430/lnk_msp430sl5438a.cmd b/msp430/lnk_msp430sl5438a.cmd new file mode 100644 index 00000000..9508324c --- /dev/null +++ b/msp430/lnk_msp430sl5438a.cmd @@ -0,0 +1,250 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430sl5438a.cmd - LINKER COMMAND FILE FOR LINKING MSP430SL5438A PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x4000 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x5C00, length = 0xA380 + FLASH2 : origin = 0x10000,length = 0x35BF8 /* Boundaries changed to fix CPU47 */ + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FLASH /* Code */ +#else + .text : {} >> FLASH2 | FLASH /* Code */ +#endif + .text:_isr : {} > FLASH /* ISR Code space */ + .cinit : {} > FLASH /* Initialization tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FLASH /* Constant data */ +#else + .const : {} >> FLASH | FLASH2 /* Constant data */ +#endif + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + RTC : { * ( .int41 ) } > INT41 type = VECT_INIT + PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_B3 : { * ( .int43 ) } > INT43 type = VECT_INIT + USCI_A3 : { * ( .int44 ) } > INT44 type = VECT_INIT + USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT + USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT + PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT + TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + USCI_B2 : { * ( .int51 ) } > INT51 type = VECT_INIT + USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT + TIMER0_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT + TIMER0_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT + ADC12 : { * ( .int55 ) } > INT55 type = VECT_INIT + USCI_B0 : { * ( .int56 ) } > INT56 type = VECT_INIT + USCI_A0 : { * ( .int57 ) } > INT57 type = VECT_INIT + WDT : { * ( .int58 ) } > INT58 type = VECT_INIT + TIMER0_B1 : { * ( .int59 ) } > INT59 type = VECT_INIT + TIMER0_B0 : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430sl5438a.cmd + diff --git a/msp430/lnk_msp430tch5e.cmd b/msp430/lnk_msp430tch5e.cmd new file mode 100644 index 00000000..505bb90e --- /dev/null +++ b/msp430/lnk_msp430tch5e.cmd @@ -0,0 +1,146 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430tch5e.cmd - LINKER COMMAND FILE FOR LINKING MSP430TCH5E PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x0200, length = 0x0200 + INFOA : origin = 0x10C0, length = 0x0040 + INFOB : origin = 0x1080, length = 0x0040 + INFOC : origin = 0x1040, length = 0x0040 + INFOD : origin = 0x1000, length = 0x0040 + FLASH : origin = 0xC000, length = 0x3FDE + BSLSIGNATURE : origin = 0xFFDE, length = 0x0002, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + TRAPINT : { * ( .int00 ) } > INT00 type = VECT_INIT + .int01 : {} > INT01 + PORT1 : { * ( .int02 ) } > INT02 type = VECT_INIT + PORT2 : { * ( .int03 ) } > INT03 type = VECT_INIT + .int04 : {} > INT04 + ADC10 : { * ( .int05 ) } > INT05 type = VECT_INIT + USCIAB0TX : { * ( .int06 ) } > INT06 type = VECT_INIT + USCIAB0RX : { * ( .int07 ) } > INT07 type = VECT_INIT + TIMER0_A1 : { * ( .int08 ) } > INT08 type = VECT_INIT + TIMER0_A0 : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + COMPARATORA : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER1_A1 : { * ( .int12 ) } > INT12 type = VECT_INIT + TIMER1_A0 : { * ( .int13 ) } > INT13 type = VECT_INIT + NMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430tch5e.cmd + diff --git a/msp430/lnk_rf430f5144.cmd b/msp430/lnk_rf430f5144.cmd new file mode 100644 index 00000000..27d1c22e --- /dev/null +++ b/msp430/lnk_rf430f5144.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_rf430f5144.cmd - LINKER COMMAND FILE FOR LINKING RF430F5144 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + PORT2 : { * ( .int45 ) } > INT45 type = VECT_INIT + PORT1 : { * ( .int46 ) } > INT46 type = VECT_INIT + TIMER1_D1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_D0 : { * ( .int48 ) } > INT48 type = VECT_INIT + TEC1 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_A1 : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A0 : { * ( .int52 ) } > INT52 type = VECT_INIT + ADC10 : { * ( .int53 ) } > INT53 type = VECT_INIT + USCI_B0 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + WDT : { * ( .int56 ) } > INT56 type = VECT_INIT + TIMER0_D1 : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_D0 : { * ( .int58 ) } > INT58 type = VECT_INIT + TEC0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l rf430f5144.cmd + diff --git a/msp430/lnk_rf430f5155.cmd b/msp430/lnk_rf430f5155.cmd new file mode 100644 index 00000000..c64520c8 --- /dev/null +++ b/msp430/lnk_rf430f5155.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_rf430f5155.cmd - LINKER COMMAND FILE FOR LINKING RF430F5155 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0400 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0xC000, length = 0x3F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + PORT2 : { * ( .int45 ) } > INT45 type = VECT_INIT + PORT1 : { * ( .int46 ) } > INT46 type = VECT_INIT + TIMER1_D1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_D0 : { * ( .int48 ) } > INT48 type = VECT_INIT + TEC1 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_A1 : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A0 : { * ( .int52 ) } > INT52 type = VECT_INIT + ADC10 : { * ( .int53 ) } > INT53 type = VECT_INIT + USCI_B0 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + WDT : { * ( .int56 ) } > INT56 type = VECT_INIT + TIMER0_D1 : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_D0 : { * ( .int58 ) } > INT58 type = VECT_INIT + TEC0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l rf430f5155.cmd + diff --git a/msp430/lnk_rf430f5175.cmd b/msp430/lnk_rf430f5175.cmd new file mode 100644 index 00000000..af745214 --- /dev/null +++ b/msp430/lnk_rf430f5175.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_rf430f5175.cmd - LINKER COMMAND FILE FOR LINKING RF430F5175 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FLASH : origin = 0x8000, length = 0x7F80 + INT00 : origin = 0xFF80, length = 0x0002 + INT01 : origin = 0xFF82, length = 0x0002 + INT02 : origin = 0xFF84, length = 0x0002 + INT03 : origin = 0xFF86, length = 0x0002 + INT04 : origin = 0xFF88, length = 0x0002 + INT05 : origin = 0xFF8A, length = 0x0002 + INT06 : origin = 0xFF8C, length = 0x0002 + INT07 : origin = 0xFF8E, length = 0x0002 + INT08 : origin = 0xFF90, length = 0x0002 + INT09 : origin = 0xFF92, length = 0x0002 + INT10 : origin = 0xFF94, length = 0x0002 + INT11 : origin = 0xFF96, length = 0x0002 + INT12 : origin = 0xFF98, length = 0x0002 + INT13 : origin = 0xFF9A, length = 0x0002 + INT14 : origin = 0xFF9C, length = 0x0002 + INT15 : origin = 0xFF9E, length = 0x0002 + INT16 : origin = 0xFFA0, length = 0x0002 + INT17 : origin = 0xFFA2, length = 0x0002 + INT18 : origin = 0xFFA4, length = 0x0002 + INT19 : origin = 0xFFA6, length = 0x0002 + INT20 : origin = 0xFFA8, length = 0x0002 + INT21 : origin = 0xFFAA, length = 0x0002 + INT22 : origin = 0xFFAC, length = 0x0002 + INT23 : origin = 0xFFAE, length = 0x0002 + INT24 : origin = 0xFFB0, length = 0x0002 + INT25 : origin = 0xFFB2, length = 0x0002 + INT26 : origin = 0xFFB4, length = 0x0002 + INT27 : origin = 0xFFB6, length = 0x0002 + INT28 : origin = 0xFFB8, length = 0x0002 + INT29 : origin = 0xFFBA, length = 0x0002 + INT30 : origin = 0xFFBC, length = 0x0002 + INT31 : origin = 0xFFBE, length = 0x0002 + INT32 : origin = 0xFFC0, length = 0x0002 + INT33 : origin = 0xFFC2, length = 0x0002 + INT34 : origin = 0xFFC4, length = 0x0002 + INT35 : origin = 0xFFC6, length = 0x0002 + INT36 : origin = 0xFFC8, length = 0x0002 + INT37 : origin = 0xFFCA, length = 0x0002 + INT38 : origin = 0xFFCC, length = 0x0002 + INT39 : origin = 0xFFCE, length = 0x0002 + INT40 : origin = 0xFFD0, length = 0x0002 + INT41 : origin = 0xFFD2, length = 0x0002 + INT42 : origin = 0xFFD4, length = 0x0002 + INT43 : origin = 0xFFD6, length = 0x0002 + INT44 : origin = 0xFFD8, length = 0x0002 + INT45 : origin = 0xFFDA, length = 0x0002 + INT46 : origin = 0xFFDC, length = 0x0002 + INT47 : origin = 0xFFDE, length = 0x0002 + INT48 : origin = 0xFFE0, length = 0x0002 + INT49 : origin = 0xFFE2, length = 0x0002 + INT50 : origin = 0xFFE4, length = 0x0002 + INT51 : origin = 0xFFE6, length = 0x0002 + INT52 : origin = 0xFFE8, length = 0x0002 + INT53 : origin = 0xFFEA, length = 0x0002 + INT54 : origin = 0xFFEC, length = 0x0002 + INT55 : origin = 0xFFEE, length = 0x0002 + INT56 : origin = 0xFFF0, length = 0x0002 + INT57 : origin = 0xFFF2, length = 0x0002 + INT58 : origin = 0xFFF4, length = 0x0002 + INT59 : origin = 0xFFF6, length = 0x0002 + INT60 : origin = 0xFFF8, length = 0x0002 + INT61 : origin = 0xFFFA, length = 0x0002 + INT62 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .text : {} > FLASH /* Code */ + .cinit : {} > FLASH /* Initialization tables */ + .const : {} > FLASH /* Constant data */ + .cio : {} > RAM /* C I/O Buffer */ + + .pinit : {} > FLASH /* C++ Constructor tables */ + .binit : {} > FLASH /* Boot-time Initialization tables */ + .init_array : {} > FLASH /* C++ Constructor tables */ + .mspabi.exidx : {} > FLASH /* C++ Constructor tables */ + .mspabi.extab : {} > FLASH /* C++ Constructor tables */ +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + .int30 : {} > INT30 + .int31 : {} > INT31 + .int32 : {} > INT32 + .int33 : {} > INT33 + .int34 : {} > INT34 + .int35 : {} > INT35 + .int36 : {} > INT36 + .int37 : {} > INT37 + .int38 : {} > INT38 + .int39 : {} > INT39 + .int40 : {} > INT40 + .int41 : {} > INT41 + .int42 : {} > INT42 + .int43 : {} > INT43 + .int44 : {} > INT44 + PORT2 : { * ( .int45 ) } > INT45 type = VECT_INIT + PORT1 : { * ( .int46 ) } > INT46 type = VECT_INIT + TIMER1_D1 : { * ( .int47 ) } > INT47 type = VECT_INIT + TIMER1_D0 : { * ( .int48 ) } > INT48 type = VECT_INIT + TEC1 : { * ( .int49 ) } > INT49 type = VECT_INIT + DMA : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_A1 : { * ( .int51 ) } > INT51 type = VECT_INIT + TIMER0_A0 : { * ( .int52 ) } > INT52 type = VECT_INIT + ADC10 : { * ( .int53 ) } > INT53 type = VECT_INIT + USCI_B0 : { * ( .int54 ) } > INT54 type = VECT_INIT + USCI_A0 : { * ( .int55 ) } > INT55 type = VECT_INIT + WDT : { * ( .int56 ) } > INT56 type = VECT_INIT + TIMER0_D1 : { * ( .int57 ) } > INT57 type = VECT_INIT + TIMER0_D0 : { * ( .int58 ) } > INT58 type = VECT_INIT + TEC0 : { * ( .int59 ) } > INT59 type = VECT_INIT + COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT + UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT + SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l rf430f5175.cmd + diff --git a/msp430/lnk_rf430frl152h.cmd b/msp430/lnk_rf430frl152h.cmd new file mode 100644 index 00000000..464b4d7b --- /dev/null +++ b/msp430/lnk_rf430frl152h.cmd @@ -0,0 +1,156 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_rf430frl152h.cmd - LINKER COMMAND FILE FOR LINKING RF430FRL152H PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x1000 + FRAM : origin = 0xF840, length = 0x0790 + JTAGSIGNATURE : origin = 0xFFD0, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFFD4, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + } + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .cio : {} > RAM /* C I/O buffer */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + RFPMM : { * ( .int05 ) } > INT05 type = VECT_INIT + PORT1 : { * ( .int06 ) } > INT06 type = VECT_INIT + SD_ADC : { * ( .int07 ) } > INT07 type = VECT_INIT + USCI_B0 : { * ( .int08 ) } > INT08 type = VECT_INIT + ISO : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + TIMER0_A1 : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER0_A0 : { * ( .int12 ) } > INT12 type = VECT_INIT + UNMI : { * ( .int13 ) } > INT13 type = VECT_INIT + SYSNMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l rf430frl152h.cmd + diff --git a/msp430/lnk_rf430frl152h_rom.cmd b/msp430/lnk_rf430frl152h_rom.cmd new file mode 100644 index 00000000..351d156c --- /dev/null +++ b/msp430/lnk_rf430frl152h_rom.cmd @@ -0,0 +1,156 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_rf430frl152h_rom.cmd - LINKER COMMAND FILE FOR LINKING RF430FRL152H_ROM PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0200 + FRAM : origin = 0xF840, length = 0x0790 + JTAGSIGNATURE : origin = 0xFFD0, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFFD4, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + } + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .cio : {} > RAM /* C I/O buffer */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + RFPMM : { * ( .int05 ) } > INT05 type = VECT_INIT + PORT1 : { * ( .int06 ) } > INT06 type = VECT_INIT + SD_ADC : { * ( .int07 ) } > INT07 type = VECT_INIT + USCI_B0 : { * ( .int08 ) } > INT08 type = VECT_INIT + ISO : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + TIMER0_A1 : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER0_A0 : { * ( .int12 ) } > INT12 type = VECT_INIT + UNMI : { * ( .int13 ) } > INT13 type = VECT_INIT + SYSNMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l rf430frl152h_rom.cmd + diff --git a/msp430/lnk_rf430frl153h.cmd b/msp430/lnk_rf430frl153h.cmd new file mode 100644 index 00000000..730718f8 --- /dev/null +++ b/msp430/lnk_rf430frl153h.cmd @@ -0,0 +1,156 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_rf430frl153h.cmd - LINKER COMMAND FILE FOR LINKING RF430FRL153H PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x1000 + FRAM : origin = 0xF840, length = 0x0790 + JTAGSIGNATURE : origin = 0xFFD0, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFFD4, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + } + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .cio : {} > RAM /* C I/O buffer */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + RFPMM : { * ( .int05 ) } > INT05 type = VECT_INIT + PORT1 : { * ( .int06 ) } > INT06 type = VECT_INIT + SD_ADC : { * ( .int07 ) } > INT07 type = VECT_INIT + .int08 : {} > INT08 + ISO : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + TIMER0_A1 : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER0_A0 : { * ( .int12 ) } > INT12 type = VECT_INIT + UNMI : { * ( .int13 ) } > INT13 type = VECT_INIT + SYSNMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l rf430frl153h.cmd + diff --git a/msp430/lnk_rf430frl153h_rom.cmd b/msp430/lnk_rf430frl153h_rom.cmd new file mode 100644 index 00000000..a5c368ec --- /dev/null +++ b/msp430/lnk_rf430frl153h_rom.cmd @@ -0,0 +1,156 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_rf430frl153h_rom.cmd - LINKER COMMAND FILE FOR LINKING RF430FRL153H_ROM PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0200 + FRAM : origin = 0xF840, length = 0x0790 + JTAGSIGNATURE : origin = 0xFFD0, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFFD4, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + } + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .cio : {} > RAM /* C I/O buffer */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + RFPMM : { * ( .int05 ) } > INT05 type = VECT_INIT + PORT1 : { * ( .int06 ) } > INT06 type = VECT_INIT + SD_ADC : { * ( .int07 ) } > INT07 type = VECT_INIT + .int08 : {} > INT08 + ISO : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + TIMER0_A1 : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER0_A0 : { * ( .int12 ) } > INT12 type = VECT_INIT + UNMI : { * ( .int13 ) } > INT13 type = VECT_INIT + SYSNMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l rf430frl153h_rom.cmd + diff --git a/msp430/lnk_rf430frl154h.cmd b/msp430/lnk_rf430frl154h.cmd new file mode 100644 index 00000000..9b1af92c --- /dev/null +++ b/msp430/lnk_rf430frl154h.cmd @@ -0,0 +1,156 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_rf430frl154h.cmd - LINKER COMMAND FILE FOR LINKING RF430FRL154H PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x1000 + FRAM : origin = 0xF840, length = 0x0790 + JTAGSIGNATURE : origin = 0xFFD0, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFFD4, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + } + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .cio : {} > RAM /* C I/O buffer */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + RFPMM : { * ( .int05 ) } > INT05 type = VECT_INIT + PORT1 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USCI_B0 : { * ( .int08 ) } > INT08 type = VECT_INIT + ISO : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + TIMER0_A1 : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER0_A0 : { * ( .int12 ) } > INT12 type = VECT_INIT + UNMI : { * ( .int13 ) } > INT13 type = VECT_INIT + SYSNMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l rf430frl154h.cmd + diff --git a/msp430/lnk_rf430frl154h_rom.cmd b/msp430/lnk_rf430frl154h_rom.cmd new file mode 100644 index 00000000..4f86f868 --- /dev/null +++ b/msp430/lnk_rf430frl154h_rom.cmd @@ -0,0 +1,156 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_rf430frl154h_rom.cmd - LINKER COMMAND FILE FOR LINKING RF430FRL154H_ROM PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.213 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0200 + FRAM : origin = 0xF840, length = 0x0790 + JTAGSIGNATURE : origin = 0xFFD0, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFFD4, length = 0x0004, fill = 0xFFFF + INT00 : origin = 0xFFE0, length = 0x0002 + INT01 : origin = 0xFFE2, length = 0x0002 + INT02 : origin = 0xFFE4, length = 0x0002 + INT03 : origin = 0xFFE6, length = 0x0002 + INT04 : origin = 0xFFE8, length = 0x0002 + INT05 : origin = 0xFFEA, length = 0x0002 + INT06 : origin = 0xFFEC, length = 0x0002 + INT07 : origin = 0xFFEE, length = 0x0002 + INT08 : origin = 0xFFF0, length = 0x0002 + INT09 : origin = 0xFFF2, length = 0x0002 + INT10 : origin = 0xFFF4, length = 0x0002 + INT11 : origin = 0xFFF6, length = 0x0002 + INT12 : origin = 0xFFF8, length = 0x0002 + INT13 : origin = 0xFFFA, length = 0x0002 + INT14 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(ALL_FRAM) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + } + + GROUP(READ_ONLY_MEMORY) + { + .cinit : {} /* Initialization tables */ + .pinit : {} /* C++ constructor tables */ + .binit : {} /* Boot-time Initialization tables */ + .init_array : {} /* C++ constructor tables */ + .mspabi.exidx : {} /* C++ constructor tables */ + .mspabi.extab : {} /* C++ constructor tables */ + .const : {} /* Constant data */ + } + + GROUP(EXECUTABLE_MEMORY) + { + .text : {} /* Code */ + } + } > FRAM + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .cio : {} > RAM /* C I/O buffer */ + .sysmem : {} > RAM /* Dynamic memory allocation area */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + RFPMM : { * ( .int05 ) } > INT05 type = VECT_INIT + PORT1 : { * ( .int06 ) } > INT06 type = VECT_INIT + .int07 : {} > INT07 + USCI_B0 : { * ( .int08 ) } > INT08 type = VECT_INIT + ISO : { * ( .int09 ) } > INT09 type = VECT_INIT + WDT : { * ( .int10 ) } > INT10 type = VECT_INIT + TIMER0_A1 : { * ( .int11 ) } > INT11 type = VECT_INIT + TIMER0_A0 : { * ( .int12 ) } > INT12 type = VECT_INIT + UNMI : { * ( .int13 ) } > INT13 type = VECT_INIT + SYSNMI : { * ( .int14 ) } > INT14 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l rf430frl154h_rom.cmd + diff --git a/msp430/msp430afe221.cmd b/msp430/msp430afe221.cmd new file mode 100644 index 00000000..39a950db --- /dev/null +++ b/msp430/msp430afe221.cmd @@ -0,0 +1,160 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430afe221.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* SD24_A1 - Sigma Delta 24 Bit +************************************************************/ +SD24INCTL0 = 0x00B0; +SD24PRE0 = 0x00B8; +SD24CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD24CTL = 0x0100; +SD24CCTL0 = 0x0102; +SD24MEM0 = 0x0110; +SD24IV = 0x01AE; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430afe222.cmd b/msp430/msp430afe222.cmd new file mode 100644 index 00000000..6e1f204d --- /dev/null +++ b/msp430/msp430afe222.cmd @@ -0,0 +1,164 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430afe222.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* SD24_A2 - Sigma Delta 24 Bit +************************************************************/ +SD24INCTL0 = 0x00B0; +SD24INCTL1 = 0x00B1; +SD24PRE0 = 0x00B8; +SD24PRE1 = 0x00B9; +SD24CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD24CTL = 0x0100; +SD24CCTL0 = 0x0102; +SD24CCTL1 = 0x0104; +SD24MEM0 = 0x0110; +SD24MEM1 = 0x0112; +SD24IV = 0x01AE; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430afe223.cmd b/msp430/msp430afe223.cmd new file mode 100644 index 00000000..2a3e0ecc --- /dev/null +++ b/msp430/msp430afe223.cmd @@ -0,0 +1,168 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430afe223.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* SD24_A3 - Sigma Delta 24 Bit +************************************************************/ +SD24INCTL0 = 0x00B0; +SD24INCTL1 = 0x00B1; +SD24INCTL2 = 0x00B2; +SD24PRE0 = 0x00B8; +SD24PRE1 = 0x00B9; +SD24PRE2 = 0x00BA; +SD24CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD24CTL = 0x0100; +SD24CCTL0 = 0x0102; +SD24CCTL1 = 0x0104; +SD24CCTL2 = 0x0106; +SD24MEM0 = 0x0110; +SD24MEM1 = 0x0112; +SD24MEM2 = 0x0114; +SD24IV = 0x01AE; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430afe231.cmd b/msp430/msp430afe231.cmd new file mode 100644 index 00000000..f467a772 --- /dev/null +++ b/msp430/msp430afe231.cmd @@ -0,0 +1,160 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430afe231.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* SD24_A1 - Sigma Delta 24 Bit +************************************************************/ +SD24INCTL0 = 0x00B0; +SD24PRE0 = 0x00B8; +SD24CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD24CTL = 0x0100; +SD24CCTL0 = 0x0102; +SD24MEM0 = 0x0110; +SD24IV = 0x01AE; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430afe232.cmd b/msp430/msp430afe232.cmd new file mode 100644 index 00000000..eb840593 --- /dev/null +++ b/msp430/msp430afe232.cmd @@ -0,0 +1,164 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430afe232.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* SD24_A2 - Sigma Delta 24 Bit +************************************************************/ +SD24INCTL0 = 0x00B0; +SD24INCTL1 = 0x00B1; +SD24PRE0 = 0x00B8; +SD24PRE1 = 0x00B9; +SD24CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD24CTL = 0x0100; +SD24CCTL0 = 0x0102; +SD24CCTL1 = 0x0104; +SD24MEM0 = 0x0110; +SD24MEM1 = 0x0112; +SD24IV = 0x01AE; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430afe233.cmd b/msp430/msp430afe233.cmd new file mode 100644 index 00000000..e723ab44 --- /dev/null +++ b/msp430/msp430afe233.cmd @@ -0,0 +1,168 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430afe233.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* SD24_A3 - Sigma Delta 24 Bit +************************************************************/ +SD24INCTL0 = 0x00B0; +SD24INCTL1 = 0x00B1; +SD24INCTL2 = 0x00B2; +SD24PRE0 = 0x00B8; +SD24PRE1 = 0x00B9; +SD24PRE2 = 0x00BA; +SD24CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD24CTL = 0x0100; +SD24CCTL0 = 0x0102; +SD24CCTL1 = 0x0104; +SD24CCTL2 = 0x0106; +SD24MEM0 = 0x0110; +SD24MEM1 = 0x0112; +SD24MEM2 = 0x0114; +SD24IV = 0x01AE; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430afe251.cmd b/msp430/msp430afe251.cmd new file mode 100644 index 00000000..c4dfcd00 --- /dev/null +++ b/msp430/msp430afe251.cmd @@ -0,0 +1,160 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430afe251.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* SD24_A1 - Sigma Delta 24 Bit +************************************************************/ +SD24INCTL0 = 0x00B0; +SD24PRE0 = 0x00B8; +SD24CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD24CTL = 0x0100; +SD24CCTL0 = 0x0102; +SD24MEM0 = 0x0110; +SD24IV = 0x01AE; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430afe252.cmd b/msp430/msp430afe252.cmd new file mode 100644 index 00000000..ee7f06f2 --- /dev/null +++ b/msp430/msp430afe252.cmd @@ -0,0 +1,164 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430afe252.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* SD24_A2 - Sigma Delta 24 Bit +************************************************************/ +SD24INCTL0 = 0x00B0; +SD24INCTL1 = 0x00B1; +SD24PRE0 = 0x00B8; +SD24PRE1 = 0x00B9; +SD24CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD24CTL = 0x0100; +SD24CCTL0 = 0x0102; +SD24CCTL1 = 0x0104; +SD24MEM0 = 0x0110; +SD24MEM1 = 0x0112; +SD24IV = 0x01AE; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430afe253.cmd b/msp430/msp430afe253.cmd new file mode 100644 index 00000000..b860c169 --- /dev/null +++ b/msp430/msp430afe253.cmd @@ -0,0 +1,168 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430afe253.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* SD24_A3 - Sigma Delta 24 Bit +************************************************************/ +SD24INCTL0 = 0x00B0; +SD24INCTL1 = 0x00B1; +SD24INCTL2 = 0x00B2; +SD24PRE0 = 0x00B8; +SD24PRE1 = 0x00B9; +SD24PRE2 = 0x00BA; +SD24CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD24CTL = 0x0100; +SD24CCTL0 = 0x0102; +SD24CCTL1 = 0x0104; +SD24CCTL2 = 0x0106; +SD24MEM0 = 0x0110; +SD24MEM1 = 0x0112; +SD24MEM2 = 0x0114; +SD24IV = 0x01AE; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430bt5190.cmd b/msp430/msp430bt5190.cmd new file mode 100644 index 00000000..5d01c339 --- /dev/null +++ b/msp430/msp430bt5190.cmd @@ -0,0 +1,815 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430bt5190.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL = 0x02AA; +PFSEL_L = 0x02AA; +PFSEL_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0680; +UCA3CTLW0_L = 0x0680; +UCA3CTLW0_H = 0x0681; +UCA3BRW = 0x0686; +UCA3BRW_L = 0x0686; +UCA3BRW_H = 0x0687; +UCA3MCTL = 0x0688; +UCA3STAT = 0x068A; +UCA3RXBUF = 0x068C; +UCA3TXBUF = 0x068E; +UCA3ABCTL = 0x0690; +UCA3IRCTL = 0x0692; +UCA3IRCTL_L = 0x0692; +UCA3IRCTL_H = 0x0693; +UCA3ICTL = 0x069C; +UCA3ICTL_L = 0x069C; +UCA3ICTL_H = 0x069D; +UCA3IV = 0x069E; +/************************************************************ +* USCI B3 +************************************************************/ +UCB3CTLW0 = 0x06A0; +UCB3CTLW0_L = 0x06A0; +UCB3CTLW0_H = 0x06A1; +UCB3BRW = 0x06A6; +UCB3BRW_L = 0x06A6; +UCB3BRW_H = 0x06A7; +UCB3STAT = 0x06AA; +UCB3RXBUF = 0x06AC; +UCB3TXBUF = 0x06AE; +UCB3I2COA = 0x06B0; +UCB3I2COA_L = 0x06B0; +UCB3I2COA_H = 0x06B1; +UCB3I2CSA = 0x06B2; +UCB3I2CSA_L = 0x06B2; +UCB3I2CSA_H = 0x06B3; +UCB3ICTL = 0x06BC; +UCB3ICTL_L = 0x06BC; +UCB3ICTL_H = 0x06BD; +UCB3IV = 0x06BE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430c091.cmd b/msp430/msp430c091.cmd new file mode 100644 index 00000000..1e312a7b --- /dev/null +++ b/msp430/msp430c091.cmd @@ -0,0 +1,241 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430c091.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* A-POOL +************************************************************/ +APCNF = 0x01A0; +APCNF_L = 0x01A0; +APCNF_H = 0x01A1; +APCTL = 0x01A2; +APCTL_L = 0x01A2; +APCTL_H = 0x01A3; +APOMR = 0x01A4; +APOMR_L = 0x01A4; +APOMR_H = 0x01A5; +APVDIV = 0x01A6; +APVDIV_L = 0x01A6; +APVDIV_H = 0x01A7; +APTRIM = 0x01A8; +APTRIM_L = 0x01A8; +APTRIM_H = 0x01A9; +APINT = 0x01B0; +APINT_L = 0x01B0; +APINT_H = 0x01B1; +APINTB = 0x01B2; +APINTB_L = 0x01B2; +APINTB_H = 0x01B3; +APFRACT = 0x01B4; +APFRACT_L = 0x01B4; +APFRACT_H = 0x01B5; +APFRACTB = 0x01B6; +APFRACTB_L = 0x01B6; +APFRACTB_H = 0x01B7; +APIFG = 0x01BA; +APIFG_L = 0x01BA; +APIFG_H = 0x01BB; +APIE = 0x01BC; +APIE_L = 0x01BC; +APIE_H = 0x01BD; +APIV = 0x01BE; +APIV_L = 0x01BE; +APIV_H = 0x01BF; +/************************************************************ +* COMPACT CLOCK SYSTEM +************************************************************/ +CCSCTL0 = 0x0160; +CCSCTL0_L = 0x0160; +CCSCTL0_H = 0x0161; +CCSCTL1 = 0x0162; +CCSCTL1_L = 0x0162; +CCSCTL1_H = 0x0163; +CCSCTL2 = 0x0164; +CCSCTL2_L = 0x0164; +CCSCTL2_H = 0x0165; +CCSCTL4 = 0x0168; +CCSCTL4_L = 0x0168; +CCSCTL4_H = 0x0169; +CCSCTL5 = 0x016A; +CCSCTL5_L = 0x016A; +CCSCTL5_H = 0x016B; +CCSCTL6 = 0x016C; +CCSCTL6_L = 0x016C; +CCSCTL6_H = 0x016D; +CCSCTL7 = 0x016E; +CCSCTL7_L = 0x016E; +CCSCTL7_H = 0x016F; +CCSCTL8 = 0x0170; +CCSCTL8_L = 0x0170; +CCSCTL8_H = 0x0171; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* COMPACT SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSCNF = 0x0190; +SYSCNF_L = 0x0190; +SYSCNF_H = 0x0191; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFFFF - 0x20) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430c092.cmd b/msp430/msp430c092.cmd new file mode 100644 index 00000000..635521b1 --- /dev/null +++ b/msp430/msp430c092.cmd @@ -0,0 +1,241 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430c092.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* A-POOL +************************************************************/ +APCNF = 0x01A0; +APCNF_L = 0x01A0; +APCNF_H = 0x01A1; +APCTL = 0x01A2; +APCTL_L = 0x01A2; +APCTL_H = 0x01A3; +APOMR = 0x01A4; +APOMR_L = 0x01A4; +APOMR_H = 0x01A5; +APVDIV = 0x01A6; +APVDIV_L = 0x01A6; +APVDIV_H = 0x01A7; +APTRIM = 0x01A8; +APTRIM_L = 0x01A8; +APTRIM_H = 0x01A9; +APINT = 0x01B0; +APINT_L = 0x01B0; +APINT_H = 0x01B1; +APINTB = 0x01B2; +APINTB_L = 0x01B2; +APINTB_H = 0x01B3; +APFRACT = 0x01B4; +APFRACT_L = 0x01B4; +APFRACT_H = 0x01B5; +APFRACTB = 0x01B6; +APFRACTB_L = 0x01B6; +APFRACTB_H = 0x01B7; +APIFG = 0x01BA; +APIFG_L = 0x01BA; +APIFG_H = 0x01BB; +APIE = 0x01BC; +APIE_L = 0x01BC; +APIE_H = 0x01BD; +APIV = 0x01BE; +APIV_L = 0x01BE; +APIV_H = 0x01BF; +/************************************************************ +* COMPACT CLOCK SYSTEM +************************************************************/ +CCSCTL0 = 0x0160; +CCSCTL0_L = 0x0160; +CCSCTL0_H = 0x0161; +CCSCTL1 = 0x0162; +CCSCTL1_L = 0x0162; +CCSCTL1_H = 0x0163; +CCSCTL2 = 0x0164; +CCSCTL2_L = 0x0164; +CCSCTL2_H = 0x0165; +CCSCTL4 = 0x0168; +CCSCTL4_L = 0x0168; +CCSCTL4_H = 0x0169; +CCSCTL5 = 0x016A; +CCSCTL5_L = 0x016A; +CCSCTL5_H = 0x016B; +CCSCTL6 = 0x016C; +CCSCTL6_L = 0x016C; +CCSCTL6_H = 0x016D; +CCSCTL7 = 0x016E; +CCSCTL7_L = 0x016E; +CCSCTL7_H = 0x016F; +CCSCTL8 = 0x0170; +CCSCTL8_L = 0x0170; +CCSCTL8_H = 0x0171; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* COMPACT SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSCNF = 0x0190; +SYSCNF_L = 0x0190; +SYSCNF_H = 0x0191; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFFFF - 0x20) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430c111.cmd b/msp430/msp430c111.cmd new file mode 100644 index 00000000..7f6a9797 --- /dev/null +++ b/msp430/msp430c111.cmd @@ -0,0 +1,111 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430c111.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430c1111.cmd b/msp430/msp430c1111.cmd new file mode 100644 index 00000000..9f40287d --- /dev/null +++ b/msp430/msp430c1111.cmd @@ -0,0 +1,113 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430c1111.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430c112.cmd b/msp430/msp430c112.cmd new file mode 100644 index 00000000..40a29b90 --- /dev/null +++ b/msp430/msp430c112.cmd @@ -0,0 +1,111 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430c112.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430c1121.cmd b/msp430/msp430c1121.cmd new file mode 100644 index 00000000..2a341321 --- /dev/null +++ b/msp430/msp430c1121.cmd @@ -0,0 +1,113 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430c1121.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430c1331.cmd b/msp430/msp430c1331.cmd new file mode 100644 index 00000000..ebda58c9 --- /dev/null +++ b/msp430/msp430c1331.cmd @@ -0,0 +1,162 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430c1331.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430c1351.cmd b/msp430/msp430c1351.cmd new file mode 100644 index 00000000..5106c94a --- /dev/null +++ b/msp430/msp430c1351.cmd @@ -0,0 +1,162 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430c1351.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430c311s.cmd b/msp430/msp430c311s.cmd new file mode 100644 index 00000000..18d39437 --- /dev/null +++ b/msp430/msp430c311s.cmd @@ -0,0 +1,131 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430c311s.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O PORT0 +************************************************************/ +P0IN = 0x0010; +P0OUT = 0x0011; +P0DIR = 0x0012; +P0IFG = 0x0013; +P0IES = 0x0014; +P0IE = 0x0015; +/************************************************************ +* LCD REGISTER +************************************************************/ +LCDCTL = 0x0030; +LCDM1 = 0x0031; +LCDM2 = 0x0032; +LCDM3 = 0x0033; +LCDM4 = 0x0034; +LCDM5 = 0x0035; +LCDM6 = 0x0036; +LCDM7 = 0x0037; +LCDM8 = 0x0038; +LCDM9 = 0x0039; +LCDM10 = 0x003A; +LCDM11 = 0x003B; +LCDM12 = 0x003C; +LCDM13 = 0x003D; +LCDM14 = 0x003E; +LCDM15 = 0x003F; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK GENERATOR +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +CBCTL = 0x0053; +/************************************************************ +* 8BIT TIMER/COUNTER +************************************************************/ +TCCTL = 0x0042; +TCPLD = 0x0043; +TCDAT = 0x0044; +/************************************************************ +* TIMER/PORT +************************************************************/ +TPCTL = 0x004B; +TPCNT1 = 0x004C; +TPCNT2 = 0x004D; +TPD = 0x004E; +TPE = 0x004F; +/* Source select of clock input coded with Bits 6-7 in TPE + NOTE: If the control bit B16 in TPD is set, TPSSEL2/3 + are 'don't care' and the clock source of counter + TPCNT2 is the same as of the counter TPCNT1. */ +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430c312.cmd b/msp430/msp430c312.cmd new file mode 100644 index 00000000..b5f11da2 --- /dev/null +++ b/msp430/msp430c312.cmd @@ -0,0 +1,131 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430c312.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O PORT0 +************************************************************/ +P0IN = 0x0010; +P0OUT = 0x0011; +P0DIR = 0x0012; +P0IFG = 0x0013; +P0IES = 0x0014; +P0IE = 0x0015; +/************************************************************ +* LCD REGISTER +************************************************************/ +LCDCTL = 0x0030; +LCDM1 = 0x0031; +LCDM2 = 0x0032; +LCDM3 = 0x0033; +LCDM4 = 0x0034; +LCDM5 = 0x0035; +LCDM6 = 0x0036; +LCDM7 = 0x0037; +LCDM8 = 0x0038; +LCDM9 = 0x0039; +LCDM10 = 0x003A; +LCDM11 = 0x003B; +LCDM12 = 0x003C; +LCDM13 = 0x003D; +LCDM14 = 0x003E; +LCDM15 = 0x003F; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK GENERATOR +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +CBCTL = 0x0053; +/************************************************************ +* 8BIT TIMER/COUNTER +************************************************************/ +TCCTL = 0x0042; +TCPLD = 0x0043; +TCDAT = 0x0044; +/************************************************************ +* TIMER/PORT +************************************************************/ +TPCTL = 0x004B; +TPCNT1 = 0x004C; +TPCNT2 = 0x004D; +TPD = 0x004E; +TPE = 0x004F; +/* Source select of clock input coded with Bits 6-7 in TPE + NOTE: If the control bit B16 in TPD is set, TPSSEL2/3 + are 'don't care' and the clock source of counter + TPCNT2 is the same as of the counter TPCNT1. */ +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430c313.cmd b/msp430/msp430c313.cmd new file mode 100644 index 00000000..dcfd4dae --- /dev/null +++ b/msp430/msp430c313.cmd @@ -0,0 +1,131 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430c313.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O PORT0 +************************************************************/ +P0IN = 0x0010; +P0OUT = 0x0011; +P0DIR = 0x0012; +P0IFG = 0x0013; +P0IES = 0x0014; +P0IE = 0x0015; +/************************************************************ +* LCD REGISTER +************************************************************/ +LCDCTL = 0x0030; +LCDM1 = 0x0031; +LCDM2 = 0x0032; +LCDM3 = 0x0033; +LCDM4 = 0x0034; +LCDM5 = 0x0035; +LCDM6 = 0x0036; +LCDM7 = 0x0037; +LCDM8 = 0x0038; +LCDM9 = 0x0039; +LCDM10 = 0x003A; +LCDM11 = 0x003B; +LCDM12 = 0x003C; +LCDM13 = 0x003D; +LCDM14 = 0x003E; +LCDM15 = 0x003F; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK GENERATOR +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +CBCTL = 0x0053; +/************************************************************ +* 8BIT TIMER/COUNTER +************************************************************/ +TCCTL = 0x0042; +TCPLD = 0x0043; +TCDAT = 0x0044; +/************************************************************ +* TIMER/PORT +************************************************************/ +TPCTL = 0x004B; +TPCNT1 = 0x004C; +TPCNT2 = 0x004D; +TPD = 0x004E; +TPE = 0x004F; +/* Source select of clock input coded with Bits 6-7 in TPE + NOTE: If the control bit B16 in TPD is set, TPSSEL2/3 + are 'don't care' and the clock source of counter + TPCNT2 is the same as of the counter TPCNT1. */ +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430c314.cmd b/msp430/msp430c314.cmd new file mode 100644 index 00000000..04bad374 --- /dev/null +++ b/msp430/msp430c314.cmd @@ -0,0 +1,131 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430c314.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O PORT0 +************************************************************/ +P0IN = 0x0010; +P0OUT = 0x0011; +P0DIR = 0x0012; +P0IFG = 0x0013; +P0IES = 0x0014; +P0IE = 0x0015; +/************************************************************ +* LCD REGISTER +************************************************************/ +LCDCTL = 0x0030; +LCDM1 = 0x0031; +LCDM2 = 0x0032; +LCDM3 = 0x0033; +LCDM4 = 0x0034; +LCDM5 = 0x0035; +LCDM6 = 0x0036; +LCDM7 = 0x0037; +LCDM8 = 0x0038; +LCDM9 = 0x0039; +LCDM10 = 0x003A; +LCDM11 = 0x003B; +LCDM12 = 0x003C; +LCDM13 = 0x003D; +LCDM14 = 0x003E; +LCDM15 = 0x003F; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK GENERATOR +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +CBCTL = 0x0053; +/************************************************************ +* 8BIT TIMER/COUNTER +************************************************************/ +TCCTL = 0x0042; +TCPLD = 0x0043; +TCDAT = 0x0044; +/************************************************************ +* TIMER/PORT +************************************************************/ +TPCTL = 0x004B; +TPCNT1 = 0x004C; +TPCNT2 = 0x004D; +TPD = 0x004E; +TPE = 0x004F; +/* Source select of clock input coded with Bits 6-7 in TPE + NOTE: If the control bit B16 in TPD is set, TPSSEL2/3 + are 'don't care' and the clock source of counter + TPCNT2 is the same as of the counter TPCNT1. */ +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430c315.cmd b/msp430/msp430c315.cmd new file mode 100644 index 00000000..a9a3b200 --- /dev/null +++ b/msp430/msp430c315.cmd @@ -0,0 +1,131 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430c315.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O PORT0 +************************************************************/ +P0IN = 0x0010; +P0OUT = 0x0011; +P0DIR = 0x0012; +P0IFG = 0x0013; +P0IES = 0x0014; +P0IE = 0x0015; +/************************************************************ +* LCD REGISTER +************************************************************/ +LCDCTL = 0x0030; +LCDM1 = 0x0031; +LCDM2 = 0x0032; +LCDM3 = 0x0033; +LCDM4 = 0x0034; +LCDM5 = 0x0035; +LCDM6 = 0x0036; +LCDM7 = 0x0037; +LCDM8 = 0x0038; +LCDM9 = 0x0039; +LCDM10 = 0x003A; +LCDM11 = 0x003B; +LCDM12 = 0x003C; +LCDM13 = 0x003D; +LCDM14 = 0x003E; +LCDM15 = 0x003F; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK GENERATOR +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +CBCTL = 0x0053; +/************************************************************ +* 8BIT TIMER/COUNTER +************************************************************/ +TCCTL = 0x0042; +TCPLD = 0x0043; +TCDAT = 0x0044; +/************************************************************ +* TIMER/PORT +************************************************************/ +TPCTL = 0x004B; +TPCNT1 = 0x004C; +TPCNT2 = 0x004D; +TPD = 0x004E; +TPE = 0x004F; +/* Source select of clock input coded with Bits 6-7 in TPE + NOTE: If the control bit B16 in TPD is set, TPSSEL2/3 + are 'don't care' and the clock source of counter + TPCNT2 is the same as of the counter TPCNT1. */ +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430c323.cmd b/msp430/msp430c323.cmd new file mode 100644 index 00000000..ccb189da --- /dev/null +++ b/msp430/msp430c323.cmd @@ -0,0 +1,138 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430c323.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O PORT0 +************************************************************/ +P0IN = 0x0010; +P0OUT = 0x0011; +P0DIR = 0x0012; +P0IFG = 0x0013; +P0IES = 0x0014; +P0IE = 0x0015; +/************************************************************ +* LCD REGISTER +************************************************************/ +LCDCTL = 0x0030; +LCDM1 = 0x0031; +LCDM2 = 0x0032; +LCDM3 = 0x0033; +LCDM4 = 0x0034; +LCDM5 = 0x0035; +LCDM6 = 0x0036; +LCDM7 = 0x0037; +LCDM8 = 0x0038; +LCDM9 = 0x0039; +LCDM10 = 0x003A; +LCDM11 = 0x003B; +LCDM12 = 0x003C; +LCDM13 = 0x003D; +LCDM14 = 0x003E; +LCDM15 = 0x003F; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK GENERATOR +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +CBCTL = 0x0053; +/************************************************************ +* 8BIT TIMER/COUNTER +************************************************************/ +TCCTL = 0x0042; +TCPLD = 0x0043; +TCDAT = 0x0044; +/************************************************************ +* TIMER/PORT +************************************************************/ +TPCTL = 0x004B; +TPCNT1 = 0x004C; +TPCNT2 = 0x004D; +TPD = 0x004E; +TPE = 0x004F; +/* Source select of clock input coded with Bits 6-7 in TPE + NOTE: If the control bit B16 in TPD is set, TPSSEL2/3 + are 'don't care' and the clock source of counter + TPCNT2 is the same as of the counter TPCNT1. */ +/************************************************************ +* A/D CONVERTER 12 + 2 +************************************************************/ +AIN = 0x0110; +AEN = 0x0112; +ACTL = 0x0114; +ADAT = 0x0118; +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430c325.cmd b/msp430/msp430c325.cmd new file mode 100644 index 00000000..4217a49b --- /dev/null +++ b/msp430/msp430c325.cmd @@ -0,0 +1,138 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430c325.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O PORT0 +************************************************************/ +P0IN = 0x0010; +P0OUT = 0x0011; +P0DIR = 0x0012; +P0IFG = 0x0013; +P0IES = 0x0014; +P0IE = 0x0015; +/************************************************************ +* LCD REGISTER +************************************************************/ +LCDCTL = 0x0030; +LCDM1 = 0x0031; +LCDM2 = 0x0032; +LCDM3 = 0x0033; +LCDM4 = 0x0034; +LCDM5 = 0x0035; +LCDM6 = 0x0036; +LCDM7 = 0x0037; +LCDM8 = 0x0038; +LCDM9 = 0x0039; +LCDM10 = 0x003A; +LCDM11 = 0x003B; +LCDM12 = 0x003C; +LCDM13 = 0x003D; +LCDM14 = 0x003E; +LCDM15 = 0x003F; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK GENERATOR +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +CBCTL = 0x0053; +/************************************************************ +* 8BIT TIMER/COUNTER +************************************************************/ +TCCTL = 0x0042; +TCPLD = 0x0043; +TCDAT = 0x0044; +/************************************************************ +* TIMER/PORT +************************************************************/ +TPCTL = 0x004B; +TPCNT1 = 0x004C; +TPCNT2 = 0x004D; +TPD = 0x004E; +TPE = 0x004F; +/* Source select of clock input coded with Bits 6-7 in TPE + NOTE: If the control bit B16 in TPD is set, TPSSEL2/3 + are 'don't care' and the clock source of counter + TPCNT2 is the same as of the counter TPCNT1. */ +/************************************************************ +* A/D CONVERTER 12 + 2 +************************************************************/ +AIN = 0x0110; +AEN = 0x0112; +ACTL = 0x0114; +ADAT = 0x0118; +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430c336.cmd b/msp430/msp430c336.cmd new file mode 100644 index 00000000..04f871d1 --- /dev/null +++ b/msp430/msp430c336.cmd @@ -0,0 +1,198 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430c336.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O PORT0 +************************************************************/ +P0IN = 0x0010; +P0OUT = 0x0011; +P0DIR = 0x0012; +P0IFG = 0x0013; +P0IES = 0x0014; +P0IE = 0x0015; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK GENERATOR +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +CBCTL = 0x0053; +/************************************************************ +* LCD REGISTER +************************************************************/ +LCDCTL = 0x0030; +LCDM1 = 0x0031; +LCDM2 = 0x0032; +LCDM3 = 0x0033; +LCDM4 = 0x0034; +LCDM5 = 0x0035; +LCDM6 = 0x0036; +LCDM7 = 0x0037; +LCDM8 = 0x0038; +LCDM9 = 0x0039; +LCDM10 = 0x003A; +LCDM11 = 0x003B; +LCDM12 = 0x003C; +LCDM13 = 0x003D; +LCDM14 = 0x003E; +LCDM15 = 0x003F; +/************************************************************ +* USART +************************************************************/ +UCTL = 0x0070; +UTCTL = 0x0071; +URCTL = 0x0072; +UMCTL = 0x0073; +UBR0 = 0x0074; +UBR1 = 0x0075; +RXBUF = 0x0076; +TXBUF = 0x0077; +/************************************************************ +* Timer A5 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TACCTL3 = 0x0168; +TACCTL4 = 0x016A; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +TACCR3 = 0x0178; +TACCR4 = 0x017A; +/************************************************************ +* 8BIT TIMER/COUNTER +************************************************************/ +TCCTL = 0x0042; +TCPLD = 0x0043; +TCDAT = 0x0044; +/************************************************************ +* TIMER/PORT +************************************************************/ +TPCTL = 0x004B; +TPCNT1 = 0x004C; +TPCNT2 = 0x004D; +TPD = 0x004E; +TPE = 0x004F; +/* Source select of clock input coded with Bits 6-7 in TPE + NOTE: If the control bit B16 in TPD is set, TPSSEL2/3 + are 'don't care' and the clock source of counter + TPCNT2 is the same as of the counter TPCNT1. */ +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430c337.cmd b/msp430/msp430c337.cmd new file mode 100644 index 00000000..5c188d23 --- /dev/null +++ b/msp430/msp430c337.cmd @@ -0,0 +1,198 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430c337.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O PORT0 +************************************************************/ +P0IN = 0x0010; +P0OUT = 0x0011; +P0DIR = 0x0012; +P0IFG = 0x0013; +P0IES = 0x0014; +P0IE = 0x0015; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK GENERATOR +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +CBCTL = 0x0053; +/************************************************************ +* LCD REGISTER +************************************************************/ +LCDCTL = 0x0030; +LCDM1 = 0x0031; +LCDM2 = 0x0032; +LCDM3 = 0x0033; +LCDM4 = 0x0034; +LCDM5 = 0x0035; +LCDM6 = 0x0036; +LCDM7 = 0x0037; +LCDM8 = 0x0038; +LCDM9 = 0x0039; +LCDM10 = 0x003A; +LCDM11 = 0x003B; +LCDM12 = 0x003C; +LCDM13 = 0x003D; +LCDM14 = 0x003E; +LCDM15 = 0x003F; +/************************************************************ +* USART +************************************************************/ +UCTL = 0x0070; +UTCTL = 0x0071; +URCTL = 0x0072; +UMCTL = 0x0073; +UBR0 = 0x0074; +UBR1 = 0x0075; +RXBUF = 0x0076; +TXBUF = 0x0077; +/************************************************************ +* Timer A5 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TACCTL3 = 0x0168; +TACCTL4 = 0x016A; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +TACCR3 = 0x0178; +TACCR4 = 0x017A; +/************************************************************ +* 8BIT TIMER/COUNTER +************************************************************/ +TCCTL = 0x0042; +TCPLD = 0x0043; +TCDAT = 0x0044; +/************************************************************ +* TIMER/PORT +************************************************************/ +TPCTL = 0x004B; +TPCNT1 = 0x004C; +TPCNT2 = 0x004D; +TPD = 0x004E; +TPE = 0x004F; +/* Source select of clock input coded with Bits 6-7 in TPE + NOTE: If the control bit B16 in TPD is set, TPSSEL2/3 + are 'don't care' and the clock source of counter + TPCNT2 is the same as of the counter TPCNT1. */ +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430c412.cmd b/msp430/msp430c412.cmd new file mode 100644 index 00000000..7189dc91 --- /dev/null +++ b/msp430/msp430c412.cmd @@ -0,0 +1,173 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430c412.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430c413.cmd b/msp430/msp430c413.cmd new file mode 100644 index 00000000..cf71252c --- /dev/null +++ b/msp430/msp430c413.cmd @@ -0,0 +1,173 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430c413.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430cg4616.cmd b/msp430/msp430cg4616.cmd new file mode 100644 index 00000000..ef4356ff --- /dev/null +++ b/msp430/msp430cg4616.cmd @@ -0,0 +1,372 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430cg4616.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x00C0; +OA0CTL1 = 0x00C1; +OA1CTL0 = 0x00C2; +OA1CTL1 = 0x00C3; +OA2CTL0 = 0x00C4; +OA2CTL1 = 0x00C5; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* DIGITAL I/O Port7/8 +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +/************************************************************ +* DIGITAL I/O Port9/10 +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430cg4617.cmd b/msp430/msp430cg4617.cmd new file mode 100644 index 00000000..9685410e --- /dev/null +++ b/msp430/msp430cg4617.cmd @@ -0,0 +1,372 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430cg4617.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x00C0; +OA0CTL1 = 0x00C1; +OA1CTL0 = 0x00C2; +OA1CTL1 = 0x00C3; +OA2CTL0 = 0x00C4; +OA2CTL1 = 0x00C5; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* DIGITAL I/O Port7/8 +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +/************************************************************ +* DIGITAL I/O Port9/10 +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430cg4618.cmd b/msp430/msp430cg4618.cmd new file mode 100644 index 00000000..d3e5ccd8 --- /dev/null +++ b/msp430/msp430cg4618.cmd @@ -0,0 +1,372 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430cg4618.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x00C0; +OA0CTL1 = 0x00C1; +OA1CTL0 = 0x00C2; +OA1CTL1 = 0x00C3; +OA2CTL0 = 0x00C4; +OA2CTL1 = 0x00C5; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* DIGITAL I/O Port7/8 +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +/************************************************************ +* DIGITAL I/O Port9/10 +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430cg4619.cmd b/msp430/msp430cg4619.cmd new file mode 100644 index 00000000..2c0f1288 --- /dev/null +++ b/msp430/msp430cg4619.cmd @@ -0,0 +1,372 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430cg4619.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x00C0; +OA0CTL1 = 0x00C1; +OA1CTL0 = 0x00C2; +OA1CTL1 = 0x00C3; +OA2CTL0 = 0x00C4; +OA2CTL1 = 0x00C5; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* DIGITAL I/O Port7/8 +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +/************************************************************ +* DIGITAL I/O Port9/10 +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430e112.cmd b/msp430/msp430e112.cmd new file mode 100644 index 00000000..b01ee4b9 --- /dev/null +++ b/msp430/msp430e112.cmd @@ -0,0 +1,111 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430e112.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430e313.cmd b/msp430/msp430e313.cmd new file mode 100644 index 00000000..1f6cb4d8 --- /dev/null +++ b/msp430/msp430e313.cmd @@ -0,0 +1,131 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430e313.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O PORT0 +************************************************************/ +P0IN = 0x0010; +P0OUT = 0x0011; +P0DIR = 0x0012; +P0IFG = 0x0013; +P0IES = 0x0014; +P0IE = 0x0015; +/************************************************************ +* LCD REGISTER +************************************************************/ +LCDCTL = 0x0030; +LCDM1 = 0x0031; +LCDM2 = 0x0032; +LCDM3 = 0x0033; +LCDM4 = 0x0034; +LCDM5 = 0x0035; +LCDM6 = 0x0036; +LCDM7 = 0x0037; +LCDM8 = 0x0038; +LCDM9 = 0x0039; +LCDM10 = 0x003A; +LCDM11 = 0x003B; +LCDM12 = 0x003C; +LCDM13 = 0x003D; +LCDM14 = 0x003E; +LCDM15 = 0x003F; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK GENERATOR +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +CBCTL = 0x0053; +/************************************************************ +* 8BIT TIMER/COUNTER +************************************************************/ +TCCTL = 0x0042; +TCPLD = 0x0043; +TCDAT = 0x0044; +/************************************************************ +* TIMER/PORT +************************************************************/ +TPCTL = 0x004B; +TPCNT1 = 0x004C; +TPCNT2 = 0x004D; +TPD = 0x004E; +TPE = 0x004F; +/* Source select of clock input coded with Bits 6-7 in TPE + NOTE: If the control bit B16 in TPD is set, TPSSEL2/3 + are 'don't care' and the clock source of counter + TPCNT2 is the same as of the counter TPCNT1. */ +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430e315.cmd b/msp430/msp430e315.cmd new file mode 100644 index 00000000..bd03cd29 --- /dev/null +++ b/msp430/msp430e315.cmd @@ -0,0 +1,131 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430e315.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O PORT0 +************************************************************/ +P0IN = 0x0010; +P0OUT = 0x0011; +P0DIR = 0x0012; +P0IFG = 0x0013; +P0IES = 0x0014; +P0IE = 0x0015; +/************************************************************ +* LCD REGISTER +************************************************************/ +LCDCTL = 0x0030; +LCDM1 = 0x0031; +LCDM2 = 0x0032; +LCDM3 = 0x0033; +LCDM4 = 0x0034; +LCDM5 = 0x0035; +LCDM6 = 0x0036; +LCDM7 = 0x0037; +LCDM8 = 0x0038; +LCDM9 = 0x0039; +LCDM10 = 0x003A; +LCDM11 = 0x003B; +LCDM12 = 0x003C; +LCDM13 = 0x003D; +LCDM14 = 0x003E; +LCDM15 = 0x003F; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK GENERATOR +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +CBCTL = 0x0053; +/************************************************************ +* 8BIT TIMER/COUNTER +************************************************************/ +TCCTL = 0x0042; +TCPLD = 0x0043; +TCDAT = 0x0044; +/************************************************************ +* TIMER/PORT +************************************************************/ +TPCTL = 0x004B; +TPCNT1 = 0x004C; +TPCNT2 = 0x004D; +TPD = 0x004E; +TPE = 0x004F; +/* Source select of clock input coded with Bits 6-7 in TPE + NOTE: If the control bit B16 in TPD is set, TPSSEL2/3 + are 'don't care' and the clock source of counter + TPCNT2 is the same as of the counter TPCNT1. */ +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430e325.cmd b/msp430/msp430e325.cmd new file mode 100644 index 00000000..7fc56b85 --- /dev/null +++ b/msp430/msp430e325.cmd @@ -0,0 +1,138 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430e325.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O PORT0 +************************************************************/ +P0IN = 0x0010; +P0OUT = 0x0011; +P0DIR = 0x0012; +P0IFG = 0x0013; +P0IES = 0x0014; +P0IE = 0x0015; +/************************************************************ +* LCD REGISTER +************************************************************/ +LCDCTL = 0x0030; +LCDM1 = 0x0031; +LCDM2 = 0x0032; +LCDM3 = 0x0033; +LCDM4 = 0x0034; +LCDM5 = 0x0035; +LCDM6 = 0x0036; +LCDM7 = 0x0037; +LCDM8 = 0x0038; +LCDM9 = 0x0039; +LCDM10 = 0x003A; +LCDM11 = 0x003B; +LCDM12 = 0x003C; +LCDM13 = 0x003D; +LCDM14 = 0x003E; +LCDM15 = 0x003F; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK GENERATOR +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +CBCTL = 0x0053; +/************************************************************ +* 8BIT TIMER/COUNTER +************************************************************/ +TCCTL = 0x0042; +TCPLD = 0x0043; +TCDAT = 0x0044; +/************************************************************ +* TIMER/PORT +************************************************************/ +TPCTL = 0x004B; +TPCNT1 = 0x004C; +TPCNT2 = 0x004D; +TPD = 0x004E; +TPE = 0x004F; +/* Source select of clock input coded with Bits 6-7 in TPE + NOTE: If the control bit B16 in TPD is set, TPSSEL2/3 + are 'don't care' and the clock source of counter + TPCNT2 is the same as of the counter TPCNT1. */ +/************************************************************ +* A/D CONVERTER 12 + 2 +************************************************************/ +AIN = 0x0110; +AEN = 0x0112; +ACTL = 0x0114; +ADAT = 0x0118; +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430e337.cmd b/msp430/msp430e337.cmd new file mode 100644 index 00000000..fd722512 --- /dev/null +++ b/msp430/msp430e337.cmd @@ -0,0 +1,198 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430e337.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O PORT0 +************************************************************/ +P0IN = 0x0010; +P0OUT = 0x0011; +P0DIR = 0x0012; +P0IFG = 0x0013; +P0IES = 0x0014; +P0IE = 0x0015; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK GENERATOR +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +CBCTL = 0x0053; +/************************************************************ +* LCD REGISTER +************************************************************/ +LCDCTL = 0x0030; +LCDM1 = 0x0031; +LCDM2 = 0x0032; +LCDM3 = 0x0033; +LCDM4 = 0x0034; +LCDM5 = 0x0035; +LCDM6 = 0x0036; +LCDM7 = 0x0037; +LCDM8 = 0x0038; +LCDM9 = 0x0039; +LCDM10 = 0x003A; +LCDM11 = 0x003B; +LCDM12 = 0x003C; +LCDM13 = 0x003D; +LCDM14 = 0x003E; +LCDM15 = 0x003F; +/************************************************************ +* USART +************************************************************/ +UCTL = 0x0070; +UTCTL = 0x0071; +URCTL = 0x0072; +UMCTL = 0x0073; +UBR0 = 0x0074; +UBR1 = 0x0075; +RXBUF = 0x0076; +TXBUF = 0x0077; +/************************************************************ +* Timer A5 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TACCTL3 = 0x0168; +TACCTL4 = 0x016A; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +TACCR3 = 0x0178; +TACCR4 = 0x017A; +/************************************************************ +* 8BIT TIMER/COUNTER +************************************************************/ +TCCTL = 0x0042; +TCPLD = 0x0043; +TCDAT = 0x0044; +/************************************************************ +* TIMER/PORT +************************************************************/ +TPCTL = 0x004B; +TPCNT1 = 0x004C; +TPCNT2 = 0x004D; +TPD = 0x004E; +TPE = 0x004F; +/* Source select of clock input coded with Bits 6-7 in TPE + NOTE: If the control bit B16 in TPD is set, TPSSEL2/3 + are 'don't care' and the clock source of counter + TPCNT2 is the same as of the counter TPCNT1. */ +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f110.cmd b/msp430/msp430f110.cmd new file mode 100644 index 00000000..7c2a5bf9 --- /dev/null +++ b/msp430/msp430f110.cmd @@ -0,0 +1,111 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f110.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f1101.cmd b/msp430/msp430f1101.cmd new file mode 100644 index 00000000..e9d00920 --- /dev/null +++ b/msp430/msp430f1101.cmd @@ -0,0 +1,113 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f1101.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f1101a.cmd b/msp430/msp430f1101a.cmd new file mode 100644 index 00000000..2c948d86 --- /dev/null +++ b/msp430/msp430f1101a.cmd @@ -0,0 +1,113 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f1101a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f1111.cmd b/msp430/msp430f1111.cmd new file mode 100644 index 00000000..0e616db9 --- /dev/null +++ b/msp430/msp430f1111.cmd @@ -0,0 +1,113 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f1111.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f1111a.cmd b/msp430/msp430f1111a.cmd new file mode 100644 index 00000000..61ac5d3b --- /dev/null +++ b/msp430/msp430f1111a.cmd @@ -0,0 +1,113 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f1111a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f112.cmd b/msp430/msp430f112.cmd new file mode 100644 index 00000000..349f051f --- /dev/null +++ b/msp430/msp430f112.cmd @@ -0,0 +1,111 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f112.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f1121.cmd b/msp430/msp430f1121.cmd new file mode 100644 index 00000000..15e5269b --- /dev/null +++ b/msp430/msp430f1121.cmd @@ -0,0 +1,113 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f1121.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f1121a.cmd b/msp430/msp430f1121a.cmd new file mode 100644 index 00000000..7ad79dea --- /dev/null +++ b/msp430/msp430f1121a.cmd @@ -0,0 +1,113 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f1121a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f1122.cmd b/msp430/msp430f1122.cmd new file mode 100644 index 00000000..99c6403c --- /dev/null +++ b/msp430/msp430f1122.cmd @@ -0,0 +1,117 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f1122.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f1132.cmd b/msp430/msp430f1132.cmd new file mode 100644 index 00000000..9c6edd30 --- /dev/null +++ b/msp430/msp430f1132.cmd @@ -0,0 +1,117 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f1132.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f122.cmd b/msp430/msp430f122.cmd new file mode 100644 index 00000000..442d0f87 --- /dev/null +++ b/msp430/msp430f122.cmd @@ -0,0 +1,137 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f122.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f1222.cmd b/msp430/msp430f1222.cmd new file mode 100644 index 00000000..a4cb3845 --- /dev/null +++ b/msp430/msp430f1222.cmd @@ -0,0 +1,141 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f1222.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f123.cmd b/msp430/msp430f123.cmd new file mode 100644 index 00000000..7fad9172 --- /dev/null +++ b/msp430/msp430f123.cmd @@ -0,0 +1,137 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f123.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f1232.cmd b/msp430/msp430f1232.cmd new file mode 100644 index 00000000..62afa331 --- /dev/null +++ b/msp430/msp430f1232.cmd @@ -0,0 +1,141 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f1232.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f133.cmd b/msp430/msp430f133.cmd new file mode 100644 index 00000000..e6c4dc1b --- /dev/null +++ b/msp430/msp430f133.cmd @@ -0,0 +1,202 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f133.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f135.cmd b/msp430/msp430f135.cmd new file mode 100644 index 00000000..7565e2ee --- /dev/null +++ b/msp430/msp430f135.cmd @@ -0,0 +1,202 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f135.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f147.cmd b/msp430/msp430f147.cmd new file mode 100644 index 00000000..d7d5cf11 --- /dev/null +++ b/msp430/msp430f147.cmd @@ -0,0 +1,235 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f147.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f1471.cmd b/msp430/msp430f1471.cmd new file mode 100644 index 00000000..c1049cb0 --- /dev/null +++ b/msp430/msp430f1471.cmd @@ -0,0 +1,195 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f1471.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f148.cmd b/msp430/msp430f148.cmd new file mode 100644 index 00000000..036f910a --- /dev/null +++ b/msp430/msp430f148.cmd @@ -0,0 +1,235 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f148.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f1481.cmd b/msp430/msp430f1481.cmd new file mode 100644 index 00000000..6dba5707 --- /dev/null +++ b/msp430/msp430f1481.cmd @@ -0,0 +1,195 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f1481.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f149.cmd b/msp430/msp430f149.cmd new file mode 100644 index 00000000..d6d56b18 --- /dev/null +++ b/msp430/msp430f149.cmd @@ -0,0 +1,235 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f149.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f1491.cmd b/msp430/msp430f1491.cmd new file mode 100644 index 00000000..d0c3d93d --- /dev/null +++ b/msp430/msp430f1491.cmd @@ -0,0 +1,195 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f1491.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f155.cmd b/msp430/msp430f155.cmd new file mode 100644 index 00000000..4b3d1008 --- /dev/null +++ b/msp430/msp430f155.cmd @@ -0,0 +1,246 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f155.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART0 I2C +************************************************************/ +I2CIE = 0x0050; +I2CIFG = 0x0051; +I2CNDAT = 0x0052; +I2CTCTL = 0x0071; +I2CDCTL = 0x0072; +I2CPSC = 0x0073; +I2CSCLH = 0x0074; +I2CSCLL = 0x0075; +I2CDRB = 0x0076; +I2CDRW = 0x0076; +I2COA = 0x0118; +I2CSA = 0x011A; +I2CIV = 0x011C; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMA0CTL = 0x01E0; +DMA1CTL = 0x01E8; +DMA2CTL = 0x01F0; +DMA0SA = 0x01E2; +DMA0DA = 0x01E4; +DMA0SZ = 0x01E6; +DMA1SA = 0x01EA; +DMA1DA = 0x01EC; +DMA1SZ = 0x01EE; +DMA2SA = 0x01F2; +DMA2DA = 0x01F4; +DMA2SZ = 0x01F6; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f156.cmd b/msp430/msp430f156.cmd new file mode 100644 index 00000000..ce727e5c --- /dev/null +++ b/msp430/msp430f156.cmd @@ -0,0 +1,246 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f156.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART0 I2C +************************************************************/ +I2CIE = 0x0050; +I2CIFG = 0x0051; +I2CNDAT = 0x0052; +I2CTCTL = 0x0071; +I2CDCTL = 0x0072; +I2CPSC = 0x0073; +I2CSCLH = 0x0074; +I2CSCLL = 0x0075; +I2CDRB = 0x0076; +I2CDRW = 0x0076; +I2COA = 0x0118; +I2CSA = 0x011A; +I2CIV = 0x011C; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMA0CTL = 0x01E0; +DMA1CTL = 0x01E8; +DMA2CTL = 0x01F0; +DMA0SA = 0x01E2; +DMA0DA = 0x01E4; +DMA0SZ = 0x01E6; +DMA1SA = 0x01EA; +DMA1DA = 0x01EC; +DMA1SZ = 0x01EE; +DMA2SA = 0x01F2; +DMA2DA = 0x01F4; +DMA2SZ = 0x01F6; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f157.cmd b/msp430/msp430f157.cmd new file mode 100644 index 00000000..1c7a29d1 --- /dev/null +++ b/msp430/msp430f157.cmd @@ -0,0 +1,246 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f157.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART0 I2C +************************************************************/ +I2CIE = 0x0050; +I2CIFG = 0x0051; +I2CNDAT = 0x0052; +I2CTCTL = 0x0071; +I2CDCTL = 0x0072; +I2CPSC = 0x0073; +I2CSCLH = 0x0074; +I2CSCLL = 0x0075; +I2CDRB = 0x0076; +I2CDRW = 0x0076; +I2COA = 0x0118; +I2CSA = 0x011A; +I2CIV = 0x011C; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMA0CTL = 0x01E0; +DMA1CTL = 0x01E8; +DMA2CTL = 0x01F0; +DMA0SA = 0x01E2; +DMA0DA = 0x01E4; +DMA0SZ = 0x01E6; +DMA1SA = 0x01EA; +DMA1DA = 0x01EC; +DMA1SZ = 0x01EE; +DMA2SA = 0x01F2; +DMA2DA = 0x01F4; +DMA2SZ = 0x01F6; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f1610.cmd b/msp430/msp430f1610.cmd new file mode 100644 index 00000000..b2d8f900 --- /dev/null +++ b/msp430/msp430f1610.cmd @@ -0,0 +1,279 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f1610.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* USART0 I2C +************************************************************/ +I2CIE = 0x0050; +I2CIFG = 0x0051; +I2CNDAT = 0x0052; +I2CTCTL = 0x0071; +I2CDCTL = 0x0072; +I2CPSC = 0x0073; +I2CSCLH = 0x0074; +I2CSCLL = 0x0075; +I2CDRB = 0x0076; +I2CDRW = 0x0076; +I2COA = 0x0118; +I2CSA = 0x011A; +I2CIV = 0x011C; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMA0CTL = 0x01E0; +DMA1CTL = 0x01E8; +DMA2CTL = 0x01F0; +DMA0SA = 0x01E2; +DMA0DA = 0x01E4; +DMA0SZ = 0x01E6; +DMA1SA = 0x01EA; +DMA1DA = 0x01EC; +DMA1SZ = 0x01EE; +DMA2SA = 0x01F2; +DMA2DA = 0x01F4; +DMA2SZ = 0x01F6; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f1611.cmd b/msp430/msp430f1611.cmd new file mode 100644 index 00000000..07e668f8 --- /dev/null +++ b/msp430/msp430f1611.cmd @@ -0,0 +1,279 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f1611.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* USART0 I2C +************************************************************/ +I2CIE = 0x0050; +I2CIFG = 0x0051; +I2CNDAT = 0x0052; +I2CTCTL = 0x0071; +I2CDCTL = 0x0072; +I2CPSC = 0x0073; +I2CSCLH = 0x0074; +I2CSCLL = 0x0075; +I2CDRB = 0x0076; +I2CDRW = 0x0076; +I2COA = 0x0118; +I2CSA = 0x011A; +I2CIV = 0x011C; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMA0CTL = 0x01E0; +DMA1CTL = 0x01E8; +DMA2CTL = 0x01F0; +DMA0SA = 0x01E2; +DMA0DA = 0x01E4; +DMA0SZ = 0x01E6; +DMA1SA = 0x01EA; +DMA1DA = 0x01EC; +DMA1SZ = 0x01EE; +DMA2SA = 0x01F2; +DMA2DA = 0x01F4; +DMA2SZ = 0x01F6; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f1612.cmd b/msp430/msp430f1612.cmd new file mode 100644 index 00000000..a0239320 --- /dev/null +++ b/msp430/msp430f1612.cmd @@ -0,0 +1,279 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f1612.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* USART0 I2C +************************************************************/ +I2CIE = 0x0050; +I2CIFG = 0x0051; +I2CNDAT = 0x0052; +I2CTCTL = 0x0071; +I2CDCTL = 0x0072; +I2CPSC = 0x0073; +I2CSCLH = 0x0074; +I2CSCLL = 0x0075; +I2CDRB = 0x0076; +I2CDRW = 0x0076; +I2COA = 0x0118; +I2CSA = 0x011A; +I2CIV = 0x011C; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMA0CTL = 0x01E0; +DMA1CTL = 0x01E8; +DMA2CTL = 0x01F0; +DMA0SA = 0x01E2; +DMA0DA = 0x01E4; +DMA0SZ = 0x01E6; +DMA1SA = 0x01EA; +DMA1DA = 0x01EC; +DMA1SZ = 0x01EE; +DMA2SA = 0x01F2; +DMA2DA = 0x01F4; +DMA2SZ = 0x01F6; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f167.cmd b/msp430/msp430f167.cmd new file mode 100644 index 00000000..be7b76db --- /dev/null +++ b/msp430/msp430f167.cmd @@ -0,0 +1,279 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f167.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* USART0 I2C +************************************************************/ +I2CIE = 0x0050; +I2CIFG = 0x0051; +I2CNDAT = 0x0052; +I2CTCTL = 0x0071; +I2CDCTL = 0x0072; +I2CPSC = 0x0073; +I2CSCLH = 0x0074; +I2CSCLL = 0x0075; +I2CDRB = 0x0076; +I2CDRW = 0x0076; +I2COA = 0x0118; +I2CSA = 0x011A; +I2CIV = 0x011C; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMA0CTL = 0x01E0; +DMA1CTL = 0x01E8; +DMA2CTL = 0x01F0; +DMA0SA = 0x01E2; +DMA0DA = 0x01E4; +DMA0SZ = 0x01E6; +DMA1SA = 0x01EA; +DMA1DA = 0x01EC; +DMA1SZ = 0x01EE; +DMA2SA = 0x01F2; +DMA2DA = 0x01F4; +DMA2SZ = 0x01F6; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f168.cmd b/msp430/msp430f168.cmd new file mode 100644 index 00000000..5ab9dc99 --- /dev/null +++ b/msp430/msp430f168.cmd @@ -0,0 +1,279 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f168.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* USART0 I2C +************************************************************/ +I2CIE = 0x0050; +I2CIFG = 0x0051; +I2CNDAT = 0x0052; +I2CTCTL = 0x0071; +I2CDCTL = 0x0072; +I2CPSC = 0x0073; +I2CSCLH = 0x0074; +I2CSCLL = 0x0075; +I2CDRB = 0x0076; +I2CDRW = 0x0076; +I2COA = 0x0118; +I2CSA = 0x011A; +I2CIV = 0x011C; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMA0CTL = 0x01E0; +DMA1CTL = 0x01E8; +DMA2CTL = 0x01F0; +DMA0SA = 0x01E2; +DMA0DA = 0x01E4; +DMA0SZ = 0x01E6; +DMA1SA = 0x01EA; +DMA1DA = 0x01EC; +DMA1SZ = 0x01EE; +DMA2SA = 0x01F2; +DMA2DA = 0x01F4; +DMA2SZ = 0x01F6; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f169.cmd b/msp430/msp430f169.cmd new file mode 100644 index 00000000..1a3e596a --- /dev/null +++ b/msp430/msp430f169.cmd @@ -0,0 +1,279 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f169.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* USART0 I2C +************************************************************/ +I2CIE = 0x0050; +I2CIFG = 0x0051; +I2CNDAT = 0x0052; +I2CTCTL = 0x0071; +I2CDCTL = 0x0072; +I2CPSC = 0x0073; +I2CSCLH = 0x0074; +I2CSCLL = 0x0075; +I2CDRB = 0x0076; +I2CDRW = 0x0076; +I2COA = 0x0118; +I2CSA = 0x011A; +I2CIV = 0x011C; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMA0CTL = 0x01E0; +DMA1CTL = 0x01E8; +DMA2CTL = 0x01F0; +DMA0SA = 0x01E2; +DMA0DA = 0x01E4; +DMA0SZ = 0x01E6; +DMA1SA = 0x01EA; +DMA1DA = 0x01EC; +DMA1SZ = 0x01EE; +DMA2SA = 0x01F2; +DMA2DA = 0x01F4; +DMA2SZ = 0x01F6; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2001.cmd b/msp430/msp430f2001.cmd new file mode 100644 index 00000000..bcf03a33 --- /dev/null +++ b/msp430/msp430f2001.cmd @@ -0,0 +1,125 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2001.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* Timer A2 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2002.cmd b/msp430/msp430f2002.cmd new file mode 100644 index 00000000..753679e2 --- /dev/null +++ b/msp430/msp430f2002.cmd @@ -0,0 +1,141 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2002.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* Timer A2 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2003.cmd b/msp430/msp430f2003.cmd new file mode 100644 index 00000000..436f3db3 --- /dev/null +++ b/msp430/msp430f2003.cmd @@ -0,0 +1,143 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2003.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* SD16_A1 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16AE = 0x00B7; +SD16CONF0 = 0x00F7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +/************************************************************ +* Timer A2 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2011.cmd b/msp430/msp430f2011.cmd new file mode 100644 index 00000000..a394cb9b --- /dev/null +++ b/msp430/msp430f2011.cmd @@ -0,0 +1,125 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2011.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* Timer A2 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2012.cmd b/msp430/msp430f2012.cmd new file mode 100644 index 00000000..dd7ad9e3 --- /dev/null +++ b/msp430/msp430f2012.cmd @@ -0,0 +1,141 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2012.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* Timer A2 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2013.cmd b/msp430/msp430f2013.cmd new file mode 100644 index 00000000..ebf40a5a --- /dev/null +++ b/msp430/msp430f2013.cmd @@ -0,0 +1,143 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2013.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* SD16_A1 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16AE = 0x00B7; +SD16CONF0 = 0x00F7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +/************************************************************ +* Timer A2 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2101.cmd b/msp430/msp430f2101.cmd new file mode 100644 index 00000000..6aba67f2 --- /dev/null +++ b/msp430/msp430f2101.cmd @@ -0,0 +1,127 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2101.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2111.cmd b/msp430/msp430f2111.cmd new file mode 100644 index 00000000..e3358418 --- /dev/null +++ b/msp430/msp430f2111.cmd @@ -0,0 +1,127 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2111.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2112.cmd b/msp430/msp430f2112.cmd new file mode 100644 index 00000000..17990897 --- /dev/null +++ b/msp430/msp430f2112.cmd @@ -0,0 +1,192 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2112.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10AE1 = 0x004B; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2121.cmd b/msp430/msp430f2121.cmd new file mode 100644 index 00000000..37303ca9 --- /dev/null +++ b/msp430/msp430f2121.cmd @@ -0,0 +1,127 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2121.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2122.cmd b/msp430/msp430f2122.cmd new file mode 100644 index 00000000..7ac765db --- /dev/null +++ b/msp430/msp430f2122.cmd @@ -0,0 +1,192 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2122.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10AE1 = 0x004B; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2131.cmd b/msp430/msp430f2131.cmd new file mode 100644 index 00000000..91d57188 --- /dev/null +++ b/msp430/msp430f2131.cmd @@ -0,0 +1,127 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2131.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2132.cmd b/msp430/msp430f2132.cmd new file mode 100644 index 00000000..f14a3586 --- /dev/null +++ b/msp430/msp430f2132.cmd @@ -0,0 +1,192 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2132.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10AE1 = 0x004B; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2232.cmd b/msp430/msp430f2232.cmd new file mode 100644 index 00000000..debcdf7f --- /dev/null +++ b/msp430/msp430f2232.cmd @@ -0,0 +1,183 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2232.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10AE1 = 0x004B; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2234.cmd b/msp430/msp430f2234.cmd new file mode 100644 index 00000000..0a7bdc62 --- /dev/null +++ b/msp430/msp430f2234.cmd @@ -0,0 +1,190 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2234.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10AE1 = 0x004B; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x00C0; +OA0CTL1 = 0x00C1; +OA1CTL0 = 0x00C2; +OA1CTL1 = 0x00C3; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2252.cmd b/msp430/msp430f2252.cmd new file mode 100644 index 00000000..21b286cc --- /dev/null +++ b/msp430/msp430f2252.cmd @@ -0,0 +1,183 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2252.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10AE1 = 0x004B; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2254.cmd b/msp430/msp430f2254.cmd new file mode 100644 index 00000000..18348fbf --- /dev/null +++ b/msp430/msp430f2254.cmd @@ -0,0 +1,190 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2254.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10AE1 = 0x004B; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x00C0; +OA0CTL1 = 0x00C1; +OA1CTL0 = 0x00C2; +OA1CTL1 = 0x00C3; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2272.cmd b/msp430/msp430f2272.cmd new file mode 100644 index 00000000..4667e1df --- /dev/null +++ b/msp430/msp430f2272.cmd @@ -0,0 +1,183 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2272.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10AE1 = 0x004B; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2274.cmd b/msp430/msp430f2274.cmd new file mode 100644 index 00000000..9fa992b0 --- /dev/null +++ b/msp430/msp430f2274.cmd @@ -0,0 +1,190 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2274.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10AE1 = 0x004B; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x00C0; +OA0CTL1 = 0x00C1; +OA1CTL0 = 0x00C2; +OA1CTL1 = 0x00C3; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f233.cmd b/msp430/msp430f233.cmd new file mode 100644 index 00000000..1c095c6f --- /dev/null +++ b/msp430/msp430f233.cmd @@ -0,0 +1,255 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f233.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +P6REN = 0x0013; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC12_1_TAG = 0x10DA; +TLV_ADC12_1_LEN = 0x10DB; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2330.cmd b/msp430/msp430f2330.cmd new file mode 100644 index 00000000..c96d5022 --- /dev/null +++ b/msp430/msp430f2330.cmd @@ -0,0 +1,189 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2330.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f235.cmd b/msp430/msp430f235.cmd new file mode 100644 index 00000000..73f7c6ca --- /dev/null +++ b/msp430/msp430f235.cmd @@ -0,0 +1,255 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f235.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +P6REN = 0x0013; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC12_1_TAG = 0x10DA; +TLV_ADC12_1_LEN = 0x10DB; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2350.cmd b/msp430/msp430f2350.cmd new file mode 100644 index 00000000..6aa6658f --- /dev/null +++ b/msp430/msp430f2350.cmd @@ -0,0 +1,189 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2350.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2370.cmd b/msp430/msp430f2370.cmd new file mode 100644 index 00000000..3dca478b --- /dev/null +++ b/msp430/msp430f2370.cmd @@ -0,0 +1,189 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2370.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2410.cmd b/msp430/msp430f2410.cmd new file mode 100644 index 00000000..db5e1106 --- /dev/null +++ b/msp430/msp430f2410.cmd @@ -0,0 +1,286 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2410.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +P6REN = 0x0013; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC12_1_TAG = 0x10DA; +TLV_ADC12_1_LEN = 0x10DB; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2416.cmd b/msp430/msp430f2416.cmd new file mode 100644 index 00000000..42e55b5c --- /dev/null +++ b/msp430/msp430f2416.cmd @@ -0,0 +1,304 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2416.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +P6REN = 0x0013; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC12_1_TAG = 0x10DA; +TLV_ADC12_1_LEN = 0x10DB; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2417.cmd b/msp430/msp430f2417.cmd new file mode 100644 index 00000000..9716cf82 --- /dev/null +++ b/msp430/msp430f2417.cmd @@ -0,0 +1,304 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2417.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +P6REN = 0x0013; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC12_1_TAG = 0x10DA; +TLV_ADC12_1_LEN = 0x10DB; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2418.cmd b/msp430/msp430f2418.cmd new file mode 100644 index 00000000..2ff4bd38 --- /dev/null +++ b/msp430/msp430f2418.cmd @@ -0,0 +1,304 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2418.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +P6REN = 0x0013; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC12_1_TAG = 0x10DA; +TLV_ADC12_1_LEN = 0x10DB; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2419.cmd b/msp430/msp430f2419.cmd new file mode 100644 index 00000000..93b831d3 --- /dev/null +++ b/msp430/msp430f2419.cmd @@ -0,0 +1,304 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2419.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +P6REN = 0x0013; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC12_1_TAG = 0x10DA; +TLV_ADC12_1_LEN = 0x10DB; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f247.cmd b/msp430/msp430f247.cmd new file mode 100644 index 00000000..6b6e19e8 --- /dev/null +++ b/msp430/msp430f247.cmd @@ -0,0 +1,286 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f247.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +P6REN = 0x0013; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC12_1_TAG = 0x10DA; +TLV_ADC12_1_LEN = 0x10DB; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2471.cmd b/msp430/msp430f2471.cmd new file mode 100644 index 00000000..91210de3 --- /dev/null +++ b/msp430/msp430f2471.cmd @@ -0,0 +1,244 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2471.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +P6REN = 0x0013; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f248.cmd b/msp430/msp430f248.cmd new file mode 100644 index 00000000..b7c240d3 --- /dev/null +++ b/msp430/msp430f248.cmd @@ -0,0 +1,286 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f248.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +P6REN = 0x0013; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC12_1_TAG = 0x10DA; +TLV_ADC12_1_LEN = 0x10DB; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2481.cmd b/msp430/msp430f2481.cmd new file mode 100644 index 00000000..507171dc --- /dev/null +++ b/msp430/msp430f2481.cmd @@ -0,0 +1,244 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2481.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +P6REN = 0x0013; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f249.cmd b/msp430/msp430f249.cmd new file mode 100644 index 00000000..7e80269c --- /dev/null +++ b/msp430/msp430f249.cmd @@ -0,0 +1,286 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f249.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +P6REN = 0x0013; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC12_1_TAG = 0x10DA; +TLV_ADC12_1_LEN = 0x10DB; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2491.cmd b/msp430/msp430f2491.cmd new file mode 100644 index 00000000..49edc30e --- /dev/null +++ b/msp430/msp430f2491.cmd @@ -0,0 +1,244 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2491.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +P6REN = 0x0013; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2616.cmd b/msp430/msp430f2616.cmd new file mode 100644 index 00000000..08580d34 --- /dev/null +++ b/msp430/msp430f2616.cmd @@ -0,0 +1,335 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2616.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +P6REN = 0x0013; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC12_1_TAG = 0x10DA; +TLV_ADC12_1_LEN = 0x10DB; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2617.cmd b/msp430/msp430f2617.cmd new file mode 100644 index 00000000..b0edecd0 --- /dev/null +++ b/msp430/msp430f2617.cmd @@ -0,0 +1,335 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2617.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +P6REN = 0x0013; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC12_1_TAG = 0x10DA; +TLV_ADC12_1_LEN = 0x10DB; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2618.cmd b/msp430/msp430f2618.cmd new file mode 100644 index 00000000..671f6234 --- /dev/null +++ b/msp430/msp430f2618.cmd @@ -0,0 +1,335 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2618.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +P6REN = 0x0013; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC12_1_TAG = 0x10DA; +TLV_ADC12_1_LEN = 0x10DB; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f2619.cmd b/msp430/msp430f2619.cmd new file mode 100644 index 00000000..8fa1f44b --- /dev/null +++ b/msp430/msp430f2619.cmd @@ -0,0 +1,335 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2619.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +P6REN = 0x0013; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC12_1_TAG = 0x10DA; +TLV_ADC12_1_LEN = 0x10DB; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f412.cmd b/msp430/msp430f412.cmd new file mode 100644 index 00000000..d1ec1d9c --- /dev/null +++ b/msp430/msp430f412.cmd @@ -0,0 +1,173 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f412.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f413.cmd b/msp430/msp430f413.cmd new file mode 100644 index 00000000..0d82df34 --- /dev/null +++ b/msp430/msp430f413.cmd @@ -0,0 +1,173 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f413.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f4132.cmd b/msp430/msp430f4132.cmd new file mode 100644 index 00000000..4ef77812 --- /dev/null +++ b/msp430/msp430f4132.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f4132.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10AE1 = 0x004B; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* DIGITAL I/O Port7 +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x0039; +P7DIR = 0x003A; +P7SEL = 0x003B; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A5 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1CCTL3 = 0x0188; +TA1CCTL4 = 0x018A; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +TA1CCR3 = 0x0198; +TA1CCR4 = 0x019A; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f415.cmd b/msp430/msp430f415.cmd new file mode 100644 index 00000000..610beb4a --- /dev/null +++ b/msp430/msp430f415.cmd @@ -0,0 +1,189 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f415.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A5 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1CCTL3 = 0x0188; +TA1CCTL4 = 0x018A; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +TA1CCR3 = 0x0198; +TA1CCR4 = 0x019A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f4152.cmd b/msp430/msp430f4152.cmd new file mode 100644 index 00000000..f0285ad0 --- /dev/null +++ b/msp430/msp430f4152.cmd @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f4152.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10AE1 = 0x004B; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* DIGITAL I/O Port7 +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x0039; +P7DIR = 0x003A; +P7SEL = 0x003B; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A5 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1CCTL3 = 0x0188; +TA1CCTL4 = 0x018A; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +TA1CCR3 = 0x0198; +TA1CCR4 = 0x019A; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f417.cmd b/msp430/msp430f417.cmd new file mode 100644 index 00000000..88ef80bb --- /dev/null +++ b/msp430/msp430f417.cmd @@ -0,0 +1,189 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f417.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A5 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1CCTL3 = 0x0188; +TA1CCTL4 = 0x018A; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +TA1CCR3 = 0x0198; +TA1CCR4 = 0x019A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f423.cmd b/msp430/msp430f423.cmd new file mode 100644 index 00000000..428f8102 --- /dev/null +++ b/msp430/msp430f423.cmd @@ -0,0 +1,191 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f423.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* SD16 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +SD16MEM2 = 0x0116; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f423a.cmd b/msp430/msp430f423a.cmd new file mode 100644 index 00000000..7c0a0b56 --- /dev/null +++ b/msp430/msp430f423a.cmd @@ -0,0 +1,191 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f423a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* SD16 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +SD16MEM2 = 0x0116; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f425.cmd b/msp430/msp430f425.cmd new file mode 100644 index 00000000..52c7107b --- /dev/null +++ b/msp430/msp430f425.cmd @@ -0,0 +1,191 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f425.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* SD16 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +SD16MEM2 = 0x0116; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f4250.cmd b/msp430/msp430f4250.cmd new file mode 100644 index 00000000..81f2af92 --- /dev/null +++ b/msp430/msp430f4250.cmd @@ -0,0 +1,173 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f4250.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SD16_A1 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16AE = 0x00B7; +SD16CONF0 = 0x00F7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_0DAT = 0x01C8; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f425a.cmd b/msp430/msp430f425a.cmd new file mode 100644 index 00000000..13ede229 --- /dev/null +++ b/msp430/msp430f425a.cmd @@ -0,0 +1,191 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f425a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* SD16 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +SD16MEM2 = 0x0116; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f4260.cmd b/msp430/msp430f4260.cmd new file mode 100644 index 00000000..492e60e2 --- /dev/null +++ b/msp430/msp430f4260.cmd @@ -0,0 +1,173 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f4260.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SD16_A1 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16AE = 0x00B7; +SD16CONF0 = 0x00F7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_0DAT = 0x01C8; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f427.cmd b/msp430/msp430f427.cmd new file mode 100644 index 00000000..0f86c060 --- /dev/null +++ b/msp430/msp430f427.cmd @@ -0,0 +1,191 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f427.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* SD16 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +SD16MEM2 = 0x0116; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f4270.cmd b/msp430/msp430f4270.cmd new file mode 100644 index 00000000..6ea199ca --- /dev/null +++ b/msp430/msp430f4270.cmd @@ -0,0 +1,173 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f4270.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SD16_A1 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16AE = 0x00B7; +SD16CONF0 = 0x00F7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_0DAT = 0x01C8; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f427a.cmd b/msp430/msp430f427a.cmd new file mode 100644 index 00000000..d706de38 --- /dev/null +++ b/msp430/msp430f427a.cmd @@ -0,0 +1,191 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f427a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* SD16 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +SD16MEM2 = 0x0116; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f435.cmd b/msp430/msp430f435.cmd new file mode 100644 index 00000000..38bb9162 --- /dev/null +++ b/msp430/msp430f435.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f435.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f4351.cmd b/msp430/msp430f4351.cmd new file mode 100644 index 00000000..2b7354c5 --- /dev/null +++ b/msp430/msp430f4351.cmd @@ -0,0 +1,200 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f4351.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f436.cmd b/msp430/msp430f436.cmd new file mode 100644 index 00000000..ca99cb19 --- /dev/null +++ b/msp430/msp430f436.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f436.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f4361.cmd b/msp430/msp430f4361.cmd new file mode 100644 index 00000000..1be7c2cc --- /dev/null +++ b/msp430/msp430f4361.cmd @@ -0,0 +1,200 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f4361.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f437.cmd b/msp430/msp430f437.cmd new file mode 100644 index 00000000..c7148dfb --- /dev/null +++ b/msp430/msp430f437.cmd @@ -0,0 +1,240 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f437.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f4371.cmd b/msp430/msp430f4371.cmd new file mode 100644 index 00000000..b87bf088 --- /dev/null +++ b/msp430/msp430f4371.cmd @@ -0,0 +1,200 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f4371.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f438.cmd b/msp430/msp430f438.cmd new file mode 100644 index 00000000..30684273 --- /dev/null +++ b/msp430/msp430f438.cmd @@ -0,0 +1,256 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f438.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMA0CTL = 0x01E0; +DMA0SA = 0x01E2; +DMA0DA = 0x01E4; +DMA0SZ = 0x01E6; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f439.cmd b/msp430/msp430f439.cmd new file mode 100644 index 00000000..4ace77f2 --- /dev/null +++ b/msp430/msp430f439.cmd @@ -0,0 +1,256 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f439.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMA0CTL = 0x01E0; +DMA0SA = 0x01E2; +DMA0DA = 0x01E4; +DMA0SZ = 0x01E6; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f447.cmd b/msp430/msp430f447.cmd new file mode 100644 index 00000000..424ffc99 --- /dev/null +++ b/msp430/msp430f447.cmd @@ -0,0 +1,271 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f447.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f448.cmd b/msp430/msp430f448.cmd new file mode 100644 index 00000000..37313ee9 --- /dev/null +++ b/msp430/msp430f448.cmd @@ -0,0 +1,271 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f448.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f4481.cmd b/msp430/msp430f4481.cmd new file mode 100644 index 00000000..731f3fb5 --- /dev/null +++ b/msp430/msp430f4481.cmd @@ -0,0 +1,231 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f4481.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f449.cmd b/msp430/msp430f449.cmd new file mode 100644 index 00000000..6bbf0111 --- /dev/null +++ b/msp430/msp430f449.cmd @@ -0,0 +1,271 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f449.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f4491.cmd b/msp430/msp430f4491.cmd new file mode 100644 index 00000000..92bc6c84 --- /dev/null +++ b/msp430/msp430f4491.cmd @@ -0,0 +1,231 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f4491.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f4616.cmd b/msp430/msp430f4616.cmd new file mode 100644 index 00000000..abf15caa --- /dev/null +++ b/msp430/msp430f4616.cmd @@ -0,0 +1,356 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f4616.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* DIGITAL I/O Port7/8 +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +/************************************************************ +* DIGITAL I/O Port9/10 +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f46161.cmd b/msp430/msp430f46161.cmd new file mode 100644 index 00000000..19b7fea6 --- /dev/null +++ b/msp430/msp430f46161.cmd @@ -0,0 +1,316 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f46161.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* DIGITAL I/O Port7/8 +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +/************************************************************ +* DIGITAL I/O Port9/10 +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f4617.cmd b/msp430/msp430f4617.cmd new file mode 100644 index 00000000..4ff681fb --- /dev/null +++ b/msp430/msp430f4617.cmd @@ -0,0 +1,356 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f4617.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* DIGITAL I/O Port7/8 +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +/************************************************************ +* DIGITAL I/O Port9/10 +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f46171.cmd b/msp430/msp430f46171.cmd new file mode 100644 index 00000000..3d539daf --- /dev/null +++ b/msp430/msp430f46171.cmd @@ -0,0 +1,316 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f46171.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* DIGITAL I/O Port7/8 +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +/************************************************************ +* DIGITAL I/O Port9/10 +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f4618.cmd b/msp430/msp430f4618.cmd new file mode 100644 index 00000000..75d4a00b --- /dev/null +++ b/msp430/msp430f4618.cmd @@ -0,0 +1,356 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f4618.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* DIGITAL I/O Port7/8 +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +/************************************************************ +* DIGITAL I/O Port9/10 +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f46181.cmd b/msp430/msp430f46181.cmd new file mode 100644 index 00000000..e3a7e204 --- /dev/null +++ b/msp430/msp430f46181.cmd @@ -0,0 +1,316 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f46181.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* DIGITAL I/O Port7/8 +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +/************************************************************ +* DIGITAL I/O Port9/10 +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f4619.cmd b/msp430/msp430f4619.cmd new file mode 100644 index 00000000..c4d5a625 --- /dev/null +++ b/msp430/msp430f4619.cmd @@ -0,0 +1,356 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f4619.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* DIGITAL I/O Port7/8 +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +/************************************************************ +* DIGITAL I/O Port9/10 +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f46191.cmd b/msp430/msp430f46191.cmd new file mode 100644 index 00000000..8f6f2014 --- /dev/null +++ b/msp430/msp430f46191.cmd @@ -0,0 +1,316 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f46191.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* DIGITAL I/O Port7/8 +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +/************************************************************ +* DIGITAL I/O Port9/10 +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f47126.cmd b/msp430/msp430f47126.cmd new file mode 100644 index 00000000..2046620b --- /dev/null +++ b/msp430/msp430f47126.cmd @@ -0,0 +1,387 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f47126.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY_B = 0x0130; +MPYS_B = 0x0132; +MAC_B = 0x0134; +MACS_B = 0x0136; +OP2_B = 0x0138; +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +MPY32L_B = 0x0140; +MPY32H_B = 0x0142; +MPYS32L_B = 0x0144; +MPYS32H_B = 0x0146; +MAC32L_B = 0x0148; +MAC32H_B = 0x014A; +MACS32L_B = 0x014C; +MACS32H_B = 0x014E; +OP2L_B = 0x0150; +OP2H_B = 0x0152; +MPY32L = 0x0140; +MPY32H = 0x0142; +MPYS32L = 0x0144; +MPYS32H = 0x0146; +MAC32L = 0x0148; +MAC32H = 0x014A; +MACS32L = 0x014C; +MACS32H = 0x014E; +OP2L = 0x0150; +OP2H = 0x0152; +RES0 = 0x0154; +RES1 = 0x0156; +RES2 = 0x0158; +RES3 = 0x015A; +MPY32CTL0 = 0x015C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P9REN = 0x0016; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +P10REN = 0x0017; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +PBREN = 0x0016; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* SD16_A6 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16INCTL3 = 0x00B3; +SD16INCTL4 = 0x00B4; +SD16INCTL5 = 0x00B5; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16PRE3 = 0x00BB; +SD16PRE4 = 0x00BC; +SD16PRE5 = 0x00BD; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16CCTL3 = 0x0108; +SD16CCTL4 = 0x010A; +SD16CCTL5 = 0x010C; +SD16MEM0 = 0x0110; +SD16MEM1 = 0x0112; +SD16MEM2 = 0x0114; +SD16MEM3 = 0x0116; +SD16MEM4 = 0x0118; +SD16MEM5 = 0x011A; +SD16IV = 0x01AE; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x016C; +UCB0I2CSA = 0x016E; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f47127.cmd b/msp430/msp430f47127.cmd new file mode 100644 index 00000000..20aaf3d5 --- /dev/null +++ b/msp430/msp430f47127.cmd @@ -0,0 +1,390 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f47127.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY_B = 0x0130; +MPYS_B = 0x0132; +MAC_B = 0x0134; +MACS_B = 0x0136; +OP2_B = 0x0138; +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +MPY32L_B = 0x0140; +MPY32H_B = 0x0142; +MPYS32L_B = 0x0144; +MPYS32H_B = 0x0146; +MAC32L_B = 0x0148; +MAC32H_B = 0x014A; +MACS32L_B = 0x014C; +MACS32H_B = 0x014E; +OP2L_B = 0x0150; +OP2H_B = 0x0152; +MPY32L = 0x0140; +MPY32H = 0x0142; +MPYS32L = 0x0144; +MPYS32H = 0x0146; +MAC32L = 0x0148; +MAC32H = 0x014A; +MACS32L = 0x014C; +MACS32H = 0x014E; +OP2L = 0x0150; +OP2H = 0x0152; +RES0 = 0x0154; +RES1 = 0x0156; +RES2 = 0x0158; +RES3 = 0x015A; +MPY32CTL0 = 0x015C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P9REN = 0x0016; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +P10REN = 0x0017; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +PBREN = 0x0016; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* SD16_A7 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16INCTL3 = 0x00B3; +SD16INCTL4 = 0x00B4; +SD16INCTL5 = 0x00B5; +SD16INCTL6 = 0x00B6; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16PRE3 = 0x00BB; +SD16PRE4 = 0x00BC; +SD16PRE5 = 0x00BD; +SD16PRE6 = 0x00BE; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16CCTL3 = 0x0108; +SD16CCTL4 = 0x010A; +SD16CCTL5 = 0x010C; +SD16CCTL6 = 0x010E; +SD16MEM0 = 0x0110; +SD16MEM1 = 0x0112; +SD16MEM2 = 0x0114; +SD16MEM3 = 0x0116; +SD16MEM4 = 0x0118; +SD16MEM5 = 0x011A; +SD16MEM6 = 0x011C; +SD16IV = 0x01AE; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x016C; +UCB0I2CSA = 0x016E; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f47163.cmd b/msp430/msp430f47163.cmd new file mode 100644 index 00000000..b65a9bbe --- /dev/null +++ b/msp430/msp430f47163.cmd @@ -0,0 +1,374 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f47163.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY_B = 0x0130; +MPYS_B = 0x0132; +MAC_B = 0x0134; +MACS_B = 0x0136; +OP2_B = 0x0138; +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +MPY32L_B = 0x0140; +MPY32H_B = 0x0142; +MPYS32L_B = 0x0144; +MPYS32H_B = 0x0146; +MAC32L_B = 0x0148; +MAC32H_B = 0x014A; +MACS32L_B = 0x014C; +MACS32H_B = 0x014E; +OP2L_B = 0x0150; +OP2H_B = 0x0152; +MPY32L = 0x0140; +MPY32H = 0x0142; +MPYS32L = 0x0144; +MPYS32H = 0x0146; +MAC32L = 0x0148; +MAC32H = 0x014A; +MACS32L = 0x014C; +MACS32H = 0x014E; +OP2L = 0x0150; +OP2H = 0x0152; +RES0 = 0x0154; +RES1 = 0x0156; +RES2 = 0x0158; +RES3 = 0x015A; +MPY32CTL0 = 0x015C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P9REN = 0x0016; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +P10REN = 0x0017; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +PBREN = 0x0016; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* SD16_A3 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16IV = 0x01AE; +SD16MEM0 = 0x0110; +SD16MEM1 = 0x0112; +SD16MEM2 = 0x0114; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x016C; +UCB0I2CSA = 0x016E; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f47166.cmd b/msp430/msp430f47166.cmd new file mode 100644 index 00000000..f92a9b8d --- /dev/null +++ b/msp430/msp430f47166.cmd @@ -0,0 +1,387 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f47166.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY_B = 0x0130; +MPYS_B = 0x0132; +MAC_B = 0x0134; +MACS_B = 0x0136; +OP2_B = 0x0138; +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +MPY32L_B = 0x0140; +MPY32H_B = 0x0142; +MPYS32L_B = 0x0144; +MPYS32H_B = 0x0146; +MAC32L_B = 0x0148; +MAC32H_B = 0x014A; +MACS32L_B = 0x014C; +MACS32H_B = 0x014E; +OP2L_B = 0x0150; +OP2H_B = 0x0152; +MPY32L = 0x0140; +MPY32H = 0x0142; +MPYS32L = 0x0144; +MPYS32H = 0x0146; +MAC32L = 0x0148; +MAC32H = 0x014A; +MACS32L = 0x014C; +MACS32H = 0x014E; +OP2L = 0x0150; +OP2H = 0x0152; +RES0 = 0x0154; +RES1 = 0x0156; +RES2 = 0x0158; +RES3 = 0x015A; +MPY32CTL0 = 0x015C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P9REN = 0x0016; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +P10REN = 0x0017; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +PBREN = 0x0016; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* SD16_A6 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16INCTL3 = 0x00B3; +SD16INCTL4 = 0x00B4; +SD16INCTL5 = 0x00B5; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16PRE3 = 0x00BB; +SD16PRE4 = 0x00BC; +SD16PRE5 = 0x00BD; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16CCTL3 = 0x0108; +SD16CCTL4 = 0x010A; +SD16CCTL5 = 0x010C; +SD16MEM0 = 0x0110; +SD16MEM1 = 0x0112; +SD16MEM2 = 0x0114; +SD16MEM3 = 0x0116; +SD16MEM4 = 0x0118; +SD16MEM5 = 0x011A; +SD16IV = 0x01AE; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x016C; +UCB0I2CSA = 0x016E; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f47167.cmd b/msp430/msp430f47167.cmd new file mode 100644 index 00000000..b75ef411 --- /dev/null +++ b/msp430/msp430f47167.cmd @@ -0,0 +1,390 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f47167.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY_B = 0x0130; +MPYS_B = 0x0132; +MAC_B = 0x0134; +MACS_B = 0x0136; +OP2_B = 0x0138; +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +MPY32L_B = 0x0140; +MPY32H_B = 0x0142; +MPYS32L_B = 0x0144; +MPYS32H_B = 0x0146; +MAC32L_B = 0x0148; +MAC32H_B = 0x014A; +MACS32L_B = 0x014C; +MACS32H_B = 0x014E; +OP2L_B = 0x0150; +OP2H_B = 0x0152; +MPY32L = 0x0140; +MPY32H = 0x0142; +MPYS32L = 0x0144; +MPYS32H = 0x0146; +MAC32L = 0x0148; +MAC32H = 0x014A; +MACS32L = 0x014C; +MACS32H = 0x014E; +OP2L = 0x0150; +OP2H = 0x0152; +RES0 = 0x0154; +RES1 = 0x0156; +RES2 = 0x0158; +RES3 = 0x015A; +MPY32CTL0 = 0x015C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P9REN = 0x0016; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +P10REN = 0x0017; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +PBREN = 0x0016; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* SD16_A7 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16INCTL3 = 0x00B3; +SD16INCTL4 = 0x00B4; +SD16INCTL5 = 0x00B5; +SD16INCTL6 = 0x00B6; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16PRE3 = 0x00BB; +SD16PRE4 = 0x00BC; +SD16PRE5 = 0x00BD; +SD16PRE6 = 0x00BE; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16CCTL3 = 0x0108; +SD16CCTL4 = 0x010A; +SD16CCTL5 = 0x010C; +SD16CCTL6 = 0x010E; +SD16MEM0 = 0x0110; +SD16MEM1 = 0x0112; +SD16MEM2 = 0x0114; +SD16MEM3 = 0x0116; +SD16MEM4 = 0x0118; +SD16MEM5 = 0x011A; +SD16MEM6 = 0x011C; +SD16IV = 0x01AE; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x016C; +UCB0I2CSA = 0x016E; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f47173.cmd b/msp430/msp430f47173.cmd new file mode 100644 index 00000000..c183e462 --- /dev/null +++ b/msp430/msp430f47173.cmd @@ -0,0 +1,374 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f47173.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY_B = 0x0130; +MPYS_B = 0x0132; +MAC_B = 0x0134; +MACS_B = 0x0136; +OP2_B = 0x0138; +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +MPY32L_B = 0x0140; +MPY32H_B = 0x0142; +MPYS32L_B = 0x0144; +MPYS32H_B = 0x0146; +MAC32L_B = 0x0148; +MAC32H_B = 0x014A; +MACS32L_B = 0x014C; +MACS32H_B = 0x014E; +OP2L_B = 0x0150; +OP2H_B = 0x0152; +MPY32L = 0x0140; +MPY32H = 0x0142; +MPYS32L = 0x0144; +MPYS32H = 0x0146; +MAC32L = 0x0148; +MAC32H = 0x014A; +MACS32L = 0x014C; +MACS32H = 0x014E; +OP2L = 0x0150; +OP2H = 0x0152; +RES0 = 0x0154; +RES1 = 0x0156; +RES2 = 0x0158; +RES3 = 0x015A; +MPY32CTL0 = 0x015C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P9REN = 0x0016; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +P10REN = 0x0017; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +PBREN = 0x0016; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* SD16_A3 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16IV = 0x01AE; +SD16MEM0 = 0x0110; +SD16MEM1 = 0x0112; +SD16MEM2 = 0x0114; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x016C; +UCB0I2CSA = 0x016E; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f47176.cmd b/msp430/msp430f47176.cmd new file mode 100644 index 00000000..4e83fb68 --- /dev/null +++ b/msp430/msp430f47176.cmd @@ -0,0 +1,387 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f47176.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY_B = 0x0130; +MPYS_B = 0x0132; +MAC_B = 0x0134; +MACS_B = 0x0136; +OP2_B = 0x0138; +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +MPY32L_B = 0x0140; +MPY32H_B = 0x0142; +MPYS32L_B = 0x0144; +MPYS32H_B = 0x0146; +MAC32L_B = 0x0148; +MAC32H_B = 0x014A; +MACS32L_B = 0x014C; +MACS32H_B = 0x014E; +OP2L_B = 0x0150; +OP2H_B = 0x0152; +MPY32L = 0x0140; +MPY32H = 0x0142; +MPYS32L = 0x0144; +MPYS32H = 0x0146; +MAC32L = 0x0148; +MAC32H = 0x014A; +MACS32L = 0x014C; +MACS32H = 0x014E; +OP2L = 0x0150; +OP2H = 0x0152; +RES0 = 0x0154; +RES1 = 0x0156; +RES2 = 0x0158; +RES3 = 0x015A; +MPY32CTL0 = 0x015C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P9REN = 0x0016; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +P10REN = 0x0017; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +PBREN = 0x0016; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* SD16_A6 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16INCTL3 = 0x00B3; +SD16INCTL4 = 0x00B4; +SD16INCTL5 = 0x00B5; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16PRE3 = 0x00BB; +SD16PRE4 = 0x00BC; +SD16PRE5 = 0x00BD; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16CCTL3 = 0x0108; +SD16CCTL4 = 0x010A; +SD16CCTL5 = 0x010C; +SD16MEM0 = 0x0110; +SD16MEM1 = 0x0112; +SD16MEM2 = 0x0114; +SD16MEM3 = 0x0116; +SD16MEM4 = 0x0118; +SD16MEM5 = 0x011A; +SD16IV = 0x01AE; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x016C; +UCB0I2CSA = 0x016E; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f47177.cmd b/msp430/msp430f47177.cmd new file mode 100644 index 00000000..713fd708 --- /dev/null +++ b/msp430/msp430f47177.cmd @@ -0,0 +1,390 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f47177.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY_B = 0x0130; +MPYS_B = 0x0132; +MAC_B = 0x0134; +MACS_B = 0x0136; +OP2_B = 0x0138; +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +MPY32L_B = 0x0140; +MPY32H_B = 0x0142; +MPYS32L_B = 0x0144; +MPYS32H_B = 0x0146; +MAC32L_B = 0x0148; +MAC32H_B = 0x014A; +MACS32L_B = 0x014C; +MACS32H_B = 0x014E; +OP2L_B = 0x0150; +OP2H_B = 0x0152; +MPY32L = 0x0140; +MPY32H = 0x0142; +MPYS32L = 0x0144; +MPYS32H = 0x0146; +MAC32L = 0x0148; +MAC32H = 0x014A; +MACS32L = 0x014C; +MACS32H = 0x014E; +OP2L = 0x0150; +OP2H = 0x0152; +RES0 = 0x0154; +RES1 = 0x0156; +RES2 = 0x0158; +RES3 = 0x015A; +MPY32CTL0 = 0x015C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P9REN = 0x0016; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +P10REN = 0x0017; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +PBREN = 0x0016; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* SD16_A7 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16INCTL3 = 0x00B3; +SD16INCTL4 = 0x00B4; +SD16INCTL5 = 0x00B5; +SD16INCTL6 = 0x00B6; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16PRE3 = 0x00BB; +SD16PRE4 = 0x00BC; +SD16PRE5 = 0x00BD; +SD16PRE6 = 0x00BE; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16CCTL3 = 0x0108; +SD16CCTL4 = 0x010A; +SD16CCTL5 = 0x010C; +SD16CCTL6 = 0x010E; +SD16MEM0 = 0x0110; +SD16MEM1 = 0x0112; +SD16MEM2 = 0x0114; +SD16MEM3 = 0x0116; +SD16MEM4 = 0x0118; +SD16MEM5 = 0x011A; +SD16MEM6 = 0x011C; +SD16IV = 0x01AE; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x016C; +UCB0I2CSA = 0x016E; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f47183.cmd b/msp430/msp430f47183.cmd new file mode 100644 index 00000000..ef718ee8 --- /dev/null +++ b/msp430/msp430f47183.cmd @@ -0,0 +1,374 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f47183.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY_B = 0x0130; +MPYS_B = 0x0132; +MAC_B = 0x0134; +MACS_B = 0x0136; +OP2_B = 0x0138; +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +MPY32L_B = 0x0140; +MPY32H_B = 0x0142; +MPYS32L_B = 0x0144; +MPYS32H_B = 0x0146; +MAC32L_B = 0x0148; +MAC32H_B = 0x014A; +MACS32L_B = 0x014C; +MACS32H_B = 0x014E; +OP2L_B = 0x0150; +OP2H_B = 0x0152; +MPY32L = 0x0140; +MPY32H = 0x0142; +MPYS32L = 0x0144; +MPYS32H = 0x0146; +MAC32L = 0x0148; +MAC32H = 0x014A; +MACS32L = 0x014C; +MACS32H = 0x014E; +OP2L = 0x0150; +OP2H = 0x0152; +RES0 = 0x0154; +RES1 = 0x0156; +RES2 = 0x0158; +RES3 = 0x015A; +MPY32CTL0 = 0x015C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P9REN = 0x0016; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +P10REN = 0x0017; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +PBREN = 0x0016; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* SD16_A3 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16IV = 0x01AE; +SD16MEM0 = 0x0110; +SD16MEM1 = 0x0112; +SD16MEM2 = 0x0114; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x016C; +UCB0I2CSA = 0x016E; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f47186.cmd b/msp430/msp430f47186.cmd new file mode 100644 index 00000000..ca24da1d --- /dev/null +++ b/msp430/msp430f47186.cmd @@ -0,0 +1,387 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f47186.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY_B = 0x0130; +MPYS_B = 0x0132; +MAC_B = 0x0134; +MACS_B = 0x0136; +OP2_B = 0x0138; +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +MPY32L_B = 0x0140; +MPY32H_B = 0x0142; +MPYS32L_B = 0x0144; +MPYS32H_B = 0x0146; +MAC32L_B = 0x0148; +MAC32H_B = 0x014A; +MACS32L_B = 0x014C; +MACS32H_B = 0x014E; +OP2L_B = 0x0150; +OP2H_B = 0x0152; +MPY32L = 0x0140; +MPY32H = 0x0142; +MPYS32L = 0x0144; +MPYS32H = 0x0146; +MAC32L = 0x0148; +MAC32H = 0x014A; +MACS32L = 0x014C; +MACS32H = 0x014E; +OP2L = 0x0150; +OP2H = 0x0152; +RES0 = 0x0154; +RES1 = 0x0156; +RES2 = 0x0158; +RES3 = 0x015A; +MPY32CTL0 = 0x015C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P9REN = 0x0016; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +P10REN = 0x0017; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +PBREN = 0x0016; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* SD16_A6 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16INCTL3 = 0x00B3; +SD16INCTL4 = 0x00B4; +SD16INCTL5 = 0x00B5; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16PRE3 = 0x00BB; +SD16PRE4 = 0x00BC; +SD16PRE5 = 0x00BD; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16CCTL3 = 0x0108; +SD16CCTL4 = 0x010A; +SD16CCTL5 = 0x010C; +SD16MEM0 = 0x0110; +SD16MEM1 = 0x0112; +SD16MEM2 = 0x0114; +SD16MEM3 = 0x0116; +SD16MEM4 = 0x0118; +SD16MEM5 = 0x011A; +SD16IV = 0x01AE; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x016C; +UCB0I2CSA = 0x016E; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f47187.cmd b/msp430/msp430f47187.cmd new file mode 100644 index 00000000..030b67b8 --- /dev/null +++ b/msp430/msp430f47187.cmd @@ -0,0 +1,390 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f47187.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY_B = 0x0130; +MPYS_B = 0x0132; +MAC_B = 0x0134; +MACS_B = 0x0136; +OP2_B = 0x0138; +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +MPY32L_B = 0x0140; +MPY32H_B = 0x0142; +MPYS32L_B = 0x0144; +MPYS32H_B = 0x0146; +MAC32L_B = 0x0148; +MAC32H_B = 0x014A; +MACS32L_B = 0x014C; +MACS32H_B = 0x014E; +OP2L_B = 0x0150; +OP2H_B = 0x0152; +MPY32L = 0x0140; +MPY32H = 0x0142; +MPYS32L = 0x0144; +MPYS32H = 0x0146; +MAC32L = 0x0148; +MAC32H = 0x014A; +MACS32L = 0x014C; +MACS32H = 0x014E; +OP2L = 0x0150; +OP2H = 0x0152; +RES0 = 0x0154; +RES1 = 0x0156; +RES2 = 0x0158; +RES3 = 0x015A; +MPY32CTL0 = 0x015C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P9REN = 0x0016; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +P10REN = 0x0017; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +PBREN = 0x0016; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* SD16_A7 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16INCTL3 = 0x00B3; +SD16INCTL4 = 0x00B4; +SD16INCTL5 = 0x00B5; +SD16INCTL6 = 0x00B6; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16PRE3 = 0x00BB; +SD16PRE4 = 0x00BC; +SD16PRE5 = 0x00BD; +SD16PRE6 = 0x00BE; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16CCTL3 = 0x0108; +SD16CCTL4 = 0x010A; +SD16CCTL5 = 0x010C; +SD16CCTL6 = 0x010E; +SD16MEM0 = 0x0110; +SD16MEM1 = 0x0112; +SD16MEM2 = 0x0114; +SD16MEM3 = 0x0116; +SD16MEM4 = 0x0118; +SD16MEM5 = 0x011A; +SD16MEM6 = 0x011C; +SD16IV = 0x01AE; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x016C; +UCB0I2CSA = 0x016E; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f47193.cmd b/msp430/msp430f47193.cmd new file mode 100644 index 00000000..34fe93cf --- /dev/null +++ b/msp430/msp430f47193.cmd @@ -0,0 +1,374 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f47193.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY_B = 0x0130; +MPYS_B = 0x0132; +MAC_B = 0x0134; +MACS_B = 0x0136; +OP2_B = 0x0138; +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +MPY32L_B = 0x0140; +MPY32H_B = 0x0142; +MPYS32L_B = 0x0144; +MPYS32H_B = 0x0146; +MAC32L_B = 0x0148; +MAC32H_B = 0x014A; +MACS32L_B = 0x014C; +MACS32H_B = 0x014E; +OP2L_B = 0x0150; +OP2H_B = 0x0152; +MPY32L = 0x0140; +MPY32H = 0x0142; +MPYS32L = 0x0144; +MPYS32H = 0x0146; +MAC32L = 0x0148; +MAC32H = 0x014A; +MACS32L = 0x014C; +MACS32H = 0x014E; +OP2L = 0x0150; +OP2H = 0x0152; +RES0 = 0x0154; +RES1 = 0x0156; +RES2 = 0x0158; +RES3 = 0x015A; +MPY32CTL0 = 0x015C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P9REN = 0x0016; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +P10REN = 0x0017; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +PBREN = 0x0016; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* SD16_A3 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16IV = 0x01AE; +SD16MEM0 = 0x0110; +SD16MEM1 = 0x0112; +SD16MEM2 = 0x0114; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x016C; +UCB0I2CSA = 0x016E; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f47196.cmd b/msp430/msp430f47196.cmd new file mode 100644 index 00000000..226d8316 --- /dev/null +++ b/msp430/msp430f47196.cmd @@ -0,0 +1,387 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f47196.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY_B = 0x0130; +MPYS_B = 0x0132; +MAC_B = 0x0134; +MACS_B = 0x0136; +OP2_B = 0x0138; +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +MPY32L_B = 0x0140; +MPY32H_B = 0x0142; +MPYS32L_B = 0x0144; +MPYS32H_B = 0x0146; +MAC32L_B = 0x0148; +MAC32H_B = 0x014A; +MACS32L_B = 0x014C; +MACS32H_B = 0x014E; +OP2L_B = 0x0150; +OP2H_B = 0x0152; +MPY32L = 0x0140; +MPY32H = 0x0142; +MPYS32L = 0x0144; +MPYS32H = 0x0146; +MAC32L = 0x0148; +MAC32H = 0x014A; +MACS32L = 0x014C; +MACS32H = 0x014E; +OP2L = 0x0150; +OP2H = 0x0152; +RES0 = 0x0154; +RES1 = 0x0156; +RES2 = 0x0158; +RES3 = 0x015A; +MPY32CTL0 = 0x015C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P9REN = 0x0016; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +P10REN = 0x0017; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +PBREN = 0x0016; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* SD16_A6 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16INCTL3 = 0x00B3; +SD16INCTL4 = 0x00B4; +SD16INCTL5 = 0x00B5; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16PRE3 = 0x00BB; +SD16PRE4 = 0x00BC; +SD16PRE5 = 0x00BD; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16CCTL3 = 0x0108; +SD16CCTL4 = 0x010A; +SD16CCTL5 = 0x010C; +SD16MEM0 = 0x0110; +SD16MEM1 = 0x0112; +SD16MEM2 = 0x0114; +SD16MEM3 = 0x0116; +SD16MEM4 = 0x0118; +SD16MEM5 = 0x011A; +SD16IV = 0x01AE; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x016C; +UCB0I2CSA = 0x016E; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f47197.cmd b/msp430/msp430f47197.cmd new file mode 100644 index 00000000..62e23b77 --- /dev/null +++ b/msp430/msp430f47197.cmd @@ -0,0 +1,390 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f47197.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY_B = 0x0130; +MPYS_B = 0x0132; +MAC_B = 0x0134; +MACS_B = 0x0136; +OP2_B = 0x0138; +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +MPY32L_B = 0x0140; +MPY32H_B = 0x0142; +MPYS32L_B = 0x0144; +MPYS32H_B = 0x0146; +MAC32L_B = 0x0148; +MAC32H_B = 0x014A; +MACS32L_B = 0x014C; +MACS32H_B = 0x014E; +OP2L_B = 0x0150; +OP2H_B = 0x0152; +MPY32L = 0x0140; +MPY32H = 0x0142; +MPYS32L = 0x0144; +MPYS32H = 0x0146; +MAC32L = 0x0148; +MAC32H = 0x014A; +MACS32L = 0x014C; +MACS32H = 0x014E; +OP2L = 0x0150; +OP2H = 0x0152; +RES0 = 0x0154; +RES1 = 0x0156; +RES2 = 0x0158; +RES3 = 0x015A; +MPY32CTL0 = 0x015C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P9REN = 0x0016; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +P10REN = 0x0017; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +PBREN = 0x0016; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* SD16_A7 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16INCTL3 = 0x00B3; +SD16INCTL4 = 0x00B4; +SD16INCTL5 = 0x00B5; +SD16INCTL6 = 0x00B6; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16PRE3 = 0x00BB; +SD16PRE4 = 0x00BC; +SD16PRE5 = 0x00BD; +SD16PRE6 = 0x00BE; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16CCTL3 = 0x0108; +SD16CCTL4 = 0x010A; +SD16CCTL5 = 0x010C; +SD16CCTL6 = 0x010E; +SD16MEM0 = 0x0110; +SD16MEM1 = 0x0112; +SD16MEM2 = 0x0114; +SD16MEM3 = 0x0116; +SD16MEM4 = 0x0118; +SD16MEM5 = 0x011A; +SD16MEM6 = 0x011C; +SD16IV = 0x01AE; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x016C; +UCB0I2CSA = 0x016E; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f477.cmd b/msp430/msp430f477.cmd new file mode 100644 index 00000000..763c87ed --- /dev/null +++ b/msp430/msp430f477.cmd @@ -0,0 +1,249 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f477.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0057; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* SD16_A1 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16AE = 0x00B7; +SD16CONF0 = 0x00F7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f478.cmd b/msp430/msp430f478.cmd new file mode 100644 index 00000000..d1d468aa --- /dev/null +++ b/msp430/msp430f478.cmd @@ -0,0 +1,249 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f478.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0057; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* SD16_A1 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16AE = 0x00B7; +SD16CONF0 = 0x00F7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f4783.cmd b/msp430/msp430f4783.cmd new file mode 100644 index 00000000..81741190 --- /dev/null +++ b/msp430/msp430f4783.cmd @@ -0,0 +1,336 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f4783.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY_B = 0x0130; +MPYS_B = 0x0132; +MAC_B = 0x0134; +MACS_B = 0x0136; +OP2_B = 0x0138; +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +MPY32L_B = 0x0140; +MPY32H_B = 0x0142; +MPYS32L_B = 0x0144; +MPYS32H_B = 0x0146; +MAC32L_B = 0x0148; +MAC32H_B = 0x014A; +MACS32L_B = 0x014C; +MACS32H_B = 0x014E; +OP2L_B = 0x0150; +OP2H_B = 0x0152; +MPY32L = 0x0140; +MPY32H = 0x0142; +MPYS32L = 0x0144; +MPYS32H = 0x0146; +MAC32L = 0x0148; +MAC32H = 0x014A; +MACS32L = 0x014C; +MACS32H = 0x014E; +OP2L = 0x0150; +OP2H = 0x0152; +RES0 = 0x0154; +RES1 = 0x0156; +RES2 = 0x0158; +RES3 = 0x015A; +MPY32CTL0 = 0x015C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P9REN = 0x0016; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +P10REN = 0x0017; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +PBREN = 0x0016; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* SD16_A3 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +SD16MEM2 = 0x0116; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x016C; +UCB0I2CSA = 0x016E; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f4784.cmd b/msp430/msp430f4784.cmd new file mode 100644 index 00000000..92004996 --- /dev/null +++ b/msp430/msp430f4784.cmd @@ -0,0 +1,340 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f4784.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY_B = 0x0130; +MPYS_B = 0x0132; +MAC_B = 0x0134; +MACS_B = 0x0136; +OP2_B = 0x0138; +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +MPY32L_B = 0x0140; +MPY32H_B = 0x0142; +MPYS32L_B = 0x0144; +MPYS32H_B = 0x0146; +MAC32L_B = 0x0148; +MAC32H_B = 0x014A; +MACS32L_B = 0x014C; +MACS32H_B = 0x014E; +OP2L_B = 0x0150; +OP2H_B = 0x0152; +MPY32L = 0x0140; +MPY32H = 0x0142; +MPYS32L = 0x0144; +MPYS32H = 0x0146; +MAC32L = 0x0148; +MAC32H = 0x014A; +MACS32L = 0x014C; +MACS32H = 0x014E; +OP2L = 0x0150; +OP2H = 0x0152; +RES0 = 0x0154; +RES1 = 0x0156; +RES2 = 0x0158; +RES3 = 0x015A; +MPY32CTL0 = 0x015C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P9REN = 0x0016; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +P10REN = 0x0017; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +PBREN = 0x0016; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* SD16_A4 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16INCTL3 = 0x00B3; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16PRE3 = 0x00BB; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16CCTL3 = 0x0108; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +SD16MEM2 = 0x0116; +SD16MEM3 = 0x0118; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x016C; +UCB0I2CSA = 0x016E; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f479.cmd b/msp430/msp430f479.cmd new file mode 100644 index 00000000..04658b0b --- /dev/null +++ b/msp430/msp430f479.cmd @@ -0,0 +1,249 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f479.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0057; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* SD16_A1 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16AE = 0x00B7; +SD16CONF0 = 0x00F7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f4793.cmd b/msp430/msp430f4793.cmd new file mode 100644 index 00000000..becc15a7 --- /dev/null +++ b/msp430/msp430f4793.cmd @@ -0,0 +1,336 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f4793.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY_B = 0x0130; +MPYS_B = 0x0132; +MAC_B = 0x0134; +MACS_B = 0x0136; +OP2_B = 0x0138; +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +MPY32L_B = 0x0140; +MPY32H_B = 0x0142; +MPYS32L_B = 0x0144; +MPYS32H_B = 0x0146; +MAC32L_B = 0x0148; +MAC32H_B = 0x014A; +MACS32L_B = 0x014C; +MACS32H_B = 0x014E; +OP2L_B = 0x0150; +OP2H_B = 0x0152; +MPY32L = 0x0140; +MPY32H = 0x0142; +MPYS32L = 0x0144; +MPYS32H = 0x0146; +MAC32L = 0x0148; +MAC32H = 0x014A; +MACS32L = 0x014C; +MACS32H = 0x014E; +OP2L = 0x0150; +OP2H = 0x0152; +RES0 = 0x0154; +RES1 = 0x0156; +RES2 = 0x0158; +RES3 = 0x015A; +MPY32CTL0 = 0x015C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P9REN = 0x0016; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +P10REN = 0x0017; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +PBREN = 0x0016; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* SD16_A3 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +SD16MEM2 = 0x0116; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x016C; +UCB0I2CSA = 0x016E; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f4794.cmd b/msp430/msp430f4794.cmd new file mode 100644 index 00000000..0242719b --- /dev/null +++ b/msp430/msp430f4794.cmd @@ -0,0 +1,340 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f4794.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY_B = 0x0130; +MPYS_B = 0x0132; +MAC_B = 0x0134; +MACS_B = 0x0136; +OP2_B = 0x0138; +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +MPY32L_B = 0x0140; +MPY32H_B = 0x0142; +MPYS32L_B = 0x0144; +MPYS32H_B = 0x0146; +MAC32L_B = 0x0148; +MAC32H_B = 0x014A; +MACS32L_B = 0x014C; +MACS32H_B = 0x014E; +OP2L_B = 0x0150; +OP2H_B = 0x0152; +MPY32L = 0x0140; +MPY32H = 0x0142; +MPYS32L = 0x0144; +MPYS32H = 0x0146; +MAC32L = 0x0148; +MAC32H = 0x014A; +MACS32L = 0x014C; +MACS32H = 0x014E; +OP2L = 0x0150; +OP2H = 0x0152; +RES0 = 0x0154; +RES1 = 0x0156; +RES2 = 0x0158; +RES3 = 0x015A; +MPY32CTL0 = 0x015C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P9REN = 0x0016; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +P10REN = 0x0017; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +PBREN = 0x0016; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* SD16_A4 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16INCTL3 = 0x00B3; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16PRE3 = 0x00BB; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16CCTL3 = 0x0108; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +SD16MEM2 = 0x0116; +SD16MEM3 = 0x0118; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x016C; +UCB0I2CSA = 0x016E; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5131.cmd b/msp430/msp430f5131.cmd new file mode 100644 index 00000000..61cb35ef --- /dev/null +++ b/msp430/msp430f5131.cmd @@ -0,0 +1,600 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5131.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x03C0; +TA0CCTL0 = 0x03C2; +TA0CCTL1 = 0x03C4; +TA0CCTL2 = 0x03C6; +TA0R = 0x03D0; +TA0CCR0 = 0x03D2; +TA0CCR1 = 0x03D4; +TA0CCR2 = 0x03D6; +TA0IV = 0x03EE; +TA0EX0 = 0x03E0; +/************************************************************ +* Timer0_D3 +************************************************************/ +TD0CTL0 = 0x0B00; +TD0CTL1 = 0x0B02; +TD0CTL2 = 0x0B04; +TD0R = 0x0B06; +TD0CCTL0 = 0x0B08; +TD0CCR0 = 0x0B0A; +TD0CL0 = 0x0B0C; +TD0CCTL1 = 0x0B0E; +TD0CCR1 = 0x0B10; +TD0CL1 = 0x0B12; +TD0CCTL2 = 0x0B14; +TD0CCR2 = 0x0B16; +TD0CL2 = 0x0B18; +TD0HCTL0 = 0x0B38; +TD0HCTL1 = 0x0B3A; +TD0HINT = 0x0B3C; +TD0IV = 0x0B3E; +/************************************************************ +* Timer1_D3 +************************************************************/ +TD1CTL0 = 0x0B40; +TD1CTL1 = 0x0B42; +TD1CTL2 = 0x0B44; +TD1R = 0x0B46; +TD1CCTL0 = 0x0B48; +TD1CCR0 = 0x0B4A; +TD1CL0 = 0x0B4C; +TD1CCTL1 = 0x0B4E; +TD1CCR1 = 0x0B50; +TD1CL1 = 0x0B52; +TD1CCTL2 = 0x0B54; +TD1CCR2 = 0x0B56; +TD1CL2 = 0x0B58; +TD1HCTL0 = 0x0B78; +TD1HCTL1 = 0x0B7A; +TD1HINT = 0x0B7C; +TD1IV = 0x0B7E; +/************************************************************ +* Timer Event Control 0 +************************************************************/ +TEC0XCTL0 = 0x0C00; +TEC0XCTL0_L = 0x0C00; +TEC0XCTL0_H = 0x0C01; +TEC0XCTL1 = 0x0C02; +TEC0XCTL1_L = 0x0C02; +TEC0XCTL1_H = 0x0C03; +TEC0XCTL2 = 0x0C04; +TEC0XCTL2_L = 0x0C04; +TEC0XCTL2_H = 0x0C05; +TEC0STA = 0x0C06; +TEC0STA_L = 0x0C06; +TEC0STA_H = 0x0C07; +TEC0XINT = 0x0C08; +TEC0XINT_L = 0x0C08; +TEC0XINT_H = 0x0C09; +TEC0IV = 0x0C0A; +TEC0IV_L = 0x0C0A; +TEC0IV_H = 0x0C0B; +/************************************************************ +* Timer Event Control 1 +************************************************************/ +TEC1XCTL0 = 0x0C20; +TEC1XCTL0_L = 0x0C20; +TEC1XCTL0_H = 0x0C21; +TEC1XCTL1 = 0x0C22; +TEC1XCTL1_L = 0x0C22; +TEC1XCTL1_H = 0x0C23; +TEC1XCTL2 = 0x0C24; +TEC1XCTL2_L = 0x0C24; +TEC1XCTL2_H = 0x0C25; +TEC1STA = 0x0C26; +TEC1STA_L = 0x0C26; +TEC1STA_H = 0x0C27; +TEC1XINT = 0x0C28; +TEC1XINT_L = 0x0C28; +TEC1XINT_H = 0x0C29; +TEC1IV = 0x0C2A; +TEC1IV_L = 0x0C2A; +TEC1IV_H = 0x0C2B; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5132.cmd b/msp430/msp430f5132.cmd new file mode 100644 index 00000000..8216af58 --- /dev/null +++ b/msp430/msp430f5132.cmd @@ -0,0 +1,633 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5132.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x03C0; +TA0CCTL0 = 0x03C2; +TA0CCTL1 = 0x03C4; +TA0CCTL2 = 0x03C6; +TA0R = 0x03D0; +TA0CCR0 = 0x03D2; +TA0CCR1 = 0x03D4; +TA0CCR2 = 0x03D6; +TA0IV = 0x03EE; +TA0EX0 = 0x03E0; +/************************************************************ +* Timer0_D3 +************************************************************/ +TD0CTL0 = 0x0B00; +TD0CTL1 = 0x0B02; +TD0CTL2 = 0x0B04; +TD0R = 0x0B06; +TD0CCTL0 = 0x0B08; +TD0CCR0 = 0x0B0A; +TD0CL0 = 0x0B0C; +TD0CCTL1 = 0x0B0E; +TD0CCR1 = 0x0B10; +TD0CL1 = 0x0B12; +TD0CCTL2 = 0x0B14; +TD0CCR2 = 0x0B16; +TD0CL2 = 0x0B18; +TD0HCTL0 = 0x0B38; +TD0HCTL1 = 0x0B3A; +TD0HINT = 0x0B3C; +TD0IV = 0x0B3E; +/************************************************************ +* Timer1_D3 +************************************************************/ +TD1CTL0 = 0x0B40; +TD1CTL1 = 0x0B42; +TD1CTL2 = 0x0B44; +TD1R = 0x0B46; +TD1CCTL0 = 0x0B48; +TD1CCR0 = 0x0B4A; +TD1CL0 = 0x0B4C; +TD1CCTL1 = 0x0B4E; +TD1CCR1 = 0x0B50; +TD1CL1 = 0x0B52; +TD1CCTL2 = 0x0B54; +TD1CCR2 = 0x0B56; +TD1CL2 = 0x0B58; +TD1HCTL0 = 0x0B78; +TD1HCTL1 = 0x0B7A; +TD1HINT = 0x0B7C; +TD1IV = 0x0B7E; +/************************************************************ +* Timer Event Control 0 +************************************************************/ +TEC0XCTL0 = 0x0C00; +TEC0XCTL0_L = 0x0C00; +TEC0XCTL0_H = 0x0C01; +TEC0XCTL1 = 0x0C02; +TEC0XCTL1_L = 0x0C02; +TEC0XCTL1_H = 0x0C03; +TEC0XCTL2 = 0x0C04; +TEC0XCTL2_L = 0x0C04; +TEC0XCTL2_H = 0x0C05; +TEC0STA = 0x0C06; +TEC0STA_L = 0x0C06; +TEC0STA_H = 0x0C07; +TEC0XINT = 0x0C08; +TEC0XINT_L = 0x0C08; +TEC0XINT_H = 0x0C09; +TEC0IV = 0x0C0A; +TEC0IV_L = 0x0C0A; +TEC0IV_H = 0x0C0B; +/************************************************************ +* Timer Event Control 1 +************************************************************/ +TEC1XCTL0 = 0x0C20; +TEC1XCTL0_L = 0x0C20; +TEC1XCTL0_H = 0x0C21; +TEC1XCTL1 = 0x0C22; +TEC1XCTL1_L = 0x0C22; +TEC1XCTL1_H = 0x0C23; +TEC1XCTL2 = 0x0C24; +TEC1XCTL2_L = 0x0C24; +TEC1XCTL2_H = 0x0C25; +TEC1STA = 0x0C26; +TEC1STA_L = 0x0C26; +TEC1STA_H = 0x0C27; +TEC1XINT = 0x0C28; +TEC1XINT_L = 0x0C28; +TEC1XINT_H = 0x0C29; +TEC1IV = 0x0C2A; +TEC1IV_L = 0x0C2A; +TEC1IV_H = 0x0C2B; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5151.cmd b/msp430/msp430f5151.cmd new file mode 100644 index 00000000..44446db9 --- /dev/null +++ b/msp430/msp430f5151.cmd @@ -0,0 +1,600 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5151.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x03C0; +TA0CCTL0 = 0x03C2; +TA0CCTL1 = 0x03C4; +TA0CCTL2 = 0x03C6; +TA0R = 0x03D0; +TA0CCR0 = 0x03D2; +TA0CCR1 = 0x03D4; +TA0CCR2 = 0x03D6; +TA0IV = 0x03EE; +TA0EX0 = 0x03E0; +/************************************************************ +* Timer0_D3 +************************************************************/ +TD0CTL0 = 0x0B00; +TD0CTL1 = 0x0B02; +TD0CTL2 = 0x0B04; +TD0R = 0x0B06; +TD0CCTL0 = 0x0B08; +TD0CCR0 = 0x0B0A; +TD0CL0 = 0x0B0C; +TD0CCTL1 = 0x0B0E; +TD0CCR1 = 0x0B10; +TD0CL1 = 0x0B12; +TD0CCTL2 = 0x0B14; +TD0CCR2 = 0x0B16; +TD0CL2 = 0x0B18; +TD0HCTL0 = 0x0B38; +TD0HCTL1 = 0x0B3A; +TD0HINT = 0x0B3C; +TD0IV = 0x0B3E; +/************************************************************ +* Timer1_D3 +************************************************************/ +TD1CTL0 = 0x0B40; +TD1CTL1 = 0x0B42; +TD1CTL2 = 0x0B44; +TD1R = 0x0B46; +TD1CCTL0 = 0x0B48; +TD1CCR0 = 0x0B4A; +TD1CL0 = 0x0B4C; +TD1CCTL1 = 0x0B4E; +TD1CCR1 = 0x0B50; +TD1CL1 = 0x0B52; +TD1CCTL2 = 0x0B54; +TD1CCR2 = 0x0B56; +TD1CL2 = 0x0B58; +TD1HCTL0 = 0x0B78; +TD1HCTL1 = 0x0B7A; +TD1HINT = 0x0B7C; +TD1IV = 0x0B7E; +/************************************************************ +* Timer Event Control 0 +************************************************************/ +TEC0XCTL0 = 0x0C00; +TEC0XCTL0_L = 0x0C00; +TEC0XCTL0_H = 0x0C01; +TEC0XCTL1 = 0x0C02; +TEC0XCTL1_L = 0x0C02; +TEC0XCTL1_H = 0x0C03; +TEC0XCTL2 = 0x0C04; +TEC0XCTL2_L = 0x0C04; +TEC0XCTL2_H = 0x0C05; +TEC0STA = 0x0C06; +TEC0STA_L = 0x0C06; +TEC0STA_H = 0x0C07; +TEC0XINT = 0x0C08; +TEC0XINT_L = 0x0C08; +TEC0XINT_H = 0x0C09; +TEC0IV = 0x0C0A; +TEC0IV_L = 0x0C0A; +TEC0IV_H = 0x0C0B; +/************************************************************ +* Timer Event Control 1 +************************************************************/ +TEC1XCTL0 = 0x0C20; +TEC1XCTL0_L = 0x0C20; +TEC1XCTL0_H = 0x0C21; +TEC1XCTL1 = 0x0C22; +TEC1XCTL1_L = 0x0C22; +TEC1XCTL1_H = 0x0C23; +TEC1XCTL2 = 0x0C24; +TEC1XCTL2_L = 0x0C24; +TEC1XCTL2_H = 0x0C25; +TEC1STA = 0x0C26; +TEC1STA_L = 0x0C26; +TEC1STA_H = 0x0C27; +TEC1XINT = 0x0C28; +TEC1XINT_L = 0x0C28; +TEC1XINT_H = 0x0C29; +TEC1IV = 0x0C2A; +TEC1IV_L = 0x0C2A; +TEC1IV_H = 0x0C2B; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5152.cmd b/msp430/msp430f5152.cmd new file mode 100644 index 00000000..9dd287ef --- /dev/null +++ b/msp430/msp430f5152.cmd @@ -0,0 +1,633 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5152.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x03C0; +TA0CCTL0 = 0x03C2; +TA0CCTL1 = 0x03C4; +TA0CCTL2 = 0x03C6; +TA0R = 0x03D0; +TA0CCR0 = 0x03D2; +TA0CCR1 = 0x03D4; +TA0CCR2 = 0x03D6; +TA0IV = 0x03EE; +TA0EX0 = 0x03E0; +/************************************************************ +* Timer0_D3 +************************************************************/ +TD0CTL0 = 0x0B00; +TD0CTL1 = 0x0B02; +TD0CTL2 = 0x0B04; +TD0R = 0x0B06; +TD0CCTL0 = 0x0B08; +TD0CCR0 = 0x0B0A; +TD0CL0 = 0x0B0C; +TD0CCTL1 = 0x0B0E; +TD0CCR1 = 0x0B10; +TD0CL1 = 0x0B12; +TD0CCTL2 = 0x0B14; +TD0CCR2 = 0x0B16; +TD0CL2 = 0x0B18; +TD0HCTL0 = 0x0B38; +TD0HCTL1 = 0x0B3A; +TD0HINT = 0x0B3C; +TD0IV = 0x0B3E; +/************************************************************ +* Timer1_D3 +************************************************************/ +TD1CTL0 = 0x0B40; +TD1CTL1 = 0x0B42; +TD1CTL2 = 0x0B44; +TD1R = 0x0B46; +TD1CCTL0 = 0x0B48; +TD1CCR0 = 0x0B4A; +TD1CL0 = 0x0B4C; +TD1CCTL1 = 0x0B4E; +TD1CCR1 = 0x0B50; +TD1CL1 = 0x0B52; +TD1CCTL2 = 0x0B54; +TD1CCR2 = 0x0B56; +TD1CL2 = 0x0B58; +TD1HCTL0 = 0x0B78; +TD1HCTL1 = 0x0B7A; +TD1HINT = 0x0B7C; +TD1IV = 0x0B7E; +/************************************************************ +* Timer Event Control 0 +************************************************************/ +TEC0XCTL0 = 0x0C00; +TEC0XCTL0_L = 0x0C00; +TEC0XCTL0_H = 0x0C01; +TEC0XCTL1 = 0x0C02; +TEC0XCTL1_L = 0x0C02; +TEC0XCTL1_H = 0x0C03; +TEC0XCTL2 = 0x0C04; +TEC0XCTL2_L = 0x0C04; +TEC0XCTL2_H = 0x0C05; +TEC0STA = 0x0C06; +TEC0STA_L = 0x0C06; +TEC0STA_H = 0x0C07; +TEC0XINT = 0x0C08; +TEC0XINT_L = 0x0C08; +TEC0XINT_H = 0x0C09; +TEC0IV = 0x0C0A; +TEC0IV_L = 0x0C0A; +TEC0IV_H = 0x0C0B; +/************************************************************ +* Timer Event Control 1 +************************************************************/ +TEC1XCTL0 = 0x0C20; +TEC1XCTL0_L = 0x0C20; +TEC1XCTL0_H = 0x0C21; +TEC1XCTL1 = 0x0C22; +TEC1XCTL1_L = 0x0C22; +TEC1XCTL1_H = 0x0C23; +TEC1XCTL2 = 0x0C24; +TEC1XCTL2_L = 0x0C24; +TEC1XCTL2_H = 0x0C25; +TEC1STA = 0x0C26; +TEC1STA_L = 0x0C26; +TEC1STA_H = 0x0C27; +TEC1XINT = 0x0C28; +TEC1XINT_L = 0x0C28; +TEC1XINT_H = 0x0C29; +TEC1IV = 0x0C2A; +TEC1IV_L = 0x0C2A; +TEC1IV_H = 0x0C2B; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5171.cmd b/msp430/msp430f5171.cmd new file mode 100644 index 00000000..8c843eb9 --- /dev/null +++ b/msp430/msp430f5171.cmd @@ -0,0 +1,600 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5171.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x03C0; +TA0CCTL0 = 0x03C2; +TA0CCTL1 = 0x03C4; +TA0CCTL2 = 0x03C6; +TA0R = 0x03D0; +TA0CCR0 = 0x03D2; +TA0CCR1 = 0x03D4; +TA0CCR2 = 0x03D6; +TA0IV = 0x03EE; +TA0EX0 = 0x03E0; +/************************************************************ +* Timer0_D3 +************************************************************/ +TD0CTL0 = 0x0B00; +TD0CTL1 = 0x0B02; +TD0CTL2 = 0x0B04; +TD0R = 0x0B06; +TD0CCTL0 = 0x0B08; +TD0CCR0 = 0x0B0A; +TD0CL0 = 0x0B0C; +TD0CCTL1 = 0x0B0E; +TD0CCR1 = 0x0B10; +TD0CL1 = 0x0B12; +TD0CCTL2 = 0x0B14; +TD0CCR2 = 0x0B16; +TD0CL2 = 0x0B18; +TD0HCTL0 = 0x0B38; +TD0HCTL1 = 0x0B3A; +TD0HINT = 0x0B3C; +TD0IV = 0x0B3E; +/************************************************************ +* Timer1_D3 +************************************************************/ +TD1CTL0 = 0x0B40; +TD1CTL1 = 0x0B42; +TD1CTL2 = 0x0B44; +TD1R = 0x0B46; +TD1CCTL0 = 0x0B48; +TD1CCR0 = 0x0B4A; +TD1CL0 = 0x0B4C; +TD1CCTL1 = 0x0B4E; +TD1CCR1 = 0x0B50; +TD1CL1 = 0x0B52; +TD1CCTL2 = 0x0B54; +TD1CCR2 = 0x0B56; +TD1CL2 = 0x0B58; +TD1HCTL0 = 0x0B78; +TD1HCTL1 = 0x0B7A; +TD1HINT = 0x0B7C; +TD1IV = 0x0B7E; +/************************************************************ +* Timer Event Control 0 +************************************************************/ +TEC0XCTL0 = 0x0C00; +TEC0XCTL0_L = 0x0C00; +TEC0XCTL0_H = 0x0C01; +TEC0XCTL1 = 0x0C02; +TEC0XCTL1_L = 0x0C02; +TEC0XCTL1_H = 0x0C03; +TEC0XCTL2 = 0x0C04; +TEC0XCTL2_L = 0x0C04; +TEC0XCTL2_H = 0x0C05; +TEC0STA = 0x0C06; +TEC0STA_L = 0x0C06; +TEC0STA_H = 0x0C07; +TEC0XINT = 0x0C08; +TEC0XINT_L = 0x0C08; +TEC0XINT_H = 0x0C09; +TEC0IV = 0x0C0A; +TEC0IV_L = 0x0C0A; +TEC0IV_H = 0x0C0B; +/************************************************************ +* Timer Event Control 1 +************************************************************/ +TEC1XCTL0 = 0x0C20; +TEC1XCTL0_L = 0x0C20; +TEC1XCTL0_H = 0x0C21; +TEC1XCTL1 = 0x0C22; +TEC1XCTL1_L = 0x0C22; +TEC1XCTL1_H = 0x0C23; +TEC1XCTL2 = 0x0C24; +TEC1XCTL2_L = 0x0C24; +TEC1XCTL2_H = 0x0C25; +TEC1STA = 0x0C26; +TEC1STA_L = 0x0C26; +TEC1STA_H = 0x0C27; +TEC1XINT = 0x0C28; +TEC1XINT_L = 0x0C28; +TEC1XINT_H = 0x0C29; +TEC1IV = 0x0C2A; +TEC1IV_L = 0x0C2A; +TEC1IV_H = 0x0C2B; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5172.cmd b/msp430/msp430f5172.cmd new file mode 100644 index 00000000..6d97cd54 --- /dev/null +++ b/msp430/msp430f5172.cmd @@ -0,0 +1,633 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5172.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x03C0; +TA0CCTL0 = 0x03C2; +TA0CCTL1 = 0x03C4; +TA0CCTL2 = 0x03C6; +TA0R = 0x03D0; +TA0CCR0 = 0x03D2; +TA0CCR1 = 0x03D4; +TA0CCR2 = 0x03D6; +TA0IV = 0x03EE; +TA0EX0 = 0x03E0; +/************************************************************ +* Timer0_D3 +************************************************************/ +TD0CTL0 = 0x0B00; +TD0CTL1 = 0x0B02; +TD0CTL2 = 0x0B04; +TD0R = 0x0B06; +TD0CCTL0 = 0x0B08; +TD0CCR0 = 0x0B0A; +TD0CL0 = 0x0B0C; +TD0CCTL1 = 0x0B0E; +TD0CCR1 = 0x0B10; +TD0CL1 = 0x0B12; +TD0CCTL2 = 0x0B14; +TD0CCR2 = 0x0B16; +TD0CL2 = 0x0B18; +TD0HCTL0 = 0x0B38; +TD0HCTL1 = 0x0B3A; +TD0HINT = 0x0B3C; +TD0IV = 0x0B3E; +/************************************************************ +* Timer1_D3 +************************************************************/ +TD1CTL0 = 0x0B40; +TD1CTL1 = 0x0B42; +TD1CTL2 = 0x0B44; +TD1R = 0x0B46; +TD1CCTL0 = 0x0B48; +TD1CCR0 = 0x0B4A; +TD1CL0 = 0x0B4C; +TD1CCTL1 = 0x0B4E; +TD1CCR1 = 0x0B50; +TD1CL1 = 0x0B52; +TD1CCTL2 = 0x0B54; +TD1CCR2 = 0x0B56; +TD1CL2 = 0x0B58; +TD1HCTL0 = 0x0B78; +TD1HCTL1 = 0x0B7A; +TD1HINT = 0x0B7C; +TD1IV = 0x0B7E; +/************************************************************ +* Timer Event Control 0 +************************************************************/ +TEC0XCTL0 = 0x0C00; +TEC0XCTL0_L = 0x0C00; +TEC0XCTL0_H = 0x0C01; +TEC0XCTL1 = 0x0C02; +TEC0XCTL1_L = 0x0C02; +TEC0XCTL1_H = 0x0C03; +TEC0XCTL2 = 0x0C04; +TEC0XCTL2_L = 0x0C04; +TEC0XCTL2_H = 0x0C05; +TEC0STA = 0x0C06; +TEC0STA_L = 0x0C06; +TEC0STA_H = 0x0C07; +TEC0XINT = 0x0C08; +TEC0XINT_L = 0x0C08; +TEC0XINT_H = 0x0C09; +TEC0IV = 0x0C0A; +TEC0IV_L = 0x0C0A; +TEC0IV_H = 0x0C0B; +/************************************************************ +* Timer Event Control 1 +************************************************************/ +TEC1XCTL0 = 0x0C20; +TEC1XCTL0_L = 0x0C20; +TEC1XCTL0_H = 0x0C21; +TEC1XCTL1 = 0x0C22; +TEC1XCTL1_L = 0x0C22; +TEC1XCTL1_H = 0x0C23; +TEC1XCTL2 = 0x0C24; +TEC1XCTL2_L = 0x0C24; +TEC1XCTL2_H = 0x0C25; +TEC1STA = 0x0C26; +TEC1STA_L = 0x0C26; +TEC1STA_H = 0x0C27; +TEC1XINT = 0x0C28; +TEC1XINT_L = 0x0C28; +TEC1XINT_H = 0x0C29; +TEC1IV = 0x0C2A; +TEC1IV_L = 0x0C2A; +TEC1IV_H = 0x0C2B; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5212.cmd b/msp430/msp430f5212.cmd new file mode 100644 index 00000000..3b4021ab --- /dev/null +++ b/msp430/msp430f5212.cmd @@ -0,0 +1,640 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5212.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5213.cmd b/msp430/msp430f5213.cmd new file mode 100644 index 00000000..22a34954 --- /dev/null +++ b/msp430/msp430f5213.cmd @@ -0,0 +1,640 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5213.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5214.cmd b/msp430/msp430f5214.cmd new file mode 100644 index 00000000..df03f29b --- /dev/null +++ b/msp430/msp430f5214.cmd @@ -0,0 +1,640 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5214.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5217.cmd b/msp430/msp430f5217.cmd new file mode 100644 index 00000000..9d202f5d --- /dev/null +++ b/msp430/msp430f5217.cmd @@ -0,0 +1,661 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5217.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5218.cmd b/msp430/msp430f5218.cmd new file mode 100644 index 00000000..a849def2 --- /dev/null +++ b/msp430/msp430f5218.cmd @@ -0,0 +1,640 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5218.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5219.cmd b/msp430/msp430f5219.cmd new file mode 100644 index 00000000..a96435d6 --- /dev/null +++ b/msp430/msp430f5219.cmd @@ -0,0 +1,661 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5219.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5222.cmd b/msp430/msp430f5222.cmd new file mode 100644 index 00000000..c1008068 --- /dev/null +++ b/msp430/msp430f5222.cmd @@ -0,0 +1,673 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5222.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5223.cmd b/msp430/msp430f5223.cmd new file mode 100644 index 00000000..885269cc --- /dev/null +++ b/msp430/msp430f5223.cmd @@ -0,0 +1,673 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5223.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5224.cmd b/msp430/msp430f5224.cmd new file mode 100644 index 00000000..122a7b36 --- /dev/null +++ b/msp430/msp430f5224.cmd @@ -0,0 +1,673 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5224.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5227.cmd b/msp430/msp430f5227.cmd new file mode 100644 index 00000000..155b3450 --- /dev/null +++ b/msp430/msp430f5227.cmd @@ -0,0 +1,694 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5227.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5228.cmd b/msp430/msp430f5228.cmd new file mode 100644 index 00000000..7f710a73 --- /dev/null +++ b/msp430/msp430f5228.cmd @@ -0,0 +1,694 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5228.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5229.cmd b/msp430/msp430f5229.cmd new file mode 100644 index 00000000..90b59844 --- /dev/null +++ b/msp430/msp430f5229.cmd @@ -0,0 +1,694 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5229.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5232.cmd b/msp430/msp430f5232.cmd new file mode 100644 index 00000000..0bded6b7 --- /dev/null +++ b/msp430/msp430f5232.cmd @@ -0,0 +1,640 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5232.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5234.cmd b/msp430/msp430f5234.cmd new file mode 100644 index 00000000..3de37068 --- /dev/null +++ b/msp430/msp430f5234.cmd @@ -0,0 +1,640 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5234.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5237.cmd b/msp430/msp430f5237.cmd new file mode 100644 index 00000000..27954848 --- /dev/null +++ b/msp430/msp430f5237.cmd @@ -0,0 +1,661 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5237.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5239.cmd b/msp430/msp430f5239.cmd new file mode 100644 index 00000000..e5990a91 --- /dev/null +++ b/msp430/msp430f5239.cmd @@ -0,0 +1,661 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5239.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5242.cmd b/msp430/msp430f5242.cmd new file mode 100644 index 00000000..558307a0 --- /dev/null +++ b/msp430/msp430f5242.cmd @@ -0,0 +1,673 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5242.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5244.cmd b/msp430/msp430f5244.cmd new file mode 100644 index 00000000..32a5f8a8 --- /dev/null +++ b/msp430/msp430f5244.cmd @@ -0,0 +1,673 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5244.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5247.cmd b/msp430/msp430f5247.cmd new file mode 100644 index 00000000..bfa065f0 --- /dev/null +++ b/msp430/msp430f5247.cmd @@ -0,0 +1,694 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5247.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5249.cmd b/msp430/msp430f5249.cmd new file mode 100644 index 00000000..b0c9b714 --- /dev/null +++ b/msp430/msp430f5249.cmd @@ -0,0 +1,694 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5249.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5252.cmd b/msp430/msp430f5252.cmd new file mode 100644 index 00000000..0c870ee1 --- /dev/null +++ b/msp430/msp430f5252.cmd @@ -0,0 +1,758 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5252.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P5IV = 0x024E; +P6IV = 0x025E; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0680; +UCA3CTLW0_L = 0x0680; +UCA3CTLW0_H = 0x0681; +UCA3BRW = 0x0686; +UCA3BRW_L = 0x0686; +UCA3BRW_H = 0x0687; +UCA3MCTL = 0x0688; +UCA3STAT = 0x068A; +UCA3RXBUF = 0x068C; +UCA3TXBUF = 0x068E; +UCA3ABCTL = 0x0690; +UCA3IRCTL = 0x0692; +UCA3IRCTL_L = 0x0692; +UCA3IRCTL_H = 0x0693; +UCA3ICTL = 0x069C; +UCA3ICTL_L = 0x069C; +UCA3ICTL_H = 0x069D; +UCA3IV = 0x069E; +/************************************************************ +* USCI B3 +************************************************************/ +UCB3CTLW0 = 0x06A0; +UCB3CTLW0_L = 0x06A0; +UCB3CTLW0_H = 0x06A1; +UCB3BRW = 0x06A6; +UCB3BRW_L = 0x06A6; +UCB3BRW_H = 0x06A7; +UCB3STAT = 0x06AA; +UCB3RXBUF = 0x06AC; +UCB3TXBUF = 0x06AE; +UCB3I2COA = 0x06B0; +UCB3I2COA_L = 0x06B0; +UCB3I2COA_H = 0x06B1; +UCB3I2CSA = 0x06B2; +UCB3I2CSA_L = 0x06B2; +UCB3I2CSA_H = 0x06B3; +UCB3ICTL = 0x06BC; +UCB3ICTL_L = 0x06BC; +UCB3ICTL_H = 0x06BD; +UCB3IV = 0x06BE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5253.cmd b/msp430/msp430f5253.cmd new file mode 100644 index 00000000..5d1ad952 --- /dev/null +++ b/msp430/msp430f5253.cmd @@ -0,0 +1,791 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5253.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P5IV = 0x024E; +P6IV = 0x025E; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0680; +UCA3CTLW0_L = 0x0680; +UCA3CTLW0_H = 0x0681; +UCA3BRW = 0x0686; +UCA3BRW_L = 0x0686; +UCA3BRW_H = 0x0687; +UCA3MCTL = 0x0688; +UCA3STAT = 0x068A; +UCA3RXBUF = 0x068C; +UCA3TXBUF = 0x068E; +UCA3ABCTL = 0x0690; +UCA3IRCTL = 0x0692; +UCA3IRCTL_L = 0x0692; +UCA3IRCTL_H = 0x0693; +UCA3ICTL = 0x069C; +UCA3ICTL_L = 0x069C; +UCA3ICTL_H = 0x069D; +UCA3IV = 0x069E; +/************************************************************ +* USCI B3 +************************************************************/ +UCB3CTLW0 = 0x06A0; +UCB3CTLW0_L = 0x06A0; +UCB3CTLW0_H = 0x06A1; +UCB3BRW = 0x06A6; +UCB3BRW_L = 0x06A6; +UCB3BRW_H = 0x06A7; +UCB3STAT = 0x06AA; +UCB3RXBUF = 0x06AC; +UCB3TXBUF = 0x06AE; +UCB3I2COA = 0x06B0; +UCB3I2COA_L = 0x06B0; +UCB3I2COA_H = 0x06B1; +UCB3I2CSA = 0x06B2; +UCB3I2CSA_L = 0x06B2; +UCB3I2CSA_H = 0x06B3; +UCB3ICTL = 0x06BC; +UCB3ICTL_L = 0x06BC; +UCB3ICTL_H = 0x06BD; +UCB3IV = 0x06BE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5254.cmd b/msp430/msp430f5254.cmd new file mode 100644 index 00000000..1041e06d --- /dev/null +++ b/msp430/msp430f5254.cmd @@ -0,0 +1,758 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5254.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P5IV = 0x024E; +P6IV = 0x025E; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0680; +UCA3CTLW0_L = 0x0680; +UCA3CTLW0_H = 0x0681; +UCA3BRW = 0x0686; +UCA3BRW_L = 0x0686; +UCA3BRW_H = 0x0687; +UCA3MCTL = 0x0688; +UCA3STAT = 0x068A; +UCA3RXBUF = 0x068C; +UCA3TXBUF = 0x068E; +UCA3ABCTL = 0x0690; +UCA3IRCTL = 0x0692; +UCA3IRCTL_L = 0x0692; +UCA3IRCTL_H = 0x0693; +UCA3ICTL = 0x069C; +UCA3ICTL_L = 0x069C; +UCA3ICTL_H = 0x069D; +UCA3IV = 0x069E; +/************************************************************ +* USCI B3 +************************************************************/ +UCB3CTLW0 = 0x06A0; +UCB3CTLW0_L = 0x06A0; +UCB3CTLW0_H = 0x06A1; +UCB3BRW = 0x06A6; +UCB3BRW_L = 0x06A6; +UCB3BRW_H = 0x06A7; +UCB3STAT = 0x06AA; +UCB3RXBUF = 0x06AC; +UCB3TXBUF = 0x06AE; +UCB3I2COA = 0x06B0; +UCB3I2COA_L = 0x06B0; +UCB3I2COA_H = 0x06B1; +UCB3I2CSA = 0x06B2; +UCB3I2CSA_L = 0x06B2; +UCB3I2CSA_H = 0x06B3; +UCB3ICTL = 0x06BC; +UCB3ICTL_L = 0x06BC; +UCB3ICTL_H = 0x06BD; +UCB3IV = 0x06BE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5255.cmd b/msp430/msp430f5255.cmd new file mode 100644 index 00000000..64bfa2e5 --- /dev/null +++ b/msp430/msp430f5255.cmd @@ -0,0 +1,791 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5255.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P5IV = 0x024E; +P6IV = 0x025E; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0680; +UCA3CTLW0_L = 0x0680; +UCA3CTLW0_H = 0x0681; +UCA3BRW = 0x0686; +UCA3BRW_L = 0x0686; +UCA3BRW_H = 0x0687; +UCA3MCTL = 0x0688; +UCA3STAT = 0x068A; +UCA3RXBUF = 0x068C; +UCA3TXBUF = 0x068E; +UCA3ABCTL = 0x0690; +UCA3IRCTL = 0x0692; +UCA3IRCTL_L = 0x0692; +UCA3IRCTL_H = 0x0693; +UCA3ICTL = 0x069C; +UCA3ICTL_L = 0x069C; +UCA3ICTL_H = 0x069D; +UCA3IV = 0x069E; +/************************************************************ +* USCI B3 +************************************************************/ +UCB3CTLW0 = 0x06A0; +UCB3CTLW0_L = 0x06A0; +UCB3CTLW0_H = 0x06A1; +UCB3BRW = 0x06A6; +UCB3BRW_L = 0x06A6; +UCB3BRW_H = 0x06A7; +UCB3STAT = 0x06AA; +UCB3RXBUF = 0x06AC; +UCB3TXBUF = 0x06AE; +UCB3I2COA = 0x06B0; +UCB3I2COA_L = 0x06B0; +UCB3I2COA_H = 0x06B1; +UCB3I2CSA = 0x06B2; +UCB3I2CSA_L = 0x06B2; +UCB3I2CSA_H = 0x06B3; +UCB3ICTL = 0x06BC; +UCB3ICTL_L = 0x06BC; +UCB3ICTL_H = 0x06BD; +UCB3IV = 0x06BE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5256.cmd b/msp430/msp430f5256.cmd new file mode 100644 index 00000000..f4db7054 --- /dev/null +++ b/msp430/msp430f5256.cmd @@ -0,0 +1,758 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5256.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P5IV = 0x024E; +P6IV = 0x025E; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0680; +UCA3CTLW0_L = 0x0680; +UCA3CTLW0_H = 0x0681; +UCA3BRW = 0x0686; +UCA3BRW_L = 0x0686; +UCA3BRW_H = 0x0687; +UCA3MCTL = 0x0688; +UCA3STAT = 0x068A; +UCA3RXBUF = 0x068C; +UCA3TXBUF = 0x068E; +UCA3ABCTL = 0x0690; +UCA3IRCTL = 0x0692; +UCA3IRCTL_L = 0x0692; +UCA3IRCTL_H = 0x0693; +UCA3ICTL = 0x069C; +UCA3ICTL_L = 0x069C; +UCA3ICTL_H = 0x069D; +UCA3IV = 0x069E; +/************************************************************ +* USCI B3 +************************************************************/ +UCB3CTLW0 = 0x06A0; +UCB3CTLW0_L = 0x06A0; +UCB3CTLW0_H = 0x06A1; +UCB3BRW = 0x06A6; +UCB3BRW_L = 0x06A6; +UCB3BRW_H = 0x06A7; +UCB3STAT = 0x06AA; +UCB3RXBUF = 0x06AC; +UCB3TXBUF = 0x06AE; +UCB3I2COA = 0x06B0; +UCB3I2COA_L = 0x06B0; +UCB3I2COA_H = 0x06B1; +UCB3I2CSA = 0x06B2; +UCB3I2CSA_L = 0x06B2; +UCB3I2CSA_H = 0x06B3; +UCB3ICTL = 0x06BC; +UCB3ICTL_L = 0x06BC; +UCB3ICTL_H = 0x06BD; +UCB3IV = 0x06BE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5257.cmd b/msp430/msp430f5257.cmd new file mode 100644 index 00000000..6fb0963f --- /dev/null +++ b/msp430/msp430f5257.cmd @@ -0,0 +1,791 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5257.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P5IV = 0x024E; +P6IV = 0x025E; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0680; +UCA3CTLW0_L = 0x0680; +UCA3CTLW0_H = 0x0681; +UCA3BRW = 0x0686; +UCA3BRW_L = 0x0686; +UCA3BRW_H = 0x0687; +UCA3MCTL = 0x0688; +UCA3STAT = 0x068A; +UCA3RXBUF = 0x068C; +UCA3TXBUF = 0x068E; +UCA3ABCTL = 0x0690; +UCA3IRCTL = 0x0692; +UCA3IRCTL_L = 0x0692; +UCA3IRCTL_H = 0x0693; +UCA3ICTL = 0x069C; +UCA3ICTL_L = 0x069C; +UCA3ICTL_H = 0x069D; +UCA3IV = 0x069E; +/************************************************************ +* USCI B3 +************************************************************/ +UCB3CTLW0 = 0x06A0; +UCB3CTLW0_L = 0x06A0; +UCB3CTLW0_H = 0x06A1; +UCB3BRW = 0x06A6; +UCB3BRW_L = 0x06A6; +UCB3BRW_H = 0x06A7; +UCB3STAT = 0x06AA; +UCB3RXBUF = 0x06AC; +UCB3TXBUF = 0x06AE; +UCB3I2COA = 0x06B0; +UCB3I2COA_L = 0x06B0; +UCB3I2COA_H = 0x06B1; +UCB3I2CSA = 0x06B2; +UCB3I2CSA_L = 0x06B2; +UCB3I2CSA_H = 0x06B3; +UCB3ICTL = 0x06BC; +UCB3ICTL_L = 0x06BC; +UCB3ICTL_H = 0x06BD; +UCB3IV = 0x06BE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5258.cmd b/msp430/msp430f5258.cmd new file mode 100644 index 00000000..7501bd0a --- /dev/null +++ b/msp430/msp430f5258.cmd @@ -0,0 +1,758 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5258.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P5IV = 0x024E; +P6IV = 0x025E; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0680; +UCA3CTLW0_L = 0x0680; +UCA3CTLW0_H = 0x0681; +UCA3BRW = 0x0686; +UCA3BRW_L = 0x0686; +UCA3BRW_H = 0x0687; +UCA3MCTL = 0x0688; +UCA3STAT = 0x068A; +UCA3RXBUF = 0x068C; +UCA3TXBUF = 0x068E; +UCA3ABCTL = 0x0690; +UCA3IRCTL = 0x0692; +UCA3IRCTL_L = 0x0692; +UCA3IRCTL_H = 0x0693; +UCA3ICTL = 0x069C; +UCA3ICTL_L = 0x069C; +UCA3ICTL_H = 0x069D; +UCA3IV = 0x069E; +/************************************************************ +* USCI B3 +************************************************************/ +UCB3CTLW0 = 0x06A0; +UCB3CTLW0_L = 0x06A0; +UCB3CTLW0_H = 0x06A1; +UCB3BRW = 0x06A6; +UCB3BRW_L = 0x06A6; +UCB3BRW_H = 0x06A7; +UCB3STAT = 0x06AA; +UCB3RXBUF = 0x06AC; +UCB3TXBUF = 0x06AE; +UCB3I2COA = 0x06B0; +UCB3I2COA_L = 0x06B0; +UCB3I2COA_H = 0x06B1; +UCB3I2CSA = 0x06B2; +UCB3I2CSA_L = 0x06B2; +UCB3I2CSA_H = 0x06B3; +UCB3ICTL = 0x06BC; +UCB3ICTL_L = 0x06BC; +UCB3ICTL_H = 0x06BD; +UCB3IV = 0x06BE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5259.cmd b/msp430/msp430f5259.cmd new file mode 100644 index 00000000..88f8ed2d --- /dev/null +++ b/msp430/msp430f5259.cmd @@ -0,0 +1,791 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5259.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P5IV = 0x024E; +P6IV = 0x025E; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +UCSCTL9 = 0x0172; +UCSCTL9_L = 0x0172; +UCSCTL9_H = 0x0173; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0680; +UCA3CTLW0_L = 0x0680; +UCA3CTLW0_H = 0x0681; +UCA3BRW = 0x0686; +UCA3BRW_L = 0x0686; +UCA3BRW_H = 0x0687; +UCA3MCTL = 0x0688; +UCA3STAT = 0x068A; +UCA3RXBUF = 0x068C; +UCA3TXBUF = 0x068E; +UCA3ABCTL = 0x0690; +UCA3IRCTL = 0x0692; +UCA3IRCTL_L = 0x0692; +UCA3IRCTL_H = 0x0693; +UCA3ICTL = 0x069C; +UCA3ICTL_L = 0x069C; +UCA3ICTL_H = 0x069D; +UCA3IV = 0x069E; +/************************************************************ +* USCI B3 +************************************************************/ +UCB3CTLW0 = 0x06A0; +UCB3CTLW0_L = 0x06A0; +UCB3CTLW0_H = 0x06A1; +UCB3BRW = 0x06A6; +UCB3BRW_L = 0x06A6; +UCB3BRW_H = 0x06A7; +UCB3STAT = 0x06AA; +UCB3RXBUF = 0x06AC; +UCB3TXBUF = 0x06AE; +UCB3I2COA = 0x06B0; +UCB3I2COA_L = 0x06B0; +UCB3I2COA_H = 0x06B1; +UCB3I2CSA = 0x06B2; +UCB3I2CSA_L = 0x06B2; +UCB3I2CSA_H = 0x06B3; +UCB3ICTL = 0x06BC; +UCB3ICTL_L = 0x06BC; +UCB3ICTL_H = 0x06BD; +UCB3IV = 0x06BE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5304.cmd b/msp430/msp430f5304.cmd new file mode 100644 index 00000000..23bb2fc4 --- /dev/null +++ b/msp430/msp430f5304.cmd @@ -0,0 +1,663 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5304.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* Port U +************************************************************/ +LDOKEYPID = 0x0900; +LDOKEYPID_L = 0x0900; +LDOKEYPID_H = 0x0901; +PUCTL = 0x0904; +PUCTL_L = 0x0904; +PUCTL_H = 0x0905; +LDOPWRCTL = 0x0908; +LDOPWRCTL_L = 0x0908; +LDOPWRCTL_H = 0x0909; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5308.cmd b/msp430/msp430f5308.cmd new file mode 100644 index 00000000..88b8f67e --- /dev/null +++ b/msp430/msp430f5308.cmd @@ -0,0 +1,682 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5308.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* Port U +************************************************************/ +LDOKEYPID = 0x0900; +LDOKEYPID_L = 0x0900; +LDOKEYPID_H = 0x0901; +PUCTL = 0x0904; +PUCTL_L = 0x0904; +PUCTL_H = 0x0905; +LDOPWRCTL = 0x0908; +LDOPWRCTL_L = 0x0908; +LDOPWRCTL_H = 0x0909; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5309.cmd b/msp430/msp430f5309.cmd new file mode 100644 index 00000000..2a57f040 --- /dev/null +++ b/msp430/msp430f5309.cmd @@ -0,0 +1,682 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5309.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* Port U +************************************************************/ +LDOKEYPID = 0x0900; +LDOKEYPID_L = 0x0900; +LDOKEYPID_H = 0x0901; +PUCTL = 0x0904; +PUCTL_L = 0x0904; +PUCTL_H = 0x0905; +LDOPWRCTL = 0x0908; +LDOPWRCTL_L = 0x0908; +LDOPWRCTL_H = 0x0909; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5310.cmd b/msp430/msp430f5310.cmd new file mode 100644 index 00000000..5eed20ee --- /dev/null +++ b/msp430/msp430f5310.cmd @@ -0,0 +1,682 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5310.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* Port U +************************************************************/ +LDOKEYPID = 0x0900; +LDOKEYPID_L = 0x0900; +LDOKEYPID_H = 0x0901; +PUCTL = 0x0904; +PUCTL_L = 0x0904; +PUCTL_H = 0x0905; +LDOPWRCTL = 0x0908; +LDOPWRCTL_L = 0x0908; +LDOPWRCTL_H = 0x0909; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5324.cmd b/msp430/msp430f5324.cmd new file mode 100644 index 00000000..54952cd8 --- /dev/null +++ b/msp430/msp430f5324.cmd @@ -0,0 +1,734 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5324.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* Port U +************************************************************/ +LDOKEYPID = 0x0900; +LDOKEYPID_L = 0x0900; +LDOKEYPID_H = 0x0901; +PUCTL = 0x0904; +PUCTL_L = 0x0904; +PUCTL_H = 0x0905; +LDOPWRCTL = 0x0908; +LDOPWRCTL_L = 0x0908; +LDOPWRCTL_H = 0x0909; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5325.cmd b/msp430/msp430f5325.cmd new file mode 100644 index 00000000..3c621a9d --- /dev/null +++ b/msp430/msp430f5325.cmd @@ -0,0 +1,755 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5325.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* Port U +************************************************************/ +LDOKEYPID = 0x0900; +LDOKEYPID_L = 0x0900; +LDOKEYPID_H = 0x0901; +PUCTL = 0x0904; +PUCTL_L = 0x0904; +PUCTL_H = 0x0905; +LDOPWRCTL = 0x0908; +LDOPWRCTL_L = 0x0908; +LDOPWRCTL_H = 0x0909; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5326.cmd b/msp430/msp430f5326.cmd new file mode 100644 index 00000000..631028c3 --- /dev/null +++ b/msp430/msp430f5326.cmd @@ -0,0 +1,734 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5326.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* Port U +************************************************************/ +LDOKEYPID = 0x0900; +LDOKEYPID_L = 0x0900; +LDOKEYPID_H = 0x0901; +PUCTL = 0x0904; +PUCTL_L = 0x0904; +PUCTL_H = 0x0905; +LDOPWRCTL = 0x0908; +LDOPWRCTL_L = 0x0908; +LDOPWRCTL_H = 0x0909; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5327.cmd b/msp430/msp430f5327.cmd new file mode 100644 index 00000000..67b846ab --- /dev/null +++ b/msp430/msp430f5327.cmd @@ -0,0 +1,755 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5327.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* Port U +************************************************************/ +LDOKEYPID = 0x0900; +LDOKEYPID_L = 0x0900; +LDOKEYPID_H = 0x0901; +PUCTL = 0x0904; +PUCTL_L = 0x0904; +PUCTL_H = 0x0905; +LDOPWRCTL = 0x0908; +LDOPWRCTL_L = 0x0908; +LDOPWRCTL_H = 0x0909; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5328.cmd b/msp430/msp430f5328.cmd new file mode 100644 index 00000000..2a21cf76 --- /dev/null +++ b/msp430/msp430f5328.cmd @@ -0,0 +1,734 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5328.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* Port U +************************************************************/ +LDOKEYPID = 0x0900; +LDOKEYPID_L = 0x0900; +LDOKEYPID_H = 0x0901; +PUCTL = 0x0904; +PUCTL_L = 0x0904; +PUCTL_H = 0x0905; +LDOPWRCTL = 0x0908; +LDOPWRCTL_L = 0x0908; +LDOPWRCTL_H = 0x0909; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5329.cmd b/msp430/msp430f5329.cmd new file mode 100644 index 00000000..fade4a68 --- /dev/null +++ b/msp430/msp430f5329.cmd @@ -0,0 +1,755 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5329.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* Port U +************************************************************/ +LDOKEYPID = 0x0900; +LDOKEYPID_L = 0x0900; +LDOKEYPID_H = 0x0901; +PUCTL = 0x0904; +PUCTL_L = 0x0904; +PUCTL_H = 0x0905; +LDOPWRCTL = 0x0908; +LDOPWRCTL_L = 0x0908; +LDOPWRCTL_H = 0x0909; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5333.cmd b/msp430/msp430f5333.cmd new file mode 100644 index 00000000..7c905eab --- /dev/null +++ b/msp430/msp430f5333.cmd @@ -0,0 +1,837 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5333.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* Port U +************************************************************/ +LDOKEYPID = 0x0900; +LDOKEYPID_L = 0x0900; +LDOKEYPID_H = 0x0901; +PUCTL = 0x0904; +PUCTL_L = 0x0904; +PUCTL_H = 0x0905; +LDOPWRCTL = 0x0908; +LDOPWRCTL_L = 0x0908; +LDOPWRCTL_H = 0x0909; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5335.cmd b/msp430/msp430f5335.cmd new file mode 100644 index 00000000..459618e8 --- /dev/null +++ b/msp430/msp430f5335.cmd @@ -0,0 +1,837 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5335.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* Port U +************************************************************/ +LDOKEYPID = 0x0900; +LDOKEYPID_L = 0x0900; +LDOKEYPID_H = 0x0901; +PUCTL = 0x0904; +PUCTL_L = 0x0904; +PUCTL_H = 0x0905; +LDOPWRCTL = 0x0908; +LDOPWRCTL_L = 0x0908; +LDOPWRCTL_H = 0x0909; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5336.cmd b/msp430/msp430f5336.cmd new file mode 100644 index 00000000..e9e2cce0 --- /dev/null +++ b/msp430/msp430f5336.cmd @@ -0,0 +1,851 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5336.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL0 = 0x0780; +DAC12_0CTL1 = 0x0782; +DAC12_0DAT = 0x0784; +DAC12_0CALCTL = 0x0786; +DAC12_0CALDAT = 0x0788; +DAC12_1CTL0 = 0x0790; +DAC12_1CTL1 = 0x0792; +DAC12_1DAT = 0x0794; +DAC12_1CALCTL = 0x0796; +DAC12_1CALDAT = 0x0798; +DAC12_IV = 0x079E; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* Port U +************************************************************/ +LDOKEYPID = 0x0900; +LDOKEYPID_L = 0x0900; +LDOKEYPID_H = 0x0901; +PUCTL = 0x0904; +PUCTL_L = 0x0904; +PUCTL_H = 0x0905; +LDOPWRCTL = 0x0908; +LDOPWRCTL_L = 0x0908; +LDOPWRCTL_H = 0x0909; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5338.cmd b/msp430/msp430f5338.cmd new file mode 100644 index 00000000..0d047e24 --- /dev/null +++ b/msp430/msp430f5338.cmd @@ -0,0 +1,851 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5338.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL0 = 0x0780; +DAC12_0CTL1 = 0x0782; +DAC12_0DAT = 0x0784; +DAC12_0CALCTL = 0x0786; +DAC12_0CALDAT = 0x0788; +DAC12_1CTL0 = 0x0790; +DAC12_1CTL1 = 0x0792; +DAC12_1DAT = 0x0794; +DAC12_1CALCTL = 0x0796; +DAC12_1CALDAT = 0x0798; +DAC12_IV = 0x079E; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* Port U +************************************************************/ +LDOKEYPID = 0x0900; +LDOKEYPID_L = 0x0900; +LDOKEYPID_H = 0x0901; +PUCTL = 0x0904; +PUCTL_L = 0x0904; +PUCTL_H = 0x0905; +LDOPWRCTL = 0x0908; +LDOPWRCTL_L = 0x0908; +LDOPWRCTL_H = 0x0909; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5340.cmd b/msp430/msp430f5340.cmd new file mode 100644 index 00000000..4f97c2c8 --- /dev/null +++ b/msp430/msp430f5340.cmd @@ -0,0 +1,722 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5340.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5341.cmd b/msp430/msp430f5341.cmd new file mode 100644 index 00000000..e49735d9 --- /dev/null +++ b/msp430/msp430f5341.cmd @@ -0,0 +1,722 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5341.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5342.cmd b/msp430/msp430f5342.cmd new file mode 100644 index 00000000..0b460762 --- /dev/null +++ b/msp430/msp430f5342.cmd @@ -0,0 +1,722 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5342.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5358.cmd b/msp430/msp430f5358.cmd new file mode 100644 index 00000000..e6c03953 --- /dev/null +++ b/msp430/msp430f5358.cmd @@ -0,0 +1,897 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5358.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL0 = 0x0780; +DAC12_0CTL1 = 0x0782; +DAC12_0DAT = 0x0784; +DAC12_0CALCTL = 0x0786; +DAC12_0CALDAT = 0x0788; +DAC12_1CTL0 = 0x0790; +DAC12_1CTL1 = 0x0792; +DAC12_1DAT = 0x0794; +DAC12_1CALCTL = 0x0796; +DAC12_1CALDAT = 0x0798; +DAC12_IV = 0x079E; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************ +* MID +************************************************************/ +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* Port U +************************************************************/ +LDOKEYPID = 0x0900; +LDOKEYPID_L = 0x0900; +LDOKEYPID_H = 0x0901; +PUCTL = 0x0904; +PUCTL_L = 0x0904; +PUCTL_H = 0x0905; +LDOPWRCTL = 0x0908; +LDOPWRCTL_L = 0x0908; +LDOPWRCTL_H = 0x0909; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5359.cmd b/msp430/msp430f5359.cmd new file mode 100644 index 00000000..c5d4781d --- /dev/null +++ b/msp430/msp430f5359.cmd @@ -0,0 +1,897 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5359.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL0 = 0x0780; +DAC12_0CTL1 = 0x0782; +DAC12_0DAT = 0x0784; +DAC12_0CALCTL = 0x0786; +DAC12_0CALDAT = 0x0788; +DAC12_1CTL0 = 0x0790; +DAC12_1CTL1 = 0x0792; +DAC12_1DAT = 0x0794; +DAC12_1CALCTL = 0x0796; +DAC12_1CALDAT = 0x0798; +DAC12_IV = 0x079E; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************ +* MID +************************************************************/ +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* Port U +************************************************************/ +LDOKEYPID = 0x0900; +LDOKEYPID_L = 0x0900; +LDOKEYPID_H = 0x0901; +PUCTL = 0x0904; +PUCTL_L = 0x0904; +PUCTL_H = 0x0905; +LDOPWRCTL = 0x0908; +LDOPWRCTL_L = 0x0908; +LDOPWRCTL_H = 0x0909; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5418.cmd b/msp430/msp430f5418.cmd new file mode 100644 index 00000000..cf5bcc1a --- /dev/null +++ b/msp430/msp430f5418.cmd @@ -0,0 +1,711 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5418.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL = 0x02AA; +PFSEL_L = 0x02AA; +PFSEL_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5418a.cmd b/msp430/msp430f5418a.cmd new file mode 100644 index 00000000..11f2f63e --- /dev/null +++ b/msp430/msp430f5418a.cmd @@ -0,0 +1,729 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5418a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL = 0x02AA; +PFSEL_L = 0x02AA; +PFSEL_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5419.cmd b/msp430/msp430f5419.cmd new file mode 100644 index 00000000..6735be8f --- /dev/null +++ b/msp430/msp430f5419.cmd @@ -0,0 +1,797 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5419.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL = 0x02AA; +PFSEL_L = 0x02AA; +PFSEL_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0680; +UCA3CTLW0_L = 0x0680; +UCA3CTLW0_H = 0x0681; +UCA3BRW = 0x0686; +UCA3BRW_L = 0x0686; +UCA3BRW_H = 0x0687; +UCA3MCTL = 0x0688; +UCA3STAT = 0x068A; +UCA3RXBUF = 0x068C; +UCA3TXBUF = 0x068E; +UCA3ABCTL = 0x0690; +UCA3IRCTL = 0x0692; +UCA3IRCTL_L = 0x0692; +UCA3IRCTL_H = 0x0693; +UCA3ICTL = 0x069C; +UCA3ICTL_L = 0x069C; +UCA3ICTL_H = 0x069D; +UCA3IV = 0x069E; +/************************************************************ +* USCI B3 +************************************************************/ +UCB3CTLW0 = 0x06A0; +UCB3CTLW0_L = 0x06A0; +UCB3CTLW0_H = 0x06A1; +UCB3BRW = 0x06A6; +UCB3BRW_L = 0x06A6; +UCB3BRW_H = 0x06A7; +UCB3STAT = 0x06AA; +UCB3RXBUF = 0x06AC; +UCB3TXBUF = 0x06AE; +UCB3I2COA = 0x06B0; +UCB3I2COA_L = 0x06B0; +UCB3I2COA_H = 0x06B1; +UCB3I2CSA = 0x06B2; +UCB3I2CSA_L = 0x06B2; +UCB3I2CSA_H = 0x06B3; +UCB3ICTL = 0x06BC; +UCB3ICTL_L = 0x06BC; +UCB3ICTL_H = 0x06BD; +UCB3IV = 0x06BE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5419a.cmd b/msp430/msp430f5419a.cmd new file mode 100644 index 00000000..9498b586 --- /dev/null +++ b/msp430/msp430f5419a.cmd @@ -0,0 +1,815 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5419a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL = 0x02AA; +PFSEL_L = 0x02AA; +PFSEL_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0680; +UCA3CTLW0_L = 0x0680; +UCA3CTLW0_H = 0x0681; +UCA3BRW = 0x0686; +UCA3BRW_L = 0x0686; +UCA3BRW_H = 0x0687; +UCA3MCTL = 0x0688; +UCA3STAT = 0x068A; +UCA3RXBUF = 0x068C; +UCA3TXBUF = 0x068E; +UCA3ABCTL = 0x0690; +UCA3IRCTL = 0x0692; +UCA3IRCTL_L = 0x0692; +UCA3IRCTL_H = 0x0693; +UCA3ICTL = 0x069C; +UCA3ICTL_L = 0x069C; +UCA3ICTL_H = 0x069D; +UCA3IV = 0x069E; +/************************************************************ +* USCI B3 +************************************************************/ +UCB3CTLW0 = 0x06A0; +UCB3CTLW0_L = 0x06A0; +UCB3CTLW0_H = 0x06A1; +UCB3BRW = 0x06A6; +UCB3BRW_L = 0x06A6; +UCB3BRW_H = 0x06A7; +UCB3STAT = 0x06AA; +UCB3RXBUF = 0x06AC; +UCB3TXBUF = 0x06AE; +UCB3I2COA = 0x06B0; +UCB3I2COA_L = 0x06B0; +UCB3I2COA_H = 0x06B1; +UCB3I2CSA = 0x06B2; +UCB3I2CSA_L = 0x06B2; +UCB3I2CSA_H = 0x06B3; +UCB3ICTL = 0x06BC; +UCB3ICTL_L = 0x06BC; +UCB3ICTL_H = 0x06BD; +UCB3IV = 0x06BE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5435.cmd b/msp430/msp430f5435.cmd new file mode 100644 index 00000000..79ef5fee --- /dev/null +++ b/msp430/msp430f5435.cmd @@ -0,0 +1,711 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5435.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL = 0x02AA; +PFSEL_L = 0x02AA; +PFSEL_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5435a.cmd b/msp430/msp430f5435a.cmd new file mode 100644 index 00000000..a33768ac --- /dev/null +++ b/msp430/msp430f5435a.cmd @@ -0,0 +1,729 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5435a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL = 0x02AA; +PFSEL_L = 0x02AA; +PFSEL_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5436.cmd b/msp430/msp430f5436.cmd new file mode 100644 index 00000000..1d1ff41e --- /dev/null +++ b/msp430/msp430f5436.cmd @@ -0,0 +1,797 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5436.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL = 0x02AA; +PFSEL_L = 0x02AA; +PFSEL_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0680; +UCA3CTLW0_L = 0x0680; +UCA3CTLW0_H = 0x0681; +UCA3BRW = 0x0686; +UCA3BRW_L = 0x0686; +UCA3BRW_H = 0x0687; +UCA3MCTL = 0x0688; +UCA3STAT = 0x068A; +UCA3RXBUF = 0x068C; +UCA3TXBUF = 0x068E; +UCA3ABCTL = 0x0690; +UCA3IRCTL = 0x0692; +UCA3IRCTL_L = 0x0692; +UCA3IRCTL_H = 0x0693; +UCA3ICTL = 0x069C; +UCA3ICTL_L = 0x069C; +UCA3ICTL_H = 0x069D; +UCA3IV = 0x069E; +/************************************************************ +* USCI B3 +************************************************************/ +UCB3CTLW0 = 0x06A0; +UCB3CTLW0_L = 0x06A0; +UCB3CTLW0_H = 0x06A1; +UCB3BRW = 0x06A6; +UCB3BRW_L = 0x06A6; +UCB3BRW_H = 0x06A7; +UCB3STAT = 0x06AA; +UCB3RXBUF = 0x06AC; +UCB3TXBUF = 0x06AE; +UCB3I2COA = 0x06B0; +UCB3I2COA_L = 0x06B0; +UCB3I2COA_H = 0x06B1; +UCB3I2CSA = 0x06B2; +UCB3I2CSA_L = 0x06B2; +UCB3I2CSA_H = 0x06B3; +UCB3ICTL = 0x06BC; +UCB3ICTL_L = 0x06BC; +UCB3ICTL_H = 0x06BD; +UCB3IV = 0x06BE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5436a.cmd b/msp430/msp430f5436a.cmd new file mode 100644 index 00000000..632b71fa --- /dev/null +++ b/msp430/msp430f5436a.cmd @@ -0,0 +1,815 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5436a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL = 0x02AA; +PFSEL_L = 0x02AA; +PFSEL_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0680; +UCA3CTLW0_L = 0x0680; +UCA3CTLW0_H = 0x0681; +UCA3BRW = 0x0686; +UCA3BRW_L = 0x0686; +UCA3BRW_H = 0x0687; +UCA3MCTL = 0x0688; +UCA3STAT = 0x068A; +UCA3RXBUF = 0x068C; +UCA3TXBUF = 0x068E; +UCA3ABCTL = 0x0690; +UCA3IRCTL = 0x0692; +UCA3IRCTL_L = 0x0692; +UCA3IRCTL_H = 0x0693; +UCA3ICTL = 0x069C; +UCA3ICTL_L = 0x069C; +UCA3ICTL_H = 0x069D; +UCA3IV = 0x069E; +/************************************************************ +* USCI B3 +************************************************************/ +UCB3CTLW0 = 0x06A0; +UCB3CTLW0_L = 0x06A0; +UCB3CTLW0_H = 0x06A1; +UCB3BRW = 0x06A6; +UCB3BRW_L = 0x06A6; +UCB3BRW_H = 0x06A7; +UCB3STAT = 0x06AA; +UCB3RXBUF = 0x06AC; +UCB3TXBUF = 0x06AE; +UCB3I2COA = 0x06B0; +UCB3I2COA_L = 0x06B0; +UCB3I2COA_H = 0x06B1; +UCB3I2CSA = 0x06B2; +UCB3I2CSA_L = 0x06B2; +UCB3I2CSA_H = 0x06B3; +UCB3ICTL = 0x06BC; +UCB3ICTL_L = 0x06BC; +UCB3ICTL_H = 0x06BD; +UCB3IV = 0x06BE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5437.cmd b/msp430/msp430f5437.cmd new file mode 100644 index 00000000..4547bf8c --- /dev/null +++ b/msp430/msp430f5437.cmd @@ -0,0 +1,711 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5437.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL = 0x02AA; +PFSEL_L = 0x02AA; +PFSEL_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5437a.cmd b/msp430/msp430f5437a.cmd new file mode 100644 index 00000000..9115e71b --- /dev/null +++ b/msp430/msp430f5437a.cmd @@ -0,0 +1,729 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5437a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL = 0x02AA; +PFSEL_L = 0x02AA; +PFSEL_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5438.cmd b/msp430/msp430f5438.cmd new file mode 100644 index 00000000..38df3f0e --- /dev/null +++ b/msp430/msp430f5438.cmd @@ -0,0 +1,797 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5438.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL = 0x02AA; +PFSEL_L = 0x02AA; +PFSEL_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0680; +UCA3CTLW0_L = 0x0680; +UCA3CTLW0_H = 0x0681; +UCA3BRW = 0x0686; +UCA3BRW_L = 0x0686; +UCA3BRW_H = 0x0687; +UCA3MCTL = 0x0688; +UCA3STAT = 0x068A; +UCA3RXBUF = 0x068C; +UCA3TXBUF = 0x068E; +UCA3ABCTL = 0x0690; +UCA3IRCTL = 0x0692; +UCA3IRCTL_L = 0x0692; +UCA3IRCTL_H = 0x0693; +UCA3ICTL = 0x069C; +UCA3ICTL_L = 0x069C; +UCA3ICTL_H = 0x069D; +UCA3IV = 0x069E; +/************************************************************ +* USCI B3 +************************************************************/ +UCB3CTLW0 = 0x06A0; +UCB3CTLW0_L = 0x06A0; +UCB3CTLW0_H = 0x06A1; +UCB3BRW = 0x06A6; +UCB3BRW_L = 0x06A6; +UCB3BRW_H = 0x06A7; +UCB3STAT = 0x06AA; +UCB3RXBUF = 0x06AC; +UCB3TXBUF = 0x06AE; +UCB3I2COA = 0x06B0; +UCB3I2COA_L = 0x06B0; +UCB3I2COA_H = 0x06B1; +UCB3I2CSA = 0x06B2; +UCB3I2CSA_L = 0x06B2; +UCB3I2CSA_H = 0x06B3; +UCB3ICTL = 0x06BC; +UCB3ICTL_L = 0x06BC; +UCB3ICTL_H = 0x06BD; +UCB3IV = 0x06BE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5438a.cmd b/msp430/msp430f5438a.cmd new file mode 100644 index 00000000..4c95bfa4 --- /dev/null +++ b/msp430/msp430f5438a.cmd @@ -0,0 +1,815 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5438a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL = 0x02AA; +PFSEL_L = 0x02AA; +PFSEL_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0680; +UCA3CTLW0_L = 0x0680; +UCA3CTLW0_H = 0x0681; +UCA3BRW = 0x0686; +UCA3BRW_L = 0x0686; +UCA3BRW_H = 0x0687; +UCA3MCTL = 0x0688; +UCA3STAT = 0x068A; +UCA3RXBUF = 0x068C; +UCA3TXBUF = 0x068E; +UCA3ABCTL = 0x0690; +UCA3IRCTL = 0x0692; +UCA3IRCTL_L = 0x0692; +UCA3IRCTL_H = 0x0693; +UCA3ICTL = 0x069C; +UCA3ICTL_L = 0x069C; +UCA3ICTL_H = 0x069D; +UCA3IV = 0x069E; +/************************************************************ +* USCI B3 +************************************************************/ +UCB3CTLW0 = 0x06A0; +UCB3CTLW0_L = 0x06A0; +UCB3CTLW0_H = 0x06A1; +UCB3BRW = 0x06A6; +UCB3BRW_L = 0x06A6; +UCB3BRW_H = 0x06A7; +UCB3STAT = 0x06AA; +UCB3RXBUF = 0x06AC; +UCB3TXBUF = 0x06AE; +UCB3I2COA = 0x06B0; +UCB3I2COA_L = 0x06B0; +UCB3I2COA_H = 0x06B1; +UCB3I2CSA = 0x06B2; +UCB3I2CSA_L = 0x06B2; +UCB3I2CSA_H = 0x06B3; +UCB3ICTL = 0x06BC; +UCB3ICTL_L = 0x06BC; +UCB3ICTL_H = 0x06BD; +UCB3IV = 0x06BE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5500.cmd b/msp430/msp430f5500.cmd new file mode 100644 index 00000000..abe440e6 --- /dev/null +++ b/msp430/msp430f5500.cmd @@ -0,0 +1,774 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5500.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5501.cmd b/msp430/msp430f5501.cmd new file mode 100644 index 00000000..c1d83658 --- /dev/null +++ b/msp430/msp430f5501.cmd @@ -0,0 +1,774 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5501.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5502.cmd b/msp430/msp430f5502.cmd new file mode 100644 index 00000000..2c88a636 --- /dev/null +++ b/msp430/msp430f5502.cmd @@ -0,0 +1,774 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5502.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5503.cmd b/msp430/msp430f5503.cmd new file mode 100644 index 00000000..07fffcd8 --- /dev/null +++ b/msp430/msp430f5503.cmd @@ -0,0 +1,774 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5503.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5504.cmd b/msp430/msp430f5504.cmd new file mode 100644 index 00000000..ae4bb6a7 --- /dev/null +++ b/msp430/msp430f5504.cmd @@ -0,0 +1,788 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5504.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5505.cmd b/msp430/msp430f5505.cmd new file mode 100644 index 00000000..f44b35cb --- /dev/null +++ b/msp430/msp430f5505.cmd @@ -0,0 +1,788 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5505.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5506.cmd b/msp430/msp430f5506.cmd new file mode 100644 index 00000000..fcb8f48d --- /dev/null +++ b/msp430/msp430f5506.cmd @@ -0,0 +1,788 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5506.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5507.cmd b/msp430/msp430f5507.cmd new file mode 100644 index 00000000..2a886f51 --- /dev/null +++ b/msp430/msp430f5507.cmd @@ -0,0 +1,788 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5507.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5508.cmd b/msp430/msp430f5508.cmd new file mode 100644 index 00000000..e3cc5387 --- /dev/null +++ b/msp430/msp430f5508.cmd @@ -0,0 +1,807 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5508.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5509.cmd b/msp430/msp430f5509.cmd new file mode 100644 index 00000000..a74a562e --- /dev/null +++ b/msp430/msp430f5509.cmd @@ -0,0 +1,807 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5509.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5510.cmd b/msp430/msp430f5510.cmd new file mode 100644 index 00000000..bcc13e19 --- /dev/null +++ b/msp430/msp430f5510.cmd @@ -0,0 +1,807 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5510.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5513.cmd b/msp430/msp430f5513.cmd new file mode 100644 index 00000000..4f62ec91 --- /dev/null +++ b/msp430/msp430f5513.cmd @@ -0,0 +1,774 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5513.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5514.cmd b/msp430/msp430f5514.cmd new file mode 100644 index 00000000..ce8d6647 --- /dev/null +++ b/msp430/msp430f5514.cmd @@ -0,0 +1,774 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5514.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5515.cmd b/msp430/msp430f5515.cmd new file mode 100644 index 00000000..fc03e729 --- /dev/null +++ b/msp430/msp430f5515.cmd @@ -0,0 +1,795 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5515.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5517.cmd b/msp430/msp430f5517.cmd new file mode 100644 index 00000000..0a1dff46 --- /dev/null +++ b/msp430/msp430f5517.cmd @@ -0,0 +1,795 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5517.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5519.cmd b/msp430/msp430f5519.cmd new file mode 100644 index 00000000..f13f31da --- /dev/null +++ b/msp430/msp430f5519.cmd @@ -0,0 +1,795 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5519.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5521.cmd b/msp430/msp430f5521.cmd new file mode 100644 index 00000000..9d2c7bdc --- /dev/null +++ b/msp430/msp430f5521.cmd @@ -0,0 +1,880 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5521.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5522.cmd b/msp430/msp430f5522.cmd new file mode 100644 index 00000000..04ccc235 --- /dev/null +++ b/msp430/msp430f5522.cmd @@ -0,0 +1,859 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5522.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5524.cmd b/msp430/msp430f5524.cmd new file mode 100644 index 00000000..8e437600 --- /dev/null +++ b/msp430/msp430f5524.cmd @@ -0,0 +1,859 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5524.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5525.cmd b/msp430/msp430f5525.cmd new file mode 100644 index 00000000..2544b1f4 --- /dev/null +++ b/msp430/msp430f5525.cmd @@ -0,0 +1,880 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5525.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5526.cmd b/msp430/msp430f5526.cmd new file mode 100644 index 00000000..fc22492a --- /dev/null +++ b/msp430/msp430f5526.cmd @@ -0,0 +1,859 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5526.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5527.cmd b/msp430/msp430f5527.cmd new file mode 100644 index 00000000..f75d8887 --- /dev/null +++ b/msp430/msp430f5527.cmd @@ -0,0 +1,880 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5527.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5528.cmd b/msp430/msp430f5528.cmd new file mode 100644 index 00000000..0f26502b --- /dev/null +++ b/msp430/msp430f5528.cmd @@ -0,0 +1,859 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5528.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5529.cmd b/msp430/msp430f5529.cmd new file mode 100644 index 00000000..6e052149 --- /dev/null +++ b/msp430/msp430f5529.cmd @@ -0,0 +1,880 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5529.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5630.cmd b/msp430/msp430f5630.cmd new file mode 100644 index 00000000..6631510f --- /dev/null +++ b/msp430/msp430f5630.cmd @@ -0,0 +1,877 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5630.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5631.cmd b/msp430/msp430f5631.cmd new file mode 100644 index 00000000..8e3bf9c8 --- /dev/null +++ b/msp430/msp430f5631.cmd @@ -0,0 +1,877 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5631.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5632.cmd b/msp430/msp430f5632.cmd new file mode 100644 index 00000000..06aebf34 --- /dev/null +++ b/msp430/msp430f5632.cmd @@ -0,0 +1,877 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5632.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5633.cmd b/msp430/msp430f5633.cmd new file mode 100644 index 00000000..3f3b0c4e --- /dev/null +++ b/msp430/msp430f5633.cmd @@ -0,0 +1,962 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5633.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5634.cmd b/msp430/msp430f5634.cmd new file mode 100644 index 00000000..d6749f2b --- /dev/null +++ b/msp430/msp430f5634.cmd @@ -0,0 +1,962 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5634.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5635.cmd b/msp430/msp430f5635.cmd new file mode 100644 index 00000000..f35d2f5e --- /dev/null +++ b/msp430/msp430f5635.cmd @@ -0,0 +1,962 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5635.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5636.cmd b/msp430/msp430f5636.cmd new file mode 100644 index 00000000..ead4f7f8 --- /dev/null +++ b/msp430/msp430f5636.cmd @@ -0,0 +1,976 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5636.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL0 = 0x0780; +DAC12_0CTL1 = 0x0782; +DAC12_0DAT = 0x0784; +DAC12_0CALCTL = 0x0786; +DAC12_0CALDAT = 0x0788; +DAC12_1CTL0 = 0x0790; +DAC12_1CTL1 = 0x0792; +DAC12_1DAT = 0x0794; +DAC12_1CALCTL = 0x0796; +DAC12_1CALDAT = 0x0798; +DAC12_IV = 0x079E; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5637.cmd b/msp430/msp430f5637.cmd new file mode 100644 index 00000000..4295a3b3 --- /dev/null +++ b/msp430/msp430f5637.cmd @@ -0,0 +1,976 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5637.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL0 = 0x0780; +DAC12_0CTL1 = 0x0782; +DAC12_0DAT = 0x0784; +DAC12_0CALCTL = 0x0786; +DAC12_0CALDAT = 0x0788; +DAC12_1CTL0 = 0x0790; +DAC12_1CTL1 = 0x0792; +DAC12_1DAT = 0x0794; +DAC12_1CALCTL = 0x0796; +DAC12_1CALDAT = 0x0798; +DAC12_IV = 0x079E; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5638.cmd b/msp430/msp430f5638.cmd new file mode 100644 index 00000000..720cdf8b --- /dev/null +++ b/msp430/msp430f5638.cmd @@ -0,0 +1,976 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5638.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL0 = 0x0780; +DAC12_0CTL1 = 0x0782; +DAC12_0DAT = 0x0784; +DAC12_0CALCTL = 0x0786; +DAC12_0CALDAT = 0x0788; +DAC12_1CTL0 = 0x0790; +DAC12_1CTL1 = 0x0792; +DAC12_1DAT = 0x0794; +DAC12_1CALCTL = 0x0796; +DAC12_1CALDAT = 0x0798; +DAC12_IV = 0x079E; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5658.cmd b/msp430/msp430f5658.cmd new file mode 100644 index 00000000..b64d95e4 --- /dev/null +++ b/msp430/msp430f5658.cmd @@ -0,0 +1,1022 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5658.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL0 = 0x0780; +DAC12_0CTL1 = 0x0782; +DAC12_0DAT = 0x0784; +DAC12_0CALCTL = 0x0786; +DAC12_0CALDAT = 0x0788; +DAC12_1CTL0 = 0x0790; +DAC12_1CTL1 = 0x0792; +DAC12_1DAT = 0x0794; +DAC12_1CALCTL = 0x0796; +DAC12_1CALDAT = 0x0798; +DAC12_IV = 0x079E; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************ +* MID +************************************************************/ +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f5659.cmd b/msp430/msp430f5659.cmd new file mode 100644 index 00000000..fb19633a --- /dev/null +++ b/msp430/msp430f5659.cmd @@ -0,0 +1,1022 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5659.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL0 = 0x0780; +DAC12_0CTL1 = 0x0782; +DAC12_0DAT = 0x0784; +DAC12_0CALCTL = 0x0786; +DAC12_0CALDAT = 0x0788; +DAC12_1CTL0 = 0x0790; +DAC12_1CTL1 = 0x0792; +DAC12_1DAT = 0x0794; +DAC12_1CALCTL = 0x0796; +DAC12_1CALDAT = 0x0798; +DAC12_IV = 0x079E; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************ +* MID +************************************************************/ +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6433.cmd b/msp430/msp430f6433.cmd new file mode 100644 index 00000000..3a130e22 --- /dev/null +++ b/msp430/msp430f6433.cmd @@ -0,0 +1,919 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6433.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* Port U +************************************************************/ +LDOKEYPID = 0x0900; +LDOKEYPID_L = 0x0900; +LDOKEYPID_H = 0x0901; +PUCTL = 0x0904; +PUCTL_L = 0x0904; +PUCTL_H = 0x0905; +LDOPWRCTL = 0x0908; +LDOPWRCTL_L = 0x0908; +LDOPWRCTL_H = 0x0909; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6435.cmd b/msp430/msp430f6435.cmd new file mode 100644 index 00000000..32190624 --- /dev/null +++ b/msp430/msp430f6435.cmd @@ -0,0 +1,919 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6435.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* Port U +************************************************************/ +LDOKEYPID = 0x0900; +LDOKEYPID_L = 0x0900; +LDOKEYPID_H = 0x0901; +PUCTL = 0x0904; +PUCTL_L = 0x0904; +PUCTL_H = 0x0905; +LDOPWRCTL = 0x0908; +LDOPWRCTL_L = 0x0908; +LDOPWRCTL_H = 0x0909; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6436.cmd b/msp430/msp430f6436.cmd new file mode 100644 index 00000000..c80f7e8c --- /dev/null +++ b/msp430/msp430f6436.cmd @@ -0,0 +1,933 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6436.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL0 = 0x0780; +DAC12_0CTL1 = 0x0782; +DAC12_0DAT = 0x0784; +DAC12_0CALCTL = 0x0786; +DAC12_0CALDAT = 0x0788; +DAC12_1CTL0 = 0x0790; +DAC12_1CTL1 = 0x0792; +DAC12_1DAT = 0x0794; +DAC12_1CALCTL = 0x0796; +DAC12_1CALDAT = 0x0798; +DAC12_IV = 0x079E; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* Port U +************************************************************/ +LDOKEYPID = 0x0900; +LDOKEYPID_L = 0x0900; +LDOKEYPID_H = 0x0901; +PUCTL = 0x0904; +PUCTL_L = 0x0904; +PUCTL_H = 0x0905; +LDOPWRCTL = 0x0908; +LDOPWRCTL_L = 0x0908; +LDOPWRCTL_H = 0x0909; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6438.cmd b/msp430/msp430f6438.cmd new file mode 100644 index 00000000..0c081b2d --- /dev/null +++ b/msp430/msp430f6438.cmd @@ -0,0 +1,933 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6438.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL0 = 0x0780; +DAC12_0CTL1 = 0x0782; +DAC12_0DAT = 0x0784; +DAC12_0CALCTL = 0x0786; +DAC12_0CALDAT = 0x0788; +DAC12_1CTL0 = 0x0790; +DAC12_1CTL1 = 0x0792; +DAC12_1DAT = 0x0794; +DAC12_1CALCTL = 0x0796; +DAC12_1CALDAT = 0x0798; +DAC12_IV = 0x079E; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* Port U +************************************************************/ +LDOKEYPID = 0x0900; +LDOKEYPID_L = 0x0900; +LDOKEYPID_H = 0x0901; +PUCTL = 0x0904; +PUCTL_L = 0x0904; +PUCTL_H = 0x0905; +LDOPWRCTL = 0x0908; +LDOPWRCTL_L = 0x0908; +LDOPWRCTL_H = 0x0909; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6458.cmd b/msp430/msp430f6458.cmd new file mode 100644 index 00000000..2e6af295 --- /dev/null +++ b/msp430/msp430f6458.cmd @@ -0,0 +1,979 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6458.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL0 = 0x0780; +DAC12_0CTL1 = 0x0782; +DAC12_0DAT = 0x0784; +DAC12_0CALCTL = 0x0786; +DAC12_0CALDAT = 0x0788; +DAC12_1CTL0 = 0x0790; +DAC12_1CTL1 = 0x0792; +DAC12_1DAT = 0x0794; +DAC12_1CALCTL = 0x0796; +DAC12_1CALDAT = 0x0798; +DAC12_IV = 0x079E; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************ +* MID +************************************************************/ +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* Port U +************************************************************/ +LDOKEYPID = 0x0900; +LDOKEYPID_L = 0x0900; +LDOKEYPID_H = 0x0901; +PUCTL = 0x0904; +PUCTL_L = 0x0904; +PUCTL_H = 0x0905; +LDOPWRCTL = 0x0908; +LDOPWRCTL_L = 0x0908; +LDOPWRCTL_H = 0x0909; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6459.cmd b/msp430/msp430f6459.cmd new file mode 100644 index 00000000..fc1a0e9b --- /dev/null +++ b/msp430/msp430f6459.cmd @@ -0,0 +1,979 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6459.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL0 = 0x0780; +DAC12_0CTL1 = 0x0782; +DAC12_0DAT = 0x0784; +DAC12_0CALCTL = 0x0786; +DAC12_0CALDAT = 0x0788; +DAC12_1CTL0 = 0x0790; +DAC12_1CTL1 = 0x0792; +DAC12_1DAT = 0x0794; +DAC12_1CALCTL = 0x0796; +DAC12_1CALDAT = 0x0798; +DAC12_IV = 0x079E; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************ +* MID +************************************************************/ +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* Port U +************************************************************/ +LDOKEYPID = 0x0900; +LDOKEYPID_L = 0x0900; +LDOKEYPID_H = 0x0901; +PUCTL = 0x0904; +PUCTL_L = 0x0904; +PUCTL_H = 0x0905; +LDOPWRCTL = 0x0908; +LDOPWRCTL_L = 0x0908; +LDOPWRCTL_H = 0x0909; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6630.cmd b/msp430/msp430f6630.cmd new file mode 100644 index 00000000..7f1117fa --- /dev/null +++ b/msp430/msp430f6630.cmd @@ -0,0 +1,959 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6630.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6631.cmd b/msp430/msp430f6631.cmd new file mode 100644 index 00000000..1e908101 --- /dev/null +++ b/msp430/msp430f6631.cmd @@ -0,0 +1,959 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6631.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6632.cmd b/msp430/msp430f6632.cmd new file mode 100644 index 00000000..415397ec --- /dev/null +++ b/msp430/msp430f6632.cmd @@ -0,0 +1,959 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6632.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6633.cmd b/msp430/msp430f6633.cmd new file mode 100644 index 00000000..475e4de5 --- /dev/null +++ b/msp430/msp430f6633.cmd @@ -0,0 +1,1044 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6633.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6634.cmd b/msp430/msp430f6634.cmd new file mode 100644 index 00000000..a3e494c6 --- /dev/null +++ b/msp430/msp430f6634.cmd @@ -0,0 +1,1044 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6634.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6635.cmd b/msp430/msp430f6635.cmd new file mode 100644 index 00000000..46729145 --- /dev/null +++ b/msp430/msp430f6635.cmd @@ -0,0 +1,1044 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6635.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6636.cmd b/msp430/msp430f6636.cmd new file mode 100644 index 00000000..2e749bbf --- /dev/null +++ b/msp430/msp430f6636.cmd @@ -0,0 +1,1058 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6636.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL0 = 0x0780; +DAC12_0CTL1 = 0x0782; +DAC12_0DAT = 0x0784; +DAC12_0CALCTL = 0x0786; +DAC12_0CALDAT = 0x0788; +DAC12_1CTL0 = 0x0790; +DAC12_1CTL1 = 0x0792; +DAC12_1DAT = 0x0794; +DAC12_1CALCTL = 0x0796; +DAC12_1CALDAT = 0x0798; +DAC12_IV = 0x079E; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6637.cmd b/msp430/msp430f6637.cmd new file mode 100644 index 00000000..4d48b403 --- /dev/null +++ b/msp430/msp430f6637.cmd @@ -0,0 +1,1058 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6637.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL0 = 0x0780; +DAC12_0CTL1 = 0x0782; +DAC12_0DAT = 0x0784; +DAC12_0CALCTL = 0x0786; +DAC12_0CALDAT = 0x0788; +DAC12_1CTL0 = 0x0790; +DAC12_1CTL1 = 0x0792; +DAC12_1DAT = 0x0794; +DAC12_1CALCTL = 0x0796; +DAC12_1CALDAT = 0x0798; +DAC12_IV = 0x079E; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6638.cmd b/msp430/msp430f6638.cmd new file mode 100644 index 00000000..f3cd1f75 --- /dev/null +++ b/msp430/msp430f6638.cmd @@ -0,0 +1,1058 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6638.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL0 = 0x0780; +DAC12_0CTL1 = 0x0782; +DAC12_0DAT = 0x0784; +DAC12_0CALCTL = 0x0786; +DAC12_0CALDAT = 0x0788; +DAC12_1CTL0 = 0x0790; +DAC12_1CTL1 = 0x0792; +DAC12_1DAT = 0x0794; +DAC12_1CALCTL = 0x0796; +DAC12_1CALDAT = 0x0798; +DAC12_IV = 0x079E; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6658.cmd b/msp430/msp430f6658.cmd new file mode 100644 index 00000000..1f842c34 --- /dev/null +++ b/msp430/msp430f6658.cmd @@ -0,0 +1,1104 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6658.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL0 = 0x0780; +DAC12_0CTL1 = 0x0782; +DAC12_0DAT = 0x0784; +DAC12_0CALCTL = 0x0786; +DAC12_0CALDAT = 0x0788; +DAC12_1CTL0 = 0x0790; +DAC12_1CTL1 = 0x0792; +DAC12_1DAT = 0x0794; +DAC12_1CALCTL = 0x0796; +DAC12_1CALDAT = 0x0798; +DAC12_IV = 0x079E; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************ +* MID +************************************************************/ +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6659.cmd b/msp430/msp430f6659.cmd new file mode 100644 index 00000000..0cb0e553 --- /dev/null +++ b/msp430/msp430f6659.cmd @@ -0,0 +1,1104 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6659.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL0 = 0x0780; +DAC12_0CTL1 = 0x0782; +DAC12_0DAT = 0x0784; +DAC12_0CALCTL = 0x0786; +DAC12_0CALDAT = 0x0788; +DAC12_1CTL0 = 0x0790; +DAC12_1CTL1 = 0x0792; +DAC12_1DAT = 0x0794; +DAC12_1CALCTL = 0x0796; +DAC12_1CALDAT = 0x0798; +DAC12_IV = 0x079E; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************ +* MID +************************************************************/ +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6720.cmd b/msp430/msp430f6720.cmd new file mode 100644 index 00000000..aec86e2b --- /dev/null +++ b/msp430/msp430f6720.cmd @@ -0,0 +1,989 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6720.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6720a.cmd b/msp430/msp430f6720a.cmd new file mode 100644 index 00000000..8b3af3bd --- /dev/null +++ b/msp430/msp430f6720a.cmd @@ -0,0 +1,971 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6720a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6721.cmd b/msp430/msp430f6721.cmd new file mode 100644 index 00000000..45ffdf98 --- /dev/null +++ b/msp430/msp430f6721.cmd @@ -0,0 +1,989 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6721.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6721a.cmd b/msp430/msp430f6721a.cmd new file mode 100644 index 00000000..49c0f56b --- /dev/null +++ b/msp430/msp430f6721a.cmd @@ -0,0 +1,971 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6721a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6723.cmd b/msp430/msp430f6723.cmd new file mode 100644 index 00000000..441d5d98 --- /dev/null +++ b/msp430/msp430f6723.cmd @@ -0,0 +1,989 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6723.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6723a.cmd b/msp430/msp430f6723a.cmd new file mode 100644 index 00000000..6cc1f004 --- /dev/null +++ b/msp430/msp430f6723a.cmd @@ -0,0 +1,971 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6723a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6724.cmd b/msp430/msp430f6724.cmd new file mode 100644 index 00000000..1f76e178 --- /dev/null +++ b/msp430/msp430f6724.cmd @@ -0,0 +1,989 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6724.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6724a.cmd b/msp430/msp430f6724a.cmd new file mode 100644 index 00000000..c1f60297 --- /dev/null +++ b/msp430/msp430f6724a.cmd @@ -0,0 +1,971 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6724a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6725.cmd b/msp430/msp430f6725.cmd new file mode 100644 index 00000000..5a74dd44 --- /dev/null +++ b/msp430/msp430f6725.cmd @@ -0,0 +1,989 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6725.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6725a.cmd b/msp430/msp430f6725a.cmd new file mode 100644 index 00000000..dc2f230f --- /dev/null +++ b/msp430/msp430f6725a.cmd @@ -0,0 +1,971 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6725a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6726.cmd b/msp430/msp430f6726.cmd new file mode 100644 index 00000000..2bb54fdb --- /dev/null +++ b/msp430/msp430f6726.cmd @@ -0,0 +1,989 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6726.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6726a.cmd b/msp430/msp430f6726a.cmd new file mode 100644 index 00000000..26658a68 --- /dev/null +++ b/msp430/msp430f6726a.cmd @@ -0,0 +1,971 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6726a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6730.cmd b/msp430/msp430f6730.cmd new file mode 100644 index 00000000..8584f555 --- /dev/null +++ b/msp430/msp430f6730.cmd @@ -0,0 +1,989 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6730.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6730a.cmd b/msp430/msp430f6730a.cmd new file mode 100644 index 00000000..a0ccf2f2 --- /dev/null +++ b/msp430/msp430f6730a.cmd @@ -0,0 +1,989 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6730a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6731.cmd b/msp430/msp430f6731.cmd new file mode 100644 index 00000000..37060092 --- /dev/null +++ b/msp430/msp430f6731.cmd @@ -0,0 +1,989 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6731.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6731a.cmd b/msp430/msp430f6731a.cmd new file mode 100644 index 00000000..680cde79 --- /dev/null +++ b/msp430/msp430f6731a.cmd @@ -0,0 +1,989 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6731a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6733.cmd b/msp430/msp430f6733.cmd new file mode 100644 index 00000000..98ff3920 --- /dev/null +++ b/msp430/msp430f6733.cmd @@ -0,0 +1,989 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6733.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6733a.cmd b/msp430/msp430f6733a.cmd new file mode 100644 index 00000000..e216365a --- /dev/null +++ b/msp430/msp430f6733a.cmd @@ -0,0 +1,989 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6733a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6734.cmd b/msp430/msp430f6734.cmd new file mode 100644 index 00000000..07caf092 --- /dev/null +++ b/msp430/msp430f6734.cmd @@ -0,0 +1,989 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6734.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6734a.cmd b/msp430/msp430f6734a.cmd new file mode 100644 index 00000000..3acf3c0a --- /dev/null +++ b/msp430/msp430f6734a.cmd @@ -0,0 +1,989 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6734a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6735.cmd b/msp430/msp430f6735.cmd new file mode 100644 index 00000000..86b1277b --- /dev/null +++ b/msp430/msp430f6735.cmd @@ -0,0 +1,989 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6735.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6735a.cmd b/msp430/msp430f6735a.cmd new file mode 100644 index 00000000..dba75a96 --- /dev/null +++ b/msp430/msp430f6735a.cmd @@ -0,0 +1,989 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6735a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6736.cmd b/msp430/msp430f6736.cmd new file mode 100644 index 00000000..2bae256b --- /dev/null +++ b/msp430/msp430f6736.cmd @@ -0,0 +1,989 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6736.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6736a.cmd b/msp430/msp430f6736a.cmd new file mode 100644 index 00000000..1879c0f9 --- /dev/null +++ b/msp430/msp430f6736a.cmd @@ -0,0 +1,989 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6736a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6745.cmd b/msp430/msp430f6745.cmd new file mode 100644 index 00000000..678f2fcb --- /dev/null +++ b/msp430/msp430f6745.cmd @@ -0,0 +1,1181 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6745.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67451.cmd b/msp430/msp430f67451.cmd new file mode 100644 index 00000000..07d8e76c --- /dev/null +++ b/msp430/msp430f67451.cmd @@ -0,0 +1,1163 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67451.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67451a.cmd b/msp430/msp430f67451a.cmd new file mode 100644 index 00000000..c9537e72 --- /dev/null +++ b/msp430/msp430f67451a.cmd @@ -0,0 +1,1163 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67451a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6745a.cmd b/msp430/msp430f6745a.cmd new file mode 100644 index 00000000..b047811b --- /dev/null +++ b/msp430/msp430f6745a.cmd @@ -0,0 +1,1181 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6745a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6746.cmd b/msp430/msp430f6746.cmd new file mode 100644 index 00000000..e054a88e --- /dev/null +++ b/msp430/msp430f6746.cmd @@ -0,0 +1,1181 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6746.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67461.cmd b/msp430/msp430f67461.cmd new file mode 100644 index 00000000..21ab25f5 --- /dev/null +++ b/msp430/msp430f67461.cmd @@ -0,0 +1,1163 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67461.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67461a.cmd b/msp430/msp430f67461a.cmd new file mode 100644 index 00000000..ee13bb64 --- /dev/null +++ b/msp430/msp430f67461a.cmd @@ -0,0 +1,1163 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67461a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6746a.cmd b/msp430/msp430f6746a.cmd new file mode 100644 index 00000000..a4f0f0fa --- /dev/null +++ b/msp430/msp430f6746a.cmd @@ -0,0 +1,1181 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6746a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6747.cmd b/msp430/msp430f6747.cmd new file mode 100644 index 00000000..627fe696 --- /dev/null +++ b/msp430/msp430f6747.cmd @@ -0,0 +1,1181 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6747.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67471.cmd b/msp430/msp430f67471.cmd new file mode 100644 index 00000000..07b70960 --- /dev/null +++ b/msp430/msp430f67471.cmd @@ -0,0 +1,1163 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67471.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67471a.cmd b/msp430/msp430f67471a.cmd new file mode 100644 index 00000000..0d462c5a --- /dev/null +++ b/msp430/msp430f67471a.cmd @@ -0,0 +1,1163 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67471a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6747a.cmd b/msp430/msp430f6747a.cmd new file mode 100644 index 00000000..c0b5a3f2 --- /dev/null +++ b/msp430/msp430f6747a.cmd @@ -0,0 +1,1181 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6747a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6748.cmd b/msp430/msp430f6748.cmd new file mode 100644 index 00000000..78a8da6b --- /dev/null +++ b/msp430/msp430f6748.cmd @@ -0,0 +1,1181 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6748.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67481.cmd b/msp430/msp430f67481.cmd new file mode 100644 index 00000000..27b65755 --- /dev/null +++ b/msp430/msp430f67481.cmd @@ -0,0 +1,1163 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67481.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67481a.cmd b/msp430/msp430f67481a.cmd new file mode 100644 index 00000000..bea781d4 --- /dev/null +++ b/msp430/msp430f67481a.cmd @@ -0,0 +1,1163 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67481a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6748a.cmd b/msp430/msp430f6748a.cmd new file mode 100644 index 00000000..486ffe82 --- /dev/null +++ b/msp430/msp430f6748a.cmd @@ -0,0 +1,1181 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6748a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6749.cmd b/msp430/msp430f6749.cmd new file mode 100644 index 00000000..ca3df0aa --- /dev/null +++ b/msp430/msp430f6749.cmd @@ -0,0 +1,1181 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6749.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67491.cmd b/msp430/msp430f67491.cmd new file mode 100644 index 00000000..79d1a3b7 --- /dev/null +++ b/msp430/msp430f67491.cmd @@ -0,0 +1,1163 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67491.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67491a.cmd b/msp430/msp430f67491a.cmd new file mode 100644 index 00000000..b51f8e9c --- /dev/null +++ b/msp430/msp430f67491a.cmd @@ -0,0 +1,1163 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67491a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6749a.cmd b/msp430/msp430f6749a.cmd new file mode 100644 index 00000000..4c5263e8 --- /dev/null +++ b/msp430/msp430f6749a.cmd @@ -0,0 +1,1181 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6749a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67621.cmd b/msp430/msp430f67621.cmd new file mode 100644 index 00000000..f726c0ef --- /dev/null +++ b/msp430/msp430f67621.cmd @@ -0,0 +1,998 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67621.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67621a.cmd b/msp430/msp430f67621a.cmd new file mode 100644 index 00000000..b14f4f43 --- /dev/null +++ b/msp430/msp430f67621a.cmd @@ -0,0 +1,998 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67621a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67641.cmd b/msp430/msp430f67641.cmd new file mode 100644 index 00000000..033c631e --- /dev/null +++ b/msp430/msp430f67641.cmd @@ -0,0 +1,998 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67641.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67641a.cmd b/msp430/msp430f67641a.cmd new file mode 100644 index 00000000..3dd03395 --- /dev/null +++ b/msp430/msp430f67641a.cmd @@ -0,0 +1,998 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67641a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6765.cmd b/msp430/msp430f6765.cmd new file mode 100644 index 00000000..b42be13d --- /dev/null +++ b/msp430/msp430f6765.cmd @@ -0,0 +1,1217 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6765.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67651.cmd b/msp430/msp430f67651.cmd new file mode 100644 index 00000000..d0d89e0d --- /dev/null +++ b/msp430/msp430f67651.cmd @@ -0,0 +1,1199 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67651.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67651a.cmd b/msp430/msp430f67651a.cmd new file mode 100644 index 00000000..e853f42b --- /dev/null +++ b/msp430/msp430f67651a.cmd @@ -0,0 +1,1199 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67651a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6765a.cmd b/msp430/msp430f6765a.cmd new file mode 100644 index 00000000..a2064167 --- /dev/null +++ b/msp430/msp430f6765a.cmd @@ -0,0 +1,1217 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6765a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6766.cmd b/msp430/msp430f6766.cmd new file mode 100644 index 00000000..60515a33 --- /dev/null +++ b/msp430/msp430f6766.cmd @@ -0,0 +1,1217 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6766.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67661.cmd b/msp430/msp430f67661.cmd new file mode 100644 index 00000000..3a706b8c --- /dev/null +++ b/msp430/msp430f67661.cmd @@ -0,0 +1,1199 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67661.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67661a.cmd b/msp430/msp430f67661a.cmd new file mode 100644 index 00000000..7098bce0 --- /dev/null +++ b/msp430/msp430f67661a.cmd @@ -0,0 +1,1199 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67661a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6766a.cmd b/msp430/msp430f6766a.cmd new file mode 100644 index 00000000..155e26e0 --- /dev/null +++ b/msp430/msp430f6766a.cmd @@ -0,0 +1,1217 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6766a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6767.cmd b/msp430/msp430f6767.cmd new file mode 100644 index 00000000..ca143d31 --- /dev/null +++ b/msp430/msp430f6767.cmd @@ -0,0 +1,1217 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6767.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67671.cmd b/msp430/msp430f67671.cmd new file mode 100644 index 00000000..46075dd1 --- /dev/null +++ b/msp430/msp430f67671.cmd @@ -0,0 +1,1199 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67671.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67671a.cmd b/msp430/msp430f67671a.cmd new file mode 100644 index 00000000..d996b60d --- /dev/null +++ b/msp430/msp430f67671a.cmd @@ -0,0 +1,1199 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67671a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6767a.cmd b/msp430/msp430f6767a.cmd new file mode 100644 index 00000000..80400719 --- /dev/null +++ b/msp430/msp430f6767a.cmd @@ -0,0 +1,1217 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6767a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6768.cmd b/msp430/msp430f6768.cmd new file mode 100644 index 00000000..c2b7334a --- /dev/null +++ b/msp430/msp430f6768.cmd @@ -0,0 +1,1217 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6768.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67681.cmd b/msp430/msp430f67681.cmd new file mode 100644 index 00000000..8d1f4624 --- /dev/null +++ b/msp430/msp430f67681.cmd @@ -0,0 +1,1199 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67681.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67681a.cmd b/msp430/msp430f67681a.cmd new file mode 100644 index 00000000..47dd1ce5 --- /dev/null +++ b/msp430/msp430f67681a.cmd @@ -0,0 +1,1199 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67681a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6768a.cmd b/msp430/msp430f6768a.cmd new file mode 100644 index 00000000..ef53374d --- /dev/null +++ b/msp430/msp430f6768a.cmd @@ -0,0 +1,1217 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6768a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6769.cmd b/msp430/msp430f6769.cmd new file mode 100644 index 00000000..62507ea0 --- /dev/null +++ b/msp430/msp430f6769.cmd @@ -0,0 +1,1217 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6769.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67691.cmd b/msp430/msp430f67691.cmd new file mode 100644 index 00000000..8c9743e5 --- /dev/null +++ b/msp430/msp430f67691.cmd @@ -0,0 +1,1199 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67691.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67691a.cmd b/msp430/msp430f67691a.cmd new file mode 100644 index 00000000..965f32f4 --- /dev/null +++ b/msp430/msp430f67691a.cmd @@ -0,0 +1,1199 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67691a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6769a.cmd b/msp430/msp430f6769a.cmd new file mode 100644 index 00000000..cf1dd748 --- /dev/null +++ b/msp430/msp430f6769a.cmd @@ -0,0 +1,1217 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6769a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6775.cmd b/msp430/msp430f6775.cmd new file mode 100644 index 00000000..bb4f3ffa --- /dev/null +++ b/msp430/msp430f6775.cmd @@ -0,0 +1,1235 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6775.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BCCTL6 = 0x0840; +SD24BCCTL6_L = 0x0840; +SD24BCCTL6_H = 0x0841; +SD24BINCTL6 = 0x0842; +SD24BINCTL6_L = 0x0842; +SD24BINCTL6_H = 0x0843; +SD24BOSR6 = 0x0844; +SD24BOSR6_L = 0x0844; +SD24BOSR6_H = 0x0845; +SD24BPRE6 = 0x0846; +SD24BPRE6_L = 0x0846; +SD24BPRE6_H = 0x0847; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +SD24BMEML6 = 0x0868; +SD24BMEML6_L = 0x0868; +SD24BMEML6_H = 0x0869; +SD24BMEMH6 = 0x086A; +SD24BMEMH6_L = 0x086A; +SD24BMEMH6_H = 0x086B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67751.cmd b/msp430/msp430f67751.cmd new file mode 100644 index 00000000..d9633f84 --- /dev/null +++ b/msp430/msp430f67751.cmd @@ -0,0 +1,1217 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67751.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BCCTL6 = 0x0840; +SD24BCCTL6_L = 0x0840; +SD24BCCTL6_H = 0x0841; +SD24BINCTL6 = 0x0842; +SD24BINCTL6_L = 0x0842; +SD24BINCTL6_H = 0x0843; +SD24BOSR6 = 0x0844; +SD24BOSR6_L = 0x0844; +SD24BOSR6_H = 0x0845; +SD24BPRE6 = 0x0846; +SD24BPRE6_L = 0x0846; +SD24BPRE6_H = 0x0847; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +SD24BMEML6 = 0x0868; +SD24BMEML6_L = 0x0868; +SD24BMEML6_H = 0x0869; +SD24BMEMH6 = 0x086A; +SD24BMEMH6_L = 0x086A; +SD24BMEMH6_H = 0x086B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67751a.cmd b/msp430/msp430f67751a.cmd new file mode 100644 index 00000000..bcf4ae6a --- /dev/null +++ b/msp430/msp430f67751a.cmd @@ -0,0 +1,1217 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67751a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BCCTL6 = 0x0840; +SD24BCCTL6_L = 0x0840; +SD24BCCTL6_H = 0x0841; +SD24BINCTL6 = 0x0842; +SD24BINCTL6_L = 0x0842; +SD24BINCTL6_H = 0x0843; +SD24BOSR6 = 0x0844; +SD24BOSR6_L = 0x0844; +SD24BOSR6_H = 0x0845; +SD24BPRE6 = 0x0846; +SD24BPRE6_L = 0x0846; +SD24BPRE6_H = 0x0847; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +SD24BMEML6 = 0x0868; +SD24BMEML6_L = 0x0868; +SD24BMEML6_H = 0x0869; +SD24BMEMH6 = 0x086A; +SD24BMEMH6_L = 0x086A; +SD24BMEMH6_H = 0x086B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6775a.cmd b/msp430/msp430f6775a.cmd new file mode 100644 index 00000000..9fa64146 --- /dev/null +++ b/msp430/msp430f6775a.cmd @@ -0,0 +1,1235 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6775a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BCCTL6 = 0x0840; +SD24BCCTL6_L = 0x0840; +SD24BCCTL6_H = 0x0841; +SD24BINCTL6 = 0x0842; +SD24BINCTL6_L = 0x0842; +SD24BINCTL6_H = 0x0843; +SD24BOSR6 = 0x0844; +SD24BOSR6_L = 0x0844; +SD24BOSR6_H = 0x0845; +SD24BPRE6 = 0x0846; +SD24BPRE6_L = 0x0846; +SD24BPRE6_H = 0x0847; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +SD24BMEML6 = 0x0868; +SD24BMEML6_L = 0x0868; +SD24BMEML6_H = 0x0869; +SD24BMEMH6 = 0x086A; +SD24BMEMH6_L = 0x086A; +SD24BMEMH6_H = 0x086B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6776.cmd b/msp430/msp430f6776.cmd new file mode 100644 index 00000000..20966c85 --- /dev/null +++ b/msp430/msp430f6776.cmd @@ -0,0 +1,1235 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6776.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BCCTL6 = 0x0840; +SD24BCCTL6_L = 0x0840; +SD24BCCTL6_H = 0x0841; +SD24BINCTL6 = 0x0842; +SD24BINCTL6_L = 0x0842; +SD24BINCTL6_H = 0x0843; +SD24BOSR6 = 0x0844; +SD24BOSR6_L = 0x0844; +SD24BOSR6_H = 0x0845; +SD24BPRE6 = 0x0846; +SD24BPRE6_L = 0x0846; +SD24BPRE6_H = 0x0847; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +SD24BMEML6 = 0x0868; +SD24BMEML6_L = 0x0868; +SD24BMEML6_H = 0x0869; +SD24BMEMH6 = 0x086A; +SD24BMEMH6_L = 0x086A; +SD24BMEMH6_H = 0x086B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67761.cmd b/msp430/msp430f67761.cmd new file mode 100644 index 00000000..832b1cb2 --- /dev/null +++ b/msp430/msp430f67761.cmd @@ -0,0 +1,1217 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67761.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BCCTL6 = 0x0840; +SD24BCCTL6_L = 0x0840; +SD24BCCTL6_H = 0x0841; +SD24BINCTL6 = 0x0842; +SD24BINCTL6_L = 0x0842; +SD24BINCTL6_H = 0x0843; +SD24BOSR6 = 0x0844; +SD24BOSR6_L = 0x0844; +SD24BOSR6_H = 0x0845; +SD24BPRE6 = 0x0846; +SD24BPRE6_L = 0x0846; +SD24BPRE6_H = 0x0847; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +SD24BMEML6 = 0x0868; +SD24BMEML6_L = 0x0868; +SD24BMEML6_H = 0x0869; +SD24BMEMH6 = 0x086A; +SD24BMEMH6_L = 0x086A; +SD24BMEMH6_H = 0x086B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67761a.cmd b/msp430/msp430f67761a.cmd new file mode 100644 index 00000000..d3917753 --- /dev/null +++ b/msp430/msp430f67761a.cmd @@ -0,0 +1,1217 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67761a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BCCTL6 = 0x0840; +SD24BCCTL6_L = 0x0840; +SD24BCCTL6_H = 0x0841; +SD24BINCTL6 = 0x0842; +SD24BINCTL6_L = 0x0842; +SD24BINCTL6_H = 0x0843; +SD24BOSR6 = 0x0844; +SD24BOSR6_L = 0x0844; +SD24BOSR6_H = 0x0845; +SD24BPRE6 = 0x0846; +SD24BPRE6_L = 0x0846; +SD24BPRE6_H = 0x0847; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +SD24BMEML6 = 0x0868; +SD24BMEML6_L = 0x0868; +SD24BMEML6_H = 0x0869; +SD24BMEMH6 = 0x086A; +SD24BMEMH6_L = 0x086A; +SD24BMEMH6_H = 0x086B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6776a.cmd b/msp430/msp430f6776a.cmd new file mode 100644 index 00000000..06c142a0 --- /dev/null +++ b/msp430/msp430f6776a.cmd @@ -0,0 +1,1235 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6776a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BCCTL6 = 0x0840; +SD24BCCTL6_L = 0x0840; +SD24BCCTL6_H = 0x0841; +SD24BINCTL6 = 0x0842; +SD24BINCTL6_L = 0x0842; +SD24BINCTL6_H = 0x0843; +SD24BOSR6 = 0x0844; +SD24BOSR6_L = 0x0844; +SD24BOSR6_H = 0x0845; +SD24BPRE6 = 0x0846; +SD24BPRE6_L = 0x0846; +SD24BPRE6_H = 0x0847; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +SD24BMEML6 = 0x0868; +SD24BMEML6_L = 0x0868; +SD24BMEML6_H = 0x0869; +SD24BMEMH6 = 0x086A; +SD24BMEMH6_L = 0x086A; +SD24BMEMH6_H = 0x086B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6777.cmd b/msp430/msp430f6777.cmd new file mode 100644 index 00000000..43858ab6 --- /dev/null +++ b/msp430/msp430f6777.cmd @@ -0,0 +1,1235 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6777.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BCCTL6 = 0x0840; +SD24BCCTL6_L = 0x0840; +SD24BCCTL6_H = 0x0841; +SD24BINCTL6 = 0x0842; +SD24BINCTL6_L = 0x0842; +SD24BINCTL6_H = 0x0843; +SD24BOSR6 = 0x0844; +SD24BOSR6_L = 0x0844; +SD24BOSR6_H = 0x0845; +SD24BPRE6 = 0x0846; +SD24BPRE6_L = 0x0846; +SD24BPRE6_H = 0x0847; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +SD24BMEML6 = 0x0868; +SD24BMEML6_L = 0x0868; +SD24BMEML6_H = 0x0869; +SD24BMEMH6 = 0x086A; +SD24BMEMH6_L = 0x086A; +SD24BMEMH6_H = 0x086B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67771.cmd b/msp430/msp430f67771.cmd new file mode 100644 index 00000000..43c9b071 --- /dev/null +++ b/msp430/msp430f67771.cmd @@ -0,0 +1,1217 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67771.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BCCTL6 = 0x0840; +SD24BCCTL6_L = 0x0840; +SD24BCCTL6_H = 0x0841; +SD24BINCTL6 = 0x0842; +SD24BINCTL6_L = 0x0842; +SD24BINCTL6_H = 0x0843; +SD24BOSR6 = 0x0844; +SD24BOSR6_L = 0x0844; +SD24BOSR6_H = 0x0845; +SD24BPRE6 = 0x0846; +SD24BPRE6_L = 0x0846; +SD24BPRE6_H = 0x0847; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +SD24BMEML6 = 0x0868; +SD24BMEML6_L = 0x0868; +SD24BMEML6_H = 0x0869; +SD24BMEMH6 = 0x086A; +SD24BMEMH6_L = 0x086A; +SD24BMEMH6_H = 0x086B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67771a.cmd b/msp430/msp430f67771a.cmd new file mode 100644 index 00000000..f125e0ce --- /dev/null +++ b/msp430/msp430f67771a.cmd @@ -0,0 +1,1217 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67771a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BCCTL6 = 0x0840; +SD24BCCTL6_L = 0x0840; +SD24BCCTL6_H = 0x0841; +SD24BINCTL6 = 0x0842; +SD24BINCTL6_L = 0x0842; +SD24BINCTL6_H = 0x0843; +SD24BOSR6 = 0x0844; +SD24BOSR6_L = 0x0844; +SD24BOSR6_H = 0x0845; +SD24BPRE6 = 0x0846; +SD24BPRE6_L = 0x0846; +SD24BPRE6_H = 0x0847; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +SD24BMEML6 = 0x0868; +SD24BMEML6_L = 0x0868; +SD24BMEML6_H = 0x0869; +SD24BMEMH6 = 0x086A; +SD24BMEMH6_L = 0x086A; +SD24BMEMH6_H = 0x086B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6777a.cmd b/msp430/msp430f6777a.cmd new file mode 100644 index 00000000..0b7347df --- /dev/null +++ b/msp430/msp430f6777a.cmd @@ -0,0 +1,1235 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6777a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BCCTL6 = 0x0840; +SD24BCCTL6_L = 0x0840; +SD24BCCTL6_H = 0x0841; +SD24BINCTL6 = 0x0842; +SD24BINCTL6_L = 0x0842; +SD24BINCTL6_H = 0x0843; +SD24BOSR6 = 0x0844; +SD24BOSR6_L = 0x0844; +SD24BOSR6_H = 0x0845; +SD24BPRE6 = 0x0846; +SD24BPRE6_L = 0x0846; +SD24BPRE6_H = 0x0847; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +SD24BMEML6 = 0x0868; +SD24BMEML6_L = 0x0868; +SD24BMEML6_H = 0x0869; +SD24BMEMH6 = 0x086A; +SD24BMEMH6_L = 0x086A; +SD24BMEMH6_H = 0x086B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6778.cmd b/msp430/msp430f6778.cmd new file mode 100644 index 00000000..cdeee474 --- /dev/null +++ b/msp430/msp430f6778.cmd @@ -0,0 +1,1235 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6778.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BCCTL6 = 0x0840; +SD24BCCTL6_L = 0x0840; +SD24BCCTL6_H = 0x0841; +SD24BINCTL6 = 0x0842; +SD24BINCTL6_L = 0x0842; +SD24BINCTL6_H = 0x0843; +SD24BOSR6 = 0x0844; +SD24BOSR6_L = 0x0844; +SD24BOSR6_H = 0x0845; +SD24BPRE6 = 0x0846; +SD24BPRE6_L = 0x0846; +SD24BPRE6_H = 0x0847; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +SD24BMEML6 = 0x0868; +SD24BMEML6_L = 0x0868; +SD24BMEML6_H = 0x0869; +SD24BMEMH6 = 0x086A; +SD24BMEMH6_L = 0x086A; +SD24BMEMH6_H = 0x086B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67781.cmd b/msp430/msp430f67781.cmd new file mode 100644 index 00000000..4e4fc874 --- /dev/null +++ b/msp430/msp430f67781.cmd @@ -0,0 +1,1217 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67781.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BCCTL6 = 0x0840; +SD24BCCTL6_L = 0x0840; +SD24BCCTL6_H = 0x0841; +SD24BINCTL6 = 0x0842; +SD24BINCTL6_L = 0x0842; +SD24BINCTL6_H = 0x0843; +SD24BOSR6 = 0x0844; +SD24BOSR6_L = 0x0844; +SD24BOSR6_H = 0x0845; +SD24BPRE6 = 0x0846; +SD24BPRE6_L = 0x0846; +SD24BPRE6_H = 0x0847; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +SD24BMEML6 = 0x0868; +SD24BMEML6_L = 0x0868; +SD24BMEML6_H = 0x0869; +SD24BMEMH6 = 0x086A; +SD24BMEMH6_L = 0x086A; +SD24BMEMH6_H = 0x086B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67781a.cmd b/msp430/msp430f67781a.cmd new file mode 100644 index 00000000..cf76c7cb --- /dev/null +++ b/msp430/msp430f67781a.cmd @@ -0,0 +1,1217 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67781a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BCCTL6 = 0x0840; +SD24BCCTL6_L = 0x0840; +SD24BCCTL6_H = 0x0841; +SD24BINCTL6 = 0x0842; +SD24BINCTL6_L = 0x0842; +SD24BINCTL6_H = 0x0843; +SD24BOSR6 = 0x0844; +SD24BOSR6_L = 0x0844; +SD24BOSR6_H = 0x0845; +SD24BPRE6 = 0x0846; +SD24BPRE6_L = 0x0846; +SD24BPRE6_H = 0x0847; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +SD24BMEML6 = 0x0868; +SD24BMEML6_L = 0x0868; +SD24BMEML6_H = 0x0869; +SD24BMEMH6 = 0x086A; +SD24BMEMH6_L = 0x086A; +SD24BMEMH6_H = 0x086B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6778a.cmd b/msp430/msp430f6778a.cmd new file mode 100644 index 00000000..ae137d83 --- /dev/null +++ b/msp430/msp430f6778a.cmd @@ -0,0 +1,1235 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6778a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BCCTL6 = 0x0840; +SD24BCCTL6_L = 0x0840; +SD24BCCTL6_H = 0x0841; +SD24BINCTL6 = 0x0842; +SD24BINCTL6_L = 0x0842; +SD24BINCTL6_H = 0x0843; +SD24BOSR6 = 0x0844; +SD24BOSR6_L = 0x0844; +SD24BOSR6_H = 0x0845; +SD24BPRE6 = 0x0846; +SD24BPRE6_L = 0x0846; +SD24BPRE6_H = 0x0847; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +SD24BMEML6 = 0x0868; +SD24BMEML6_L = 0x0868; +SD24BMEML6_H = 0x0869; +SD24BMEMH6 = 0x086A; +SD24BMEMH6_L = 0x086A; +SD24BMEMH6_H = 0x086B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6779.cmd b/msp430/msp430f6779.cmd new file mode 100644 index 00000000..f95194a0 --- /dev/null +++ b/msp430/msp430f6779.cmd @@ -0,0 +1,1235 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6779.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BCCTL6 = 0x0840; +SD24BCCTL6_L = 0x0840; +SD24BCCTL6_H = 0x0841; +SD24BINCTL6 = 0x0842; +SD24BINCTL6_L = 0x0842; +SD24BINCTL6_H = 0x0843; +SD24BOSR6 = 0x0844; +SD24BOSR6_L = 0x0844; +SD24BOSR6_H = 0x0845; +SD24BPRE6 = 0x0846; +SD24BPRE6_L = 0x0846; +SD24BPRE6_H = 0x0847; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +SD24BMEML6 = 0x0868; +SD24BMEML6_L = 0x0868; +SD24BMEML6_H = 0x0869; +SD24BMEMH6 = 0x086A; +SD24BMEMH6_L = 0x086A; +SD24BMEMH6_H = 0x086B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67791.cmd b/msp430/msp430f67791.cmd new file mode 100644 index 00000000..a0c0e277 --- /dev/null +++ b/msp430/msp430f67791.cmd @@ -0,0 +1,1217 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67791.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BCCTL6 = 0x0840; +SD24BCCTL6_L = 0x0840; +SD24BCCTL6_H = 0x0841; +SD24BINCTL6 = 0x0842; +SD24BINCTL6_L = 0x0842; +SD24BINCTL6_H = 0x0843; +SD24BOSR6 = 0x0844; +SD24BOSR6_L = 0x0844; +SD24BOSR6_H = 0x0845; +SD24BPRE6 = 0x0846; +SD24BPRE6_L = 0x0846; +SD24BPRE6_H = 0x0847; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +SD24BMEML6 = 0x0868; +SD24BMEML6_L = 0x0868; +SD24BMEML6_H = 0x0869; +SD24BMEMH6 = 0x086A; +SD24BMEMH6_L = 0x086A; +SD24BMEMH6_H = 0x086B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f67791a.cmd b/msp430/msp430f67791a.cmd new file mode 100644 index 00000000..7bcd48c6 --- /dev/null +++ b/msp430/msp430f67791a.cmd @@ -0,0 +1,1217 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f67791a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BCCTL6 = 0x0840; +SD24BCCTL6_L = 0x0840; +SD24BCCTL6_H = 0x0841; +SD24BINCTL6 = 0x0842; +SD24BINCTL6_L = 0x0842; +SD24BINCTL6_H = 0x0843; +SD24BOSR6 = 0x0844; +SD24BOSR6_L = 0x0844; +SD24BOSR6_H = 0x0845; +SD24BPRE6 = 0x0846; +SD24BPRE6_L = 0x0846; +SD24BPRE6_H = 0x0847; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +SD24BMEML6 = 0x0868; +SD24BMEML6_L = 0x0868; +SD24BMEML6_H = 0x0869; +SD24BMEMH6 = 0x086A; +SD24BMEMH6_L = 0x086A; +SD24BMEMH6_H = 0x086B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430f6779a.cmd b/msp430/msp430f6779a.cmd new file mode 100644 index 00000000..8e4064f2 --- /dev/null +++ b/msp430/msp430f6779a.cmd @@ -0,0 +1,1235 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f6779a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* AES Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +/************************************************************ +* Auxilary Supply +************************************************************/ +AUXCTL0 = 0x09E0; +AUXCTL0_L = 0x09E0; +AUXCTL0_H = 0x09E1; +AUXCTL1 = 0x09E2; +AUXCTL1_L = 0x09E2; +AUXCTL1_H = 0x09E3; +AUXCTL2 = 0x09E4; +AUXCTL2_L = 0x09E4; +AUXCTL2_H = 0x09E5; +AUX2CHCTL = 0x09F2; +AUX2CHCTL_L = 0x09F2; +AUX2CHCTL_H = 0x09F3; +AUX3CHCTL = 0x09F4; +AUX3CHCTL_L = 0x09F4; +AUX3CHCTL_H = 0x09F5; +AUXADCCTL = 0x09F6; +AUXADCCTL_L = 0x09F6; +AUXADCCTL_H = 0x09F7; +AUXIFG = 0x09FA; +AUXIFG_L = 0x09FA; +AUXIFG_H = 0x09FB; +AUXIE = 0x09FC; +AUXIE_L = 0x09FC; +AUXIE_H = 0x09FD; +AUXIV = 0x09FE; +AUXIV_L = 0x09FE; +AUXIV_H = 0x09FF; +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL0 = 0x02AA; +PFSEL0_L = 0x02AA; +PFSEL0_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x0C80; +RTCCTL0_L = 0x0C80; +RTCCTL0_H = 0x0C81; +RTCCTL13 = 0x0C82; +RTCCTL13_L = 0x0C82; +RTCCTL13_H = 0x0C83; +RTCOCAL = 0x0C84; +RTCOCAL_L = 0x0C84; +RTCOCAL_H = 0x0C85; +RTCTCMP = 0x0C86; +RTCTCMP_L = 0x0C86; +RTCTCMP_H = 0x0C87; +RTCPS0CTL = 0x0C88; +RTCPS0CTL_L = 0x0C88; +RTCPS0CTL_H = 0x0C89; +RTCPS1CTL = 0x0C8A; +RTCPS1CTL_L = 0x0C8A; +RTCPS1CTL_H = 0x0C8B; +RTCPS = 0x0C8C; +RTCPS_L = 0x0C8C; +RTCPS_H = 0x0C8D; +RTCIV = 0x0C8E; +RTCTIM0 = 0x0C90; +RTCTIM0_L = 0x0C90; +RTCTIM0_H = 0x0C91; +RTCTIM1 = 0x0C92; +RTCTIM1_L = 0x0C92; +RTCTIM1_H = 0x0C93; +RTCDATE = 0x0C94; +RTCDATE_L = 0x0C94; +RTCDATE_H = 0x0C95; +RTCYEAR = 0x0C96; +RTCYEAR_L = 0x0C96; +RTCYEAR_H = 0x0C97; +RTCAMINHR = 0x0C98; +RTCAMINHR_L = 0x0C98; +RTCAMINHR_H = 0x0C99; +RTCADOWDAY = 0x0C9A; +RTCADOWDAY_L = 0x0C9A; +RTCADOWDAY_H = 0x0C9B; +BIN2BCD = 0x0C9C; +BCD2BIN = 0x0C9E; +RTCTCCTL0 = 0x0CA0; +RTCTCCTL1 = 0x0CA1; +RTCCAP0CTL = 0x0CA2; +RTCCAP1CTL = 0x0CA3; +RTCSECBAK0 = 0x0CB0; +RTCMINBAK0 = 0x0CB1; +RTCHOURBAK0 = 0x0CB2; +RTCDAYBAK0 = 0x0CB3; +RTCMONBAK0 = 0x0CB4; +RTCYEARBAK0 = 0x0CB6; +RTCSECBAK1 = 0x0CB8; +RTCMINBAK1 = 0x0CB9; +RTCHOURBAK1 = 0x0CBA; +RTCDAYBAK1 = 0x0CBB; +RTCMONBAK1 = 0x0CBC; +RTCYEARBAK1 = 0x0CBE; +/************************************************************ +* SD24_B - Sigma Delta 24 Bit +************************************************************/ +SD24BCTL0 = 0x0800; +SD24BCTL0_L = 0x0800; +SD24BCTL0_H = 0x0801; +SD24BCTL1 = 0x0802; +SD24BCTL1_L = 0x0802; +SD24BCTL1_H = 0x0803; +SD24BTRGCTL = 0x0804; +SD24BTRGCTL_L = 0x0804; +SD24BTRGCTL_H = 0x0805; +SD24BTRGOSR = 0x0806; +SD24BTRGOSR_L = 0x0806; +SD24BTRGOSR_H = 0x0807; +SD24BTRGPRE = 0x0808; +SD24BTRGPRE_L = 0x0808; +SD24BTRGPRE_H = 0x0809; +SD24BIFG = 0x080A; +SD24BIFG_L = 0x080A; +SD24BIFG_H = 0x080B; +SD24BIE = 0x080C; +SD24BIE_L = 0x080C; +SD24BIE_H = 0x080D; +SD24BIV = 0x080E; +SD24BIV_L = 0x080E; +SD24BIV_H = 0x080F; +SD24BCCTL0 = 0x0810; +SD24BCCTL0_L = 0x0810; +SD24BCCTL0_H = 0x0811; +SD24BINCTL0 = 0x0812; +SD24BINCTL0_L = 0x0812; +SD24BINCTL0_H = 0x0813; +SD24BOSR0 = 0x0814; +SD24BOSR0_L = 0x0814; +SD24BOSR0_H = 0x0815; +SD24BPRE0 = 0x0816; +SD24BPRE0_L = 0x0816; +SD24BPRE0_H = 0x0817; +SD24BCCTL1 = 0x0818; +SD24BCCTL1_L = 0x0818; +SD24BCCTL1_H = 0x0819; +SD24BINCTL1 = 0x081A; +SD24BINCTL1_L = 0x081A; +SD24BINCTL1_H = 0x081B; +SD24BOSR1 = 0x081C; +SD24BOSR1_L = 0x081C; +SD24BOSR1_H = 0x081D; +SD24BPRE1 = 0x081E; +SD24BPRE1_L = 0x081E; +SD24BPRE1_H = 0x081F; +SD24BCCTL2 = 0x0820; +SD24BCCTL2_L = 0x0820; +SD24BCCTL2_H = 0x0821; +SD24BINCTL2 = 0x0822; +SD24BINCTL2_L = 0x0822; +SD24BINCTL2_H = 0x0823; +SD24BOSR2 = 0x0824; +SD24BOSR2_L = 0x0824; +SD24BOSR2_H = 0x0825; +SD24BPRE2 = 0x0826; +SD24BPRE2_L = 0x0826; +SD24BPRE2_H = 0x0827; +SD24BCCTL3 = 0x0828; +SD24BCCTL3_L = 0x0828; +SD24BCCTL3_H = 0x0829; +SD24BINCTL3 = 0x082A; +SD24BINCTL3_L = 0x082A; +SD24BINCTL3_H = 0x082B; +SD24BOSR3 = 0x082C; +SD24BOSR3_L = 0x082C; +SD24BOSR3_H = 0x082D; +SD24BPRE3 = 0x082E; +SD24BPRE3_L = 0x082E; +SD24BPRE3_H = 0x082F; +SD24BCCTL4 = 0x0830; +SD24BCCTL4_L = 0x0830; +SD24BCCTL4_H = 0x0831; +SD24BINCTL4 = 0x0832; +SD24BINCTL4_L = 0x0832; +SD24BINCTL4_H = 0x0833; +SD24BOSR4 = 0x0834; +SD24BOSR4_L = 0x0834; +SD24BOSR4_H = 0x0835; +SD24BPRE4 = 0x0836; +SD24BPRE4_L = 0x0836; +SD24BPRE4_H = 0x0837; +SD24BCCTL5 = 0x0838; +SD24BCCTL5_L = 0x0838; +SD24BCCTL5_H = 0x0839; +SD24BINCTL5 = 0x083A; +SD24BINCTL5_L = 0x083A; +SD24BINCTL5_H = 0x083B; +SD24BOSR5 = 0x083C; +SD24BOSR5_L = 0x083C; +SD24BOSR5_H = 0x083D; +SD24BPRE5 = 0x083E; +SD24BPRE5_L = 0x083E; +SD24BPRE5_H = 0x083F; +SD24BCCTL6 = 0x0840; +SD24BCCTL6_L = 0x0840; +SD24BCCTL6_H = 0x0841; +SD24BINCTL6 = 0x0842; +SD24BINCTL6_L = 0x0842; +SD24BINCTL6_H = 0x0843; +SD24BOSR6 = 0x0844; +SD24BOSR6_L = 0x0844; +SD24BOSR6_H = 0x0845; +SD24BPRE6 = 0x0846; +SD24BPRE6_L = 0x0846; +SD24BPRE6_H = 0x0847; +SD24BMEML0 = 0x0850; +SD24BMEML0_L = 0x0850; +SD24BMEML0_H = 0x0851; +SD24BMEMH0 = 0x0852; +SD24BMEMH0_L = 0x0852; +SD24BMEMH0_H = 0x0853; +SD24BMEML1 = 0x0854; +SD24BMEML1_L = 0x0854; +SD24BMEML1_H = 0x0855; +SD24BMEMH1 = 0x0856; +SD24BMEMH1_L = 0x0856; +SD24BMEMH1_H = 0x0857; +SD24BMEML2 = 0x0858; +SD24BMEML2_L = 0x0858; +SD24BMEML2_H = 0x0859; +SD24BMEMH2 = 0x085A; +SD24BMEMH2_L = 0x085A; +SD24BMEMH2_H = 0x085B; +SD24BMEML3 = 0x085C; +SD24BMEML3_L = 0x085C; +SD24BMEML3_H = 0x085D; +SD24BMEMH3 = 0x085E; +SD24BMEMH3_L = 0x085E; +SD24BMEMH3_H = 0x085F; +SD24BMEML4 = 0x0860; +SD24BMEML4_L = 0x0860; +SD24BMEML4_H = 0x0861; +SD24BMEMH4 = 0x0862; +SD24BMEMH4_L = 0x0862; +SD24BMEMH4_H = 0x0863; +SD24BMEML5 = 0x0864; +SD24BMEML5_L = 0x0864; +SD24BMEML5_H = 0x0865; +SD24BMEMH5 = 0x0866; +SD24BMEMH5_L = 0x0866; +SD24BMEMH5_H = 0x0867; +SD24BMEML6 = 0x0868; +SD24BMEML6_L = 0x0868; +SD24BMEML6_H = 0x0869; +SD24BMEMH6 = 0x086A; +SD24BMEMH6_L = 0x086A; +SD24BMEMH6_H = 0x086B; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fe423.cmd b/msp430/msp430fe423.cmd new file mode 100644 index 00000000..2afb098b --- /dev/null +++ b/msp430/msp430fe423.cmd @@ -0,0 +1,234 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fe423.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* SD16 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +SD16MEM2 = 0x0116; +/************************************************************ +* ESP430E +************************************************************/ +ESPCTL = 0x0150; +MBCTL = 0x0152; +MBIN0 = 0x0154; +MBIN1 = 0x0156; +MBOUT0 = 0x0158; +MBOUT1 = 0x015A; +ESP430_STAT0 = 0x01C0; +ESP430_STAT1 = 0x01C2; +WAVEFSV1 = 0x01C4; +RET3 = 0x01C6; +RET4 = 0x01C8; +WAVEFSI1 = 0x01CA; +WAVEFSI2 = 0x01CC; +RET7 = 0x01CE; +ACTENERGY1_LO = 0x01D0; +ACTENERGY1_HI = 0x01D2; +ACTENERGY2_LO = 0x01D4; +ACTENERGY2_HI = 0x01D6; +REACTENERGY_LO = 0x01D8; +REACTENERGY_HI = 0x01DA; +APPENERGY_LO = 0x01DC; +APPENERGY_HI = 0x01DE; +ACTENSPER1_LO = 0x01E0; +ACTENSPER1_HI = 0x01E2; +ACTENSPER2_LO = 0x01E4; +ACTENSPER2_HI = 0x01E6; +POWERFCT = 0x01E8; +CAPIND = 0x01EA; +MAINSPERIOD = 0x01EC; +V1RMS = 0x01EE; +IRMS_LO = 0x01F0; +IRMS_HI = 0x01F2; +VPEAK = 0x01F4; +IPEAK = 0x01F6; +LINECYCLCNT_LO = 0x01F8; +LINECYCLCNT_HI = 0x01FA; +NMBMEAS_LO = 0x01FC; +NMBMEAS_HI = 0x01FE; + /* 1: I2 path implemented (CT, dc-tol CT or shunt) */ + /* 1: Rogowski coil (not yet implemented) */ +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fe4232.cmd b/msp430/msp430fe4232.cmd new file mode 100644 index 00000000..2d7a08d3 --- /dev/null +++ b/msp430/msp430fe4232.cmd @@ -0,0 +1,225 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fe4232.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* SD16 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +/************************************************************ +* ESP430E +************************************************************/ +ESPCTL = 0x0150; +MBCTL = 0x0152; +MBIN0 = 0x0154; +MBIN1 = 0x0156; +MBOUT0 = 0x0158; +MBOUT1 = 0x015A; +ESP430_STAT0 = 0x01C0; +ESP430_STAT1 = 0x01C2; +WAVEFSV1 = 0x01C4; +RET3 = 0x01C6; +RET4 = 0x01C8; +WAVEFSI1 = 0x01CA; +RET7 = 0x01CE; +ACTENERGY1_LO = 0x01D0; +ACTENERGY1_HI = 0x01D2; +REACTENERGY_LO = 0x01D8; +REACTENERGY_HI = 0x01DA; +APPENERGY_LO = 0x01DC; +APPENERGY_HI = 0x01DE; +ACTENSPER1_LO = 0x01E0; +ACTENSPER1_HI = 0x01E2; +IRMS_2_HI = 0x01E4; +IRMS_2_LO = 0x01E6; +POWERFCT = 0x01E8; +MAINSPERIOD = 0x01EC; +V1RMS = 0x01EE; +IRMS_LO = 0x01F0; +IRMS_HI = 0x01F2; +VPEAK = 0x01F4; +IPEAK = 0x01F6; +LINECYCLCNT_LO = 0x01F8; +LINECYCLCNT_HI = 0x01FA; +NMBMEAS_LO = 0x01FC; +NMBMEAS_HI = 0x01FE; + /* 1: Rogowski coil (not yet implemented) */ +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fe423a.cmd b/msp430/msp430fe423a.cmd new file mode 100644 index 00000000..7eddbe81 --- /dev/null +++ b/msp430/msp430fe423a.cmd @@ -0,0 +1,233 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fe423a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* SD16 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +SD16MEM2 = 0x0116; +/************************************************************ +* ESP430E +************************************************************/ +ESPCTL = 0x0150; +MBCTL = 0x0152; +MBIN0 = 0x0154; +MBIN1 = 0x0156; +MBOUT0 = 0x0158; +MBOUT1 = 0x015A; +ESP430_STAT0 = 0x01C0; +ESP430_STAT1 = 0x01C2; +WAVEFSV1 = 0x01C4; +RET3 = 0x01C6; +RET4 = 0x01C8; +WAVEFSI1 = 0x01CA; +WAVEFSI2 = 0x01CC; +RET7 = 0x01CE; +ACTENERGY1_LO = 0x01D0; +ACTENERGY1_HI = 0x01D2; +ACTENERGY2_LO = 0x01D4; +ACTENERGY2_HI = 0x01D6; +REACTENERGY_LO = 0x01D8; +REACTENERGY_HI = 0x01DA; +APPENERGY_LO = 0x01DC; +APPENERGY_HI = 0x01DE; +ACTENSPER1_LO = 0x01E0; +ACTENSPER1_HI = 0x01E2; +ACTENSPER2_LO = 0x01E4; +ACTENSPER2_HI = 0x01E6; +POWERFCT = 0x01E8; +MAINSPERIOD = 0x01EC; +V1RMS = 0x01EE; +IRMS_LO = 0x01F0; +IRMS_HI = 0x01F2; +VPEAK = 0x01F4; +IPEAK = 0x01F6; +LINECYCLCNT_LO = 0x01F8; +LINECYCLCNT_HI = 0x01FA; +NMBMEAS_LO = 0x01FC; +NMBMEAS_HI = 0x01FE; + /* 1: I2 path implemented (CT, dc-tol CT or shunt) */ + /* 1: Rogowski coil (not yet implemented) */ +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fe4242.cmd b/msp430/msp430fe4242.cmd new file mode 100644 index 00000000..ee90bc24 --- /dev/null +++ b/msp430/msp430fe4242.cmd @@ -0,0 +1,225 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fe4242.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* SD16 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +/************************************************************ +* ESP430E +************************************************************/ +ESPCTL = 0x0150; +MBCTL = 0x0152; +MBIN0 = 0x0154; +MBIN1 = 0x0156; +MBOUT0 = 0x0158; +MBOUT1 = 0x015A; +ESP430_STAT0 = 0x01C0; +ESP430_STAT1 = 0x01C2; +WAVEFSV1 = 0x01C4; +RET3 = 0x01C6; +RET4 = 0x01C8; +WAVEFSI1 = 0x01CA; +RET7 = 0x01CE; +ACTENERGY1_LO = 0x01D0; +ACTENERGY1_HI = 0x01D2; +REACTENERGY_LO = 0x01D8; +REACTENERGY_HI = 0x01DA; +APPENERGY_LO = 0x01DC; +APPENERGY_HI = 0x01DE; +ACTENSPER1_LO = 0x01E0; +ACTENSPER1_HI = 0x01E2; +IRMS_2_HI = 0x01E4; +IRMS_2_LO = 0x01E6; +POWERFCT = 0x01E8; +MAINSPERIOD = 0x01EC; +V1RMS = 0x01EE; +IRMS_LO = 0x01F0; +IRMS_HI = 0x01F2; +VPEAK = 0x01F4; +IPEAK = 0x01F6; +LINECYCLCNT_LO = 0x01F8; +LINECYCLCNT_HI = 0x01FA; +NMBMEAS_LO = 0x01FC; +NMBMEAS_HI = 0x01FE; + /* 1: Rogowski coil (not yet implemented) */ +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fe425.cmd b/msp430/msp430fe425.cmd new file mode 100644 index 00000000..d23ca160 --- /dev/null +++ b/msp430/msp430fe425.cmd @@ -0,0 +1,234 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fe425.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* SD16 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +SD16MEM2 = 0x0116; +/************************************************************ +* ESP430E +************************************************************/ +ESPCTL = 0x0150; +MBCTL = 0x0152; +MBIN0 = 0x0154; +MBIN1 = 0x0156; +MBOUT0 = 0x0158; +MBOUT1 = 0x015A; +ESP430_STAT0 = 0x01C0; +ESP430_STAT1 = 0x01C2; +WAVEFSV1 = 0x01C4; +RET3 = 0x01C6; +RET4 = 0x01C8; +WAVEFSI1 = 0x01CA; +WAVEFSI2 = 0x01CC; +RET7 = 0x01CE; +ACTENERGY1_LO = 0x01D0; +ACTENERGY1_HI = 0x01D2; +ACTENERGY2_LO = 0x01D4; +ACTENERGY2_HI = 0x01D6; +REACTENERGY_LO = 0x01D8; +REACTENERGY_HI = 0x01DA; +APPENERGY_LO = 0x01DC; +APPENERGY_HI = 0x01DE; +ACTENSPER1_LO = 0x01E0; +ACTENSPER1_HI = 0x01E2; +ACTENSPER2_LO = 0x01E4; +ACTENSPER2_HI = 0x01E6; +POWERFCT = 0x01E8; +CAPIND = 0x01EA; +MAINSPERIOD = 0x01EC; +V1RMS = 0x01EE; +IRMS_LO = 0x01F0; +IRMS_HI = 0x01F2; +VPEAK = 0x01F4; +IPEAK = 0x01F6; +LINECYCLCNT_LO = 0x01F8; +LINECYCLCNT_HI = 0x01FA; +NMBMEAS_LO = 0x01FC; +NMBMEAS_HI = 0x01FE; + /* 1: I2 path implemented (CT, dc-tol CT or shunt) */ + /* 1: Rogowski coil (not yet implemented) */ +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fe4252.cmd b/msp430/msp430fe4252.cmd new file mode 100644 index 00000000..9962ddb5 --- /dev/null +++ b/msp430/msp430fe4252.cmd @@ -0,0 +1,225 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fe4252.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* SD16 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +/************************************************************ +* ESP430E +************************************************************/ +ESPCTL = 0x0150; +MBCTL = 0x0152; +MBIN0 = 0x0154; +MBIN1 = 0x0156; +MBOUT0 = 0x0158; +MBOUT1 = 0x015A; +ESP430_STAT0 = 0x01C0; +ESP430_STAT1 = 0x01C2; +WAVEFSV1 = 0x01C4; +RET3 = 0x01C6; +RET4 = 0x01C8; +WAVEFSI1 = 0x01CA; +RET7 = 0x01CE; +ACTENERGY1_LO = 0x01D0; +ACTENERGY1_HI = 0x01D2; +REACTENERGY_LO = 0x01D8; +REACTENERGY_HI = 0x01DA; +APPENERGY_LO = 0x01DC; +APPENERGY_HI = 0x01DE; +ACTENSPER1_LO = 0x01E0; +ACTENSPER1_HI = 0x01E2; +IRMS_2_HI = 0x01E4; +IRMS_2_LO = 0x01E6; +POWERFCT = 0x01E8; +MAINSPERIOD = 0x01EC; +V1RMS = 0x01EE; +IRMS_LO = 0x01F0; +IRMS_HI = 0x01F2; +VPEAK = 0x01F4; +IPEAK = 0x01F6; +LINECYCLCNT_LO = 0x01F8; +LINECYCLCNT_HI = 0x01FA; +NMBMEAS_LO = 0x01FC; +NMBMEAS_HI = 0x01FE; + /* 1: Rogowski coil (not yet implemented) */ +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fe425a.cmd b/msp430/msp430fe425a.cmd new file mode 100644 index 00000000..d967fb70 --- /dev/null +++ b/msp430/msp430fe425a.cmd @@ -0,0 +1,233 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fe425a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* SD16 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +SD16MEM2 = 0x0116; +/************************************************************ +* ESP430E +************************************************************/ +ESPCTL = 0x0150; +MBCTL = 0x0152; +MBIN0 = 0x0154; +MBIN1 = 0x0156; +MBOUT0 = 0x0158; +MBOUT1 = 0x015A; +ESP430_STAT0 = 0x01C0; +ESP430_STAT1 = 0x01C2; +WAVEFSV1 = 0x01C4; +RET3 = 0x01C6; +RET4 = 0x01C8; +WAVEFSI1 = 0x01CA; +WAVEFSI2 = 0x01CC; +RET7 = 0x01CE; +ACTENERGY1_LO = 0x01D0; +ACTENERGY1_HI = 0x01D2; +ACTENERGY2_LO = 0x01D4; +ACTENERGY2_HI = 0x01D6; +REACTENERGY_LO = 0x01D8; +REACTENERGY_HI = 0x01DA; +APPENERGY_LO = 0x01DC; +APPENERGY_HI = 0x01DE; +ACTENSPER1_LO = 0x01E0; +ACTENSPER1_HI = 0x01E2; +ACTENSPER2_LO = 0x01E4; +ACTENSPER2_HI = 0x01E6; +POWERFCT = 0x01E8; +MAINSPERIOD = 0x01EC; +V1RMS = 0x01EE; +IRMS_LO = 0x01F0; +IRMS_HI = 0x01F2; +VPEAK = 0x01F4; +IPEAK = 0x01F6; +LINECYCLCNT_LO = 0x01F8; +LINECYCLCNT_HI = 0x01FA; +NMBMEAS_LO = 0x01FC; +NMBMEAS_HI = 0x01FE; + /* 1: I2 path implemented (CT, dc-tol CT or shunt) */ + /* 1: Rogowski coil (not yet implemented) */ +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fe427.cmd b/msp430/msp430fe427.cmd new file mode 100644 index 00000000..812c8653 --- /dev/null +++ b/msp430/msp430fe427.cmd @@ -0,0 +1,234 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fe427.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* SD16 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +SD16MEM2 = 0x0116; +/************************************************************ +* ESP430E +************************************************************/ +ESPCTL = 0x0150; +MBCTL = 0x0152; +MBIN0 = 0x0154; +MBIN1 = 0x0156; +MBOUT0 = 0x0158; +MBOUT1 = 0x015A; +ESP430_STAT0 = 0x01C0; +ESP430_STAT1 = 0x01C2; +WAVEFSV1 = 0x01C4; +RET3 = 0x01C6; +RET4 = 0x01C8; +WAVEFSI1 = 0x01CA; +WAVEFSI2 = 0x01CC; +RET7 = 0x01CE; +ACTENERGY1_LO = 0x01D0; +ACTENERGY1_HI = 0x01D2; +ACTENERGY2_LO = 0x01D4; +ACTENERGY2_HI = 0x01D6; +REACTENERGY_LO = 0x01D8; +REACTENERGY_HI = 0x01DA; +APPENERGY_LO = 0x01DC; +APPENERGY_HI = 0x01DE; +ACTENSPER1_LO = 0x01E0; +ACTENSPER1_HI = 0x01E2; +ACTENSPER2_LO = 0x01E4; +ACTENSPER2_HI = 0x01E6; +POWERFCT = 0x01E8; +CAPIND = 0x01EA; +MAINSPERIOD = 0x01EC; +V1RMS = 0x01EE; +IRMS_LO = 0x01F0; +IRMS_HI = 0x01F2; +VPEAK = 0x01F4; +IPEAK = 0x01F6; +LINECYCLCNT_LO = 0x01F8; +LINECYCLCNT_HI = 0x01FA; +NMBMEAS_LO = 0x01FC; +NMBMEAS_HI = 0x01FE; + /* 1: I2 path implemented (CT, dc-tol CT or shunt) */ + /* 1: Rogowski coil (not yet implemented) */ +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fe4272.cmd b/msp430/msp430fe4272.cmd new file mode 100644 index 00000000..23ac703f --- /dev/null +++ b/msp430/msp430fe4272.cmd @@ -0,0 +1,225 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fe4272.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* SD16 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +/************************************************************ +* ESP430E +************************************************************/ +ESPCTL = 0x0150; +MBCTL = 0x0152; +MBIN0 = 0x0154; +MBIN1 = 0x0156; +MBOUT0 = 0x0158; +MBOUT1 = 0x015A; +ESP430_STAT0 = 0x01C0; +ESP430_STAT1 = 0x01C2; +WAVEFSV1 = 0x01C4; +RET3 = 0x01C6; +RET4 = 0x01C8; +WAVEFSI1 = 0x01CA; +RET7 = 0x01CE; +ACTENERGY1_LO = 0x01D0; +ACTENERGY1_HI = 0x01D2; +REACTENERGY_LO = 0x01D8; +REACTENERGY_HI = 0x01DA; +APPENERGY_LO = 0x01DC; +APPENERGY_HI = 0x01DE; +ACTENSPER1_LO = 0x01E0; +ACTENSPER1_HI = 0x01E2; +IRMS_2_HI = 0x01E4; +IRMS_2_LO = 0x01E6; +POWERFCT = 0x01E8; +MAINSPERIOD = 0x01EC; +V1RMS = 0x01EE; +IRMS_LO = 0x01F0; +IRMS_HI = 0x01F2; +VPEAK = 0x01F4; +IPEAK = 0x01F6; +LINECYCLCNT_LO = 0x01F8; +LINECYCLCNT_HI = 0x01FA; +NMBMEAS_LO = 0x01FC; +NMBMEAS_HI = 0x01FE; + /* 1: Rogowski coil (not yet implemented) */ +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fe427a.cmd b/msp430/msp430fe427a.cmd new file mode 100644 index 00000000..1c5143dc --- /dev/null +++ b/msp430/msp430fe427a.cmd @@ -0,0 +1,233 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fe427a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* SD16 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +SD16MEM2 = 0x0116; +/************************************************************ +* ESP430E +************************************************************/ +ESPCTL = 0x0150; +MBCTL = 0x0152; +MBIN0 = 0x0154; +MBIN1 = 0x0156; +MBOUT0 = 0x0158; +MBOUT1 = 0x015A; +ESP430_STAT0 = 0x01C0; +ESP430_STAT1 = 0x01C2; +WAVEFSV1 = 0x01C4; +RET3 = 0x01C6; +RET4 = 0x01C8; +WAVEFSI1 = 0x01CA; +WAVEFSI2 = 0x01CC; +RET7 = 0x01CE; +ACTENERGY1_LO = 0x01D0; +ACTENERGY1_HI = 0x01D2; +ACTENERGY2_LO = 0x01D4; +ACTENERGY2_HI = 0x01D6; +REACTENERGY_LO = 0x01D8; +REACTENERGY_HI = 0x01DA; +APPENERGY_LO = 0x01DC; +APPENERGY_HI = 0x01DE; +ACTENSPER1_LO = 0x01E0; +ACTENSPER1_HI = 0x01E2; +ACTENSPER2_LO = 0x01E4; +ACTENSPER2_HI = 0x01E6; +POWERFCT = 0x01E8; +MAINSPERIOD = 0x01EC; +V1RMS = 0x01EE; +IRMS_LO = 0x01F0; +IRMS_HI = 0x01F2; +VPEAK = 0x01F4; +IPEAK = 0x01F6; +LINECYCLCNT_LO = 0x01F8; +LINECYCLCNT_HI = 0x01FA; +NMBMEAS_LO = 0x01FC; +NMBMEAS_HI = 0x01FE; + /* 1: I2 path implemented (CT, dc-tol CT or shunt) */ + /* 1: Rogowski coil (not yet implemented) */ +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fg4250.cmd b/msp430/msp430fg4250.cmd new file mode 100644 index 00000000..1e916003 --- /dev/null +++ b/msp430/msp430fg4250.cmd @@ -0,0 +1,181 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fg4250.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SD16_A1 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16AE = 0x00B7; +SD16CONF0 = 0x00F7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_0DAT = 0x01C8; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x00C0; +OA0CTL1 = 0x00C1; +OA1CTL0 = 0x00C2; +OA1CTL1 = 0x00C3; +SWCTL = 0x00CF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fg4260.cmd b/msp430/msp430fg4260.cmd new file mode 100644 index 00000000..1761d8f8 --- /dev/null +++ b/msp430/msp430fg4260.cmd @@ -0,0 +1,181 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fg4260.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SD16_A1 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16AE = 0x00B7; +SD16CONF0 = 0x00F7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_0DAT = 0x01C8; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x00C0; +OA0CTL1 = 0x00C1; +OA1CTL0 = 0x00C2; +OA1CTL1 = 0x00C3; +SWCTL = 0x00CF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fg4270.cmd b/msp430/msp430fg4270.cmd new file mode 100644 index 00000000..4da169a4 --- /dev/null +++ b/msp430/msp430fg4270.cmd @@ -0,0 +1,181 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fg4270.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SD16_A1 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16AE = 0x00B7; +SD16CONF0 = 0x00F7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_0DAT = 0x01C8; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x00C0; +OA0CTL1 = 0x00C1; +OA1CTL0 = 0x00C2; +OA1CTL1 = 0x00C3; +SWCTL = 0x00CF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fg437.cmd b/msp430/msp430fg437.cmd new file mode 100644 index 00000000..9adbd71f --- /dev/null +++ b/msp430/msp430fg437.cmd @@ -0,0 +1,265 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fg437.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMA0CTL = 0x01E0; +DMA0SA = 0x01E2; +DMA0DA = 0x01E4; +DMA0SZ = 0x01E6; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x00C0; +OA0CTL1 = 0x00C1; +OA1CTL0 = 0x00C2; +OA1CTL1 = 0x00C3; +OA2CTL0 = 0x00C4; +OA2CTL1 = 0x00C5; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fg438.cmd b/msp430/msp430fg438.cmd new file mode 100644 index 00000000..b82cac0c --- /dev/null +++ b/msp430/msp430fg438.cmd @@ -0,0 +1,265 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fg438.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMA0CTL = 0x01E0; +DMA0SA = 0x01E2; +DMA0DA = 0x01E4; +DMA0SZ = 0x01E6; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x00C0; +OA0CTL1 = 0x00C1; +OA1CTL0 = 0x00C2; +OA1CTL1 = 0x00C3; +OA2CTL0 = 0x00C4; +OA2CTL1 = 0x00C5; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fg439.cmd b/msp430/msp430fg439.cmd new file mode 100644 index 00000000..b63d94b1 --- /dev/null +++ b/msp430/msp430fg439.cmd @@ -0,0 +1,265 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fg439.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMA0CTL = 0x01E0; +DMA0SA = 0x01E2; +DMA0DA = 0x01E4; +DMA0SZ = 0x01E6; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x00C0; +OA0CTL1 = 0x00C1; +OA1CTL0 = 0x00C2; +OA1CTL1 = 0x00C3; +OA2CTL0 = 0x00C4; +OA2CTL1 = 0x00C5; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fg4616.cmd b/msp430/msp430fg4616.cmd new file mode 100644 index 00000000..56d0eaca --- /dev/null +++ b/msp430/msp430fg4616.cmd @@ -0,0 +1,372 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fg4616.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x00C0; +OA0CTL1 = 0x00C1; +OA1CTL0 = 0x00C2; +OA1CTL1 = 0x00C3; +OA2CTL0 = 0x00C4; +OA2CTL1 = 0x00C5; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* DIGITAL I/O Port7/8 +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +/************************************************************ +* DIGITAL I/O Port9/10 +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fg4617.cmd b/msp430/msp430fg4617.cmd new file mode 100644 index 00000000..166b5785 --- /dev/null +++ b/msp430/msp430fg4617.cmd @@ -0,0 +1,372 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fg4617.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x00C0; +OA0CTL1 = 0x00C1; +OA1CTL0 = 0x00C2; +OA1CTL1 = 0x00C3; +OA2CTL0 = 0x00C4; +OA2CTL1 = 0x00C5; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* DIGITAL I/O Port7/8 +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +/************************************************************ +* DIGITAL I/O Port9/10 +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fg4618.cmd b/msp430/msp430fg4618.cmd new file mode 100644 index 00000000..65fa13fc --- /dev/null +++ b/msp430/msp430fg4618.cmd @@ -0,0 +1,372 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fg4618.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x00C0; +OA0CTL1 = 0x00C1; +OA1CTL0 = 0x00C2; +OA1CTL1 = 0x00C3; +OA2CTL0 = 0x00C4; +OA2CTL1 = 0x00C5; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* DIGITAL I/O Port7/8 +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +/************************************************************ +* DIGITAL I/O Port9/10 +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fg4619.cmd b/msp430/msp430fg4619.cmd new file mode 100644 index 00000000..a42be80f --- /dev/null +++ b/msp430/msp430fg4619.cmd @@ -0,0 +1,372 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fg4619.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x00C0; +OA0CTL1 = 0x00C1; +OA1CTL0 = 0x00C2; +OA1CTL1 = 0x00C3; +OA2CTL0 = 0x00C4; +OA2CTL1 = 0x00C5; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* DIGITAL I/O Port7/8 +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +/************************************************************ +* DIGITAL I/O Port9/10 +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fg477.cmd b/msp430/msp430fg477.cmd new file mode 100644 index 00000000..3d16016f --- /dev/null +++ b/msp430/msp430fg477.cmd @@ -0,0 +1,259 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fg477.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x00C0; +OA0CTL1 = 0x00C1; +OA1CTL0 = 0x00C2; +OA1CTL1 = 0x00C3; +OASWCTL0 = 0x00CE; +OASWCTL0L = 0x00CE; +OASWCTL0H = 0x00CF; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0057; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* SD16_A1 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16AE = 0x00B7; +SD16CONF0 = 0x00F7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fg478.cmd b/msp430/msp430fg478.cmd new file mode 100644 index 00000000..f1eb17f9 --- /dev/null +++ b/msp430/msp430fg478.cmd @@ -0,0 +1,259 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fg478.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x00C0; +OA0CTL1 = 0x00C1; +OA1CTL0 = 0x00C2; +OA1CTL1 = 0x00C3; +OASWCTL0 = 0x00CE; +OASWCTL0L = 0x00CE; +OASWCTL0H = 0x00CF; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0057; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* SD16_A1 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16AE = 0x00B7; +SD16CONF0 = 0x00F7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fg479.cmd b/msp430/msp430fg479.cmd new file mode 100644 index 00000000..563a33f3 --- /dev/null +++ b/msp430/msp430fg479.cmd @@ -0,0 +1,259 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fg479.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x00C0; +OA0CTL1 = 0x00C1; +OA1CTL0 = 0x00C2; +OA1CTL1 = 0x00C3; +OASWCTL0 = 0x00CE; +OASWCTL0L = 0x00CE; +OASWCTL0H = 0x00CF; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0057; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* SD16_A1 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16AE = 0x00B7; +SD16CONF0 = 0x00F7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fg6425.cmd b/msp430/msp430fg6425.cmd new file mode 100644 index 00000000..aaffa62d --- /dev/null +++ b/msp430/msp430fg6425.cmd @@ -0,0 +1,893 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fg6425.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CTSD16 - Sigma Delta 16 Bit +************************************************************/ +CTSD16CTL = 0x0A80; +CTSD16CTL_L = 0x0A80; +CTSD16CTL_H = 0x0A81; +CTSD16IFG = 0x0AAC; +CTSD16IFG_L = 0x0AAC; +CTSD16IFG_H = 0x0AAD; +CTSD16IE = 0x0AAE; +CTSD16IE_L = 0x0AAE; +CTSD16IE_H = 0x0AAF; +CTSD16IV = 0x0AB0; +CTSD16IV_L = 0x0AB0; +CTSD16IV_H = 0x0AB1; +CTSD16CCTL0 = 0x0A82; +CTSD16CCTL0_L = 0x0A82; +CTSD16CCTL0_H = 0x0A83; +CTSD16MEM0 = 0x0AB2; +CTSD16MEM0_L = 0x0AB2; +CTSD16MEM0_H = 0x0AB3; +CTSD16INCTL0 = 0x0A84; +CTSD16INCTL0_L = 0x0A84; +CTSD16INCTL0_H = 0x0A85; +CTSD16PRE0 = 0x0A86; +CTSD16PRE0_L = 0x0A86; +CTSD16PRE0_H = 0x0A87; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL0 = 0x0780; +DAC12_0CTL1 = 0x0782; +DAC12_0DAT = 0x0784; +DAC12_0CALCTL = 0x0786; +DAC12_0CALDAT = 0x0788; +DAC12_1CTL0 = 0x0790; +DAC12_1CTL1 = 0x0792; +DAC12_1DAT = 0x0794; +DAC12_1CALCTL = 0x0796; +DAC12_1CALDAT = 0x0798; +DAC12_IV = 0x079E; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x0AE0; +OA0CTL0_L = 0x0AE0; +OA0CTL0_H = 0x0AE1; +OA0PSW = 0x0AE2; +OA0PSW_L = 0x0AE2; +OA0PSW_H = 0x0AE3; +OA0NSW = 0x0AE4; +OA0NSW_L = 0x0AE4; +OA0NSW_H = 0x0AE5; +OA0GSW = 0x0AEE; +OA0GSW_L = 0x0AEE; +OA0GSW_H = 0x0AEF; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA1CTL0 = 0x0AF0; +OA1CTL0_L = 0x0AF0; +OA1CTL0_H = 0x0AF1; +OA1PSW = 0x0AF2; +OA1PSW_L = 0x0AF2; +OA1PSW_H = 0x0AF3; +OA1NSW = 0x0AF4; +OA1NSW_L = 0x0AF4; +OA1NSW_H = 0x0AF5; +OA1GSW = 0x0AFE; +OA1GSW_L = 0x0AFE; +OA1GSW_H = 0x0AFF; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fg6426.cmd b/msp430/msp430fg6426.cmd new file mode 100644 index 00000000..c93e6f01 --- /dev/null +++ b/msp430/msp430fg6426.cmd @@ -0,0 +1,893 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fg6426.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CTSD16 - Sigma Delta 16 Bit +************************************************************/ +CTSD16CTL = 0x0A80; +CTSD16CTL_L = 0x0A80; +CTSD16CTL_H = 0x0A81; +CTSD16IFG = 0x0AAC; +CTSD16IFG_L = 0x0AAC; +CTSD16IFG_H = 0x0AAD; +CTSD16IE = 0x0AAE; +CTSD16IE_L = 0x0AAE; +CTSD16IE_H = 0x0AAF; +CTSD16IV = 0x0AB0; +CTSD16IV_L = 0x0AB0; +CTSD16IV_H = 0x0AB1; +CTSD16CCTL0 = 0x0A82; +CTSD16CCTL0_L = 0x0A82; +CTSD16CCTL0_H = 0x0A83; +CTSD16MEM0 = 0x0AB2; +CTSD16MEM0_L = 0x0AB2; +CTSD16MEM0_H = 0x0AB3; +CTSD16INCTL0 = 0x0A84; +CTSD16INCTL0_L = 0x0A84; +CTSD16INCTL0_H = 0x0A85; +CTSD16PRE0 = 0x0A86; +CTSD16PRE0_L = 0x0A86; +CTSD16PRE0_H = 0x0A87; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL0 = 0x0780; +DAC12_0CTL1 = 0x0782; +DAC12_0DAT = 0x0784; +DAC12_0CALCTL = 0x0786; +DAC12_0CALDAT = 0x0788; +DAC12_1CTL0 = 0x0790; +DAC12_1CTL1 = 0x0792; +DAC12_1DAT = 0x0794; +DAC12_1CALCTL = 0x0796; +DAC12_1CALDAT = 0x0798; +DAC12_IV = 0x079E; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x0AE0; +OA0CTL0_L = 0x0AE0; +OA0CTL0_H = 0x0AE1; +OA0PSW = 0x0AE2; +OA0PSW_L = 0x0AE2; +OA0PSW_H = 0x0AE3; +OA0NSW = 0x0AE4; +OA0NSW_L = 0x0AE4; +OA0NSW_H = 0x0AE5; +OA0GSW = 0x0AEE; +OA0GSW_L = 0x0AEE; +OA0GSW_H = 0x0AEF; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA1CTL0 = 0x0AF0; +OA1CTL0_L = 0x0AF0; +OA1CTL0_H = 0x0AF1; +OA1PSW = 0x0AF2; +OA1PSW_L = 0x0AF2; +OA1PSW_H = 0x0AF3; +OA1NSW = 0x0AF4; +OA1NSW_L = 0x0AF4; +OA1NSW_H = 0x0AF5; +OA1GSW = 0x0AFE; +OA1GSW_L = 0x0AFE; +OA1GSW_H = 0x0AFF; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fg6625.cmd b/msp430/msp430fg6625.cmd new file mode 100644 index 00000000..eecd988d --- /dev/null +++ b/msp430/msp430fg6625.cmd @@ -0,0 +1,1030 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fg6625.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CTSD16 - Sigma Delta 16 Bit +************************************************************/ +CTSD16CTL = 0x0A80; +CTSD16CTL_L = 0x0A80; +CTSD16CTL_H = 0x0A81; +CTSD16IFG = 0x0AAC; +CTSD16IFG_L = 0x0AAC; +CTSD16IFG_H = 0x0AAD; +CTSD16IE = 0x0AAE; +CTSD16IE_L = 0x0AAE; +CTSD16IE_H = 0x0AAF; +CTSD16IV = 0x0AB0; +CTSD16IV_L = 0x0AB0; +CTSD16IV_H = 0x0AB1; +CTSD16CCTL0 = 0x0A82; +CTSD16CCTL0_L = 0x0A82; +CTSD16CCTL0_H = 0x0A83; +CTSD16MEM0 = 0x0AB2; +CTSD16MEM0_L = 0x0AB2; +CTSD16MEM0_H = 0x0AB3; +CTSD16INCTL0 = 0x0A84; +CTSD16INCTL0_L = 0x0A84; +CTSD16INCTL0_H = 0x0A85; +CTSD16PRE0 = 0x0A86; +CTSD16PRE0_L = 0x0A86; +CTSD16PRE0_H = 0x0A87; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL0 = 0x0780; +DAC12_0CTL1 = 0x0782; +DAC12_0DAT = 0x0784; +DAC12_0CALCTL = 0x0786; +DAC12_0CALDAT = 0x0788; +DAC12_1CTL0 = 0x0790; +DAC12_1CTL1 = 0x0792; +DAC12_1DAT = 0x0794; +DAC12_1CALCTL = 0x0796; +DAC12_1CALDAT = 0x0798; +DAC12_IV = 0x079E; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x0AE0; +OA0CTL0_L = 0x0AE0; +OA0CTL0_H = 0x0AE1; +OA0PSW = 0x0AE2; +OA0PSW_L = 0x0AE2; +OA0PSW_H = 0x0AE3; +OA0NSW = 0x0AE4; +OA0NSW_L = 0x0AE4; +OA0NSW_H = 0x0AE5; +OA0GSW = 0x0AEE; +OA0GSW_L = 0x0AEE; +OA0GSW_H = 0x0AEF; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA1CTL0 = 0x0AF0; +OA1CTL0_L = 0x0AF0; +OA1CTL0_H = 0x0AF1; +OA1PSW = 0x0AF2; +OA1PSW_L = 0x0AF2; +OA1PSW_H = 0x0AF3; +OA1NSW = 0x0AF4; +OA1NSW_L = 0x0AF4; +OA1NSW_H = 0x0AF5; +OA1GSW = 0x0AFE; +OA1GSW_L = 0x0AFE; +OA1GSW_H = 0x0AFF; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fg6626.cmd b/msp430/msp430fg6626.cmd new file mode 100644 index 00000000..55e4b046 --- /dev/null +++ b/msp430/msp430fg6626.cmd @@ -0,0 +1,1030 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fg6626.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************* +* Backup RAM Module +*************************************************************/ +BAKMEM0 = 0x0480; +BAKMEM0_L = 0x0480; +BAKMEM0_H = 0x0481; +BAKMEM1 = 0x0482; +BAKMEM1_L = 0x0482; +BAKMEM1_H = 0x0483; +BAKMEM2 = 0x0484; +BAKMEM2_L = 0x0484; +BAKMEM2_H = 0x0485; +BAKMEM3 = 0x0486; +BAKMEM3_L = 0x0486; +BAKMEM3_H = 0x0487; +/************************************************************* +* Battery Charger Module +*************************************************************/ +BAKCTL = 0x049C; +BAKCTL_L = 0x049C; +BAKCTL_H = 0x049D; +BAKCHCTL = 0x049E; +BAKCHCTL_L = 0x049E; +BAKCHCTL_H = 0x049F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CTSD16 - Sigma Delta 16 Bit +************************************************************/ +CTSD16CTL = 0x0A80; +CTSD16CTL_L = 0x0A80; +CTSD16CTL_H = 0x0A81; +CTSD16IFG = 0x0AAC; +CTSD16IFG_L = 0x0AAC; +CTSD16IFG_H = 0x0AAD; +CTSD16IE = 0x0AAE; +CTSD16IE_L = 0x0AAE; +CTSD16IE_H = 0x0AAF; +CTSD16IV = 0x0AB0; +CTSD16IV_L = 0x0AB0; +CTSD16IV_H = 0x0AB1; +CTSD16CCTL0 = 0x0A82; +CTSD16CCTL0_L = 0x0A82; +CTSD16CCTL0_H = 0x0A83; +CTSD16MEM0 = 0x0AB2; +CTSD16MEM0_L = 0x0AB2; +CTSD16MEM0_H = 0x0AB3; +CTSD16INCTL0 = 0x0A84; +CTSD16INCTL0_L = 0x0A84; +CTSD16INCTL0_H = 0x0A85; +CTSD16PRE0 = 0x0A86; +CTSD16PRE0_L = 0x0A86; +CTSD16PRE0_H = 0x0A87; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL0 = 0x0780; +DAC12_0CTL1 = 0x0782; +DAC12_0DAT = 0x0784; +DAC12_0CALCTL = 0x0786; +DAC12_0CALDAT = 0x0788; +DAC12_1CTL0 = 0x0790; +DAC12_1CTL1 = 0x0792; +DAC12_1DAT = 0x0794; +DAC12_1CALCTL = 0x0796; +DAC12_1CALDAT = 0x0798; +DAC12_IV = 0x079E; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA3CTL = 0x0540; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA4CTL = 0x0550; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA5CTL = 0x0560; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* LCD_B +************************************************************/ +LCDBCTL0 = 0x0A00; +LCDBCTL0_L = 0x0A00; +LCDBCTL0_H = 0x0A01; +LCDBCTL1 = 0x0A02; +LCDBCTL1_L = 0x0A02; +LCDBCTL1_H = 0x0A03; +LCDBBLKCTL = 0x0A04; +LCDBBLKCTL_L = 0x0A04; +LCDBBLKCTL_H = 0x0A05; +LCDBMEMCTL = 0x0A06; +LCDBMEMCTL_L = 0x0A06; +LCDBMEMCTL_H = 0x0A07; +LCDBVCTL = 0x0A08; +LCDBVCTL_L = 0x0A08; +LCDBVCTL_H = 0x0A09; +LCDBPCTL0 = 0x0A0A; +LCDBPCTL0_L = 0x0A0A; +LCDBPCTL0_H = 0x0A0B; +LCDBPCTL1 = 0x0A0C; +LCDBPCTL1_L = 0x0A0C; +LCDBPCTL1_H = 0x0A0D; +LCDBPCTL2 = 0x0A0E; +LCDBPCTL2_L = 0x0A0E; +LCDBPCTL2_H = 0x0A0F; +LCDBPCTL3 = 0x0A10; +LCDBPCTL3_L = 0x0A10; +LCDBPCTL3_H = 0x0A11; +LCDBCPCTL = 0x0A12; +LCDBCPCTL_L = 0x0A12; +LCDBCPCTL_H = 0x0A13; +LCDBIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +LCDBM23 = 0x0A56; +LCDBM24 = 0x0A57; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x0AE0; +OA0CTL0_L = 0x0AE0; +OA0CTL0_H = 0x0AE1; +OA0PSW = 0x0AE2; +OA0PSW_L = 0x0AE2; +OA0PSW_H = 0x0AE3; +OA0NSW = 0x0AE4; +OA0NSW_L = 0x0AE4; +OA0NSW_H = 0x0AE5; +OA0GSW = 0x0AEE; +OA0GSW_L = 0x0AEE; +OA0GSW_H = 0x0AEF; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA1CTL0 = 0x0AF0; +OA1CTL0_L = 0x0AF0; +OA1CTL0_H = 0x0AF1; +OA1PSW = 0x0AF2; +OA1PSW_L = 0x0AF2; +OA1PSW_H = 0x0AF3; +OA1NSW = 0x0AF4; +OA1NSW_L = 0x0AF4; +OA1NSW_H = 0x0AF5; +OA1GSW = 0x0AFE; +OA1GSW_L = 0x0AFE; +OA1GSW_H = 0x0AFF; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr2000.cmd b/msp430/msp430fr2000.cmd new file mode 100644 index 00000000..84eacf60 --- /dev/null +++ b/msp430/msp430fr2000.cmd @@ -0,0 +1,478 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr2000.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + BKMEM +*****************************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; + + +/***************************************************************************** + CAPTIO +*****************************************************************************/ +CAPTIOCTL = 0x02EE; +CAPTIOCTL_L = 0x02EE; +CAPTIOCTL_H = 0x02EF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + + + +/***************************************************************************** + FRCTL +*****************************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RTC +*****************************************************************************/ +RTCCTL = 0x0300; +RTCCTL_L = 0x0300; +RTCCTL_H = 0x0301; +RTCIV = 0x0304; +RTCIV_L = 0x0304; +RTCIV_H = 0x0305; +RTCMOD = 0x0308; +RTCMOD_L = 0x0308; +RTCMOD_H = 0x0309; +RTCCNT = 0x030C; +RTCCNT_L = 0x030C; +RTCCNT_H = 0x030D; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; +SYSCFG3 = 0x0166; +SYSCFG3_L = 0x0166; +SYSCFG3_H = 0x0167; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x0380; +TB0CTL_L = 0x0380; +TB0CTL_H = 0x0381; +TB0CCTL0 = 0x0382; +TB0CCTL0_L = 0x0382; +TB0CCTL0_H = 0x0383; +TB0CCTL1 = 0x0384; +TB0CCTL1_L = 0x0384; +TB0CCTL1_H = 0x0385; +TB0CCTL2 = 0x0386; +TB0CCTL2_L = 0x0386; +TB0CCTL2_H = 0x0387; +TB0R = 0x0390; +TB0R_L = 0x0390; +TB0R_H = 0x0391; +TB0CCR0 = 0x0392; +TB0CCR0_L = 0x0392; +TB0CCR0_H = 0x0393; +TB0CCR1 = 0x0394; +TB0CCR1_L = 0x0394; +TB0CCR1_H = 0x0395; +TB0CCR2 = 0x0396; +TB0CCR2_L = 0x0396; +TB0CCR2_H = 0x0397; +TB0EX0 = 0x03A0; +TB0EX0_L = 0x03A0; +TB0EX0_H = 0x03A1; +TB0IV = 0x03AE; +TB0IV_L = 0x03AE; +TB0IV_H = 0x03AF; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; + + +/***************************************************************************** + eCOMP0 +*****************************************************************************/ +CPCTL0 = 0x08E0; +CPCTL0_L = 0x08E0; +CPCTL0_H = 0x08E1; +CPCTL1 = 0x08E2; +CPCTL1_L = 0x08E2; +CPCTL1_H = 0x08E3; +CPINT = 0x08E6; +CPINT_L = 0x08E6; +CPINT_H = 0x08E7; +CPIV = 0x08E8; +CPIV_L = 0x08E8; +CPIV_H = 0x08E9; +CPDACCTL = 0x08F0; +CPDACCTL_L = 0x08F0; +CPDACCTL_H = 0x08F1; +CPDACDATA = 0x08F2; +CPDACDATA_L = 0x08F2; +CPDACDATA_H = 0x08F3; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0STATW_L = 0x050A; +UCA0STATW_H = 0x050B; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0ABCTL_L = 0x0510; +UCA0ABCTL_H = 0x0511; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +UCA0IV_L = 0x051E; +UCA0IV_H = 0x051F; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr2032.cmd b/msp430/msp430fr2032.cmd new file mode 100644 index 00000000..dabd36a3 --- /dev/null +++ b/msp430/msp430fr2032.cmd @@ -0,0 +1,500 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr2032.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC +************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; +/************************************************************* +* Backup Memory Module +*************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x02EE; +CAPTIO0CTL_L = 0x02EE; +CAPTIO0CTL_H = 0x02EF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; +/************************************************************ +* CLOCK SYSTEM CONTROL +************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; +/************************************************************ +* PMM - Power Management System for FR2xx/FR4xx +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PMMIE = 0x012E; +PMMIE_L = 0x012E; +PMMIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* Real-Time Clock (RTC) Counter +************************************************************/ +RTCCTL = 0x03C0; +RTCCTL_L = 0x03C0; +RTCCTL_H = 0x03C1; +RTCIV = 0x03C4; +RTCIV_L = 0x03C4; +RTCIV_H = 0x03C5; +RTCMOD = 0x03C8; +RTCMOD_L = 0x03C8; +RTCMOD_H = 0x03C9; +RTCCNT = 0x03CC; +RTCCNT_L = 0x03CC; +RTCCNT_H = 0x03CD; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSBERRIV = 0x0158; +SYSBERRIV_L = 0x0158; +SYSBERRIV_H = 0x0159; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0300; +TA0CCTL0 = 0x0302; +TA0CCTL1 = 0x0304; +TA0CCTL2 = 0x0306; +TA0R = 0x0310; +TA0CCR0 = 0x0312; +TA0CCR1 = 0x0314; +TA0CCR2 = 0x0316; +TA0IV = 0x032E; +TA0EX0 = 0x0320; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0340; +TA1CCTL0 = 0x0342; +TA1CCTL1 = 0x0344; +TA1CCTL2 = 0x0346; +TA1R = 0x0350; +TA1CCR0 = 0x0352; +TA1CCR1 = 0x0354; +TA1CCR2 = 0x0356; +TA1IV = 0x036E; +TA1EX0 = 0x0360; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0540; +UCB0CTLW0_L = 0x0540; +UCB0CTLW0_H = 0x0541; +UCB0CTLW1 = 0x0542; +UCB0CTLW1_L = 0x0542; +UCB0CTLW1_H = 0x0543; +UCB0BRW = 0x0546; +UCB0BRW_L = 0x0546; +UCB0BRW_H = 0x0547; +UCB0STATW = 0x0548; +UCB0STATW_L = 0x0548; +UCB0STATW_H = 0x0549; +UCB0TBCNT = 0x054A; +UCB0TBCNT_L = 0x054A; +UCB0TBCNT_H = 0x054B; +UCB0RXBUF = 0x054C; +UCB0RXBUF_L = 0x054C; +UCB0RXBUF_H = 0x054D; +UCB0TXBUF = 0x054E; +UCB0TXBUF_L = 0x054E; +UCB0TXBUF_H = 0x054F; +UCB0I2COA0 = 0x0554; +UCB0I2COA0_L = 0x0554; +UCB0I2COA0_H = 0x0555; +UCB0I2COA1 = 0x0556; +UCB0I2COA1_L = 0x0556; +UCB0I2COA1_H = 0x0557; +UCB0I2COA2 = 0x0558; +UCB0I2COA2_L = 0x0558; +UCB0I2COA2_H = 0x0559; +UCB0I2COA3 = 0x055A; +UCB0I2COA3_L = 0x055A; +UCB0I2COA3_H = 0x055B; +UCB0ADDRX = 0x055C; +UCB0ADDRX_L = 0x055C; +UCB0ADDRX_H = 0x055D; +UCB0ADDMASK = 0x055E; +UCB0ADDMASK_L = 0x055E; +UCB0ADDMASK_H = 0x055F; +UCB0I2CSA = 0x0560; +UCB0I2CSA_L = 0x0560; +UCB0I2CSA_H = 0x0561; +UCB0IE = 0x056A; +UCB0IE_L = 0x056A; +UCB0IE_H = 0x056B; +UCB0IFG = 0x056C; +UCB0IFG_L = 0x056C; +UCB0IFG_H = 0x056D; +UCB0IV = 0x056E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr2033.cmd b/msp430/msp430fr2033.cmd new file mode 100644 index 00000000..d3aaf8f2 --- /dev/null +++ b/msp430/msp430fr2033.cmd @@ -0,0 +1,500 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr2033.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC +************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; +/************************************************************* +* Backup Memory Module +*************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x02EE; +CAPTIO0CTL_L = 0x02EE; +CAPTIO0CTL_H = 0x02EF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; +/************************************************************ +* CLOCK SYSTEM CONTROL +************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; +/************************************************************ +* PMM - Power Management System for FR2xx/FR4xx +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PMMIE = 0x012E; +PMMIE_L = 0x012E; +PMMIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* Real-Time Clock (RTC) Counter +************************************************************/ +RTCCTL = 0x03C0; +RTCCTL_L = 0x03C0; +RTCCTL_H = 0x03C1; +RTCIV = 0x03C4; +RTCIV_L = 0x03C4; +RTCIV_H = 0x03C5; +RTCMOD = 0x03C8; +RTCMOD_L = 0x03C8; +RTCMOD_H = 0x03C9; +RTCCNT = 0x03CC; +RTCCNT_L = 0x03CC; +RTCCNT_H = 0x03CD; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSBERRIV = 0x0158; +SYSBERRIV_L = 0x0158; +SYSBERRIV_H = 0x0159; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0300; +TA0CCTL0 = 0x0302; +TA0CCTL1 = 0x0304; +TA0CCTL2 = 0x0306; +TA0R = 0x0310; +TA0CCR0 = 0x0312; +TA0CCR1 = 0x0314; +TA0CCR2 = 0x0316; +TA0IV = 0x032E; +TA0EX0 = 0x0320; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0340; +TA1CCTL0 = 0x0342; +TA1CCTL1 = 0x0344; +TA1CCTL2 = 0x0346; +TA1R = 0x0350; +TA1CCR0 = 0x0352; +TA1CCR1 = 0x0354; +TA1CCR2 = 0x0356; +TA1IV = 0x036E; +TA1EX0 = 0x0360; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0540; +UCB0CTLW0_L = 0x0540; +UCB0CTLW0_H = 0x0541; +UCB0CTLW1 = 0x0542; +UCB0CTLW1_L = 0x0542; +UCB0CTLW1_H = 0x0543; +UCB0BRW = 0x0546; +UCB0BRW_L = 0x0546; +UCB0BRW_H = 0x0547; +UCB0STATW = 0x0548; +UCB0STATW_L = 0x0548; +UCB0STATW_H = 0x0549; +UCB0TBCNT = 0x054A; +UCB0TBCNT_L = 0x054A; +UCB0TBCNT_H = 0x054B; +UCB0RXBUF = 0x054C; +UCB0RXBUF_L = 0x054C; +UCB0RXBUF_H = 0x054D; +UCB0TXBUF = 0x054E; +UCB0TXBUF_L = 0x054E; +UCB0TXBUF_H = 0x054F; +UCB0I2COA0 = 0x0554; +UCB0I2COA0_L = 0x0554; +UCB0I2COA0_H = 0x0555; +UCB0I2COA1 = 0x0556; +UCB0I2COA1_L = 0x0556; +UCB0I2COA1_H = 0x0557; +UCB0I2COA2 = 0x0558; +UCB0I2COA2_L = 0x0558; +UCB0I2COA2_H = 0x0559; +UCB0I2COA3 = 0x055A; +UCB0I2COA3_L = 0x055A; +UCB0I2COA3_H = 0x055B; +UCB0ADDRX = 0x055C; +UCB0ADDRX_L = 0x055C; +UCB0ADDRX_H = 0x055D; +UCB0ADDMASK = 0x055E; +UCB0ADDMASK_L = 0x055E; +UCB0ADDMASK_H = 0x055F; +UCB0I2CSA = 0x0560; +UCB0I2CSA_L = 0x0560; +UCB0I2CSA_H = 0x0561; +UCB0IE = 0x056A; +UCB0IE_L = 0x056A; +UCB0IE_H = 0x056B; +UCB0IFG = 0x056C; +UCB0IFG_L = 0x056C; +UCB0IFG_H = 0x056D; +UCB0IV = 0x056E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr2100.cmd b/msp430/msp430fr2100.cmd new file mode 100644 index 00000000..681206d9 --- /dev/null +++ b/msp430/msp430fr2100.cmd @@ -0,0 +1,513 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr2100.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC +*****************************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; + + +/***************************************************************************** + BKMEM +*****************************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; + + +/***************************************************************************** + CAPTIO +*****************************************************************************/ +CAPTIOCTL = 0x02EE; +CAPTIOCTL_L = 0x02EE; +CAPTIOCTL_H = 0x02EF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + + + +/***************************************************************************** + FRCTL +*****************************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RTC +*****************************************************************************/ +RTCCTL = 0x0300; +RTCCTL_L = 0x0300; +RTCCTL_H = 0x0301; +RTCIV = 0x0304; +RTCIV_L = 0x0304; +RTCIV_H = 0x0305; +RTCMOD = 0x0308; +RTCMOD_L = 0x0308; +RTCMOD_H = 0x0309; +RTCCNT = 0x030C; +RTCCNT_L = 0x030C; +RTCCNT_H = 0x030D; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; +SYSCFG3 = 0x0166; +SYSCFG3_L = 0x0166; +SYSCFG3_H = 0x0167; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x0380; +TB0CTL_L = 0x0380; +TB0CTL_H = 0x0381; +TB0CCTL0 = 0x0382; +TB0CCTL0_L = 0x0382; +TB0CCTL0_H = 0x0383; +TB0CCTL1 = 0x0384; +TB0CCTL1_L = 0x0384; +TB0CCTL1_H = 0x0385; +TB0CCTL2 = 0x0386; +TB0CCTL2_L = 0x0386; +TB0CCTL2_H = 0x0387; +TB0R = 0x0390; +TB0R_L = 0x0390; +TB0R_H = 0x0391; +TB0CCR0 = 0x0392; +TB0CCR0_L = 0x0392; +TB0CCR0_H = 0x0393; +TB0CCR1 = 0x0394; +TB0CCR1_L = 0x0394; +TB0CCR1_H = 0x0395; +TB0CCR2 = 0x0396; +TB0CCR2_L = 0x0396; +TB0CCR2_H = 0x0397; +TB0EX0 = 0x03A0; +TB0EX0_L = 0x03A0; +TB0EX0_H = 0x03A1; +TB0IV = 0x03AE; +TB0IV_L = 0x03AE; +TB0IV_H = 0x03AF; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; + + +/***************************************************************************** + eCOMP0 +*****************************************************************************/ +CPCTL0 = 0x08E0; +CPCTL0_L = 0x08E0; +CPCTL0_H = 0x08E1; +CPCTL1 = 0x08E2; +CPCTL1_L = 0x08E2; +CPCTL1_H = 0x08E3; +CPINT = 0x08E6; +CPINT_L = 0x08E6; +CPINT_H = 0x08E7; +CPIV = 0x08E8; +CPIV_L = 0x08E8; +CPIV_H = 0x08E9; +CPDACCTL = 0x08F0; +CPDACCTL_L = 0x08F0; +CPDACCTL_H = 0x08F1; +CPDACDATA = 0x08F2; +CPDACDATA_L = 0x08F2; +CPDACDATA_H = 0x08F3; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0STATW_L = 0x050A; +UCA0STATW_H = 0x050B; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0ABCTL_L = 0x0510; +UCA0ABCTL_H = 0x0511; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +UCA0IV_L = 0x051E; +UCA0IV_H = 0x051F; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr2110.cmd b/msp430/msp430fr2110.cmd new file mode 100644 index 00000000..f8469005 --- /dev/null +++ b/msp430/msp430fr2110.cmd @@ -0,0 +1,513 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr2110.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC +*****************************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; + + +/***************************************************************************** + BKMEM +*****************************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; + + +/***************************************************************************** + CAPTIO +*****************************************************************************/ +CAPTIOCTL = 0x02EE; +CAPTIOCTL_L = 0x02EE; +CAPTIOCTL_H = 0x02EF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + + + +/***************************************************************************** + FRCTL +*****************************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RTC +*****************************************************************************/ +RTCCTL = 0x0300; +RTCCTL_L = 0x0300; +RTCCTL_H = 0x0301; +RTCIV = 0x0304; +RTCIV_L = 0x0304; +RTCIV_H = 0x0305; +RTCMOD = 0x0308; +RTCMOD_L = 0x0308; +RTCMOD_H = 0x0309; +RTCCNT = 0x030C; +RTCCNT_L = 0x030C; +RTCCNT_H = 0x030D; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; +SYSCFG3 = 0x0166; +SYSCFG3_L = 0x0166; +SYSCFG3_H = 0x0167; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x0380; +TB0CTL_L = 0x0380; +TB0CTL_H = 0x0381; +TB0CCTL0 = 0x0382; +TB0CCTL0_L = 0x0382; +TB0CCTL0_H = 0x0383; +TB0CCTL1 = 0x0384; +TB0CCTL1_L = 0x0384; +TB0CCTL1_H = 0x0385; +TB0CCTL2 = 0x0386; +TB0CCTL2_L = 0x0386; +TB0CCTL2_H = 0x0387; +TB0R = 0x0390; +TB0R_L = 0x0390; +TB0R_H = 0x0391; +TB0CCR0 = 0x0392; +TB0CCR0_L = 0x0392; +TB0CCR0_H = 0x0393; +TB0CCR1 = 0x0394; +TB0CCR1_L = 0x0394; +TB0CCR1_H = 0x0395; +TB0CCR2 = 0x0396; +TB0CCR2_L = 0x0396; +TB0CCR2_H = 0x0397; +TB0EX0 = 0x03A0; +TB0EX0_L = 0x03A0; +TB0EX0_H = 0x03A1; +TB0IV = 0x03AE; +TB0IV_L = 0x03AE; +TB0IV_H = 0x03AF; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; + + +/***************************************************************************** + eCOMP0 +*****************************************************************************/ +CPCTL0 = 0x08E0; +CPCTL0_L = 0x08E0; +CPCTL0_H = 0x08E1; +CPCTL1 = 0x08E2; +CPCTL1_L = 0x08E2; +CPCTL1_H = 0x08E3; +CPINT = 0x08E6; +CPINT_L = 0x08E6; +CPINT_H = 0x08E7; +CPIV = 0x08E8; +CPIV_L = 0x08E8; +CPIV_H = 0x08E9; +CPDACCTL = 0x08F0; +CPDACCTL_L = 0x08F0; +CPDACCTL_H = 0x08F1; +CPDACDATA = 0x08F2; +CPDACDATA_L = 0x08F2; +CPDACDATA_H = 0x08F3; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0STATW_L = 0x050A; +UCA0STATW_H = 0x050B; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0ABCTL_L = 0x0510; +UCA0ABCTL_H = 0x0511; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +UCA0IV_L = 0x051E; +UCA0IV_H = 0x051F; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr2111.cmd b/msp430/msp430fr2111.cmd new file mode 100644 index 00000000..042c0de6 --- /dev/null +++ b/msp430/msp430fr2111.cmd @@ -0,0 +1,513 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr2111.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC +*****************************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; + + +/***************************************************************************** + BKMEM +*****************************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; + + +/***************************************************************************** + CAPTIO +*****************************************************************************/ +CAPTIOCTL = 0x02EE; +CAPTIOCTL_L = 0x02EE; +CAPTIOCTL_H = 0x02EF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + + + +/***************************************************************************** + FRCTL +*****************************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RTC +*****************************************************************************/ +RTCCTL = 0x0300; +RTCCTL_L = 0x0300; +RTCCTL_H = 0x0301; +RTCIV = 0x0304; +RTCIV_L = 0x0304; +RTCIV_H = 0x0305; +RTCMOD = 0x0308; +RTCMOD_L = 0x0308; +RTCMOD_H = 0x0309; +RTCCNT = 0x030C; +RTCCNT_L = 0x030C; +RTCCNT_H = 0x030D; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; +SYSCFG3 = 0x0166; +SYSCFG3_L = 0x0166; +SYSCFG3_H = 0x0167; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x0380; +TB0CTL_L = 0x0380; +TB0CTL_H = 0x0381; +TB0CCTL0 = 0x0382; +TB0CCTL0_L = 0x0382; +TB0CCTL0_H = 0x0383; +TB0CCTL1 = 0x0384; +TB0CCTL1_L = 0x0384; +TB0CCTL1_H = 0x0385; +TB0CCTL2 = 0x0386; +TB0CCTL2_L = 0x0386; +TB0CCTL2_H = 0x0387; +TB0R = 0x0390; +TB0R_L = 0x0390; +TB0R_H = 0x0391; +TB0CCR0 = 0x0392; +TB0CCR0_L = 0x0392; +TB0CCR0_H = 0x0393; +TB0CCR1 = 0x0394; +TB0CCR1_L = 0x0394; +TB0CCR1_H = 0x0395; +TB0CCR2 = 0x0396; +TB0CCR2_L = 0x0396; +TB0CCR2_H = 0x0397; +TB0EX0 = 0x03A0; +TB0EX0_L = 0x03A0; +TB0EX0_H = 0x03A1; +TB0IV = 0x03AE; +TB0IV_L = 0x03AE; +TB0IV_H = 0x03AF; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; + + +/***************************************************************************** + eCOMP0 +*****************************************************************************/ +CPCTL0 = 0x08E0; +CPCTL0_L = 0x08E0; +CPCTL0_H = 0x08E1; +CPCTL1 = 0x08E2; +CPCTL1_L = 0x08E2; +CPCTL1_H = 0x08E3; +CPINT = 0x08E6; +CPINT_L = 0x08E6; +CPINT_H = 0x08E7; +CPIV = 0x08E8; +CPIV_L = 0x08E8; +CPIV_H = 0x08E9; +CPDACCTL = 0x08F0; +CPDACCTL_L = 0x08F0; +CPDACCTL_H = 0x08F1; +CPDACDATA = 0x08F2; +CPDACDATA_L = 0x08F2; +CPDACDATA_H = 0x08F3; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0STATW_L = 0x050A; +UCA0STATW_H = 0x050B; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0ABCTL_L = 0x0510; +UCA0ABCTL_H = 0x0511; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +UCA0IV_L = 0x051E; +UCA0IV_H = 0x051F; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr2153.cmd b/msp430/msp430fr2153.cmd new file mode 100644 index 00000000..1142e513 --- /dev/null +++ b/msp430/msp430fr2153.cmd @@ -0,0 +1,1064 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr2153.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC +*****************************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; + + +/***************************************************************************** + BKMEM +*****************************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; + + +/***************************************************************************** + CAPTIO +*****************************************************************************/ +CAPTIOCTL = 0x02EE; +CAPTIOCTL_L = 0x02EE; +CAPTIOCTL_H = 0x02EF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + + + +/***************************************************************************** + FRCTL +*****************************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; + + +/***************************************************************************** + ICC +*****************************************************************************/ +ICCSC = 0x06C0; +ICCSC_L = 0x06C0; +ICCSC_H = 0x06C1; +ICCMVS = 0x06C2; +ICCMVS_L = 0x06C2; +ICCMVS_H = 0x06C3; +ICCILSR0 = 0x06C4; +ICCILSR0_L = 0x06C4; +ICCILSR0_H = 0x06C5; +ICCILSR1 = 0x06C6; +ICCILSR1_L = 0x06C6; +ICCILSR1_H = 0x06C7; +ICCILSR2 = 0x06C8; +ICCILSR2_L = 0x06C8; +ICCILSR2_H = 0x06C9; +ICCILSR3 = 0x06CA; +ICCILSR3_L = 0x06CA; +ICCILSR3_H = 0x06CB; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RTC +*****************************************************************************/ +RTCCTL = 0x0300; +RTCCTL_L = 0x0300; +RTCCTL_H = 0x0301; +RTCIV = 0x0304; +RTCIV_L = 0x0304; +RTCIV_H = 0x0305; +RTCMOD = 0x0308; +RTCMOD_L = 0x0308; +RTCMOD_H = 0x0309; +RTCCNT = 0x030C; +RTCCNT_L = 0x030C; +RTCCNT_H = 0x030D; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x0380; +TB0CTL_L = 0x0380; +TB0CTL_H = 0x0381; +TB0CCTL0 = 0x0382; +TB0CCTL0_L = 0x0382; +TB0CCTL0_H = 0x0383; +TB0CCTL1 = 0x0384; +TB0CCTL1_L = 0x0384; +TB0CCTL1_H = 0x0385; +TB0CCTL2 = 0x0386; +TB0CCTL2_L = 0x0386; +TB0CCTL2_H = 0x0387; +TB0R = 0x0390; +TB0R_L = 0x0390; +TB0R_H = 0x0391; +TB0CCR0 = 0x0392; +TB0CCR0_L = 0x0392; +TB0CCR0_H = 0x0393; +TB0CCR1 = 0x0394; +TB0CCR1_L = 0x0394; +TB0CCR1_H = 0x0395; +TB0CCR2 = 0x0396; +TB0CCR2_L = 0x0396; +TB0CCR2_H = 0x0397; +TB0EX0 = 0x03A0; +TB0EX0_L = 0x03A0; +TB0EX0_H = 0x03A1; +TB0IV = 0x03AE; +TB0IV_L = 0x03AE; +TB0IV_H = 0x03AF; + + +/***************************************************************************** + TB1 +*****************************************************************************/ +TB1CTL = 0x03C0; +TB1CTL_L = 0x03C0; +TB1CTL_H = 0x03C1; +TB1CCTL0 = 0x03C2; +TB1CCTL0_L = 0x03C2; +TB1CCTL0_H = 0x03C3; +TB1CCTL1 = 0x03C4; +TB1CCTL1_L = 0x03C4; +TB1CCTL1_H = 0x03C5; +TB1CCTL2 = 0x03C6; +TB1CCTL2_L = 0x03C6; +TB1CCTL2_H = 0x03C7; +TB1R = 0x03D0; +TB1R_L = 0x03D0; +TB1R_H = 0x03D1; +TB1CCR0 = 0x03D2; +TB1CCR0_L = 0x03D2; +TB1CCR0_H = 0x03D3; +TB1CCR1 = 0x03D4; +TB1CCR1_L = 0x03D4; +TB1CCR1_H = 0x03D5; +TB1CCR2 = 0x03D6; +TB1CCR2_L = 0x03D6; +TB1CCR2_H = 0x03D7; +TB1EX0 = 0x03E0; +TB1EX0_L = 0x03E0; +TB1EX0_H = 0x03E1; +TB1IV = 0x03EE; +TB1IV_L = 0x03EE; +TB1IV_H = 0x03EF; + + +/***************************************************************************** + TB2 +*****************************************************************************/ +TB2CTL = 0x0400; +TB2CTL_L = 0x0400; +TB2CTL_H = 0x0401; +TB2CCTL0 = 0x0402; +TB2CCTL0_L = 0x0402; +TB2CCTL0_H = 0x0403; +TB2CCTL1 = 0x0404; +TB2CCTL1_L = 0x0404; +TB2CCTL1_H = 0x0405; +TB2CCTL2 = 0x0406; +TB2CCTL2_L = 0x0406; +TB2CCTL2_H = 0x0407; +TB2R = 0x0410; +TB2R_L = 0x0410; +TB2R_H = 0x0411; +TB2CCR0 = 0x0412; +TB2CCR0_L = 0x0412; +TB2CCR0_H = 0x0413; +TB2CCR1 = 0x0414; +TB2CCR1_L = 0x0414; +TB2CCR1_H = 0x0415; +TB2CCR2 = 0x0416; +TB2CCR2_L = 0x0416; +TB2CCR2_H = 0x0417; +TB2EX0 = 0x0420; +TB2EX0_L = 0x0420; +TB2EX0_H = 0x0421; +TB2IV = 0x042E; +TB2IV_L = 0x042E; +TB2IV_H = 0x042F; + + +/***************************************************************************** + TB3 +*****************************************************************************/ +TB3CTL = 0x0440; +TB3CTL_L = 0x0440; +TB3CTL_H = 0x0441; +TB3CCTL0 = 0x0442; +TB3CCTL0_L = 0x0442; +TB3CCTL0_H = 0x0443; +TB3CCTL1 = 0x0444; +TB3CCTL1_L = 0x0444; +TB3CCTL1_H = 0x0445; +TB3CCTL2 = 0x0446; +TB3CCTL2_L = 0x0446; +TB3CCTL2_H = 0x0447; +TB3CCTL3 = 0x0448; +TB3CCTL3_L = 0x0448; +TB3CCTL3_H = 0x0449; +TB3CCTL4 = 0x044A; +TB3CCTL4_L = 0x044A; +TB3CCTL4_H = 0x044B; +TB3CCTL5 = 0x044C; +TB3CCTL5_L = 0x044C; +TB3CCTL5_H = 0x044D; +TB3CCTL6 = 0x044E; +TB3CCTL6_L = 0x044E; +TB3CCTL6_H = 0x044F; +TB3R = 0x0450; +TB3R_L = 0x0450; +TB3R_H = 0x0451; +TB3CCR0 = 0x0452; +TB3CCR0_L = 0x0452; +TB3CCR0_H = 0x0453; +TB3CCR1 = 0x0454; +TB3CCR1_L = 0x0454; +TB3CCR1_H = 0x0455; +TB3CCR2 = 0x0456; +TB3CCR2_L = 0x0456; +TB3CCR2_H = 0x0457; +TB3CCR3 = 0x0458; +TB3CCR3_L = 0x0458; +TB3CCR3_H = 0x0459; +TB3CCR4 = 0x045A; +TB3CCR4_L = 0x045A; +TB3CCR4_H = 0x045B; +TB3CCR5 = 0x045C; +TB3CCR5_L = 0x045C; +TB3CCR5_H = 0x045D; +TB3CCR6 = 0x045E; +TB3CCR6_L = 0x045E; +TB3CCR6_H = 0x045F; +TB3EX0 = 0x0460; +TB3EX0_L = 0x0460; +TB3EX0_H = 0x0461; +TB3IV = 0x046E; +TB3IV_L = 0x046E; +TB3IV_H = 0x046F; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; + + +/***************************************************************************** + eCOMP0 +*****************************************************************************/ +CP0CTL0 = 0x08E0; +CP0CTL0_L = 0x08E0; +CP0CTL0_H = 0x08E1; +CP0CTL1 = 0x08E2; +CP0CTL1_L = 0x08E2; +CP0CTL1_H = 0x08E3; +CP0INT = 0x08E6; +CP0INT_L = 0x08E6; +CP0INT_H = 0x08E7; +CP0IV = 0x08E8; +CP0IV_L = 0x08E8; +CP0IV_H = 0x08E9; +CP0DACCTL = 0x08F0; +CP0DACCTL_L = 0x08F0; +CP0DACCTL_H = 0x08F1; +CP0DACDATA = 0x08F2; +CP0DACDATA_L = 0x08F2; +CP0DACDATA_H = 0x08F3; + + +/***************************************************************************** + eCOMP1 +*****************************************************************************/ +CP1CTL0 = 0x0900; +CP1CTL0_L = 0x0900; +CP1CTL0_H = 0x0901; +CP1CTL1 = 0x0902; +CP1CTL1_L = 0x0902; +CP1CTL1_H = 0x0903; +CP1INT = 0x0906; +CP1INT_L = 0x0906; +CP1INT_H = 0x0907; +CP1IV = 0x0908; +CP1IV_L = 0x0908; +CP1IV_H = 0x0909; +CP1DACCTL = 0x0910; +CP1DACCTL_L = 0x0910; +CP1DACCTL_H = 0x0911; +CP1DACDATA = 0x0912; +CP1DACDATA_L = 0x0912; +CP1DACDATA_H = 0x0913; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0STATW_L = 0x050A; +UCA0STATW_H = 0x050B; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0ABCTL_L = 0x0510; +UCA0ABCTL_H = 0x0511; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +UCA0IV_L = 0x051E; +UCA0IV_H = 0x051F; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x0580; +UCA1CTLW0_L = 0x0580; +UCA1CTLW0_H = 0x0581; +UCA1CTLW1 = 0x0582; +UCA1CTLW1_L = 0x0582; +UCA1CTLW1_H = 0x0583; +UCA1BRW = 0x0586; +UCA1BRW_L = 0x0586; +UCA1BRW_H = 0x0587; +UCA1MCTLW = 0x0588; +UCA1MCTLW_L = 0x0588; +UCA1MCTLW_H = 0x0589; +UCA1STATW = 0x058A; +UCA1STATW_L = 0x058A; +UCA1STATW_H = 0x058B; +UCA1RXBUF = 0x058C; +UCA1RXBUF_L = 0x058C; +UCA1RXBUF_H = 0x058D; +UCA1TXBUF = 0x058E; +UCA1TXBUF_L = 0x058E; +UCA1TXBUF_H = 0x058F; +UCA1ABCTL = 0x0590; +UCA1ABCTL_L = 0x0590; +UCA1ABCTL_H = 0x0591; +UCA1IRCTL = 0x0592; +UCA1IRCTL_L = 0x0592; +UCA1IRCTL_H = 0x0593; +UCA1IE = 0x059A; +UCA1IE_L = 0x059A; +UCA1IE_H = 0x059B; +UCA1IFG = 0x059C; +UCA1IFG_L = 0x059C; +UCA1IFG_H = 0x059D; +UCA1IV = 0x059E; +UCA1IV_L = 0x059E; +UCA1IV_H = 0x059F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0540; +UCB0CTLW0_L = 0x0540; +UCB0CTLW0_H = 0x0541; +UCB0CTLW1 = 0x0542; +UCB0CTLW1_L = 0x0542; +UCB0CTLW1_H = 0x0543; +UCB0BRW = 0x0546; +UCB0BRW_L = 0x0546; +UCB0BRW_H = 0x0547; +UCB0STATW = 0x0548; +UCB0STATW_L = 0x0548; +UCB0STATW_H = 0x0549; +UCB0TBCNT = 0x054A; +UCB0TBCNT_L = 0x054A; +UCB0TBCNT_H = 0x054B; +UCB0RXBUF = 0x054C; +UCB0RXBUF_L = 0x054C; +UCB0RXBUF_H = 0x054D; +UCB0TXBUF = 0x054E; +UCB0TXBUF_L = 0x054E; +UCB0TXBUF_H = 0x054F; +UCB0I2COA0 = 0x0554; +UCB0I2COA0_L = 0x0554; +UCB0I2COA0_H = 0x0555; +UCB0I2COA1 = 0x0556; +UCB0I2COA1_L = 0x0556; +UCB0I2COA1_H = 0x0557; +UCB0I2COA2 = 0x0558; +UCB0I2COA2_L = 0x0558; +UCB0I2COA2_H = 0x0559; +UCB0I2COA3 = 0x055A; +UCB0I2COA3_L = 0x055A; +UCB0I2COA3_H = 0x055B; +UCB0ADDRX = 0x055C; +UCB0ADDRX_L = 0x055C; +UCB0ADDRX_H = 0x055D; +UCB0ADDMASK = 0x055E; +UCB0ADDMASK_L = 0x055E; +UCB0ADDMASK_H = 0x055F; +UCB0I2CSA = 0x0560; +UCB0I2CSA_L = 0x0560; +UCB0I2CSA_H = 0x0561; +UCB0IE = 0x056A; +UCB0IE_L = 0x056A; +UCB0IE_H = 0x056B; +UCB0IFG = 0x056C; +UCB0IFG_L = 0x056C; +UCB0IFG_H = 0x056D; +UCB0IV = 0x056E; +UCB0IV_L = 0x056E; +UCB0IV_H = 0x056F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x05C0; +UCB1CTLW0_L = 0x05C0; +UCB1CTLW0_H = 0x05C1; +UCB1CTLW1 = 0x05C2; +UCB1CTLW1_L = 0x05C2; +UCB1CTLW1_H = 0x05C3; +UCB1BRW = 0x05C6; +UCB1BRW_L = 0x05C6; +UCB1BRW_H = 0x05C7; +UCB1STATW = 0x05C8; +UCB1STATW_L = 0x05C8; +UCB1STATW_H = 0x05C9; +UCB1TBCNT = 0x05CA; +UCB1TBCNT_L = 0x05CA; +UCB1TBCNT_H = 0x05CB; +UCB1RXBUF = 0x05CC; +UCB1RXBUF_L = 0x05CC; +UCB1RXBUF_H = 0x05CD; +UCB1TXBUF = 0x05CE; +UCB1TXBUF_L = 0x05CE; +UCB1TXBUF_H = 0x05CF; +UCB1I2COA0 = 0x05D4; +UCB1I2COA0_L = 0x05D4; +UCB1I2COA0_H = 0x05D5; +UCB1I2COA1 = 0x05D6; +UCB1I2COA1_L = 0x05D6; +UCB1I2COA1_H = 0x05D7; +UCB1I2COA2 = 0x05D8; +UCB1I2COA2_L = 0x05D8; +UCB1I2COA2_H = 0x05D9; +UCB1I2COA3 = 0x05DA; +UCB1I2COA3_L = 0x05DA; +UCB1I2COA3_H = 0x05DB; +UCB1ADDRX = 0x05DC; +UCB1ADDRX_L = 0x05DC; +UCB1ADDRX_H = 0x05DD; +UCB1ADDMASK = 0x05DE; +UCB1ADDMASK_L = 0x05DE; +UCB1ADDMASK_H = 0x05DF; +UCB1I2CSA = 0x05E0; +UCB1I2CSA_L = 0x05E0; +UCB1I2CSA_H = 0x05E1; +UCB1IE = 0x05EA; +UCB1IE_L = 0x05EA; +UCB1IE_H = 0x05EB; +UCB1IFG = 0x05EC; +UCB1IFG_L = 0x05EC; +UCB1IFG_H = 0x05ED; +UCB1IV = 0x05EE; +UCB1IV_L = 0x05EE; +UCB1IV_H = 0x05EF; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr2155.cmd b/msp430/msp430fr2155.cmd new file mode 100644 index 00000000..78ffa717 --- /dev/null +++ b/msp430/msp430fr2155.cmd @@ -0,0 +1,1064 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr2155.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC +*****************************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; + + +/***************************************************************************** + BKMEM +*****************************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; + + +/***************************************************************************** + CAPTIO +*****************************************************************************/ +CAPTIOCTL = 0x02EE; +CAPTIOCTL_L = 0x02EE; +CAPTIOCTL_H = 0x02EF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + + + +/***************************************************************************** + FRCTL +*****************************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; + + +/***************************************************************************** + ICC +*****************************************************************************/ +ICCSC = 0x06C0; +ICCSC_L = 0x06C0; +ICCSC_H = 0x06C1; +ICCMVS = 0x06C2; +ICCMVS_L = 0x06C2; +ICCMVS_H = 0x06C3; +ICCILSR0 = 0x06C4; +ICCILSR0_L = 0x06C4; +ICCILSR0_H = 0x06C5; +ICCILSR1 = 0x06C6; +ICCILSR1_L = 0x06C6; +ICCILSR1_H = 0x06C7; +ICCILSR2 = 0x06C8; +ICCILSR2_L = 0x06C8; +ICCILSR2_H = 0x06C9; +ICCILSR3 = 0x06CA; +ICCILSR3_L = 0x06CA; +ICCILSR3_H = 0x06CB; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RTC +*****************************************************************************/ +RTCCTL = 0x0300; +RTCCTL_L = 0x0300; +RTCCTL_H = 0x0301; +RTCIV = 0x0304; +RTCIV_L = 0x0304; +RTCIV_H = 0x0305; +RTCMOD = 0x0308; +RTCMOD_L = 0x0308; +RTCMOD_H = 0x0309; +RTCCNT = 0x030C; +RTCCNT_L = 0x030C; +RTCCNT_H = 0x030D; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x0380; +TB0CTL_L = 0x0380; +TB0CTL_H = 0x0381; +TB0CCTL0 = 0x0382; +TB0CCTL0_L = 0x0382; +TB0CCTL0_H = 0x0383; +TB0CCTL1 = 0x0384; +TB0CCTL1_L = 0x0384; +TB0CCTL1_H = 0x0385; +TB0CCTL2 = 0x0386; +TB0CCTL2_L = 0x0386; +TB0CCTL2_H = 0x0387; +TB0R = 0x0390; +TB0R_L = 0x0390; +TB0R_H = 0x0391; +TB0CCR0 = 0x0392; +TB0CCR0_L = 0x0392; +TB0CCR0_H = 0x0393; +TB0CCR1 = 0x0394; +TB0CCR1_L = 0x0394; +TB0CCR1_H = 0x0395; +TB0CCR2 = 0x0396; +TB0CCR2_L = 0x0396; +TB0CCR2_H = 0x0397; +TB0EX0 = 0x03A0; +TB0EX0_L = 0x03A0; +TB0EX0_H = 0x03A1; +TB0IV = 0x03AE; +TB0IV_L = 0x03AE; +TB0IV_H = 0x03AF; + + +/***************************************************************************** + TB1 +*****************************************************************************/ +TB1CTL = 0x03C0; +TB1CTL_L = 0x03C0; +TB1CTL_H = 0x03C1; +TB1CCTL0 = 0x03C2; +TB1CCTL0_L = 0x03C2; +TB1CCTL0_H = 0x03C3; +TB1CCTL1 = 0x03C4; +TB1CCTL1_L = 0x03C4; +TB1CCTL1_H = 0x03C5; +TB1CCTL2 = 0x03C6; +TB1CCTL2_L = 0x03C6; +TB1CCTL2_H = 0x03C7; +TB1R = 0x03D0; +TB1R_L = 0x03D0; +TB1R_H = 0x03D1; +TB1CCR0 = 0x03D2; +TB1CCR0_L = 0x03D2; +TB1CCR0_H = 0x03D3; +TB1CCR1 = 0x03D4; +TB1CCR1_L = 0x03D4; +TB1CCR1_H = 0x03D5; +TB1CCR2 = 0x03D6; +TB1CCR2_L = 0x03D6; +TB1CCR2_H = 0x03D7; +TB1EX0 = 0x03E0; +TB1EX0_L = 0x03E0; +TB1EX0_H = 0x03E1; +TB1IV = 0x03EE; +TB1IV_L = 0x03EE; +TB1IV_H = 0x03EF; + + +/***************************************************************************** + TB2 +*****************************************************************************/ +TB2CTL = 0x0400; +TB2CTL_L = 0x0400; +TB2CTL_H = 0x0401; +TB2CCTL0 = 0x0402; +TB2CCTL0_L = 0x0402; +TB2CCTL0_H = 0x0403; +TB2CCTL1 = 0x0404; +TB2CCTL1_L = 0x0404; +TB2CCTL1_H = 0x0405; +TB2CCTL2 = 0x0406; +TB2CCTL2_L = 0x0406; +TB2CCTL2_H = 0x0407; +TB2R = 0x0410; +TB2R_L = 0x0410; +TB2R_H = 0x0411; +TB2CCR0 = 0x0412; +TB2CCR0_L = 0x0412; +TB2CCR0_H = 0x0413; +TB2CCR1 = 0x0414; +TB2CCR1_L = 0x0414; +TB2CCR1_H = 0x0415; +TB2CCR2 = 0x0416; +TB2CCR2_L = 0x0416; +TB2CCR2_H = 0x0417; +TB2EX0 = 0x0420; +TB2EX0_L = 0x0420; +TB2EX0_H = 0x0421; +TB2IV = 0x042E; +TB2IV_L = 0x042E; +TB2IV_H = 0x042F; + + +/***************************************************************************** + TB3 +*****************************************************************************/ +TB3CTL = 0x0440; +TB3CTL_L = 0x0440; +TB3CTL_H = 0x0441; +TB3CCTL0 = 0x0442; +TB3CCTL0_L = 0x0442; +TB3CCTL0_H = 0x0443; +TB3CCTL1 = 0x0444; +TB3CCTL1_L = 0x0444; +TB3CCTL1_H = 0x0445; +TB3CCTL2 = 0x0446; +TB3CCTL2_L = 0x0446; +TB3CCTL2_H = 0x0447; +TB3CCTL3 = 0x0448; +TB3CCTL3_L = 0x0448; +TB3CCTL3_H = 0x0449; +TB3CCTL4 = 0x044A; +TB3CCTL4_L = 0x044A; +TB3CCTL4_H = 0x044B; +TB3CCTL5 = 0x044C; +TB3CCTL5_L = 0x044C; +TB3CCTL5_H = 0x044D; +TB3CCTL6 = 0x044E; +TB3CCTL6_L = 0x044E; +TB3CCTL6_H = 0x044F; +TB3R = 0x0450; +TB3R_L = 0x0450; +TB3R_H = 0x0451; +TB3CCR0 = 0x0452; +TB3CCR0_L = 0x0452; +TB3CCR0_H = 0x0453; +TB3CCR1 = 0x0454; +TB3CCR1_L = 0x0454; +TB3CCR1_H = 0x0455; +TB3CCR2 = 0x0456; +TB3CCR2_L = 0x0456; +TB3CCR2_H = 0x0457; +TB3CCR3 = 0x0458; +TB3CCR3_L = 0x0458; +TB3CCR3_H = 0x0459; +TB3CCR4 = 0x045A; +TB3CCR4_L = 0x045A; +TB3CCR4_H = 0x045B; +TB3CCR5 = 0x045C; +TB3CCR5_L = 0x045C; +TB3CCR5_H = 0x045D; +TB3CCR6 = 0x045E; +TB3CCR6_L = 0x045E; +TB3CCR6_H = 0x045F; +TB3EX0 = 0x0460; +TB3EX0_L = 0x0460; +TB3EX0_H = 0x0461; +TB3IV = 0x046E; +TB3IV_L = 0x046E; +TB3IV_H = 0x046F; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; + + +/***************************************************************************** + eCOMP0 +*****************************************************************************/ +CP0CTL0 = 0x08E0; +CP0CTL0_L = 0x08E0; +CP0CTL0_H = 0x08E1; +CP0CTL1 = 0x08E2; +CP0CTL1_L = 0x08E2; +CP0CTL1_H = 0x08E3; +CP0INT = 0x08E6; +CP0INT_L = 0x08E6; +CP0INT_H = 0x08E7; +CP0IV = 0x08E8; +CP0IV_L = 0x08E8; +CP0IV_H = 0x08E9; +CP0DACCTL = 0x08F0; +CP0DACCTL_L = 0x08F0; +CP0DACCTL_H = 0x08F1; +CP0DACDATA = 0x08F2; +CP0DACDATA_L = 0x08F2; +CP0DACDATA_H = 0x08F3; + + +/***************************************************************************** + eCOMP1 +*****************************************************************************/ +CP1CTL0 = 0x0900; +CP1CTL0_L = 0x0900; +CP1CTL0_H = 0x0901; +CP1CTL1 = 0x0902; +CP1CTL1_L = 0x0902; +CP1CTL1_H = 0x0903; +CP1INT = 0x0906; +CP1INT_L = 0x0906; +CP1INT_H = 0x0907; +CP1IV = 0x0908; +CP1IV_L = 0x0908; +CP1IV_H = 0x0909; +CP1DACCTL = 0x0910; +CP1DACCTL_L = 0x0910; +CP1DACCTL_H = 0x0911; +CP1DACDATA = 0x0912; +CP1DACDATA_L = 0x0912; +CP1DACDATA_H = 0x0913; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0STATW_L = 0x050A; +UCA0STATW_H = 0x050B; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0ABCTL_L = 0x0510; +UCA0ABCTL_H = 0x0511; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +UCA0IV_L = 0x051E; +UCA0IV_H = 0x051F; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x0580; +UCA1CTLW0_L = 0x0580; +UCA1CTLW0_H = 0x0581; +UCA1CTLW1 = 0x0582; +UCA1CTLW1_L = 0x0582; +UCA1CTLW1_H = 0x0583; +UCA1BRW = 0x0586; +UCA1BRW_L = 0x0586; +UCA1BRW_H = 0x0587; +UCA1MCTLW = 0x0588; +UCA1MCTLW_L = 0x0588; +UCA1MCTLW_H = 0x0589; +UCA1STATW = 0x058A; +UCA1STATW_L = 0x058A; +UCA1STATW_H = 0x058B; +UCA1RXBUF = 0x058C; +UCA1RXBUF_L = 0x058C; +UCA1RXBUF_H = 0x058D; +UCA1TXBUF = 0x058E; +UCA1TXBUF_L = 0x058E; +UCA1TXBUF_H = 0x058F; +UCA1ABCTL = 0x0590; +UCA1ABCTL_L = 0x0590; +UCA1ABCTL_H = 0x0591; +UCA1IRCTL = 0x0592; +UCA1IRCTL_L = 0x0592; +UCA1IRCTL_H = 0x0593; +UCA1IE = 0x059A; +UCA1IE_L = 0x059A; +UCA1IE_H = 0x059B; +UCA1IFG = 0x059C; +UCA1IFG_L = 0x059C; +UCA1IFG_H = 0x059D; +UCA1IV = 0x059E; +UCA1IV_L = 0x059E; +UCA1IV_H = 0x059F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0540; +UCB0CTLW0_L = 0x0540; +UCB0CTLW0_H = 0x0541; +UCB0CTLW1 = 0x0542; +UCB0CTLW1_L = 0x0542; +UCB0CTLW1_H = 0x0543; +UCB0BRW = 0x0546; +UCB0BRW_L = 0x0546; +UCB0BRW_H = 0x0547; +UCB0STATW = 0x0548; +UCB0STATW_L = 0x0548; +UCB0STATW_H = 0x0549; +UCB0TBCNT = 0x054A; +UCB0TBCNT_L = 0x054A; +UCB0TBCNT_H = 0x054B; +UCB0RXBUF = 0x054C; +UCB0RXBUF_L = 0x054C; +UCB0RXBUF_H = 0x054D; +UCB0TXBUF = 0x054E; +UCB0TXBUF_L = 0x054E; +UCB0TXBUF_H = 0x054F; +UCB0I2COA0 = 0x0554; +UCB0I2COA0_L = 0x0554; +UCB0I2COA0_H = 0x0555; +UCB0I2COA1 = 0x0556; +UCB0I2COA1_L = 0x0556; +UCB0I2COA1_H = 0x0557; +UCB0I2COA2 = 0x0558; +UCB0I2COA2_L = 0x0558; +UCB0I2COA2_H = 0x0559; +UCB0I2COA3 = 0x055A; +UCB0I2COA3_L = 0x055A; +UCB0I2COA3_H = 0x055B; +UCB0ADDRX = 0x055C; +UCB0ADDRX_L = 0x055C; +UCB0ADDRX_H = 0x055D; +UCB0ADDMASK = 0x055E; +UCB0ADDMASK_L = 0x055E; +UCB0ADDMASK_H = 0x055F; +UCB0I2CSA = 0x0560; +UCB0I2CSA_L = 0x0560; +UCB0I2CSA_H = 0x0561; +UCB0IE = 0x056A; +UCB0IE_L = 0x056A; +UCB0IE_H = 0x056B; +UCB0IFG = 0x056C; +UCB0IFG_L = 0x056C; +UCB0IFG_H = 0x056D; +UCB0IV = 0x056E; +UCB0IV_L = 0x056E; +UCB0IV_H = 0x056F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x05C0; +UCB1CTLW0_L = 0x05C0; +UCB1CTLW0_H = 0x05C1; +UCB1CTLW1 = 0x05C2; +UCB1CTLW1_L = 0x05C2; +UCB1CTLW1_H = 0x05C3; +UCB1BRW = 0x05C6; +UCB1BRW_L = 0x05C6; +UCB1BRW_H = 0x05C7; +UCB1STATW = 0x05C8; +UCB1STATW_L = 0x05C8; +UCB1STATW_H = 0x05C9; +UCB1TBCNT = 0x05CA; +UCB1TBCNT_L = 0x05CA; +UCB1TBCNT_H = 0x05CB; +UCB1RXBUF = 0x05CC; +UCB1RXBUF_L = 0x05CC; +UCB1RXBUF_H = 0x05CD; +UCB1TXBUF = 0x05CE; +UCB1TXBUF_L = 0x05CE; +UCB1TXBUF_H = 0x05CF; +UCB1I2COA0 = 0x05D4; +UCB1I2COA0_L = 0x05D4; +UCB1I2COA0_H = 0x05D5; +UCB1I2COA1 = 0x05D6; +UCB1I2COA1_L = 0x05D6; +UCB1I2COA1_H = 0x05D7; +UCB1I2COA2 = 0x05D8; +UCB1I2COA2_L = 0x05D8; +UCB1I2COA2_H = 0x05D9; +UCB1I2COA3 = 0x05DA; +UCB1I2COA3_L = 0x05DA; +UCB1I2COA3_H = 0x05DB; +UCB1ADDRX = 0x05DC; +UCB1ADDRX_L = 0x05DC; +UCB1ADDRX_H = 0x05DD; +UCB1ADDMASK = 0x05DE; +UCB1ADDMASK_L = 0x05DE; +UCB1ADDMASK_H = 0x05DF; +UCB1I2CSA = 0x05E0; +UCB1I2CSA_L = 0x05E0; +UCB1I2CSA_H = 0x05E1; +UCB1IE = 0x05EA; +UCB1IE_L = 0x05EA; +UCB1IE_H = 0x05EB; +UCB1IFG = 0x05EC; +UCB1IFG_L = 0x05EC; +UCB1IFG_H = 0x05ED; +UCB1IV = 0x05EE; +UCB1IV_L = 0x05EE; +UCB1IV_H = 0x05EF; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr2310.cmd b/msp430/msp430fr2310.cmd new file mode 100644 index 00000000..bd374979 --- /dev/null +++ b/msp430/msp430fr2310.cmd @@ -0,0 +1,617 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr2310.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC +*****************************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; + + +/***************************************************************************** + BKMEM +*****************************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; + + +/***************************************************************************** + CAPTIO +*****************************************************************************/ +CAPTIOCTL = 0x02EE; +CAPTIOCTL_L = 0x02EE; +CAPTIOCTL_H = 0x02EF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + + + +/***************************************************************************** + FRCTL +*****************************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RTC +*****************************************************************************/ +RTCCTL = 0x0300; +RTCCTL_L = 0x0300; +RTCCTL_H = 0x0301; +RTCIV = 0x0304; +RTCIV_L = 0x0304; +RTCIV_H = 0x0305; +RTCMOD = 0x0308; +RTCMOD_L = 0x0308; +RTCMOD_H = 0x0309; +RTCCNT = 0x030C; +RTCCNT_L = 0x030C; +RTCCNT_H = 0x030D; + + +/***************************************************************************** + SAC0 +*****************************************************************************/ +SAC0OA = 0x0C80; +SAC0OA_L = 0x0C80; +SAC0OA_H = 0x0C81; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x0380; +TB0CTL_L = 0x0380; +TB0CTL_H = 0x0381; +TB0CCTL0 = 0x0382; +TB0CCTL0_L = 0x0382; +TB0CCTL0_H = 0x0383; +TB0CCTL1 = 0x0384; +TB0CCTL1_L = 0x0384; +TB0CCTL1_H = 0x0385; +TB0CCTL2 = 0x0386; +TB0CCTL2_L = 0x0386; +TB0CCTL2_H = 0x0387; +TB0R = 0x0390; +TB0R_L = 0x0390; +TB0R_H = 0x0391; +TB0CCR0 = 0x0392; +TB0CCR0_L = 0x0392; +TB0CCR0_H = 0x0393; +TB0CCR1 = 0x0394; +TB0CCR1_L = 0x0394; +TB0CCR1_H = 0x0395; +TB0CCR2 = 0x0396; +TB0CCR2_L = 0x0396; +TB0CCR2_H = 0x0397; +TB0EX0 = 0x03A0; +TB0EX0_L = 0x03A0; +TB0EX0_H = 0x03A1; +TB0IV = 0x03AE; +TB0IV_L = 0x03AE; +TB0IV_H = 0x03AF; + + +/***************************************************************************** + TB1 +*****************************************************************************/ +TB1CTL = 0x03C0; +TB1CTL_L = 0x03C0; +TB1CTL_H = 0x03C1; +TB1CCTL0 = 0x03C2; +TB1CCTL0_L = 0x03C2; +TB1CCTL0_H = 0x03C3; +TB1CCTL1 = 0x03C4; +TB1CCTL1_L = 0x03C4; +TB1CCTL1_H = 0x03C5; +TB1CCTL2 = 0x03C6; +TB1CCTL2_L = 0x03C6; +TB1CCTL2_H = 0x03C7; +TB1R = 0x03D0; +TB1R_L = 0x03D0; +TB1R_H = 0x03D1; +TB1CCR0 = 0x03D2; +TB1CCR0_L = 0x03D2; +TB1CCR0_H = 0x03D3; +TB1CCR1 = 0x03D4; +TB1CCR1_L = 0x03D4; +TB1CCR1_H = 0x03D5; +TB1CCR2 = 0x03D6; +TB1CCR2_L = 0x03D6; +TB1CCR2_H = 0x03D7; +TB1EX0 = 0x03E0; +TB1EX0_L = 0x03E0; +TB1EX0_H = 0x03E1; +TB1IV = 0x03EE; +TB1IV_L = 0x03EE; +TB1IV_H = 0x03EF; + + +/***************************************************************************** + TRI0 +*****************************************************************************/ +TRI0CTL = 0x0F00; +TRI0CTL_L = 0x0F00; +TRI0CTL_H = 0x0F01; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; + + +/***************************************************************************** + eCOMP0 +*****************************************************************************/ +CPCTL0 = 0x08E0; +CPCTL0_L = 0x08E0; +CPCTL0_H = 0x08E1; +CPCTL1 = 0x08E2; +CPCTL1_L = 0x08E2; +CPCTL1_H = 0x08E3; +CPINT = 0x08E6; +CPINT_L = 0x08E6; +CPINT_H = 0x08E7; +CPIV = 0x08E8; +CPIV_L = 0x08E8; +CPIV_H = 0x08E9; +CPDACCTL = 0x08F0; +CPDACCTL_L = 0x08F0; +CPDACCTL_H = 0x08F1; +CPDACDATA = 0x08F2; +CPDACDATA_L = 0x08F2; +CPDACDATA_H = 0x08F3; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0STATW_L = 0x050A; +UCA0STATW_H = 0x050B; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0ABCTL_L = 0x0510; +UCA0ABCTL_H = 0x0511; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +UCA0IV_L = 0x051E; +UCA0IV_H = 0x051F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0540; +UCB0CTLW0_L = 0x0540; +UCB0CTLW0_H = 0x0541; +UCB0CTLW1 = 0x0542; +UCB0CTLW1_L = 0x0542; +UCB0CTLW1_H = 0x0543; +UCB0BRW = 0x0546; +UCB0BRW_L = 0x0546; +UCB0BRW_H = 0x0547; +UCB0STATW = 0x0548; +UCB0STATW_L = 0x0548; +UCB0STATW_H = 0x0549; +UCB0TBCNT = 0x054A; +UCB0TBCNT_L = 0x054A; +UCB0TBCNT_H = 0x054B; +UCB0RXBUF = 0x054C; +UCB0RXBUF_L = 0x054C; +UCB0RXBUF_H = 0x054D; +UCB0TXBUF = 0x054E; +UCB0TXBUF_L = 0x054E; +UCB0TXBUF_H = 0x054F; +UCB0I2COA0 = 0x0554; +UCB0I2COA0_L = 0x0554; +UCB0I2COA0_H = 0x0555; +UCB0I2COA1 = 0x0556; +UCB0I2COA1_L = 0x0556; +UCB0I2COA1_H = 0x0557; +UCB0I2COA2 = 0x0558; +UCB0I2COA2_L = 0x0558; +UCB0I2COA2_H = 0x0559; +UCB0I2COA3 = 0x055A; +UCB0I2COA3_L = 0x055A; +UCB0I2COA3_H = 0x055B; +UCB0ADDRX = 0x055C; +UCB0ADDRX_L = 0x055C; +UCB0ADDRX_H = 0x055D; +UCB0ADDMASK = 0x055E; +UCB0ADDMASK_L = 0x055E; +UCB0ADDMASK_H = 0x055F; +UCB0I2CSA = 0x0560; +UCB0I2CSA_L = 0x0560; +UCB0I2CSA_H = 0x0561; +UCB0IE = 0x056A; +UCB0IE_L = 0x056A; +UCB0IE_H = 0x056B; +UCB0IFG = 0x056C; +UCB0IFG_L = 0x056C; +UCB0IFG_H = 0x056D; +UCB0IV = 0x056E; +UCB0IV_L = 0x056E; +UCB0IV_H = 0x056F; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr2311.cmd b/msp430/msp430fr2311.cmd new file mode 100644 index 00000000..35823e52 --- /dev/null +++ b/msp430/msp430fr2311.cmd @@ -0,0 +1,617 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr2311.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC +*****************************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; + + +/***************************************************************************** + BKMEM +*****************************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; + + +/***************************************************************************** + CAPTIO +*****************************************************************************/ +CAPTIOCTL = 0x02EE; +CAPTIOCTL_L = 0x02EE; +CAPTIOCTL_H = 0x02EF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + + + +/***************************************************************************** + FRCTL +*****************************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RTC +*****************************************************************************/ +RTCCTL = 0x0300; +RTCCTL_L = 0x0300; +RTCCTL_H = 0x0301; +RTCIV = 0x0304; +RTCIV_L = 0x0304; +RTCIV_H = 0x0305; +RTCMOD = 0x0308; +RTCMOD_L = 0x0308; +RTCMOD_H = 0x0309; +RTCCNT = 0x030C; +RTCCNT_L = 0x030C; +RTCCNT_H = 0x030D; + + +/***************************************************************************** + SAC0 +*****************************************************************************/ +SAC0OA = 0x0C80; +SAC0OA_L = 0x0C80; +SAC0OA_H = 0x0C81; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x0380; +TB0CTL_L = 0x0380; +TB0CTL_H = 0x0381; +TB0CCTL0 = 0x0382; +TB0CCTL0_L = 0x0382; +TB0CCTL0_H = 0x0383; +TB0CCTL1 = 0x0384; +TB0CCTL1_L = 0x0384; +TB0CCTL1_H = 0x0385; +TB0CCTL2 = 0x0386; +TB0CCTL2_L = 0x0386; +TB0CCTL2_H = 0x0387; +TB0R = 0x0390; +TB0R_L = 0x0390; +TB0R_H = 0x0391; +TB0CCR0 = 0x0392; +TB0CCR0_L = 0x0392; +TB0CCR0_H = 0x0393; +TB0CCR1 = 0x0394; +TB0CCR1_L = 0x0394; +TB0CCR1_H = 0x0395; +TB0CCR2 = 0x0396; +TB0CCR2_L = 0x0396; +TB0CCR2_H = 0x0397; +TB0EX0 = 0x03A0; +TB0EX0_L = 0x03A0; +TB0EX0_H = 0x03A1; +TB0IV = 0x03AE; +TB0IV_L = 0x03AE; +TB0IV_H = 0x03AF; + + +/***************************************************************************** + TB1 +*****************************************************************************/ +TB1CTL = 0x03C0; +TB1CTL_L = 0x03C0; +TB1CTL_H = 0x03C1; +TB1CCTL0 = 0x03C2; +TB1CCTL0_L = 0x03C2; +TB1CCTL0_H = 0x03C3; +TB1CCTL1 = 0x03C4; +TB1CCTL1_L = 0x03C4; +TB1CCTL1_H = 0x03C5; +TB1CCTL2 = 0x03C6; +TB1CCTL2_L = 0x03C6; +TB1CCTL2_H = 0x03C7; +TB1R = 0x03D0; +TB1R_L = 0x03D0; +TB1R_H = 0x03D1; +TB1CCR0 = 0x03D2; +TB1CCR0_L = 0x03D2; +TB1CCR0_H = 0x03D3; +TB1CCR1 = 0x03D4; +TB1CCR1_L = 0x03D4; +TB1CCR1_H = 0x03D5; +TB1CCR2 = 0x03D6; +TB1CCR2_L = 0x03D6; +TB1CCR2_H = 0x03D7; +TB1EX0 = 0x03E0; +TB1EX0_L = 0x03E0; +TB1EX0_H = 0x03E1; +TB1IV = 0x03EE; +TB1IV_L = 0x03EE; +TB1IV_H = 0x03EF; + + +/***************************************************************************** + TRI0 +*****************************************************************************/ +TRI0CTL = 0x0F00; +TRI0CTL_L = 0x0F00; +TRI0CTL_H = 0x0F01; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; + + +/***************************************************************************** + eCOMP0 +*****************************************************************************/ +CPCTL0 = 0x08E0; +CPCTL0_L = 0x08E0; +CPCTL0_H = 0x08E1; +CPCTL1 = 0x08E2; +CPCTL1_L = 0x08E2; +CPCTL1_H = 0x08E3; +CPINT = 0x08E6; +CPINT_L = 0x08E6; +CPINT_H = 0x08E7; +CPIV = 0x08E8; +CPIV_L = 0x08E8; +CPIV_H = 0x08E9; +CPDACCTL = 0x08F0; +CPDACCTL_L = 0x08F0; +CPDACCTL_H = 0x08F1; +CPDACDATA = 0x08F2; +CPDACDATA_L = 0x08F2; +CPDACDATA_H = 0x08F3; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0STATW_L = 0x050A; +UCA0STATW_H = 0x050B; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0ABCTL_L = 0x0510; +UCA0ABCTL_H = 0x0511; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +UCA0IV_L = 0x051E; +UCA0IV_H = 0x051F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0540; +UCB0CTLW0_L = 0x0540; +UCB0CTLW0_H = 0x0541; +UCB0CTLW1 = 0x0542; +UCB0CTLW1_L = 0x0542; +UCB0CTLW1_H = 0x0543; +UCB0BRW = 0x0546; +UCB0BRW_L = 0x0546; +UCB0BRW_H = 0x0547; +UCB0STATW = 0x0548; +UCB0STATW_L = 0x0548; +UCB0STATW_H = 0x0549; +UCB0TBCNT = 0x054A; +UCB0TBCNT_L = 0x054A; +UCB0TBCNT_H = 0x054B; +UCB0RXBUF = 0x054C; +UCB0RXBUF_L = 0x054C; +UCB0RXBUF_H = 0x054D; +UCB0TXBUF = 0x054E; +UCB0TXBUF_L = 0x054E; +UCB0TXBUF_H = 0x054F; +UCB0I2COA0 = 0x0554; +UCB0I2COA0_L = 0x0554; +UCB0I2COA0_H = 0x0555; +UCB0I2COA1 = 0x0556; +UCB0I2COA1_L = 0x0556; +UCB0I2COA1_H = 0x0557; +UCB0I2COA2 = 0x0558; +UCB0I2COA2_L = 0x0558; +UCB0I2COA2_H = 0x0559; +UCB0I2COA3 = 0x055A; +UCB0I2COA3_L = 0x055A; +UCB0I2COA3_H = 0x055B; +UCB0ADDRX = 0x055C; +UCB0ADDRX_L = 0x055C; +UCB0ADDRX_H = 0x055D; +UCB0ADDMASK = 0x055E; +UCB0ADDMASK_L = 0x055E; +UCB0ADDMASK_H = 0x055F; +UCB0I2CSA = 0x0560; +UCB0I2CSA_L = 0x0560; +UCB0I2CSA_H = 0x0561; +UCB0IE = 0x056A; +UCB0IE_L = 0x056A; +UCB0IE_H = 0x056B; +UCB0IFG = 0x056C; +UCB0IFG_L = 0x056C; +UCB0IFG_H = 0x056D; +UCB0IV = 0x056E; +UCB0IV_L = 0x056E; +UCB0IV_H = 0x056F; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr2353.cmd b/msp430/msp430fr2353.cmd new file mode 100644 index 00000000..d4a6002f --- /dev/null +++ b/msp430/msp430fr2353.cmd @@ -0,0 +1,1156 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr2353.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC +*****************************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; + + +/***************************************************************************** + BKMEM +*****************************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; + + +/***************************************************************************** + CAPTIO +*****************************************************************************/ +CAPTIOCTL = 0x02EE; +CAPTIOCTL_L = 0x02EE; +CAPTIOCTL_H = 0x02EF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + + + +/***************************************************************************** + FRCTL +*****************************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; + + +/***************************************************************************** + ICC +*****************************************************************************/ +ICCSC = 0x06C0; +ICCSC_L = 0x06C0; +ICCSC_H = 0x06C1; +ICCMVS = 0x06C2; +ICCMVS_L = 0x06C2; +ICCMVS_H = 0x06C3; +ICCILSR0 = 0x06C4; +ICCILSR0_L = 0x06C4; +ICCILSR0_H = 0x06C5; +ICCILSR1 = 0x06C6; +ICCILSR1_L = 0x06C6; +ICCILSR1_H = 0x06C7; +ICCILSR2 = 0x06C8; +ICCILSR2_L = 0x06C8; +ICCILSR2_H = 0x06C9; +ICCILSR3 = 0x06CA; +ICCILSR3_L = 0x06CA; +ICCILSR3_H = 0x06CB; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RTC +*****************************************************************************/ +RTCCTL = 0x0300; +RTCCTL_L = 0x0300; +RTCCTL_H = 0x0301; +RTCIV = 0x0304; +RTCIV_L = 0x0304; +RTCIV_H = 0x0305; +RTCMOD = 0x0308; +RTCMOD_L = 0x0308; +RTCMOD_H = 0x0309; +RTCCNT = 0x030C; +RTCCNT_L = 0x030C; +RTCCNT_H = 0x030D; + + +/***************************************************************************** + SAC0 +*****************************************************************************/ +SAC0OA = 0x0C80; +SAC0OA_L = 0x0C80; +SAC0OA_H = 0x0C81; +SAC0PGA = 0x0C82; +SAC0PGA_L = 0x0C82; +SAC0PGA_H = 0x0C83; +SAC0DAC = 0x0C84; +SAC0DAC_L = 0x0C84; +SAC0DAC_H = 0x0C85; +SAC0DAT = 0x0C86; +SAC0DAT_L = 0x0C86; +SAC0DAT_H = 0x0C87; +SAC0DACSTS = 0x0C88; +SAC0DACSTS_L = 0x0C88; +SAC0DACSTS_H = 0x0C89; +SAC0IV = 0x0C8A; +SAC0IV_L = 0x0C8A; +SAC0IV_H = 0x0C8B; + + +/***************************************************************************** + SAC1 +*****************************************************************************/ +SAC1OA = 0x0C90; +SAC1OA_L = 0x0C90; +SAC1OA_H = 0x0C91; +SAC1PGA = 0x0C92; +SAC1PGA_L = 0x0C92; +SAC1PGA_H = 0x0C93; +SAC1DAC = 0x0C94; +SAC1DAC_L = 0x0C94; +SAC1DAC_H = 0x0C95; +SAC1DAT = 0x0C96; +SAC1DAT_L = 0x0C96; +SAC1DAT_H = 0x0C97; +SAC1DACSTS = 0x0C98; +SAC1DACSTS_L = 0x0C98; +SAC1DACSTS_H = 0x0C99; +SAC1IV = 0x0C9A; +SAC1IV_L = 0x0C9A; +SAC1IV_H = 0x0C9B; + + +/***************************************************************************** + SAC2 +*****************************************************************************/ +SAC2OA = 0x0CA0; +SAC2OA_L = 0x0CA0; +SAC2OA_H = 0x0CA1; +SAC2PGA = 0x0CA2; +SAC2PGA_L = 0x0CA2; +SAC2PGA_H = 0x0CA3; +SAC2DAC = 0x0CA4; +SAC2DAC_L = 0x0CA4; +SAC2DAC_H = 0x0CA5; +SAC2DAT = 0x0CA6; +SAC2DAT_L = 0x0CA6; +SAC2DAT_H = 0x0CA7; +SAC2DACSTS = 0x0CA8; +SAC2DACSTS_L = 0x0CA8; +SAC2DACSTS_H = 0x0CA9; +SAC2IV = 0x0CAA; +SAC2IV_L = 0x0CAA; +SAC2IV_H = 0x0CAB; + + +/***************************************************************************** + SAC3 +*****************************************************************************/ +SAC3OA = 0x0CB0; +SAC3OA_L = 0x0CB0; +SAC3OA_H = 0x0CB1; +SAC3PGA = 0x0CB2; +SAC3PGA_L = 0x0CB2; +SAC3PGA_H = 0x0CB3; +SAC3DAC = 0x0CB4; +SAC3DAC_L = 0x0CB4; +SAC3DAC_H = 0x0CB5; +SAC3DAT = 0x0CB6; +SAC3DAT_L = 0x0CB6; +SAC3DAT_H = 0x0CB7; +SAC3DACSTS = 0x0CB8; +SAC3DACSTS_L = 0x0CB8; +SAC3DACSTS_H = 0x0CB9; +SAC3IV = 0x0CBA; +SAC3IV_L = 0x0CBA; +SAC3IV_H = 0x0CBB; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x0380; +TB0CTL_L = 0x0380; +TB0CTL_H = 0x0381; +TB0CCTL0 = 0x0382; +TB0CCTL0_L = 0x0382; +TB0CCTL0_H = 0x0383; +TB0CCTL1 = 0x0384; +TB0CCTL1_L = 0x0384; +TB0CCTL1_H = 0x0385; +TB0CCTL2 = 0x0386; +TB0CCTL2_L = 0x0386; +TB0CCTL2_H = 0x0387; +TB0R = 0x0390; +TB0R_L = 0x0390; +TB0R_H = 0x0391; +TB0CCR0 = 0x0392; +TB0CCR0_L = 0x0392; +TB0CCR0_H = 0x0393; +TB0CCR1 = 0x0394; +TB0CCR1_L = 0x0394; +TB0CCR1_H = 0x0395; +TB0CCR2 = 0x0396; +TB0CCR2_L = 0x0396; +TB0CCR2_H = 0x0397; +TB0EX0 = 0x03A0; +TB0EX0_L = 0x03A0; +TB0EX0_H = 0x03A1; +TB0IV = 0x03AE; +TB0IV_L = 0x03AE; +TB0IV_H = 0x03AF; + + +/***************************************************************************** + TB1 +*****************************************************************************/ +TB1CTL = 0x03C0; +TB1CTL_L = 0x03C0; +TB1CTL_H = 0x03C1; +TB1CCTL0 = 0x03C2; +TB1CCTL0_L = 0x03C2; +TB1CCTL0_H = 0x03C3; +TB1CCTL1 = 0x03C4; +TB1CCTL1_L = 0x03C4; +TB1CCTL1_H = 0x03C5; +TB1CCTL2 = 0x03C6; +TB1CCTL2_L = 0x03C6; +TB1CCTL2_H = 0x03C7; +TB1R = 0x03D0; +TB1R_L = 0x03D0; +TB1R_H = 0x03D1; +TB1CCR0 = 0x03D2; +TB1CCR0_L = 0x03D2; +TB1CCR0_H = 0x03D3; +TB1CCR1 = 0x03D4; +TB1CCR1_L = 0x03D4; +TB1CCR1_H = 0x03D5; +TB1CCR2 = 0x03D6; +TB1CCR2_L = 0x03D6; +TB1CCR2_H = 0x03D7; +TB1EX0 = 0x03E0; +TB1EX0_L = 0x03E0; +TB1EX0_H = 0x03E1; +TB1IV = 0x03EE; +TB1IV_L = 0x03EE; +TB1IV_H = 0x03EF; + + +/***************************************************************************** + TB2 +*****************************************************************************/ +TB2CTL = 0x0400; +TB2CTL_L = 0x0400; +TB2CTL_H = 0x0401; +TB2CCTL0 = 0x0402; +TB2CCTL0_L = 0x0402; +TB2CCTL0_H = 0x0403; +TB2CCTL1 = 0x0404; +TB2CCTL1_L = 0x0404; +TB2CCTL1_H = 0x0405; +TB2CCTL2 = 0x0406; +TB2CCTL2_L = 0x0406; +TB2CCTL2_H = 0x0407; +TB2R = 0x0410; +TB2R_L = 0x0410; +TB2R_H = 0x0411; +TB2CCR0 = 0x0412; +TB2CCR0_L = 0x0412; +TB2CCR0_H = 0x0413; +TB2CCR1 = 0x0414; +TB2CCR1_L = 0x0414; +TB2CCR1_H = 0x0415; +TB2CCR2 = 0x0416; +TB2CCR2_L = 0x0416; +TB2CCR2_H = 0x0417; +TB2EX0 = 0x0420; +TB2EX0_L = 0x0420; +TB2EX0_H = 0x0421; +TB2IV = 0x042E; +TB2IV_L = 0x042E; +TB2IV_H = 0x042F; + + +/***************************************************************************** + TB3 +*****************************************************************************/ +TB3CTL = 0x0440; +TB3CTL_L = 0x0440; +TB3CTL_H = 0x0441; +TB3CCTL0 = 0x0442; +TB3CCTL0_L = 0x0442; +TB3CCTL0_H = 0x0443; +TB3CCTL1 = 0x0444; +TB3CCTL1_L = 0x0444; +TB3CCTL1_H = 0x0445; +TB3CCTL2 = 0x0446; +TB3CCTL2_L = 0x0446; +TB3CCTL2_H = 0x0447; +TB3CCTL3 = 0x0448; +TB3CCTL3_L = 0x0448; +TB3CCTL3_H = 0x0449; +TB3CCTL4 = 0x044A; +TB3CCTL4_L = 0x044A; +TB3CCTL4_H = 0x044B; +TB3CCTL5 = 0x044C; +TB3CCTL5_L = 0x044C; +TB3CCTL5_H = 0x044D; +TB3CCTL6 = 0x044E; +TB3CCTL6_L = 0x044E; +TB3CCTL6_H = 0x044F; +TB3R = 0x0450; +TB3R_L = 0x0450; +TB3R_H = 0x0451; +TB3CCR0 = 0x0452; +TB3CCR0_L = 0x0452; +TB3CCR0_H = 0x0453; +TB3CCR1 = 0x0454; +TB3CCR1_L = 0x0454; +TB3CCR1_H = 0x0455; +TB3CCR2 = 0x0456; +TB3CCR2_L = 0x0456; +TB3CCR2_H = 0x0457; +TB3CCR3 = 0x0458; +TB3CCR3_L = 0x0458; +TB3CCR3_H = 0x0459; +TB3CCR4 = 0x045A; +TB3CCR4_L = 0x045A; +TB3CCR4_H = 0x045B; +TB3CCR5 = 0x045C; +TB3CCR5_L = 0x045C; +TB3CCR5_H = 0x045D; +TB3CCR6 = 0x045E; +TB3CCR6_L = 0x045E; +TB3CCR6_H = 0x045F; +TB3EX0 = 0x0460; +TB3EX0_L = 0x0460; +TB3EX0_H = 0x0461; +TB3IV = 0x046E; +TB3IV_L = 0x046E; +TB3IV_H = 0x046F; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; + + +/***************************************************************************** + eCOMP0 +*****************************************************************************/ +CP0CTL0 = 0x08E0; +CP0CTL0_L = 0x08E0; +CP0CTL0_H = 0x08E1; +CP0CTL1 = 0x08E2; +CP0CTL1_L = 0x08E2; +CP0CTL1_H = 0x08E3; +CP0INT = 0x08E6; +CP0INT_L = 0x08E6; +CP0INT_H = 0x08E7; +CP0IV = 0x08E8; +CP0IV_L = 0x08E8; +CP0IV_H = 0x08E9; +CP0DACCTL = 0x08F0; +CP0DACCTL_L = 0x08F0; +CP0DACCTL_H = 0x08F1; +CP0DACDATA = 0x08F2; +CP0DACDATA_L = 0x08F2; +CP0DACDATA_H = 0x08F3; + + +/***************************************************************************** + eCOMP1 +*****************************************************************************/ +CP1CTL0 = 0x0900; +CP1CTL0_L = 0x0900; +CP1CTL0_H = 0x0901; +CP1CTL1 = 0x0902; +CP1CTL1_L = 0x0902; +CP1CTL1_H = 0x0903; +CP1INT = 0x0906; +CP1INT_L = 0x0906; +CP1INT_H = 0x0907; +CP1IV = 0x0908; +CP1IV_L = 0x0908; +CP1IV_H = 0x0909; +CP1DACCTL = 0x0910; +CP1DACCTL_L = 0x0910; +CP1DACCTL_H = 0x0911; +CP1DACDATA = 0x0912; +CP1DACDATA_L = 0x0912; +CP1DACDATA_H = 0x0913; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0STATW_L = 0x050A; +UCA0STATW_H = 0x050B; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0ABCTL_L = 0x0510; +UCA0ABCTL_H = 0x0511; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +UCA0IV_L = 0x051E; +UCA0IV_H = 0x051F; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x0580; +UCA1CTLW0_L = 0x0580; +UCA1CTLW0_H = 0x0581; +UCA1CTLW1 = 0x0582; +UCA1CTLW1_L = 0x0582; +UCA1CTLW1_H = 0x0583; +UCA1BRW = 0x0586; +UCA1BRW_L = 0x0586; +UCA1BRW_H = 0x0587; +UCA1MCTLW = 0x0588; +UCA1MCTLW_L = 0x0588; +UCA1MCTLW_H = 0x0589; +UCA1STATW = 0x058A; +UCA1STATW_L = 0x058A; +UCA1STATW_H = 0x058B; +UCA1RXBUF = 0x058C; +UCA1RXBUF_L = 0x058C; +UCA1RXBUF_H = 0x058D; +UCA1TXBUF = 0x058E; +UCA1TXBUF_L = 0x058E; +UCA1TXBUF_H = 0x058F; +UCA1ABCTL = 0x0590; +UCA1ABCTL_L = 0x0590; +UCA1ABCTL_H = 0x0591; +UCA1IRCTL = 0x0592; +UCA1IRCTL_L = 0x0592; +UCA1IRCTL_H = 0x0593; +UCA1IE = 0x059A; +UCA1IE_L = 0x059A; +UCA1IE_H = 0x059B; +UCA1IFG = 0x059C; +UCA1IFG_L = 0x059C; +UCA1IFG_H = 0x059D; +UCA1IV = 0x059E; +UCA1IV_L = 0x059E; +UCA1IV_H = 0x059F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0540; +UCB0CTLW0_L = 0x0540; +UCB0CTLW0_H = 0x0541; +UCB0CTLW1 = 0x0542; +UCB0CTLW1_L = 0x0542; +UCB0CTLW1_H = 0x0543; +UCB0BRW = 0x0546; +UCB0BRW_L = 0x0546; +UCB0BRW_H = 0x0547; +UCB0STATW = 0x0548; +UCB0STATW_L = 0x0548; +UCB0STATW_H = 0x0549; +UCB0TBCNT = 0x054A; +UCB0TBCNT_L = 0x054A; +UCB0TBCNT_H = 0x054B; +UCB0RXBUF = 0x054C; +UCB0RXBUF_L = 0x054C; +UCB0RXBUF_H = 0x054D; +UCB0TXBUF = 0x054E; +UCB0TXBUF_L = 0x054E; +UCB0TXBUF_H = 0x054F; +UCB0I2COA0 = 0x0554; +UCB0I2COA0_L = 0x0554; +UCB0I2COA0_H = 0x0555; +UCB0I2COA1 = 0x0556; +UCB0I2COA1_L = 0x0556; +UCB0I2COA1_H = 0x0557; +UCB0I2COA2 = 0x0558; +UCB0I2COA2_L = 0x0558; +UCB0I2COA2_H = 0x0559; +UCB0I2COA3 = 0x055A; +UCB0I2COA3_L = 0x055A; +UCB0I2COA3_H = 0x055B; +UCB0ADDRX = 0x055C; +UCB0ADDRX_L = 0x055C; +UCB0ADDRX_H = 0x055D; +UCB0ADDMASK = 0x055E; +UCB0ADDMASK_L = 0x055E; +UCB0ADDMASK_H = 0x055F; +UCB0I2CSA = 0x0560; +UCB0I2CSA_L = 0x0560; +UCB0I2CSA_H = 0x0561; +UCB0IE = 0x056A; +UCB0IE_L = 0x056A; +UCB0IE_H = 0x056B; +UCB0IFG = 0x056C; +UCB0IFG_L = 0x056C; +UCB0IFG_H = 0x056D; +UCB0IV = 0x056E; +UCB0IV_L = 0x056E; +UCB0IV_H = 0x056F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x05C0; +UCB1CTLW0_L = 0x05C0; +UCB1CTLW0_H = 0x05C1; +UCB1CTLW1 = 0x05C2; +UCB1CTLW1_L = 0x05C2; +UCB1CTLW1_H = 0x05C3; +UCB1BRW = 0x05C6; +UCB1BRW_L = 0x05C6; +UCB1BRW_H = 0x05C7; +UCB1STATW = 0x05C8; +UCB1STATW_L = 0x05C8; +UCB1STATW_H = 0x05C9; +UCB1TBCNT = 0x05CA; +UCB1TBCNT_L = 0x05CA; +UCB1TBCNT_H = 0x05CB; +UCB1RXBUF = 0x05CC; +UCB1RXBUF_L = 0x05CC; +UCB1RXBUF_H = 0x05CD; +UCB1TXBUF = 0x05CE; +UCB1TXBUF_L = 0x05CE; +UCB1TXBUF_H = 0x05CF; +UCB1I2COA0 = 0x05D4; +UCB1I2COA0_L = 0x05D4; +UCB1I2COA0_H = 0x05D5; +UCB1I2COA1 = 0x05D6; +UCB1I2COA1_L = 0x05D6; +UCB1I2COA1_H = 0x05D7; +UCB1I2COA2 = 0x05D8; +UCB1I2COA2_L = 0x05D8; +UCB1I2COA2_H = 0x05D9; +UCB1I2COA3 = 0x05DA; +UCB1I2COA3_L = 0x05DA; +UCB1I2COA3_H = 0x05DB; +UCB1ADDRX = 0x05DC; +UCB1ADDRX_L = 0x05DC; +UCB1ADDRX_H = 0x05DD; +UCB1ADDMASK = 0x05DE; +UCB1ADDMASK_L = 0x05DE; +UCB1ADDMASK_H = 0x05DF; +UCB1I2CSA = 0x05E0; +UCB1I2CSA_L = 0x05E0; +UCB1I2CSA_H = 0x05E1; +UCB1IE = 0x05EA; +UCB1IE_L = 0x05EA; +UCB1IE_H = 0x05EB; +UCB1IFG = 0x05EC; +UCB1IFG_L = 0x05EC; +UCB1IFG_H = 0x05ED; +UCB1IV = 0x05EE; +UCB1IV_L = 0x05EE; +UCB1IV_H = 0x05EF; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr2355.cmd b/msp430/msp430fr2355.cmd new file mode 100644 index 00000000..2092c94c --- /dev/null +++ b/msp430/msp430fr2355.cmd @@ -0,0 +1,1156 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr2355.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC +*****************************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; + + +/***************************************************************************** + BKMEM +*****************************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; + + +/***************************************************************************** + CAPTIO +*****************************************************************************/ +CAPTIOCTL = 0x02EE; +CAPTIOCTL_L = 0x02EE; +CAPTIOCTL_H = 0x02EF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + + + +/***************************************************************************** + FRCTL +*****************************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; + + +/***************************************************************************** + ICC +*****************************************************************************/ +ICCSC = 0x06C0; +ICCSC_L = 0x06C0; +ICCSC_H = 0x06C1; +ICCMVS = 0x06C2; +ICCMVS_L = 0x06C2; +ICCMVS_H = 0x06C3; +ICCILSR0 = 0x06C4; +ICCILSR0_L = 0x06C4; +ICCILSR0_H = 0x06C5; +ICCILSR1 = 0x06C6; +ICCILSR1_L = 0x06C6; +ICCILSR1_H = 0x06C7; +ICCILSR2 = 0x06C8; +ICCILSR2_L = 0x06C8; +ICCILSR2_H = 0x06C9; +ICCILSR3 = 0x06CA; +ICCILSR3_L = 0x06CA; +ICCILSR3_H = 0x06CB; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RTC +*****************************************************************************/ +RTCCTL = 0x0300; +RTCCTL_L = 0x0300; +RTCCTL_H = 0x0301; +RTCIV = 0x0304; +RTCIV_L = 0x0304; +RTCIV_H = 0x0305; +RTCMOD = 0x0308; +RTCMOD_L = 0x0308; +RTCMOD_H = 0x0309; +RTCCNT = 0x030C; +RTCCNT_L = 0x030C; +RTCCNT_H = 0x030D; + + +/***************************************************************************** + SAC0 +*****************************************************************************/ +SAC0OA = 0x0C80; +SAC0OA_L = 0x0C80; +SAC0OA_H = 0x0C81; +SAC0PGA = 0x0C82; +SAC0PGA_L = 0x0C82; +SAC0PGA_H = 0x0C83; +SAC0DAC = 0x0C84; +SAC0DAC_L = 0x0C84; +SAC0DAC_H = 0x0C85; +SAC0DAT = 0x0C86; +SAC0DAT_L = 0x0C86; +SAC0DAT_H = 0x0C87; +SAC0DACSTS = 0x0C88; +SAC0DACSTS_L = 0x0C88; +SAC0DACSTS_H = 0x0C89; +SAC0IV = 0x0C8A; +SAC0IV_L = 0x0C8A; +SAC0IV_H = 0x0C8B; + + +/***************************************************************************** + SAC1 +*****************************************************************************/ +SAC1OA = 0x0C90; +SAC1OA_L = 0x0C90; +SAC1OA_H = 0x0C91; +SAC1PGA = 0x0C92; +SAC1PGA_L = 0x0C92; +SAC1PGA_H = 0x0C93; +SAC1DAC = 0x0C94; +SAC1DAC_L = 0x0C94; +SAC1DAC_H = 0x0C95; +SAC1DAT = 0x0C96; +SAC1DAT_L = 0x0C96; +SAC1DAT_H = 0x0C97; +SAC1DACSTS = 0x0C98; +SAC1DACSTS_L = 0x0C98; +SAC1DACSTS_H = 0x0C99; +SAC1IV = 0x0C9A; +SAC1IV_L = 0x0C9A; +SAC1IV_H = 0x0C9B; + + +/***************************************************************************** + SAC2 +*****************************************************************************/ +SAC2OA = 0x0CA0; +SAC2OA_L = 0x0CA0; +SAC2OA_H = 0x0CA1; +SAC2PGA = 0x0CA2; +SAC2PGA_L = 0x0CA2; +SAC2PGA_H = 0x0CA3; +SAC2DAC = 0x0CA4; +SAC2DAC_L = 0x0CA4; +SAC2DAC_H = 0x0CA5; +SAC2DAT = 0x0CA6; +SAC2DAT_L = 0x0CA6; +SAC2DAT_H = 0x0CA7; +SAC2DACSTS = 0x0CA8; +SAC2DACSTS_L = 0x0CA8; +SAC2DACSTS_H = 0x0CA9; +SAC2IV = 0x0CAA; +SAC2IV_L = 0x0CAA; +SAC2IV_H = 0x0CAB; + + +/***************************************************************************** + SAC3 +*****************************************************************************/ +SAC3OA = 0x0CB0; +SAC3OA_L = 0x0CB0; +SAC3OA_H = 0x0CB1; +SAC3PGA = 0x0CB2; +SAC3PGA_L = 0x0CB2; +SAC3PGA_H = 0x0CB3; +SAC3DAC = 0x0CB4; +SAC3DAC_L = 0x0CB4; +SAC3DAC_H = 0x0CB5; +SAC3DAT = 0x0CB6; +SAC3DAT_L = 0x0CB6; +SAC3DAT_H = 0x0CB7; +SAC3DACSTS = 0x0CB8; +SAC3DACSTS_L = 0x0CB8; +SAC3DACSTS_H = 0x0CB9; +SAC3IV = 0x0CBA; +SAC3IV_L = 0x0CBA; +SAC3IV_H = 0x0CBB; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x0380; +TB0CTL_L = 0x0380; +TB0CTL_H = 0x0381; +TB0CCTL0 = 0x0382; +TB0CCTL0_L = 0x0382; +TB0CCTL0_H = 0x0383; +TB0CCTL1 = 0x0384; +TB0CCTL1_L = 0x0384; +TB0CCTL1_H = 0x0385; +TB0CCTL2 = 0x0386; +TB0CCTL2_L = 0x0386; +TB0CCTL2_H = 0x0387; +TB0R = 0x0390; +TB0R_L = 0x0390; +TB0R_H = 0x0391; +TB0CCR0 = 0x0392; +TB0CCR0_L = 0x0392; +TB0CCR0_H = 0x0393; +TB0CCR1 = 0x0394; +TB0CCR1_L = 0x0394; +TB0CCR1_H = 0x0395; +TB0CCR2 = 0x0396; +TB0CCR2_L = 0x0396; +TB0CCR2_H = 0x0397; +TB0EX0 = 0x03A0; +TB0EX0_L = 0x03A0; +TB0EX0_H = 0x03A1; +TB0IV = 0x03AE; +TB0IV_L = 0x03AE; +TB0IV_H = 0x03AF; + + +/***************************************************************************** + TB1 +*****************************************************************************/ +TB1CTL = 0x03C0; +TB1CTL_L = 0x03C0; +TB1CTL_H = 0x03C1; +TB1CCTL0 = 0x03C2; +TB1CCTL0_L = 0x03C2; +TB1CCTL0_H = 0x03C3; +TB1CCTL1 = 0x03C4; +TB1CCTL1_L = 0x03C4; +TB1CCTL1_H = 0x03C5; +TB1CCTL2 = 0x03C6; +TB1CCTL2_L = 0x03C6; +TB1CCTL2_H = 0x03C7; +TB1R = 0x03D0; +TB1R_L = 0x03D0; +TB1R_H = 0x03D1; +TB1CCR0 = 0x03D2; +TB1CCR0_L = 0x03D2; +TB1CCR0_H = 0x03D3; +TB1CCR1 = 0x03D4; +TB1CCR1_L = 0x03D4; +TB1CCR1_H = 0x03D5; +TB1CCR2 = 0x03D6; +TB1CCR2_L = 0x03D6; +TB1CCR2_H = 0x03D7; +TB1EX0 = 0x03E0; +TB1EX0_L = 0x03E0; +TB1EX0_H = 0x03E1; +TB1IV = 0x03EE; +TB1IV_L = 0x03EE; +TB1IV_H = 0x03EF; + + +/***************************************************************************** + TB2 +*****************************************************************************/ +TB2CTL = 0x0400; +TB2CTL_L = 0x0400; +TB2CTL_H = 0x0401; +TB2CCTL0 = 0x0402; +TB2CCTL0_L = 0x0402; +TB2CCTL0_H = 0x0403; +TB2CCTL1 = 0x0404; +TB2CCTL1_L = 0x0404; +TB2CCTL1_H = 0x0405; +TB2CCTL2 = 0x0406; +TB2CCTL2_L = 0x0406; +TB2CCTL2_H = 0x0407; +TB2R = 0x0410; +TB2R_L = 0x0410; +TB2R_H = 0x0411; +TB2CCR0 = 0x0412; +TB2CCR0_L = 0x0412; +TB2CCR0_H = 0x0413; +TB2CCR1 = 0x0414; +TB2CCR1_L = 0x0414; +TB2CCR1_H = 0x0415; +TB2CCR2 = 0x0416; +TB2CCR2_L = 0x0416; +TB2CCR2_H = 0x0417; +TB2EX0 = 0x0420; +TB2EX0_L = 0x0420; +TB2EX0_H = 0x0421; +TB2IV = 0x042E; +TB2IV_L = 0x042E; +TB2IV_H = 0x042F; + + +/***************************************************************************** + TB3 +*****************************************************************************/ +TB3CTL = 0x0440; +TB3CTL_L = 0x0440; +TB3CTL_H = 0x0441; +TB3CCTL0 = 0x0442; +TB3CCTL0_L = 0x0442; +TB3CCTL0_H = 0x0443; +TB3CCTL1 = 0x0444; +TB3CCTL1_L = 0x0444; +TB3CCTL1_H = 0x0445; +TB3CCTL2 = 0x0446; +TB3CCTL2_L = 0x0446; +TB3CCTL2_H = 0x0447; +TB3CCTL3 = 0x0448; +TB3CCTL3_L = 0x0448; +TB3CCTL3_H = 0x0449; +TB3CCTL4 = 0x044A; +TB3CCTL4_L = 0x044A; +TB3CCTL4_H = 0x044B; +TB3CCTL5 = 0x044C; +TB3CCTL5_L = 0x044C; +TB3CCTL5_H = 0x044D; +TB3CCTL6 = 0x044E; +TB3CCTL6_L = 0x044E; +TB3CCTL6_H = 0x044F; +TB3R = 0x0450; +TB3R_L = 0x0450; +TB3R_H = 0x0451; +TB3CCR0 = 0x0452; +TB3CCR0_L = 0x0452; +TB3CCR0_H = 0x0453; +TB3CCR1 = 0x0454; +TB3CCR1_L = 0x0454; +TB3CCR1_H = 0x0455; +TB3CCR2 = 0x0456; +TB3CCR2_L = 0x0456; +TB3CCR2_H = 0x0457; +TB3CCR3 = 0x0458; +TB3CCR3_L = 0x0458; +TB3CCR3_H = 0x0459; +TB3CCR4 = 0x045A; +TB3CCR4_L = 0x045A; +TB3CCR4_H = 0x045B; +TB3CCR5 = 0x045C; +TB3CCR5_L = 0x045C; +TB3CCR5_H = 0x045D; +TB3CCR6 = 0x045E; +TB3CCR6_L = 0x045E; +TB3CCR6_H = 0x045F; +TB3EX0 = 0x0460; +TB3EX0_L = 0x0460; +TB3EX0_H = 0x0461; +TB3IV = 0x046E; +TB3IV_L = 0x046E; +TB3IV_H = 0x046F; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; + + +/***************************************************************************** + eCOMP0 +*****************************************************************************/ +CP0CTL0 = 0x08E0; +CP0CTL0_L = 0x08E0; +CP0CTL0_H = 0x08E1; +CP0CTL1 = 0x08E2; +CP0CTL1_L = 0x08E2; +CP0CTL1_H = 0x08E3; +CP0INT = 0x08E6; +CP0INT_L = 0x08E6; +CP0INT_H = 0x08E7; +CP0IV = 0x08E8; +CP0IV_L = 0x08E8; +CP0IV_H = 0x08E9; +CP0DACCTL = 0x08F0; +CP0DACCTL_L = 0x08F0; +CP0DACCTL_H = 0x08F1; +CP0DACDATA = 0x08F2; +CP0DACDATA_L = 0x08F2; +CP0DACDATA_H = 0x08F3; + + +/***************************************************************************** + eCOMP1 +*****************************************************************************/ +CP1CTL0 = 0x0900; +CP1CTL0_L = 0x0900; +CP1CTL0_H = 0x0901; +CP1CTL1 = 0x0902; +CP1CTL1_L = 0x0902; +CP1CTL1_H = 0x0903; +CP1INT = 0x0906; +CP1INT_L = 0x0906; +CP1INT_H = 0x0907; +CP1IV = 0x0908; +CP1IV_L = 0x0908; +CP1IV_H = 0x0909; +CP1DACCTL = 0x0910; +CP1DACCTL_L = 0x0910; +CP1DACCTL_H = 0x0911; +CP1DACDATA = 0x0912; +CP1DACDATA_L = 0x0912; +CP1DACDATA_H = 0x0913; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0STATW_L = 0x050A; +UCA0STATW_H = 0x050B; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0ABCTL_L = 0x0510; +UCA0ABCTL_H = 0x0511; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +UCA0IV_L = 0x051E; +UCA0IV_H = 0x051F; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x0580; +UCA1CTLW0_L = 0x0580; +UCA1CTLW0_H = 0x0581; +UCA1CTLW1 = 0x0582; +UCA1CTLW1_L = 0x0582; +UCA1CTLW1_H = 0x0583; +UCA1BRW = 0x0586; +UCA1BRW_L = 0x0586; +UCA1BRW_H = 0x0587; +UCA1MCTLW = 0x0588; +UCA1MCTLW_L = 0x0588; +UCA1MCTLW_H = 0x0589; +UCA1STATW = 0x058A; +UCA1STATW_L = 0x058A; +UCA1STATW_H = 0x058B; +UCA1RXBUF = 0x058C; +UCA1RXBUF_L = 0x058C; +UCA1RXBUF_H = 0x058D; +UCA1TXBUF = 0x058E; +UCA1TXBUF_L = 0x058E; +UCA1TXBUF_H = 0x058F; +UCA1ABCTL = 0x0590; +UCA1ABCTL_L = 0x0590; +UCA1ABCTL_H = 0x0591; +UCA1IRCTL = 0x0592; +UCA1IRCTL_L = 0x0592; +UCA1IRCTL_H = 0x0593; +UCA1IE = 0x059A; +UCA1IE_L = 0x059A; +UCA1IE_H = 0x059B; +UCA1IFG = 0x059C; +UCA1IFG_L = 0x059C; +UCA1IFG_H = 0x059D; +UCA1IV = 0x059E; +UCA1IV_L = 0x059E; +UCA1IV_H = 0x059F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0540; +UCB0CTLW0_L = 0x0540; +UCB0CTLW0_H = 0x0541; +UCB0CTLW1 = 0x0542; +UCB0CTLW1_L = 0x0542; +UCB0CTLW1_H = 0x0543; +UCB0BRW = 0x0546; +UCB0BRW_L = 0x0546; +UCB0BRW_H = 0x0547; +UCB0STATW = 0x0548; +UCB0STATW_L = 0x0548; +UCB0STATW_H = 0x0549; +UCB0TBCNT = 0x054A; +UCB0TBCNT_L = 0x054A; +UCB0TBCNT_H = 0x054B; +UCB0RXBUF = 0x054C; +UCB0RXBUF_L = 0x054C; +UCB0RXBUF_H = 0x054D; +UCB0TXBUF = 0x054E; +UCB0TXBUF_L = 0x054E; +UCB0TXBUF_H = 0x054F; +UCB0I2COA0 = 0x0554; +UCB0I2COA0_L = 0x0554; +UCB0I2COA0_H = 0x0555; +UCB0I2COA1 = 0x0556; +UCB0I2COA1_L = 0x0556; +UCB0I2COA1_H = 0x0557; +UCB0I2COA2 = 0x0558; +UCB0I2COA2_L = 0x0558; +UCB0I2COA2_H = 0x0559; +UCB0I2COA3 = 0x055A; +UCB0I2COA3_L = 0x055A; +UCB0I2COA3_H = 0x055B; +UCB0ADDRX = 0x055C; +UCB0ADDRX_L = 0x055C; +UCB0ADDRX_H = 0x055D; +UCB0ADDMASK = 0x055E; +UCB0ADDMASK_L = 0x055E; +UCB0ADDMASK_H = 0x055F; +UCB0I2CSA = 0x0560; +UCB0I2CSA_L = 0x0560; +UCB0I2CSA_H = 0x0561; +UCB0IE = 0x056A; +UCB0IE_L = 0x056A; +UCB0IE_H = 0x056B; +UCB0IFG = 0x056C; +UCB0IFG_L = 0x056C; +UCB0IFG_H = 0x056D; +UCB0IV = 0x056E; +UCB0IV_L = 0x056E; +UCB0IV_H = 0x056F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x05C0; +UCB1CTLW0_L = 0x05C0; +UCB1CTLW0_H = 0x05C1; +UCB1CTLW1 = 0x05C2; +UCB1CTLW1_L = 0x05C2; +UCB1CTLW1_H = 0x05C3; +UCB1BRW = 0x05C6; +UCB1BRW_L = 0x05C6; +UCB1BRW_H = 0x05C7; +UCB1STATW = 0x05C8; +UCB1STATW_L = 0x05C8; +UCB1STATW_H = 0x05C9; +UCB1TBCNT = 0x05CA; +UCB1TBCNT_L = 0x05CA; +UCB1TBCNT_H = 0x05CB; +UCB1RXBUF = 0x05CC; +UCB1RXBUF_L = 0x05CC; +UCB1RXBUF_H = 0x05CD; +UCB1TXBUF = 0x05CE; +UCB1TXBUF_L = 0x05CE; +UCB1TXBUF_H = 0x05CF; +UCB1I2COA0 = 0x05D4; +UCB1I2COA0_L = 0x05D4; +UCB1I2COA0_H = 0x05D5; +UCB1I2COA1 = 0x05D6; +UCB1I2COA1_L = 0x05D6; +UCB1I2COA1_H = 0x05D7; +UCB1I2COA2 = 0x05D8; +UCB1I2COA2_L = 0x05D8; +UCB1I2COA2_H = 0x05D9; +UCB1I2COA3 = 0x05DA; +UCB1I2COA3_L = 0x05DA; +UCB1I2COA3_H = 0x05DB; +UCB1ADDRX = 0x05DC; +UCB1ADDRX_L = 0x05DC; +UCB1ADDRX_H = 0x05DD; +UCB1ADDMASK = 0x05DE; +UCB1ADDMASK_L = 0x05DE; +UCB1ADDMASK_H = 0x05DF; +UCB1I2CSA = 0x05E0; +UCB1I2CSA_L = 0x05E0; +UCB1I2CSA_H = 0x05E1; +UCB1IE = 0x05EA; +UCB1IE_L = 0x05EA; +UCB1IE_H = 0x05EB; +UCB1IFG = 0x05EC; +UCB1IFG_L = 0x05EC; +UCB1IFG_H = 0x05ED; +UCB1IV = 0x05EE; +UCB1IV_L = 0x05EE; +UCB1IV_H = 0x05EF; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr2422.cmd b/msp430/msp430fr2422.cmd new file mode 100644 index 00000000..e3d85a02 --- /dev/null +++ b/msp430/msp430fr2422.cmd @@ -0,0 +1,695 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr2422.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC +*****************************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; + + +/***************************************************************************** + BKMEM +*****************************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + + + +/***************************************************************************** + FRCTL +*****************************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RTC +*****************************************************************************/ +RTCCTL = 0x0300; +RTCCTL_L = 0x0300; +RTCCTL_H = 0x0301; +RTCIV = 0x0304; +RTCIV_L = 0x0304; +RTCIV_H = 0x0305; +RTCMOD = 0x0308; +RTCMOD_L = 0x0308; +RTCMOD_H = 0x0309; +RTCCNT = 0x030C; +RTCCNT_L = 0x030C; +RTCCNT_H = 0x030D; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; +SYSCFG3 = 0x0166; +SYSCFG3_L = 0x0166; +SYSCFG3_H = 0x0167; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0380; +TA0CTL_L = 0x0380; +TA0CTL_H = 0x0381; +TA0CCTL0 = 0x0382; +TA0CCTL0_L = 0x0382; +TA0CCTL0_H = 0x0383; +TA0CCTL1 = 0x0384; +TA0CCTL1_L = 0x0384; +TA0CCTL1_H = 0x0385; +TA0CCTL2 = 0x0386; +TA0CCTL2_L = 0x0386; +TA0CCTL2_H = 0x0387; +TA0CCTL3 = 0x0388; +TA0CCTL3_L = 0x0388; +TA0CCTL3_H = 0x0389; +TA0CCTL4 = 0x038A; +TA0CCTL4_L = 0x038A; +TA0CCTL4_H = 0x038B; +TA0CCTL5 = 0x038C; +TA0CCTL5_L = 0x038C; +TA0CCTL5_H = 0x038D; +TA0CCTL6 = 0x038E; +TA0CCTL6_L = 0x038E; +TA0CCTL6_H = 0x038F; +TA0R = 0x0390; +TA0R_L = 0x0390; +TA0R_H = 0x0391; +TA0CCR0 = 0x0392; +TA0CCR0_L = 0x0392; +TA0CCR0_H = 0x0393; +TA0CCR1 = 0x0394; +TA0CCR1_L = 0x0394; +TA0CCR1_H = 0x0395; +TA0CCR2 = 0x0396; +TA0CCR2_L = 0x0396; +TA0CCR2_H = 0x0397; +TA0CCR3 = 0x0398; +TA0CCR3_L = 0x0398; +TA0CCR3_H = 0x0399; +TA0CCR4 = 0x039A; +TA0CCR4_L = 0x039A; +TA0CCR4_H = 0x039B; +TA0CCR5 = 0x039C; +TA0CCR5_L = 0x039C; +TA0CCR5_H = 0x039D; +TA0CCR6 = 0x039E; +TA0CCR6_L = 0x039E; +TA0CCR6_H = 0x039F; +TA0EX0 = 0x03A0; +TA0EX0_L = 0x03A0; +TA0EX0_H = 0x03A1; +TA0IV = 0x03AE; +TA0IV_L = 0x03AE; +TA0IV_H = 0x03AF; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x03C0; +TA1CTL_L = 0x03C0; +TA1CTL_H = 0x03C1; +TA1CCTL0 = 0x03C2; +TA1CCTL0_L = 0x03C2; +TA1CCTL0_H = 0x03C3; +TA1CCTL1 = 0x03C4; +TA1CCTL1_L = 0x03C4; +TA1CCTL1_H = 0x03C5; +TA1CCTL2 = 0x03C6; +TA1CCTL2_L = 0x03C6; +TA1CCTL2_H = 0x03C7; +TA1CCTL3 = 0x03C8; +TA1CCTL3_L = 0x03C8; +TA1CCTL3_H = 0x03C9; +TA1CCTL4 = 0x03CA; +TA1CCTL4_L = 0x03CA; +TA1CCTL4_H = 0x03CB; +TA1CCTL5 = 0x03CC; +TA1CCTL5_L = 0x03CC; +TA1CCTL5_H = 0x03CD; +TA1CCTL6 = 0x03CE; +TA1CCTL6_L = 0x03CE; +TA1CCTL6_H = 0x03CF; +TA1R = 0x03D0; +TA1R_L = 0x03D0; +TA1R_H = 0x03D1; +TA1CCR0 = 0x03D2; +TA1CCR0_L = 0x03D2; +TA1CCR0_H = 0x03D3; +TA1CCR1 = 0x03D4; +TA1CCR1_L = 0x03D4; +TA1CCR1_H = 0x03D5; +TA1CCR2 = 0x03D6; +TA1CCR2_L = 0x03D6; +TA1CCR2_H = 0x03D7; +TA1CCR3 = 0x03D8; +TA1CCR3_L = 0x03D8; +TA1CCR3_H = 0x03D9; +TA1CCR4 = 0x03DA; +TA1CCR4_L = 0x03DA; +TA1CCR4_H = 0x03DB; +TA1CCR5 = 0x03DC; +TA1CCR5_L = 0x03DC; +TA1CCR5_H = 0x03DD; +TA1CCR6 = 0x03DE; +TA1CCR6_L = 0x03DE; +TA1CCR6_H = 0x03DF; +TA1EX0 = 0x03E0; +TA1EX0_L = 0x03E0; +TA1EX0_H = 0x03E1; +TA1IV = 0x03EE; +TA1IV_L = 0x03EE; +TA1IV_H = 0x03EF; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0STATW_L = 0x050A; +UCA0STATW_H = 0x050B; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0ABCTL_L = 0x0510; +UCA0ABCTL_H = 0x0511; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +UCA0IV_L = 0x051E; +UCA0IV_H = 0x051F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0540; +UCB0CTLW0_L = 0x0540; +UCB0CTLW0_H = 0x0541; +UCB0CTLW1 = 0x0542; +UCB0CTLW1_L = 0x0542; +UCB0CTLW1_H = 0x0543; +UCB0BRW = 0x0546; +UCB0BRW_L = 0x0546; +UCB0BRW_H = 0x0547; +UCB0STATW = 0x0548; +UCB0STATW_L = 0x0548; +UCB0STATW_H = 0x0549; +UCB0TBCNT = 0x054A; +UCB0TBCNT_L = 0x054A; +UCB0TBCNT_H = 0x054B; +UCB0RXBUF = 0x054C; +UCB0RXBUF_L = 0x054C; +UCB0RXBUF_H = 0x054D; +UCB0TXBUF = 0x054E; +UCB0TXBUF_L = 0x054E; +UCB0TXBUF_H = 0x054F; +UCB0I2COA0 = 0x0554; +UCB0I2COA0_L = 0x0554; +UCB0I2COA0_H = 0x0555; +UCB0I2COA1 = 0x0556; +UCB0I2COA1_L = 0x0556; +UCB0I2COA1_H = 0x0557; +UCB0I2COA2 = 0x0558; +UCB0I2COA2_L = 0x0558; +UCB0I2COA2_H = 0x0559; +UCB0I2COA3 = 0x055A; +UCB0I2COA3_L = 0x055A; +UCB0I2COA3_H = 0x055B; +UCB0ADDRX = 0x055C; +UCB0ADDRX_L = 0x055C; +UCB0ADDRX_H = 0x055D; +UCB0ADDMASK = 0x055E; +UCB0ADDMASK_L = 0x055E; +UCB0ADDMASK_H = 0x055F; +UCB0I2CSA = 0x0560; +UCB0I2CSA_L = 0x0560; +UCB0I2CSA_H = 0x0561; +UCB0IE = 0x056A; +UCB0IE_L = 0x056A; +UCB0IE_H = 0x056B; +UCB0IFG = 0x056C; +UCB0IFG_L = 0x056C; +UCB0IFG_H = 0x056D; +UCB0IV = 0x056E; +UCB0IV_L = 0x056E; +UCB0IV_H = 0x056F; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr2433.cmd b/msp430/msp430fr2433.cmd new file mode 100644 index 00000000..83dc0e61 --- /dev/null +++ b/msp430/msp430fr2433.cmd @@ -0,0 +1,591 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr2433.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC +************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; +/************************************************************* +* Backup Memory Module +*************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; +/************************************************************ +* CLOCK SYSTEM CONTROL +************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FR2xx/FR4xx +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PMMIE = 0x012E; +PMMIE_L = 0x012E; +PMMIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +/************************************************************ +* Real-Time Clock (RTC) Counter +************************************************************/ +RTCCTL = 0x0300; +RTCCTL_L = 0x0300; +RTCCTL_H = 0x0301; +RTCIV = 0x0304; +RTCIV_L = 0x0304; +RTCIV_H = 0x0305; +RTCMOD = 0x0308; +RTCMOD_L = 0x0308; +RTCMOD_H = 0x0309; +RTCCNT = 0x030C; +RTCCNT_L = 0x030C; +RTCCNT_H = 0x030D; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSBERRIV = 0x0158; +SYSBERRIV_L = 0x0158; +SYSBERRIV_H = 0x0159; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0380; +TA0CCTL0 = 0x0382; +TA0CCTL1 = 0x0384; +TA0CCTL2 = 0x0386; +TA0R = 0x0390; +TA0CCR0 = 0x0392; +TA0CCR1 = 0x0394; +TA0CCR2 = 0x0396; +TA0IV = 0x03AE; +TA0EX0 = 0x03A0; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x03C0; +TA1CCTL0 = 0x03C2; +TA1CCTL1 = 0x03C4; +TA1CCTL2 = 0x03C6; +TA1R = 0x03D0; +TA1CCR0 = 0x03D2; +TA1CCR1 = 0x03D4; +TA1CCR2 = 0x03D6; +TA1IV = 0x03EE; +TA1EX0 = 0x03E0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0520; +UCA1CTLW0_L = 0x0520; +UCA1CTLW0_H = 0x0521; +UCA1CTLW1 = 0x0522; +UCA1CTLW1_L = 0x0522; +UCA1CTLW1_H = 0x0523; +UCA1BRW = 0x0526; +UCA1BRW_L = 0x0526; +UCA1BRW_H = 0x0527; +UCA1MCTLW = 0x0528; +UCA1MCTLW_L = 0x0528; +UCA1MCTLW_H = 0x0529; +UCA1STATW = 0x052A; +UCA1RXBUF = 0x052C; +UCA1RXBUF_L = 0x052C; +UCA1RXBUF_H = 0x052D; +UCA1TXBUF = 0x052E; +UCA1TXBUF_L = 0x052E; +UCA1TXBUF_H = 0x052F; +UCA1ABCTL = 0x0530; +UCA1IRCTL = 0x0532; +UCA1IRCTL_L = 0x0532; +UCA1IRCTL_H = 0x0533; +UCA1IE = 0x053A; +UCA1IE_L = 0x053A; +UCA1IE_H = 0x053B; +UCA1IFG = 0x053C; +UCA1IFG_L = 0x053C; +UCA1IFG_H = 0x053D; +UCA1IV = 0x053E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0540; +UCB0CTLW0_L = 0x0540; +UCB0CTLW0_H = 0x0541; +UCB0CTLW1 = 0x0542; +UCB0CTLW1_L = 0x0542; +UCB0CTLW1_H = 0x0543; +UCB0BRW = 0x0546; +UCB0BRW_L = 0x0546; +UCB0BRW_H = 0x0547; +UCB0STATW = 0x0548; +UCB0STATW_L = 0x0548; +UCB0STATW_H = 0x0549; +UCB0TBCNT = 0x054A; +UCB0TBCNT_L = 0x054A; +UCB0TBCNT_H = 0x054B; +UCB0RXBUF = 0x054C; +UCB0RXBUF_L = 0x054C; +UCB0RXBUF_H = 0x054D; +UCB0TXBUF = 0x054E; +UCB0TXBUF_L = 0x054E; +UCB0TXBUF_H = 0x054F; +UCB0I2COA0 = 0x0554; +UCB0I2COA0_L = 0x0554; +UCB0I2COA0_H = 0x0555; +UCB0I2COA1 = 0x0556; +UCB0I2COA1_L = 0x0556; +UCB0I2COA1_H = 0x0557; +UCB0I2COA2 = 0x0558; +UCB0I2COA2_L = 0x0558; +UCB0I2COA2_H = 0x0559; +UCB0I2COA3 = 0x055A; +UCB0I2COA3_L = 0x055A; +UCB0I2COA3_H = 0x055B; +UCB0ADDRX = 0x055C; +UCB0ADDRX_L = 0x055C; +UCB0ADDRX_H = 0x055D; +UCB0ADDMASK = 0x055E; +UCB0ADDMASK_L = 0x055E; +UCB0ADDMASK_H = 0x055F; +UCB0I2CSA = 0x0560; +UCB0I2CSA_L = 0x0560; +UCB0I2CSA_H = 0x0561; +UCB0IE = 0x056A; +UCB0IE_L = 0x056A; +UCB0IE_H = 0x056B; +UCB0IFG = 0x056C; +UCB0IFG_L = 0x056C; +UCB0IFG_H = 0x056D; +UCB0IV = 0x056E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr2475.cmd b/msp430/msp430fr2475.cmd new file mode 100644 index 00000000..a18a83d6 --- /dev/null +++ b/msp430/msp430fr2475.cmd @@ -0,0 +1,1051 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr2475.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC +*****************************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; + + +/***************************************************************************** + BKMEM +*****************************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + + + +/***************************************************************************** + FRCTL +*****************************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RTC +*****************************************************************************/ +RTCCTL = 0x0300; +RTCCTL_L = 0x0300; +RTCCTL_H = 0x0301; +RTCIV = 0x0304; +RTCIV_L = 0x0304; +RTCIV_H = 0x0305; +RTCMOD = 0x0308; +RTCMOD_L = 0x0308; +RTCMOD_H = 0x0309; +RTCCNT = 0x030C; +RTCCNT_L = 0x030C; +RTCCNT_H = 0x030D; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; +SYSCFG3 = 0x0166; +SYSCFG3_L = 0x0166; +SYSCFG3_H = 0x0167; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0380; +TA0CTL_L = 0x0380; +TA0CTL_H = 0x0381; +TA0CCTL0 = 0x0382; +TA0CCTL0_L = 0x0382; +TA0CCTL0_H = 0x0383; +TA0CCTL1 = 0x0384; +TA0CCTL1_L = 0x0384; +TA0CCTL1_H = 0x0385; +TA0CCTL2 = 0x0386; +TA0CCTL2_L = 0x0386; +TA0CCTL2_H = 0x0387; +TA0R = 0x0390; +TA0R_L = 0x0390; +TA0R_H = 0x0391; +TA0CCR0 = 0x0392; +TA0CCR0_L = 0x0392; +TA0CCR0_H = 0x0393; +TA0CCR1 = 0x0394; +TA0CCR1_L = 0x0394; +TA0CCR1_H = 0x0395; +TA0CCR2 = 0x0396; +TA0CCR2_L = 0x0396; +TA0CCR2_H = 0x0397; +TA0EX0 = 0x03A0; +TA0EX0_L = 0x03A0; +TA0EX0_H = 0x03A1; +TA0IV = 0x03AE; +TA0IV_L = 0x03AE; +TA0IV_H = 0x03AF; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x03C0; +TA1CTL_L = 0x03C0; +TA1CTL_H = 0x03C1; +TA1CCTL0 = 0x03C2; +TA1CCTL0_L = 0x03C2; +TA1CCTL0_H = 0x03C3; +TA1CCTL1 = 0x03C4; +TA1CCTL1_L = 0x03C4; +TA1CCTL1_H = 0x03C5; +TA1CCTL2 = 0x03C6; +TA1CCTL2_L = 0x03C6; +TA1CCTL2_H = 0x03C7; +TA1R = 0x03D0; +TA1R_L = 0x03D0; +TA1R_H = 0x03D1; +TA1CCR0 = 0x03D2; +TA1CCR0_L = 0x03D2; +TA1CCR0_H = 0x03D3; +TA1CCR1 = 0x03D4; +TA1CCR1_L = 0x03D4; +TA1CCR1_H = 0x03D5; +TA1CCR2 = 0x03D6; +TA1CCR2_L = 0x03D6; +TA1CCR2_H = 0x03D7; +TA1EX0 = 0x03E0; +TA1EX0_L = 0x03E0; +TA1EX0_H = 0x03E1; +TA1IV = 0x03EE; +TA1IV_L = 0x03EE; +TA1IV_H = 0x03EF; + + +/***************************************************************************** + TA2 +*****************************************************************************/ +TA2CTL = 0x0400; +TA2CTL_L = 0x0400; +TA2CTL_H = 0x0401; +TA2CCTL0 = 0x0402; +TA2CCTL0_L = 0x0402; +TA2CCTL0_H = 0x0403; +TA2CCTL1 = 0x0404; +TA2CCTL1_L = 0x0404; +TA2CCTL1_H = 0x0405; +TA2CCTL2 = 0x0406; +TA2CCTL2_L = 0x0406; +TA2CCTL2_H = 0x0407; +TA2R = 0x0410; +TA2R_L = 0x0410; +TA2R_H = 0x0411; +TA2CCR0 = 0x0412; +TA2CCR0_L = 0x0412; +TA2CCR0_H = 0x0413; +TA2CCR1 = 0x0414; +TA2CCR1_L = 0x0414; +TA2CCR1_H = 0x0415; +TA2CCR2 = 0x0416; +TA2CCR2_L = 0x0416; +TA2CCR2_H = 0x0417; +TA2EX0 = 0x0420; +TA2EX0_L = 0x0420; +TA2EX0_H = 0x0421; +TA2IV = 0x042E; +TA2IV_L = 0x042E; +TA2IV_H = 0x042F; + + +/***************************************************************************** + TA3 +*****************************************************************************/ +TA3CTL = 0x0440; +TA3CTL_L = 0x0440; +TA3CTL_H = 0x0441; +TA3CCTL0 = 0x0442; +TA3CCTL0_L = 0x0442; +TA3CCTL0_H = 0x0443; +TA3CCTL1 = 0x0444; +TA3CCTL1_L = 0x0444; +TA3CCTL1_H = 0x0445; +TA3CCTL2 = 0x0446; +TA3CCTL2_L = 0x0446; +TA3CCTL2_H = 0x0447; +TA3R = 0x0450; +TA3R_L = 0x0450; +TA3R_H = 0x0451; +TA3CCR0 = 0x0452; +TA3CCR0_L = 0x0452; +TA3CCR0_H = 0x0453; +TA3CCR1 = 0x0454; +TA3CCR1_L = 0x0454; +TA3CCR1_H = 0x0455; +TA3CCR2 = 0x0456; +TA3CCR2_L = 0x0456; +TA3CCR2_H = 0x0457; +TA3EX0 = 0x0460; +TA3EX0_L = 0x0460; +TA3EX0_H = 0x0461; +TA3IV = 0x046E; +TA3IV_L = 0x046E; +TA3IV_H = 0x046F; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x0480; +TB0CTL_L = 0x0480; +TB0CTL_H = 0x0481; +TB0CCTL0 = 0x0482; +TB0CCTL0_L = 0x0482; +TB0CCTL0_H = 0x0483; +TB0CCTL1 = 0x0484; +TB0CCTL1_L = 0x0484; +TB0CCTL1_H = 0x0485; +TB0CCTL2 = 0x0486; +TB0CCTL2_L = 0x0486; +TB0CCTL2_H = 0x0487; +TB0CCTL3 = 0x0488; +TB0CCTL3_L = 0x0488; +TB0CCTL3_H = 0x0489; +TB0CCTL4 = 0x048A; +TB0CCTL4_L = 0x048A; +TB0CCTL4_H = 0x048B; +TB0CCTL5 = 0x048C; +TB0CCTL5_L = 0x048C; +TB0CCTL5_H = 0x048D; +TB0CCTL6 = 0x048E; +TB0CCTL6_L = 0x048E; +TB0CCTL6_H = 0x048F; +TB0R = 0x0490; +TB0R_L = 0x0490; +TB0R_H = 0x0491; +TB0CCR0 = 0x0492; +TB0CCR0_L = 0x0492; +TB0CCR0_H = 0x0493; +TB0CCR1 = 0x0494; +TB0CCR1_L = 0x0494; +TB0CCR1_H = 0x0495; +TB0CCR2 = 0x0496; +TB0CCR2_L = 0x0496; +TB0CCR2_H = 0x0497; +TB0CCR3 = 0x0498; +TB0CCR3_L = 0x0498; +TB0CCR3_H = 0x0499; +TB0CCR4 = 0x049A; +TB0CCR4_L = 0x049A; +TB0CCR4_H = 0x049B; +TB0CCR5 = 0x049C; +TB0CCR5_L = 0x049C; +TB0CCR5_H = 0x049D; +TB0CCR6 = 0x049E; +TB0CCR6_L = 0x049E; +TB0CCR6_H = 0x049F; +TB0EX0 = 0x04A0; +TB0EX0_L = 0x04A0; +TB0EX0_H = 0x04A1; +TB0IV = 0x04AE; +TB0IV_L = 0x04AE; +TB0IV_H = 0x04AF; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; + + +/***************************************************************************** + eCOMP0 +*****************************************************************************/ +CP0CTL0 = 0x08E0; +CP0CTL0_L = 0x08E0; +CP0CTL0_H = 0x08E1; +CP0CTL1 = 0x08E2; +CP0CTL1_L = 0x08E2; +CP0CTL1_H = 0x08E3; +CP0INT = 0x08E6; +CP0INT_L = 0x08E6; +CP0INT_H = 0x08E7; +CP0IV = 0x08E8; +CP0IV_L = 0x08E8; +CP0IV_H = 0x08E9; +CP0DACCTL = 0x08F0; +CP0DACCTL_L = 0x08F0; +CP0DACCTL_H = 0x08F1; +CP0DACDATA = 0x08F2; +CP0DACDATA_L = 0x08F2; +CP0DACDATA_H = 0x08F3; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0STATW_L = 0x050A; +UCA0STATW_H = 0x050B; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0ABCTL_L = 0x0510; +UCA0ABCTL_H = 0x0511; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +UCA0IV_L = 0x051E; +UCA0IV_H = 0x051F; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x0520; +UCA1CTLW0_L = 0x0520; +UCA1CTLW0_H = 0x0521; +UCA1CTLW1 = 0x0522; +UCA1CTLW1_L = 0x0522; +UCA1CTLW1_H = 0x0523; +UCA1BRW = 0x0526; +UCA1BRW_L = 0x0526; +UCA1BRW_H = 0x0527; +UCA1MCTLW = 0x0528; +UCA1MCTLW_L = 0x0528; +UCA1MCTLW_H = 0x0529; +UCA1STATW = 0x052A; +UCA1STATW_L = 0x052A; +UCA1STATW_H = 0x052B; +UCA1RXBUF = 0x052C; +UCA1RXBUF_L = 0x052C; +UCA1RXBUF_H = 0x052D; +UCA1TXBUF = 0x052E; +UCA1TXBUF_L = 0x052E; +UCA1TXBUF_H = 0x052F; +UCA1ABCTL = 0x0530; +UCA1ABCTL_L = 0x0530; +UCA1ABCTL_H = 0x0531; +UCA1IRCTL = 0x0532; +UCA1IRCTL_L = 0x0532; +UCA1IRCTL_H = 0x0533; +UCA1IE = 0x053A; +UCA1IE_L = 0x053A; +UCA1IE_H = 0x053B; +UCA1IFG = 0x053C; +UCA1IFG_L = 0x053C; +UCA1IFG_H = 0x053D; +UCA1IV = 0x053E; +UCA1IV_L = 0x053E; +UCA1IV_H = 0x053F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0540; +UCB0CTLW0_L = 0x0540; +UCB0CTLW0_H = 0x0541; +UCB0CTLW1 = 0x0542; +UCB0CTLW1_L = 0x0542; +UCB0CTLW1_H = 0x0543; +UCB0BRW = 0x0546; +UCB0BRW_L = 0x0546; +UCB0BRW_H = 0x0547; +UCB0STATW = 0x0548; +UCB0STATW_L = 0x0548; +UCB0STATW_H = 0x0549; +UCB0TBCNT = 0x054A; +UCB0TBCNT_L = 0x054A; +UCB0TBCNT_H = 0x054B; +UCB0RXBUF = 0x054C; +UCB0RXBUF_L = 0x054C; +UCB0RXBUF_H = 0x054D; +UCB0TXBUF = 0x054E; +UCB0TXBUF_L = 0x054E; +UCB0TXBUF_H = 0x054F; +UCB0I2COA0 = 0x0554; +UCB0I2COA0_L = 0x0554; +UCB0I2COA0_H = 0x0555; +UCB0I2COA1 = 0x0556; +UCB0I2COA1_L = 0x0556; +UCB0I2COA1_H = 0x0557; +UCB0I2COA2 = 0x0558; +UCB0I2COA2_L = 0x0558; +UCB0I2COA2_H = 0x0559; +UCB0I2COA3 = 0x055A; +UCB0I2COA3_L = 0x055A; +UCB0I2COA3_H = 0x055B; +UCB0ADDRX = 0x055C; +UCB0ADDRX_L = 0x055C; +UCB0ADDRX_H = 0x055D; +UCB0ADDMASK = 0x055E; +UCB0ADDMASK_L = 0x055E; +UCB0ADDMASK_H = 0x055F; +UCB0I2CSA = 0x0560; +UCB0I2CSA_L = 0x0560; +UCB0I2CSA_H = 0x0561; +UCB0IE = 0x056A; +UCB0IE_L = 0x056A; +UCB0IE_H = 0x056B; +UCB0IFG = 0x056C; +UCB0IFG_L = 0x056C; +UCB0IFG_H = 0x056D; +UCB0IV = 0x056E; +UCB0IV_L = 0x056E; +UCB0IV_H = 0x056F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x0580; +UCB1CTLW0_L = 0x0580; +UCB1CTLW0_H = 0x0581; +UCB1CTLW1 = 0x0582; +UCB1CTLW1_L = 0x0582; +UCB1CTLW1_H = 0x0583; +UCB1BRW = 0x0586; +UCB1BRW_L = 0x0586; +UCB1BRW_H = 0x0587; +UCB1STATW = 0x0588; +UCB1STATW_L = 0x0588; +UCB1STATW_H = 0x0589; +UCB1TBCNT = 0x058A; +UCB1TBCNT_L = 0x058A; +UCB1TBCNT_H = 0x058B; +UCB1RXBUF = 0x058C; +UCB1RXBUF_L = 0x058C; +UCB1RXBUF_H = 0x058D; +UCB1TXBUF = 0x058E; +UCB1TXBUF_L = 0x058E; +UCB1TXBUF_H = 0x058F; +UCB1I2COA0 = 0x0594; +UCB1I2COA0_L = 0x0594; +UCB1I2COA0_H = 0x0595; +UCB1I2COA1 = 0x0596; +UCB1I2COA1_L = 0x0596; +UCB1I2COA1_H = 0x0597; +UCB1I2COA2 = 0x0598; +UCB1I2COA2_L = 0x0598; +UCB1I2COA2_H = 0x0599; +UCB1I2COA3 = 0x059A; +UCB1I2COA3_L = 0x059A; +UCB1I2COA3_H = 0x059B; +UCB1ADDRX = 0x059C; +UCB1ADDRX_L = 0x059C; +UCB1ADDRX_H = 0x059D; +UCB1ADDMASK = 0x059E; +UCB1ADDMASK_L = 0x059E; +UCB1ADDMASK_H = 0x059F; +UCB1I2CSA = 0x05A0; +UCB1I2CSA_L = 0x05A0; +UCB1I2CSA_H = 0x05A1; +UCB1IE = 0x05AA; +UCB1IE_L = 0x05AA; +UCB1IE_H = 0x05AB; +UCB1IFG = 0x05AC; +UCB1IFG_L = 0x05AC; +UCB1IFG_H = 0x05AD; +UCB1IV = 0x05AE; +UCB1IV_L = 0x05AE; +UCB1IV_H = 0x05AF; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr2476.cmd b/msp430/msp430fr2476.cmd new file mode 100644 index 00000000..53963fff --- /dev/null +++ b/msp430/msp430fr2476.cmd @@ -0,0 +1,1051 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr2476.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC +*****************************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; + + +/***************************************************************************** + BKMEM +*****************************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + + + +/***************************************************************************** + FRCTL +*****************************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RTC +*****************************************************************************/ +RTCCTL = 0x0300; +RTCCTL_L = 0x0300; +RTCCTL_H = 0x0301; +RTCIV = 0x0304; +RTCIV_L = 0x0304; +RTCIV_H = 0x0305; +RTCMOD = 0x0308; +RTCMOD_L = 0x0308; +RTCMOD_H = 0x0309; +RTCCNT = 0x030C; +RTCCNT_L = 0x030C; +RTCCNT_H = 0x030D; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; +SYSCFG3 = 0x0166; +SYSCFG3_L = 0x0166; +SYSCFG3_H = 0x0167; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0380; +TA0CTL_L = 0x0380; +TA0CTL_H = 0x0381; +TA0CCTL0 = 0x0382; +TA0CCTL0_L = 0x0382; +TA0CCTL0_H = 0x0383; +TA0CCTL1 = 0x0384; +TA0CCTL1_L = 0x0384; +TA0CCTL1_H = 0x0385; +TA0CCTL2 = 0x0386; +TA0CCTL2_L = 0x0386; +TA0CCTL2_H = 0x0387; +TA0R = 0x0390; +TA0R_L = 0x0390; +TA0R_H = 0x0391; +TA0CCR0 = 0x0392; +TA0CCR0_L = 0x0392; +TA0CCR0_H = 0x0393; +TA0CCR1 = 0x0394; +TA0CCR1_L = 0x0394; +TA0CCR1_H = 0x0395; +TA0CCR2 = 0x0396; +TA0CCR2_L = 0x0396; +TA0CCR2_H = 0x0397; +TA0EX0 = 0x03A0; +TA0EX0_L = 0x03A0; +TA0EX0_H = 0x03A1; +TA0IV = 0x03AE; +TA0IV_L = 0x03AE; +TA0IV_H = 0x03AF; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x03C0; +TA1CTL_L = 0x03C0; +TA1CTL_H = 0x03C1; +TA1CCTL0 = 0x03C2; +TA1CCTL0_L = 0x03C2; +TA1CCTL0_H = 0x03C3; +TA1CCTL1 = 0x03C4; +TA1CCTL1_L = 0x03C4; +TA1CCTL1_H = 0x03C5; +TA1CCTL2 = 0x03C6; +TA1CCTL2_L = 0x03C6; +TA1CCTL2_H = 0x03C7; +TA1R = 0x03D0; +TA1R_L = 0x03D0; +TA1R_H = 0x03D1; +TA1CCR0 = 0x03D2; +TA1CCR0_L = 0x03D2; +TA1CCR0_H = 0x03D3; +TA1CCR1 = 0x03D4; +TA1CCR1_L = 0x03D4; +TA1CCR1_H = 0x03D5; +TA1CCR2 = 0x03D6; +TA1CCR2_L = 0x03D6; +TA1CCR2_H = 0x03D7; +TA1EX0 = 0x03E0; +TA1EX0_L = 0x03E0; +TA1EX0_H = 0x03E1; +TA1IV = 0x03EE; +TA1IV_L = 0x03EE; +TA1IV_H = 0x03EF; + + +/***************************************************************************** + TA2 +*****************************************************************************/ +TA2CTL = 0x0400; +TA2CTL_L = 0x0400; +TA2CTL_H = 0x0401; +TA2CCTL0 = 0x0402; +TA2CCTL0_L = 0x0402; +TA2CCTL0_H = 0x0403; +TA2CCTL1 = 0x0404; +TA2CCTL1_L = 0x0404; +TA2CCTL1_H = 0x0405; +TA2CCTL2 = 0x0406; +TA2CCTL2_L = 0x0406; +TA2CCTL2_H = 0x0407; +TA2R = 0x0410; +TA2R_L = 0x0410; +TA2R_H = 0x0411; +TA2CCR0 = 0x0412; +TA2CCR0_L = 0x0412; +TA2CCR0_H = 0x0413; +TA2CCR1 = 0x0414; +TA2CCR1_L = 0x0414; +TA2CCR1_H = 0x0415; +TA2CCR2 = 0x0416; +TA2CCR2_L = 0x0416; +TA2CCR2_H = 0x0417; +TA2EX0 = 0x0420; +TA2EX0_L = 0x0420; +TA2EX0_H = 0x0421; +TA2IV = 0x042E; +TA2IV_L = 0x042E; +TA2IV_H = 0x042F; + + +/***************************************************************************** + TA3 +*****************************************************************************/ +TA3CTL = 0x0440; +TA3CTL_L = 0x0440; +TA3CTL_H = 0x0441; +TA3CCTL0 = 0x0442; +TA3CCTL0_L = 0x0442; +TA3CCTL0_H = 0x0443; +TA3CCTL1 = 0x0444; +TA3CCTL1_L = 0x0444; +TA3CCTL1_H = 0x0445; +TA3CCTL2 = 0x0446; +TA3CCTL2_L = 0x0446; +TA3CCTL2_H = 0x0447; +TA3R = 0x0450; +TA3R_L = 0x0450; +TA3R_H = 0x0451; +TA3CCR0 = 0x0452; +TA3CCR0_L = 0x0452; +TA3CCR0_H = 0x0453; +TA3CCR1 = 0x0454; +TA3CCR1_L = 0x0454; +TA3CCR1_H = 0x0455; +TA3CCR2 = 0x0456; +TA3CCR2_L = 0x0456; +TA3CCR2_H = 0x0457; +TA3EX0 = 0x0460; +TA3EX0_L = 0x0460; +TA3EX0_H = 0x0461; +TA3IV = 0x046E; +TA3IV_L = 0x046E; +TA3IV_H = 0x046F; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x0480; +TB0CTL_L = 0x0480; +TB0CTL_H = 0x0481; +TB0CCTL0 = 0x0482; +TB0CCTL0_L = 0x0482; +TB0CCTL0_H = 0x0483; +TB0CCTL1 = 0x0484; +TB0CCTL1_L = 0x0484; +TB0CCTL1_H = 0x0485; +TB0CCTL2 = 0x0486; +TB0CCTL2_L = 0x0486; +TB0CCTL2_H = 0x0487; +TB0CCTL3 = 0x0488; +TB0CCTL3_L = 0x0488; +TB0CCTL3_H = 0x0489; +TB0CCTL4 = 0x048A; +TB0CCTL4_L = 0x048A; +TB0CCTL4_H = 0x048B; +TB0CCTL5 = 0x048C; +TB0CCTL5_L = 0x048C; +TB0CCTL5_H = 0x048D; +TB0CCTL6 = 0x048E; +TB0CCTL6_L = 0x048E; +TB0CCTL6_H = 0x048F; +TB0R = 0x0490; +TB0R_L = 0x0490; +TB0R_H = 0x0491; +TB0CCR0 = 0x0492; +TB0CCR0_L = 0x0492; +TB0CCR0_H = 0x0493; +TB0CCR1 = 0x0494; +TB0CCR1_L = 0x0494; +TB0CCR1_H = 0x0495; +TB0CCR2 = 0x0496; +TB0CCR2_L = 0x0496; +TB0CCR2_H = 0x0497; +TB0CCR3 = 0x0498; +TB0CCR3_L = 0x0498; +TB0CCR3_H = 0x0499; +TB0CCR4 = 0x049A; +TB0CCR4_L = 0x049A; +TB0CCR4_H = 0x049B; +TB0CCR5 = 0x049C; +TB0CCR5_L = 0x049C; +TB0CCR5_H = 0x049D; +TB0CCR6 = 0x049E; +TB0CCR6_L = 0x049E; +TB0CCR6_H = 0x049F; +TB0EX0 = 0x04A0; +TB0EX0_L = 0x04A0; +TB0EX0_H = 0x04A1; +TB0IV = 0x04AE; +TB0IV_L = 0x04AE; +TB0IV_H = 0x04AF; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; + + +/***************************************************************************** + eCOMP0 +*****************************************************************************/ +CP0CTL0 = 0x08E0; +CP0CTL0_L = 0x08E0; +CP0CTL0_H = 0x08E1; +CP0CTL1 = 0x08E2; +CP0CTL1_L = 0x08E2; +CP0CTL1_H = 0x08E3; +CP0INT = 0x08E6; +CP0INT_L = 0x08E6; +CP0INT_H = 0x08E7; +CP0IV = 0x08E8; +CP0IV_L = 0x08E8; +CP0IV_H = 0x08E9; +CP0DACCTL = 0x08F0; +CP0DACCTL_L = 0x08F0; +CP0DACCTL_H = 0x08F1; +CP0DACDATA = 0x08F2; +CP0DACDATA_L = 0x08F2; +CP0DACDATA_H = 0x08F3; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0STATW_L = 0x050A; +UCA0STATW_H = 0x050B; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0ABCTL_L = 0x0510; +UCA0ABCTL_H = 0x0511; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +UCA0IV_L = 0x051E; +UCA0IV_H = 0x051F; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x0520; +UCA1CTLW0_L = 0x0520; +UCA1CTLW0_H = 0x0521; +UCA1CTLW1 = 0x0522; +UCA1CTLW1_L = 0x0522; +UCA1CTLW1_H = 0x0523; +UCA1BRW = 0x0526; +UCA1BRW_L = 0x0526; +UCA1BRW_H = 0x0527; +UCA1MCTLW = 0x0528; +UCA1MCTLW_L = 0x0528; +UCA1MCTLW_H = 0x0529; +UCA1STATW = 0x052A; +UCA1STATW_L = 0x052A; +UCA1STATW_H = 0x052B; +UCA1RXBUF = 0x052C; +UCA1RXBUF_L = 0x052C; +UCA1RXBUF_H = 0x052D; +UCA1TXBUF = 0x052E; +UCA1TXBUF_L = 0x052E; +UCA1TXBUF_H = 0x052F; +UCA1ABCTL = 0x0530; +UCA1ABCTL_L = 0x0530; +UCA1ABCTL_H = 0x0531; +UCA1IRCTL = 0x0532; +UCA1IRCTL_L = 0x0532; +UCA1IRCTL_H = 0x0533; +UCA1IE = 0x053A; +UCA1IE_L = 0x053A; +UCA1IE_H = 0x053B; +UCA1IFG = 0x053C; +UCA1IFG_L = 0x053C; +UCA1IFG_H = 0x053D; +UCA1IV = 0x053E; +UCA1IV_L = 0x053E; +UCA1IV_H = 0x053F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0540; +UCB0CTLW0_L = 0x0540; +UCB0CTLW0_H = 0x0541; +UCB0CTLW1 = 0x0542; +UCB0CTLW1_L = 0x0542; +UCB0CTLW1_H = 0x0543; +UCB0BRW = 0x0546; +UCB0BRW_L = 0x0546; +UCB0BRW_H = 0x0547; +UCB0STATW = 0x0548; +UCB0STATW_L = 0x0548; +UCB0STATW_H = 0x0549; +UCB0TBCNT = 0x054A; +UCB0TBCNT_L = 0x054A; +UCB0TBCNT_H = 0x054B; +UCB0RXBUF = 0x054C; +UCB0RXBUF_L = 0x054C; +UCB0RXBUF_H = 0x054D; +UCB0TXBUF = 0x054E; +UCB0TXBUF_L = 0x054E; +UCB0TXBUF_H = 0x054F; +UCB0I2COA0 = 0x0554; +UCB0I2COA0_L = 0x0554; +UCB0I2COA0_H = 0x0555; +UCB0I2COA1 = 0x0556; +UCB0I2COA1_L = 0x0556; +UCB0I2COA1_H = 0x0557; +UCB0I2COA2 = 0x0558; +UCB0I2COA2_L = 0x0558; +UCB0I2COA2_H = 0x0559; +UCB0I2COA3 = 0x055A; +UCB0I2COA3_L = 0x055A; +UCB0I2COA3_H = 0x055B; +UCB0ADDRX = 0x055C; +UCB0ADDRX_L = 0x055C; +UCB0ADDRX_H = 0x055D; +UCB0ADDMASK = 0x055E; +UCB0ADDMASK_L = 0x055E; +UCB0ADDMASK_H = 0x055F; +UCB0I2CSA = 0x0560; +UCB0I2CSA_L = 0x0560; +UCB0I2CSA_H = 0x0561; +UCB0IE = 0x056A; +UCB0IE_L = 0x056A; +UCB0IE_H = 0x056B; +UCB0IFG = 0x056C; +UCB0IFG_L = 0x056C; +UCB0IFG_H = 0x056D; +UCB0IV = 0x056E; +UCB0IV_L = 0x056E; +UCB0IV_H = 0x056F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x0580; +UCB1CTLW0_L = 0x0580; +UCB1CTLW0_H = 0x0581; +UCB1CTLW1 = 0x0582; +UCB1CTLW1_L = 0x0582; +UCB1CTLW1_H = 0x0583; +UCB1BRW = 0x0586; +UCB1BRW_L = 0x0586; +UCB1BRW_H = 0x0587; +UCB1STATW = 0x0588; +UCB1STATW_L = 0x0588; +UCB1STATW_H = 0x0589; +UCB1TBCNT = 0x058A; +UCB1TBCNT_L = 0x058A; +UCB1TBCNT_H = 0x058B; +UCB1RXBUF = 0x058C; +UCB1RXBUF_L = 0x058C; +UCB1RXBUF_H = 0x058D; +UCB1TXBUF = 0x058E; +UCB1TXBUF_L = 0x058E; +UCB1TXBUF_H = 0x058F; +UCB1I2COA0 = 0x0594; +UCB1I2COA0_L = 0x0594; +UCB1I2COA0_H = 0x0595; +UCB1I2COA1 = 0x0596; +UCB1I2COA1_L = 0x0596; +UCB1I2COA1_H = 0x0597; +UCB1I2COA2 = 0x0598; +UCB1I2COA2_L = 0x0598; +UCB1I2COA2_H = 0x0599; +UCB1I2COA3 = 0x059A; +UCB1I2COA3_L = 0x059A; +UCB1I2COA3_H = 0x059B; +UCB1ADDRX = 0x059C; +UCB1ADDRX_L = 0x059C; +UCB1ADDRX_H = 0x059D; +UCB1ADDMASK = 0x059E; +UCB1ADDMASK_L = 0x059E; +UCB1ADDMASK_H = 0x059F; +UCB1I2CSA = 0x05A0; +UCB1I2CSA_L = 0x05A0; +UCB1I2CSA_H = 0x05A1; +UCB1IE = 0x05AA; +UCB1IE_L = 0x05AA; +UCB1IE_H = 0x05AB; +UCB1IFG = 0x05AC; +UCB1IFG_L = 0x05AC; +UCB1IFG_H = 0x05AD; +UCB1IV = 0x05AE; +UCB1IV_L = 0x05AE; +UCB1IV_H = 0x05AF; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr2512.cmd b/msp430/msp430fr2512.cmd new file mode 100644 index 00000000..e90d7009 --- /dev/null +++ b/msp430/msp430fr2512.cmd @@ -0,0 +1,709 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr2512.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC +*****************************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; + + +/***************************************************************************** + BKMEM +*****************************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; + + +/***************************************************************************** + CAPTIVATE +*****************************************************************************/ +CAPIE = 0x0B20; +CAPIE_L = 0x0B20; +CAPIE_H = 0x0B21; +CAPIFG = 0x0B22; +CAPIFG_L = 0x0B22; +CAPIFG_H = 0x0B23; +CAPIV = 0x0B24; +CAPIV_L = 0x0B24; +CAPIV_H = 0x0B25; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + + + +/***************************************************************************** + FRCTL +*****************************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RTC +*****************************************************************************/ +RTCCTL = 0x0300; +RTCCTL_L = 0x0300; +RTCCTL_H = 0x0301; +RTCIV = 0x0304; +RTCIV_L = 0x0304; +RTCIV_H = 0x0305; +RTCMOD = 0x0308; +RTCMOD_L = 0x0308; +RTCMOD_H = 0x0309; +RTCCNT = 0x030C; +RTCCNT_L = 0x030C; +RTCCNT_H = 0x030D; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; +SYSCFG3 = 0x0166; +SYSCFG3_L = 0x0166; +SYSCFG3_H = 0x0167; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0380; +TA0CTL_L = 0x0380; +TA0CTL_H = 0x0381; +TA0CCTL0 = 0x0382; +TA0CCTL0_L = 0x0382; +TA0CCTL0_H = 0x0383; +TA0CCTL1 = 0x0384; +TA0CCTL1_L = 0x0384; +TA0CCTL1_H = 0x0385; +TA0CCTL2 = 0x0386; +TA0CCTL2_L = 0x0386; +TA0CCTL2_H = 0x0387; +TA0CCTL3 = 0x0388; +TA0CCTL3_L = 0x0388; +TA0CCTL3_H = 0x0389; +TA0CCTL4 = 0x038A; +TA0CCTL4_L = 0x038A; +TA0CCTL4_H = 0x038B; +TA0CCTL5 = 0x038C; +TA0CCTL5_L = 0x038C; +TA0CCTL5_H = 0x038D; +TA0CCTL6 = 0x038E; +TA0CCTL6_L = 0x038E; +TA0CCTL6_H = 0x038F; +TA0R = 0x0390; +TA0R_L = 0x0390; +TA0R_H = 0x0391; +TA0CCR0 = 0x0392; +TA0CCR0_L = 0x0392; +TA0CCR0_H = 0x0393; +TA0CCR1 = 0x0394; +TA0CCR1_L = 0x0394; +TA0CCR1_H = 0x0395; +TA0CCR2 = 0x0396; +TA0CCR2_L = 0x0396; +TA0CCR2_H = 0x0397; +TA0CCR3 = 0x0398; +TA0CCR3_L = 0x0398; +TA0CCR3_H = 0x0399; +TA0CCR4 = 0x039A; +TA0CCR4_L = 0x039A; +TA0CCR4_H = 0x039B; +TA0CCR5 = 0x039C; +TA0CCR5_L = 0x039C; +TA0CCR5_H = 0x039D; +TA0CCR6 = 0x039E; +TA0CCR6_L = 0x039E; +TA0CCR6_H = 0x039F; +TA0EX0 = 0x03A0; +TA0EX0_L = 0x03A0; +TA0EX0_H = 0x03A1; +TA0IV = 0x03AE; +TA0IV_L = 0x03AE; +TA0IV_H = 0x03AF; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x03C0; +TA1CTL_L = 0x03C0; +TA1CTL_H = 0x03C1; +TA1CCTL0 = 0x03C2; +TA1CCTL0_L = 0x03C2; +TA1CCTL0_H = 0x03C3; +TA1CCTL1 = 0x03C4; +TA1CCTL1_L = 0x03C4; +TA1CCTL1_H = 0x03C5; +TA1CCTL2 = 0x03C6; +TA1CCTL2_L = 0x03C6; +TA1CCTL2_H = 0x03C7; +TA1CCTL3 = 0x03C8; +TA1CCTL3_L = 0x03C8; +TA1CCTL3_H = 0x03C9; +TA1CCTL4 = 0x03CA; +TA1CCTL4_L = 0x03CA; +TA1CCTL4_H = 0x03CB; +TA1CCTL5 = 0x03CC; +TA1CCTL5_L = 0x03CC; +TA1CCTL5_H = 0x03CD; +TA1CCTL6 = 0x03CE; +TA1CCTL6_L = 0x03CE; +TA1CCTL6_H = 0x03CF; +TA1R = 0x03D0; +TA1R_L = 0x03D0; +TA1R_H = 0x03D1; +TA1CCR0 = 0x03D2; +TA1CCR0_L = 0x03D2; +TA1CCR0_H = 0x03D3; +TA1CCR1 = 0x03D4; +TA1CCR1_L = 0x03D4; +TA1CCR1_H = 0x03D5; +TA1CCR2 = 0x03D6; +TA1CCR2_L = 0x03D6; +TA1CCR2_H = 0x03D7; +TA1CCR3 = 0x03D8; +TA1CCR3_L = 0x03D8; +TA1CCR3_H = 0x03D9; +TA1CCR4 = 0x03DA; +TA1CCR4_L = 0x03DA; +TA1CCR4_H = 0x03DB; +TA1CCR5 = 0x03DC; +TA1CCR5_L = 0x03DC; +TA1CCR5_H = 0x03DD; +TA1CCR6 = 0x03DE; +TA1CCR6_L = 0x03DE; +TA1CCR6_H = 0x03DF; +TA1EX0 = 0x03E0; +TA1EX0_L = 0x03E0; +TA1EX0_H = 0x03E1; +TA1IV = 0x03EE; +TA1IV_L = 0x03EE; +TA1IV_H = 0x03EF; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0STATW_L = 0x050A; +UCA0STATW_H = 0x050B; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0ABCTL_L = 0x0510; +UCA0ABCTL_H = 0x0511; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +UCA0IV_L = 0x051E; +UCA0IV_H = 0x051F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0540; +UCB0CTLW0_L = 0x0540; +UCB0CTLW0_H = 0x0541; +UCB0CTLW1 = 0x0542; +UCB0CTLW1_L = 0x0542; +UCB0CTLW1_H = 0x0543; +UCB0BRW = 0x0546; +UCB0BRW_L = 0x0546; +UCB0BRW_H = 0x0547; +UCB0STATW = 0x0548; +UCB0STATW_L = 0x0548; +UCB0STATW_H = 0x0549; +UCB0TBCNT = 0x054A; +UCB0TBCNT_L = 0x054A; +UCB0TBCNT_H = 0x054B; +UCB0RXBUF = 0x054C; +UCB0RXBUF_L = 0x054C; +UCB0RXBUF_H = 0x054D; +UCB0TXBUF = 0x054E; +UCB0TXBUF_L = 0x054E; +UCB0TXBUF_H = 0x054F; +UCB0I2COA0 = 0x0554; +UCB0I2COA0_L = 0x0554; +UCB0I2COA0_H = 0x0555; +UCB0I2COA1 = 0x0556; +UCB0I2COA1_L = 0x0556; +UCB0I2COA1_H = 0x0557; +UCB0I2COA2 = 0x0558; +UCB0I2COA2_L = 0x0558; +UCB0I2COA2_H = 0x0559; +UCB0I2COA3 = 0x055A; +UCB0I2COA3_L = 0x055A; +UCB0I2COA3_H = 0x055B; +UCB0ADDRX = 0x055C; +UCB0ADDRX_L = 0x055C; +UCB0ADDRX_H = 0x055D; +UCB0ADDMASK = 0x055E; +UCB0ADDMASK_L = 0x055E; +UCB0ADDMASK_H = 0x055F; +UCB0I2CSA = 0x0560; +UCB0I2CSA_L = 0x0560; +UCB0I2CSA_H = 0x0561; +UCB0IE = 0x056A; +UCB0IE_L = 0x056A; +UCB0IE_H = 0x056B; +UCB0IFG = 0x056C; +UCB0IFG_L = 0x056C; +UCB0IFG_H = 0x056D; +UCB0IV = 0x056E; +UCB0IV_L = 0x056E; +UCB0IV_H = 0x056F; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr2522.cmd b/msp430/msp430fr2522.cmd new file mode 100644 index 00000000..a5d4602f --- /dev/null +++ b/msp430/msp430fr2522.cmd @@ -0,0 +1,709 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr2522.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC +*****************************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; + + +/***************************************************************************** + BKMEM +*****************************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; + + +/***************************************************************************** + CAPTIVATE +*****************************************************************************/ +CAPIE = 0x0B20; +CAPIE_L = 0x0B20; +CAPIE_H = 0x0B21; +CAPIFG = 0x0B22; +CAPIFG_L = 0x0B22; +CAPIFG_H = 0x0B23; +CAPIV = 0x0B24; +CAPIV_L = 0x0B24; +CAPIV_H = 0x0B25; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + + + +/***************************************************************************** + FRCTL +*****************************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RTC +*****************************************************************************/ +RTCCTL = 0x0300; +RTCCTL_L = 0x0300; +RTCCTL_H = 0x0301; +RTCIV = 0x0304; +RTCIV_L = 0x0304; +RTCIV_H = 0x0305; +RTCMOD = 0x0308; +RTCMOD_L = 0x0308; +RTCMOD_H = 0x0309; +RTCCNT = 0x030C; +RTCCNT_L = 0x030C; +RTCCNT_H = 0x030D; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; +SYSCFG3 = 0x0166; +SYSCFG3_L = 0x0166; +SYSCFG3_H = 0x0167; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0380; +TA0CTL_L = 0x0380; +TA0CTL_H = 0x0381; +TA0CCTL0 = 0x0382; +TA0CCTL0_L = 0x0382; +TA0CCTL0_H = 0x0383; +TA0CCTL1 = 0x0384; +TA0CCTL1_L = 0x0384; +TA0CCTL1_H = 0x0385; +TA0CCTL2 = 0x0386; +TA0CCTL2_L = 0x0386; +TA0CCTL2_H = 0x0387; +TA0CCTL3 = 0x0388; +TA0CCTL3_L = 0x0388; +TA0CCTL3_H = 0x0389; +TA0CCTL4 = 0x038A; +TA0CCTL4_L = 0x038A; +TA0CCTL4_H = 0x038B; +TA0CCTL5 = 0x038C; +TA0CCTL5_L = 0x038C; +TA0CCTL5_H = 0x038D; +TA0CCTL6 = 0x038E; +TA0CCTL6_L = 0x038E; +TA0CCTL6_H = 0x038F; +TA0R = 0x0390; +TA0R_L = 0x0390; +TA0R_H = 0x0391; +TA0CCR0 = 0x0392; +TA0CCR0_L = 0x0392; +TA0CCR0_H = 0x0393; +TA0CCR1 = 0x0394; +TA0CCR1_L = 0x0394; +TA0CCR1_H = 0x0395; +TA0CCR2 = 0x0396; +TA0CCR2_L = 0x0396; +TA0CCR2_H = 0x0397; +TA0CCR3 = 0x0398; +TA0CCR3_L = 0x0398; +TA0CCR3_H = 0x0399; +TA0CCR4 = 0x039A; +TA0CCR4_L = 0x039A; +TA0CCR4_H = 0x039B; +TA0CCR5 = 0x039C; +TA0CCR5_L = 0x039C; +TA0CCR5_H = 0x039D; +TA0CCR6 = 0x039E; +TA0CCR6_L = 0x039E; +TA0CCR6_H = 0x039F; +TA0EX0 = 0x03A0; +TA0EX0_L = 0x03A0; +TA0EX0_H = 0x03A1; +TA0IV = 0x03AE; +TA0IV_L = 0x03AE; +TA0IV_H = 0x03AF; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x03C0; +TA1CTL_L = 0x03C0; +TA1CTL_H = 0x03C1; +TA1CCTL0 = 0x03C2; +TA1CCTL0_L = 0x03C2; +TA1CCTL0_H = 0x03C3; +TA1CCTL1 = 0x03C4; +TA1CCTL1_L = 0x03C4; +TA1CCTL1_H = 0x03C5; +TA1CCTL2 = 0x03C6; +TA1CCTL2_L = 0x03C6; +TA1CCTL2_H = 0x03C7; +TA1CCTL3 = 0x03C8; +TA1CCTL3_L = 0x03C8; +TA1CCTL3_H = 0x03C9; +TA1CCTL4 = 0x03CA; +TA1CCTL4_L = 0x03CA; +TA1CCTL4_H = 0x03CB; +TA1CCTL5 = 0x03CC; +TA1CCTL5_L = 0x03CC; +TA1CCTL5_H = 0x03CD; +TA1CCTL6 = 0x03CE; +TA1CCTL6_L = 0x03CE; +TA1CCTL6_H = 0x03CF; +TA1R = 0x03D0; +TA1R_L = 0x03D0; +TA1R_H = 0x03D1; +TA1CCR0 = 0x03D2; +TA1CCR0_L = 0x03D2; +TA1CCR0_H = 0x03D3; +TA1CCR1 = 0x03D4; +TA1CCR1_L = 0x03D4; +TA1CCR1_H = 0x03D5; +TA1CCR2 = 0x03D6; +TA1CCR2_L = 0x03D6; +TA1CCR2_H = 0x03D7; +TA1CCR3 = 0x03D8; +TA1CCR3_L = 0x03D8; +TA1CCR3_H = 0x03D9; +TA1CCR4 = 0x03DA; +TA1CCR4_L = 0x03DA; +TA1CCR4_H = 0x03DB; +TA1CCR5 = 0x03DC; +TA1CCR5_L = 0x03DC; +TA1CCR5_H = 0x03DD; +TA1CCR6 = 0x03DE; +TA1CCR6_L = 0x03DE; +TA1CCR6_H = 0x03DF; +TA1EX0 = 0x03E0; +TA1EX0_L = 0x03E0; +TA1EX0_H = 0x03E1; +TA1IV = 0x03EE; +TA1IV_L = 0x03EE; +TA1IV_H = 0x03EF; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0STATW_L = 0x050A; +UCA0STATW_H = 0x050B; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0ABCTL_L = 0x0510; +UCA0ABCTL_H = 0x0511; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +UCA0IV_L = 0x051E; +UCA0IV_H = 0x051F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0540; +UCB0CTLW0_L = 0x0540; +UCB0CTLW0_H = 0x0541; +UCB0CTLW1 = 0x0542; +UCB0CTLW1_L = 0x0542; +UCB0CTLW1_H = 0x0543; +UCB0BRW = 0x0546; +UCB0BRW_L = 0x0546; +UCB0BRW_H = 0x0547; +UCB0STATW = 0x0548; +UCB0STATW_L = 0x0548; +UCB0STATW_H = 0x0549; +UCB0TBCNT = 0x054A; +UCB0TBCNT_L = 0x054A; +UCB0TBCNT_H = 0x054B; +UCB0RXBUF = 0x054C; +UCB0RXBUF_L = 0x054C; +UCB0RXBUF_H = 0x054D; +UCB0TXBUF = 0x054E; +UCB0TXBUF_L = 0x054E; +UCB0TXBUF_H = 0x054F; +UCB0I2COA0 = 0x0554; +UCB0I2COA0_L = 0x0554; +UCB0I2COA0_H = 0x0555; +UCB0I2COA1 = 0x0556; +UCB0I2COA1_L = 0x0556; +UCB0I2COA1_H = 0x0557; +UCB0I2COA2 = 0x0558; +UCB0I2COA2_L = 0x0558; +UCB0I2COA2_H = 0x0559; +UCB0I2COA3 = 0x055A; +UCB0I2COA3_L = 0x055A; +UCB0I2COA3_H = 0x055B; +UCB0ADDRX = 0x055C; +UCB0ADDRX_L = 0x055C; +UCB0ADDRX_H = 0x055D; +UCB0ADDMASK = 0x055E; +UCB0ADDMASK_L = 0x055E; +UCB0ADDMASK_H = 0x055F; +UCB0I2CSA = 0x0560; +UCB0I2CSA_L = 0x0560; +UCB0I2CSA_H = 0x0561; +UCB0IE = 0x056A; +UCB0IE_L = 0x056A; +UCB0IE_H = 0x056B; +UCB0IFG = 0x056C; +UCB0IFG_L = 0x056C; +UCB0IFG_H = 0x056D; +UCB0IV = 0x056E; +UCB0IV_L = 0x056E; +UCB0IV_H = 0x056F; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr2532.cmd b/msp430/msp430fr2532.cmd new file mode 100644 index 00000000..c9d98ee4 --- /dev/null +++ b/msp430/msp430fr2532.cmd @@ -0,0 +1,603 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr2532.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC +************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; +/************************************************************* +* Backup Memory Module +*************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; +/************************************************************ +* Captivate +************************************************************/ +CAPIE = 0x0B20; +CAPIE_L = 0x0B20; +CAPIE_H = 0x0B21; +CAPIFG = 0x0B22; +CAPIFG_L = 0x0B22; +CAPIFG_H = 0x0B23; +CAPIV = 0x0B24; +CAPIV_L = 0x0B24; +CAPIV_H = 0x0B25; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; +/************************************************************ +* CLOCK SYSTEM CONTROL +************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FR2xx/FR4xx +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PMMIE = 0x012E; +PMMIE_L = 0x012E; +PMMIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +/************************************************************ +* Real-Time Clock (RTC) Counter +************************************************************/ +RTCCTL = 0x0300; +RTCCTL_L = 0x0300; +RTCCTL_H = 0x0301; +RTCIV = 0x0304; +RTCIV_L = 0x0304; +RTCIV_H = 0x0305; +RTCMOD = 0x0308; +RTCMOD_L = 0x0308; +RTCMOD_H = 0x0309; +RTCCNT = 0x030C; +RTCCNT_L = 0x030C; +RTCCNT_H = 0x030D; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSBERRIV = 0x0158; +SYSBERRIV_L = 0x0158; +SYSBERRIV_H = 0x0159; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0380; +TA0CCTL0 = 0x0382; +TA0CCTL1 = 0x0384; +TA0CCTL2 = 0x0386; +TA0R = 0x0390; +TA0CCR0 = 0x0392; +TA0CCR1 = 0x0394; +TA0CCR2 = 0x0396; +TA0IV = 0x03AE; +TA0EX0 = 0x03A0; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x03C0; +TA1CCTL0 = 0x03C2; +TA1CCTL1 = 0x03C4; +TA1CCTL2 = 0x03C6; +TA1R = 0x03D0; +TA1CCR0 = 0x03D2; +TA1CCR1 = 0x03D4; +TA1CCR2 = 0x03D6; +TA1IV = 0x03EE; +TA1EX0 = 0x03E0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0520; +UCA1CTLW0_L = 0x0520; +UCA1CTLW0_H = 0x0521; +UCA1CTLW1 = 0x0522; +UCA1CTLW1_L = 0x0522; +UCA1CTLW1_H = 0x0523; +UCA1BRW = 0x0526; +UCA1BRW_L = 0x0526; +UCA1BRW_H = 0x0527; +UCA1MCTLW = 0x0528; +UCA1MCTLW_L = 0x0528; +UCA1MCTLW_H = 0x0529; +UCA1STATW = 0x052A; +UCA1RXBUF = 0x052C; +UCA1RXBUF_L = 0x052C; +UCA1RXBUF_H = 0x052D; +UCA1TXBUF = 0x052E; +UCA1TXBUF_L = 0x052E; +UCA1TXBUF_H = 0x052F; +UCA1ABCTL = 0x0530; +UCA1IRCTL = 0x0532; +UCA1IRCTL_L = 0x0532; +UCA1IRCTL_H = 0x0533; +UCA1IE = 0x053A; +UCA1IE_L = 0x053A; +UCA1IE_H = 0x053B; +UCA1IFG = 0x053C; +UCA1IFG_L = 0x053C; +UCA1IFG_H = 0x053D; +UCA1IV = 0x053E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0540; +UCB0CTLW0_L = 0x0540; +UCB0CTLW0_H = 0x0541; +UCB0CTLW1 = 0x0542; +UCB0CTLW1_L = 0x0542; +UCB0CTLW1_H = 0x0543; +UCB0BRW = 0x0546; +UCB0BRW_L = 0x0546; +UCB0BRW_H = 0x0547; +UCB0STATW = 0x0548; +UCB0STATW_L = 0x0548; +UCB0STATW_H = 0x0549; +UCB0TBCNT = 0x054A; +UCB0TBCNT_L = 0x054A; +UCB0TBCNT_H = 0x054B; +UCB0RXBUF = 0x054C; +UCB0RXBUF_L = 0x054C; +UCB0RXBUF_H = 0x054D; +UCB0TXBUF = 0x054E; +UCB0TXBUF_L = 0x054E; +UCB0TXBUF_H = 0x054F; +UCB0I2COA0 = 0x0554; +UCB0I2COA0_L = 0x0554; +UCB0I2COA0_H = 0x0555; +UCB0I2COA1 = 0x0556; +UCB0I2COA1_L = 0x0556; +UCB0I2COA1_H = 0x0557; +UCB0I2COA2 = 0x0558; +UCB0I2COA2_L = 0x0558; +UCB0I2COA2_H = 0x0559; +UCB0I2COA3 = 0x055A; +UCB0I2COA3_L = 0x055A; +UCB0I2COA3_H = 0x055B; +UCB0ADDRX = 0x055C; +UCB0ADDRX_L = 0x055C; +UCB0ADDRX_H = 0x055D; +UCB0ADDMASK = 0x055E; +UCB0ADDMASK_L = 0x055E; +UCB0ADDMASK_H = 0x055F; +UCB0I2CSA = 0x0560; +UCB0I2CSA_L = 0x0560; +UCB0I2CSA_H = 0x0561; +UCB0IE = 0x056A; +UCB0IE_L = 0x056A; +UCB0IE_H = 0x056B; +UCB0IFG = 0x056C; +UCB0IFG_L = 0x056C; +UCB0IFG_H = 0x056D; +UCB0IV = 0x056E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr2533.cmd b/msp430/msp430fr2533.cmd new file mode 100644 index 00000000..e4e261bb --- /dev/null +++ b/msp430/msp430fr2533.cmd @@ -0,0 +1,603 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr2533.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC +************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; +/************************************************************* +* Backup Memory Module +*************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; +/************************************************************ +* Captivate +************************************************************/ +CAPIE = 0x0B20; +CAPIE_L = 0x0B20; +CAPIE_H = 0x0B21; +CAPIFG = 0x0B22; +CAPIFG_L = 0x0B22; +CAPIFG_H = 0x0B23; +CAPIV = 0x0B24; +CAPIV_L = 0x0B24; +CAPIV_H = 0x0B25; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; +/************************************************************ +* CLOCK SYSTEM CONTROL +************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FR2xx/FR4xx +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PMMIE = 0x012E; +PMMIE_L = 0x012E; +PMMIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +/************************************************************ +* Real-Time Clock (RTC) Counter +************************************************************/ +RTCCTL = 0x0300; +RTCCTL_L = 0x0300; +RTCCTL_H = 0x0301; +RTCIV = 0x0304; +RTCIV_L = 0x0304; +RTCIV_H = 0x0305; +RTCMOD = 0x0308; +RTCMOD_L = 0x0308; +RTCMOD_H = 0x0309; +RTCCNT = 0x030C; +RTCCNT_L = 0x030C; +RTCCNT_H = 0x030D; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSBERRIV = 0x0158; +SYSBERRIV_L = 0x0158; +SYSBERRIV_H = 0x0159; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0380; +TA0CCTL0 = 0x0382; +TA0CCTL1 = 0x0384; +TA0CCTL2 = 0x0386; +TA0R = 0x0390; +TA0CCR0 = 0x0392; +TA0CCR1 = 0x0394; +TA0CCR2 = 0x0396; +TA0IV = 0x03AE; +TA0EX0 = 0x03A0; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x03C0; +TA1CCTL0 = 0x03C2; +TA1CCTL1 = 0x03C4; +TA1CCTL2 = 0x03C6; +TA1R = 0x03D0; +TA1CCR0 = 0x03D2; +TA1CCR1 = 0x03D4; +TA1CCR2 = 0x03D6; +TA1IV = 0x03EE; +TA1EX0 = 0x03E0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0520; +UCA1CTLW0_L = 0x0520; +UCA1CTLW0_H = 0x0521; +UCA1CTLW1 = 0x0522; +UCA1CTLW1_L = 0x0522; +UCA1CTLW1_H = 0x0523; +UCA1BRW = 0x0526; +UCA1BRW_L = 0x0526; +UCA1BRW_H = 0x0527; +UCA1MCTLW = 0x0528; +UCA1MCTLW_L = 0x0528; +UCA1MCTLW_H = 0x0529; +UCA1STATW = 0x052A; +UCA1RXBUF = 0x052C; +UCA1RXBUF_L = 0x052C; +UCA1RXBUF_H = 0x052D; +UCA1TXBUF = 0x052E; +UCA1TXBUF_L = 0x052E; +UCA1TXBUF_H = 0x052F; +UCA1ABCTL = 0x0530; +UCA1IRCTL = 0x0532; +UCA1IRCTL_L = 0x0532; +UCA1IRCTL_H = 0x0533; +UCA1IE = 0x053A; +UCA1IE_L = 0x053A; +UCA1IE_H = 0x053B; +UCA1IFG = 0x053C; +UCA1IFG_L = 0x053C; +UCA1IFG_H = 0x053D; +UCA1IV = 0x053E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0540; +UCB0CTLW0_L = 0x0540; +UCB0CTLW0_H = 0x0541; +UCB0CTLW1 = 0x0542; +UCB0CTLW1_L = 0x0542; +UCB0CTLW1_H = 0x0543; +UCB0BRW = 0x0546; +UCB0BRW_L = 0x0546; +UCB0BRW_H = 0x0547; +UCB0STATW = 0x0548; +UCB0STATW_L = 0x0548; +UCB0STATW_H = 0x0549; +UCB0TBCNT = 0x054A; +UCB0TBCNT_L = 0x054A; +UCB0TBCNT_H = 0x054B; +UCB0RXBUF = 0x054C; +UCB0RXBUF_L = 0x054C; +UCB0RXBUF_H = 0x054D; +UCB0TXBUF = 0x054E; +UCB0TXBUF_L = 0x054E; +UCB0TXBUF_H = 0x054F; +UCB0I2COA0 = 0x0554; +UCB0I2COA0_L = 0x0554; +UCB0I2COA0_H = 0x0555; +UCB0I2COA1 = 0x0556; +UCB0I2COA1_L = 0x0556; +UCB0I2COA1_H = 0x0557; +UCB0I2COA2 = 0x0558; +UCB0I2COA2_L = 0x0558; +UCB0I2COA2_H = 0x0559; +UCB0I2COA3 = 0x055A; +UCB0I2COA3_L = 0x055A; +UCB0I2COA3_H = 0x055B; +UCB0ADDRX = 0x055C; +UCB0ADDRX_L = 0x055C; +UCB0ADDRX_H = 0x055D; +UCB0ADDMASK = 0x055E; +UCB0ADDMASK_L = 0x055E; +UCB0ADDMASK_H = 0x055F; +UCB0I2CSA = 0x0560; +UCB0I2CSA_L = 0x0560; +UCB0I2CSA_H = 0x0561; +UCB0IE = 0x056A; +UCB0IE_L = 0x056A; +UCB0IE_H = 0x056B; +UCB0IFG = 0x056C; +UCB0IFG_L = 0x056C; +UCB0IFG_H = 0x056D; +UCB0IV = 0x056E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr2632.cmd b/msp430/msp430fr2632.cmd new file mode 100644 index 00000000..5a49064e --- /dev/null +++ b/msp430/msp430fr2632.cmd @@ -0,0 +1,603 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr2632.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC +************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; +/************************************************************* +* Backup Memory Module +*************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; +/************************************************************ +* Captivate +************************************************************/ +CAPIE = 0x0B20; +CAPIE_L = 0x0B20; +CAPIE_H = 0x0B21; +CAPIFG = 0x0B22; +CAPIFG_L = 0x0B22; +CAPIFG_H = 0x0B23; +CAPIV = 0x0B24; +CAPIV_L = 0x0B24; +CAPIV_H = 0x0B25; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; +/************************************************************ +* CLOCK SYSTEM CONTROL +************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FR2xx/FR4xx +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PMMIE = 0x012E; +PMMIE_L = 0x012E; +PMMIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +/************************************************************ +* Real-Time Clock (RTC) Counter +************************************************************/ +RTCCTL = 0x0300; +RTCCTL_L = 0x0300; +RTCCTL_H = 0x0301; +RTCIV = 0x0304; +RTCIV_L = 0x0304; +RTCIV_H = 0x0305; +RTCMOD = 0x0308; +RTCMOD_L = 0x0308; +RTCMOD_H = 0x0309; +RTCCNT = 0x030C; +RTCCNT_L = 0x030C; +RTCCNT_H = 0x030D; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSBERRIV = 0x0158; +SYSBERRIV_L = 0x0158; +SYSBERRIV_H = 0x0159; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0380; +TA0CCTL0 = 0x0382; +TA0CCTL1 = 0x0384; +TA0CCTL2 = 0x0386; +TA0R = 0x0390; +TA0CCR0 = 0x0392; +TA0CCR1 = 0x0394; +TA0CCR2 = 0x0396; +TA0IV = 0x03AE; +TA0EX0 = 0x03A0; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x03C0; +TA1CCTL0 = 0x03C2; +TA1CCTL1 = 0x03C4; +TA1CCTL2 = 0x03C6; +TA1R = 0x03D0; +TA1CCR0 = 0x03D2; +TA1CCR1 = 0x03D4; +TA1CCR2 = 0x03D6; +TA1IV = 0x03EE; +TA1EX0 = 0x03E0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0520; +UCA1CTLW0_L = 0x0520; +UCA1CTLW0_H = 0x0521; +UCA1CTLW1 = 0x0522; +UCA1CTLW1_L = 0x0522; +UCA1CTLW1_H = 0x0523; +UCA1BRW = 0x0526; +UCA1BRW_L = 0x0526; +UCA1BRW_H = 0x0527; +UCA1MCTLW = 0x0528; +UCA1MCTLW_L = 0x0528; +UCA1MCTLW_H = 0x0529; +UCA1STATW = 0x052A; +UCA1RXBUF = 0x052C; +UCA1RXBUF_L = 0x052C; +UCA1RXBUF_H = 0x052D; +UCA1TXBUF = 0x052E; +UCA1TXBUF_L = 0x052E; +UCA1TXBUF_H = 0x052F; +UCA1ABCTL = 0x0530; +UCA1IRCTL = 0x0532; +UCA1IRCTL_L = 0x0532; +UCA1IRCTL_H = 0x0533; +UCA1IE = 0x053A; +UCA1IE_L = 0x053A; +UCA1IE_H = 0x053B; +UCA1IFG = 0x053C; +UCA1IFG_L = 0x053C; +UCA1IFG_H = 0x053D; +UCA1IV = 0x053E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0540; +UCB0CTLW0_L = 0x0540; +UCB0CTLW0_H = 0x0541; +UCB0CTLW1 = 0x0542; +UCB0CTLW1_L = 0x0542; +UCB0CTLW1_H = 0x0543; +UCB0BRW = 0x0546; +UCB0BRW_L = 0x0546; +UCB0BRW_H = 0x0547; +UCB0STATW = 0x0548; +UCB0STATW_L = 0x0548; +UCB0STATW_H = 0x0549; +UCB0TBCNT = 0x054A; +UCB0TBCNT_L = 0x054A; +UCB0TBCNT_H = 0x054B; +UCB0RXBUF = 0x054C; +UCB0RXBUF_L = 0x054C; +UCB0RXBUF_H = 0x054D; +UCB0TXBUF = 0x054E; +UCB0TXBUF_L = 0x054E; +UCB0TXBUF_H = 0x054F; +UCB0I2COA0 = 0x0554; +UCB0I2COA0_L = 0x0554; +UCB0I2COA0_H = 0x0555; +UCB0I2COA1 = 0x0556; +UCB0I2COA1_L = 0x0556; +UCB0I2COA1_H = 0x0557; +UCB0I2COA2 = 0x0558; +UCB0I2COA2_L = 0x0558; +UCB0I2COA2_H = 0x0559; +UCB0I2COA3 = 0x055A; +UCB0I2COA3_L = 0x055A; +UCB0I2COA3_H = 0x055B; +UCB0ADDRX = 0x055C; +UCB0ADDRX_L = 0x055C; +UCB0ADDRX_H = 0x055D; +UCB0ADDMASK = 0x055E; +UCB0ADDMASK_L = 0x055E; +UCB0ADDMASK_H = 0x055F; +UCB0I2CSA = 0x0560; +UCB0I2CSA_L = 0x0560; +UCB0I2CSA_H = 0x0561; +UCB0IE = 0x056A; +UCB0IE_L = 0x056A; +UCB0IE_H = 0x056B; +UCB0IFG = 0x056C; +UCB0IFG_L = 0x056C; +UCB0IFG_H = 0x056D; +UCB0IV = 0x056E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr2633.cmd b/msp430/msp430fr2633.cmd new file mode 100644 index 00000000..b2e0f994 --- /dev/null +++ b/msp430/msp430fr2633.cmd @@ -0,0 +1,603 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr2633.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC +************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; +/************************************************************* +* Backup Memory Module +*************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; +/************************************************************ +* Captivate +************************************************************/ +CAPIE = 0x0B20; +CAPIE_L = 0x0B20; +CAPIE_H = 0x0B21; +CAPIFG = 0x0B22; +CAPIFG_L = 0x0B22; +CAPIFG_H = 0x0B23; +CAPIV = 0x0B24; +CAPIV_L = 0x0B24; +CAPIV_H = 0x0B25; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; +/************************************************************ +* CLOCK SYSTEM CONTROL +************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FR2xx/FR4xx +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PMMIE = 0x012E; +PMMIE_L = 0x012E; +PMMIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +/************************************************************ +* Real-Time Clock (RTC) Counter +************************************************************/ +RTCCTL = 0x0300; +RTCCTL_L = 0x0300; +RTCCTL_H = 0x0301; +RTCIV = 0x0304; +RTCIV_L = 0x0304; +RTCIV_H = 0x0305; +RTCMOD = 0x0308; +RTCMOD_L = 0x0308; +RTCMOD_H = 0x0309; +RTCCNT = 0x030C; +RTCCNT_L = 0x030C; +RTCCNT_H = 0x030D; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSBERRIV = 0x0158; +SYSBERRIV_L = 0x0158; +SYSBERRIV_H = 0x0159; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0380; +TA0CCTL0 = 0x0382; +TA0CCTL1 = 0x0384; +TA0CCTL2 = 0x0386; +TA0R = 0x0390; +TA0CCR0 = 0x0392; +TA0CCR1 = 0x0394; +TA0CCR2 = 0x0396; +TA0IV = 0x03AE; +TA0EX0 = 0x03A0; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x03C0; +TA1CCTL0 = 0x03C2; +TA1CCTL1 = 0x03C4; +TA1CCTL2 = 0x03C6; +TA1R = 0x03D0; +TA1CCR0 = 0x03D2; +TA1CCR1 = 0x03D4; +TA1CCR2 = 0x03D6; +TA1IV = 0x03EE; +TA1EX0 = 0x03E0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0520; +UCA1CTLW0_L = 0x0520; +UCA1CTLW0_H = 0x0521; +UCA1CTLW1 = 0x0522; +UCA1CTLW1_L = 0x0522; +UCA1CTLW1_H = 0x0523; +UCA1BRW = 0x0526; +UCA1BRW_L = 0x0526; +UCA1BRW_H = 0x0527; +UCA1MCTLW = 0x0528; +UCA1MCTLW_L = 0x0528; +UCA1MCTLW_H = 0x0529; +UCA1STATW = 0x052A; +UCA1RXBUF = 0x052C; +UCA1RXBUF_L = 0x052C; +UCA1RXBUF_H = 0x052D; +UCA1TXBUF = 0x052E; +UCA1TXBUF_L = 0x052E; +UCA1TXBUF_H = 0x052F; +UCA1ABCTL = 0x0530; +UCA1IRCTL = 0x0532; +UCA1IRCTL_L = 0x0532; +UCA1IRCTL_H = 0x0533; +UCA1IE = 0x053A; +UCA1IE_L = 0x053A; +UCA1IE_H = 0x053B; +UCA1IFG = 0x053C; +UCA1IFG_L = 0x053C; +UCA1IFG_H = 0x053D; +UCA1IV = 0x053E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0540; +UCB0CTLW0_L = 0x0540; +UCB0CTLW0_H = 0x0541; +UCB0CTLW1 = 0x0542; +UCB0CTLW1_L = 0x0542; +UCB0CTLW1_H = 0x0543; +UCB0BRW = 0x0546; +UCB0BRW_L = 0x0546; +UCB0BRW_H = 0x0547; +UCB0STATW = 0x0548; +UCB0STATW_L = 0x0548; +UCB0STATW_H = 0x0549; +UCB0TBCNT = 0x054A; +UCB0TBCNT_L = 0x054A; +UCB0TBCNT_H = 0x054B; +UCB0RXBUF = 0x054C; +UCB0RXBUF_L = 0x054C; +UCB0RXBUF_H = 0x054D; +UCB0TXBUF = 0x054E; +UCB0TXBUF_L = 0x054E; +UCB0TXBUF_H = 0x054F; +UCB0I2COA0 = 0x0554; +UCB0I2COA0_L = 0x0554; +UCB0I2COA0_H = 0x0555; +UCB0I2COA1 = 0x0556; +UCB0I2COA1_L = 0x0556; +UCB0I2COA1_H = 0x0557; +UCB0I2COA2 = 0x0558; +UCB0I2COA2_L = 0x0558; +UCB0I2COA2_H = 0x0559; +UCB0I2COA3 = 0x055A; +UCB0I2COA3_L = 0x055A; +UCB0I2COA3_H = 0x055B; +UCB0ADDRX = 0x055C; +UCB0ADDRX_L = 0x055C; +UCB0ADDRX_H = 0x055D; +UCB0ADDMASK = 0x055E; +UCB0ADDMASK_L = 0x055E; +UCB0ADDMASK_H = 0x055F; +UCB0I2CSA = 0x0560; +UCB0I2CSA_L = 0x0560; +UCB0I2CSA_H = 0x0561; +UCB0IE = 0x056A; +UCB0IE_L = 0x056A; +UCB0IE_H = 0x056B; +UCB0IFG = 0x056C; +UCB0IFG_L = 0x056C; +UCB0IFG_H = 0x056D; +UCB0IV = 0x056E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr2672.cmd b/msp430/msp430fr2672.cmd new file mode 100644 index 00000000..58f1aa79 --- /dev/null +++ b/msp430/msp430fr2672.cmd @@ -0,0 +1,1065 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr2672.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC +*****************************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; + + +/***************************************************************************** + BKMEM +*****************************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; + + +/***************************************************************************** + CAPTIVATE +*****************************************************************************/ +CAPIE = 0x0B20; +CAPIE_L = 0x0B20; +CAPIE_H = 0x0B21; +CAPIFG = 0x0B22; +CAPIFG_L = 0x0B22; +CAPIFG_H = 0x0B23; +CAPIV = 0x0B24; +CAPIV_L = 0x0B24; +CAPIV_H = 0x0B25; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + + + +/***************************************************************************** + FRCTL +*****************************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RTC +*****************************************************************************/ +RTCCTL = 0x0300; +RTCCTL_L = 0x0300; +RTCCTL_H = 0x0301; +RTCIV = 0x0304; +RTCIV_L = 0x0304; +RTCIV_H = 0x0305; +RTCMOD = 0x0308; +RTCMOD_L = 0x0308; +RTCMOD_H = 0x0309; +RTCCNT = 0x030C; +RTCCNT_L = 0x030C; +RTCCNT_H = 0x030D; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; +SYSCFG3 = 0x0166; +SYSCFG3_L = 0x0166; +SYSCFG3_H = 0x0167; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0380; +TA0CTL_L = 0x0380; +TA0CTL_H = 0x0381; +TA0CCTL0 = 0x0382; +TA0CCTL0_L = 0x0382; +TA0CCTL0_H = 0x0383; +TA0CCTL1 = 0x0384; +TA0CCTL1_L = 0x0384; +TA0CCTL1_H = 0x0385; +TA0CCTL2 = 0x0386; +TA0CCTL2_L = 0x0386; +TA0CCTL2_H = 0x0387; +TA0R = 0x0390; +TA0R_L = 0x0390; +TA0R_H = 0x0391; +TA0CCR0 = 0x0392; +TA0CCR0_L = 0x0392; +TA0CCR0_H = 0x0393; +TA0CCR1 = 0x0394; +TA0CCR1_L = 0x0394; +TA0CCR1_H = 0x0395; +TA0CCR2 = 0x0396; +TA0CCR2_L = 0x0396; +TA0CCR2_H = 0x0397; +TA0EX0 = 0x03A0; +TA0EX0_L = 0x03A0; +TA0EX0_H = 0x03A1; +TA0IV = 0x03AE; +TA0IV_L = 0x03AE; +TA0IV_H = 0x03AF; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x03C0; +TA1CTL_L = 0x03C0; +TA1CTL_H = 0x03C1; +TA1CCTL0 = 0x03C2; +TA1CCTL0_L = 0x03C2; +TA1CCTL0_H = 0x03C3; +TA1CCTL1 = 0x03C4; +TA1CCTL1_L = 0x03C4; +TA1CCTL1_H = 0x03C5; +TA1CCTL2 = 0x03C6; +TA1CCTL2_L = 0x03C6; +TA1CCTL2_H = 0x03C7; +TA1R = 0x03D0; +TA1R_L = 0x03D0; +TA1R_H = 0x03D1; +TA1CCR0 = 0x03D2; +TA1CCR0_L = 0x03D2; +TA1CCR0_H = 0x03D3; +TA1CCR1 = 0x03D4; +TA1CCR1_L = 0x03D4; +TA1CCR1_H = 0x03D5; +TA1CCR2 = 0x03D6; +TA1CCR2_L = 0x03D6; +TA1CCR2_H = 0x03D7; +TA1EX0 = 0x03E0; +TA1EX0_L = 0x03E0; +TA1EX0_H = 0x03E1; +TA1IV = 0x03EE; +TA1IV_L = 0x03EE; +TA1IV_H = 0x03EF; + + +/***************************************************************************** + TA2 +*****************************************************************************/ +TA2CTL = 0x0400; +TA2CTL_L = 0x0400; +TA2CTL_H = 0x0401; +TA2CCTL0 = 0x0402; +TA2CCTL0_L = 0x0402; +TA2CCTL0_H = 0x0403; +TA2CCTL1 = 0x0404; +TA2CCTL1_L = 0x0404; +TA2CCTL1_H = 0x0405; +TA2CCTL2 = 0x0406; +TA2CCTL2_L = 0x0406; +TA2CCTL2_H = 0x0407; +TA2R = 0x0410; +TA2R_L = 0x0410; +TA2R_H = 0x0411; +TA2CCR0 = 0x0412; +TA2CCR0_L = 0x0412; +TA2CCR0_H = 0x0413; +TA2CCR1 = 0x0414; +TA2CCR1_L = 0x0414; +TA2CCR1_H = 0x0415; +TA2CCR2 = 0x0416; +TA2CCR2_L = 0x0416; +TA2CCR2_H = 0x0417; +TA2EX0 = 0x0420; +TA2EX0_L = 0x0420; +TA2EX0_H = 0x0421; +TA2IV = 0x042E; +TA2IV_L = 0x042E; +TA2IV_H = 0x042F; + + +/***************************************************************************** + TA3 +*****************************************************************************/ +TA3CTL = 0x0440; +TA3CTL_L = 0x0440; +TA3CTL_H = 0x0441; +TA3CCTL0 = 0x0442; +TA3CCTL0_L = 0x0442; +TA3CCTL0_H = 0x0443; +TA3CCTL1 = 0x0444; +TA3CCTL1_L = 0x0444; +TA3CCTL1_H = 0x0445; +TA3CCTL2 = 0x0446; +TA3CCTL2_L = 0x0446; +TA3CCTL2_H = 0x0447; +TA3R = 0x0450; +TA3R_L = 0x0450; +TA3R_H = 0x0451; +TA3CCR0 = 0x0452; +TA3CCR0_L = 0x0452; +TA3CCR0_H = 0x0453; +TA3CCR1 = 0x0454; +TA3CCR1_L = 0x0454; +TA3CCR1_H = 0x0455; +TA3CCR2 = 0x0456; +TA3CCR2_L = 0x0456; +TA3CCR2_H = 0x0457; +TA3EX0 = 0x0460; +TA3EX0_L = 0x0460; +TA3EX0_H = 0x0461; +TA3IV = 0x046E; +TA3IV_L = 0x046E; +TA3IV_H = 0x046F; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x0480; +TB0CTL_L = 0x0480; +TB0CTL_H = 0x0481; +TB0CCTL0 = 0x0482; +TB0CCTL0_L = 0x0482; +TB0CCTL0_H = 0x0483; +TB0CCTL1 = 0x0484; +TB0CCTL1_L = 0x0484; +TB0CCTL1_H = 0x0485; +TB0CCTL2 = 0x0486; +TB0CCTL2_L = 0x0486; +TB0CCTL2_H = 0x0487; +TB0CCTL3 = 0x0488; +TB0CCTL3_L = 0x0488; +TB0CCTL3_H = 0x0489; +TB0CCTL4 = 0x048A; +TB0CCTL4_L = 0x048A; +TB0CCTL4_H = 0x048B; +TB0CCTL5 = 0x048C; +TB0CCTL5_L = 0x048C; +TB0CCTL5_H = 0x048D; +TB0CCTL6 = 0x048E; +TB0CCTL6_L = 0x048E; +TB0CCTL6_H = 0x048F; +TB0R = 0x0490; +TB0R_L = 0x0490; +TB0R_H = 0x0491; +TB0CCR0 = 0x0492; +TB0CCR0_L = 0x0492; +TB0CCR0_H = 0x0493; +TB0CCR1 = 0x0494; +TB0CCR1_L = 0x0494; +TB0CCR1_H = 0x0495; +TB0CCR2 = 0x0496; +TB0CCR2_L = 0x0496; +TB0CCR2_H = 0x0497; +TB0CCR3 = 0x0498; +TB0CCR3_L = 0x0498; +TB0CCR3_H = 0x0499; +TB0CCR4 = 0x049A; +TB0CCR4_L = 0x049A; +TB0CCR4_H = 0x049B; +TB0CCR5 = 0x049C; +TB0CCR5_L = 0x049C; +TB0CCR5_H = 0x049D; +TB0CCR6 = 0x049E; +TB0CCR6_L = 0x049E; +TB0CCR6_H = 0x049F; +TB0EX0 = 0x04A0; +TB0EX0_L = 0x04A0; +TB0EX0_H = 0x04A1; +TB0IV = 0x04AE; +TB0IV_L = 0x04AE; +TB0IV_H = 0x04AF; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; + + +/***************************************************************************** + eCOMP0 +*****************************************************************************/ +CP0CTL0 = 0x08E0; +CP0CTL0_L = 0x08E0; +CP0CTL0_H = 0x08E1; +CP0CTL1 = 0x08E2; +CP0CTL1_L = 0x08E2; +CP0CTL1_H = 0x08E3; +CP0INT = 0x08E6; +CP0INT_L = 0x08E6; +CP0INT_H = 0x08E7; +CP0IV = 0x08E8; +CP0IV_L = 0x08E8; +CP0IV_H = 0x08E9; +CP0DACCTL = 0x08F0; +CP0DACCTL_L = 0x08F0; +CP0DACCTL_H = 0x08F1; +CP0DACDATA = 0x08F2; +CP0DACDATA_L = 0x08F2; +CP0DACDATA_H = 0x08F3; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0STATW_L = 0x050A; +UCA0STATW_H = 0x050B; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0ABCTL_L = 0x0510; +UCA0ABCTL_H = 0x0511; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +UCA0IV_L = 0x051E; +UCA0IV_H = 0x051F; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x0520; +UCA1CTLW0_L = 0x0520; +UCA1CTLW0_H = 0x0521; +UCA1CTLW1 = 0x0522; +UCA1CTLW1_L = 0x0522; +UCA1CTLW1_H = 0x0523; +UCA1BRW = 0x0526; +UCA1BRW_L = 0x0526; +UCA1BRW_H = 0x0527; +UCA1MCTLW = 0x0528; +UCA1MCTLW_L = 0x0528; +UCA1MCTLW_H = 0x0529; +UCA1STATW = 0x052A; +UCA1STATW_L = 0x052A; +UCA1STATW_H = 0x052B; +UCA1RXBUF = 0x052C; +UCA1RXBUF_L = 0x052C; +UCA1RXBUF_H = 0x052D; +UCA1TXBUF = 0x052E; +UCA1TXBUF_L = 0x052E; +UCA1TXBUF_H = 0x052F; +UCA1ABCTL = 0x0530; +UCA1ABCTL_L = 0x0530; +UCA1ABCTL_H = 0x0531; +UCA1IRCTL = 0x0532; +UCA1IRCTL_L = 0x0532; +UCA1IRCTL_H = 0x0533; +UCA1IE = 0x053A; +UCA1IE_L = 0x053A; +UCA1IE_H = 0x053B; +UCA1IFG = 0x053C; +UCA1IFG_L = 0x053C; +UCA1IFG_H = 0x053D; +UCA1IV = 0x053E; +UCA1IV_L = 0x053E; +UCA1IV_H = 0x053F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0540; +UCB0CTLW0_L = 0x0540; +UCB0CTLW0_H = 0x0541; +UCB0CTLW1 = 0x0542; +UCB0CTLW1_L = 0x0542; +UCB0CTLW1_H = 0x0543; +UCB0BRW = 0x0546; +UCB0BRW_L = 0x0546; +UCB0BRW_H = 0x0547; +UCB0STATW = 0x0548; +UCB0STATW_L = 0x0548; +UCB0STATW_H = 0x0549; +UCB0TBCNT = 0x054A; +UCB0TBCNT_L = 0x054A; +UCB0TBCNT_H = 0x054B; +UCB0RXBUF = 0x054C; +UCB0RXBUF_L = 0x054C; +UCB0RXBUF_H = 0x054D; +UCB0TXBUF = 0x054E; +UCB0TXBUF_L = 0x054E; +UCB0TXBUF_H = 0x054F; +UCB0I2COA0 = 0x0554; +UCB0I2COA0_L = 0x0554; +UCB0I2COA0_H = 0x0555; +UCB0I2COA1 = 0x0556; +UCB0I2COA1_L = 0x0556; +UCB0I2COA1_H = 0x0557; +UCB0I2COA2 = 0x0558; +UCB0I2COA2_L = 0x0558; +UCB0I2COA2_H = 0x0559; +UCB0I2COA3 = 0x055A; +UCB0I2COA3_L = 0x055A; +UCB0I2COA3_H = 0x055B; +UCB0ADDRX = 0x055C; +UCB0ADDRX_L = 0x055C; +UCB0ADDRX_H = 0x055D; +UCB0ADDMASK = 0x055E; +UCB0ADDMASK_L = 0x055E; +UCB0ADDMASK_H = 0x055F; +UCB0I2CSA = 0x0560; +UCB0I2CSA_L = 0x0560; +UCB0I2CSA_H = 0x0561; +UCB0IE = 0x056A; +UCB0IE_L = 0x056A; +UCB0IE_H = 0x056B; +UCB0IFG = 0x056C; +UCB0IFG_L = 0x056C; +UCB0IFG_H = 0x056D; +UCB0IV = 0x056E; +UCB0IV_L = 0x056E; +UCB0IV_H = 0x056F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x0580; +UCB1CTLW0_L = 0x0580; +UCB1CTLW0_H = 0x0581; +UCB1CTLW1 = 0x0582; +UCB1CTLW1_L = 0x0582; +UCB1CTLW1_H = 0x0583; +UCB1BRW = 0x0586; +UCB1BRW_L = 0x0586; +UCB1BRW_H = 0x0587; +UCB1STATW = 0x0588; +UCB1STATW_L = 0x0588; +UCB1STATW_H = 0x0589; +UCB1TBCNT = 0x058A; +UCB1TBCNT_L = 0x058A; +UCB1TBCNT_H = 0x058B; +UCB1RXBUF = 0x058C; +UCB1RXBUF_L = 0x058C; +UCB1RXBUF_H = 0x058D; +UCB1TXBUF = 0x058E; +UCB1TXBUF_L = 0x058E; +UCB1TXBUF_H = 0x058F; +UCB1I2COA0 = 0x0594; +UCB1I2COA0_L = 0x0594; +UCB1I2COA0_H = 0x0595; +UCB1I2COA1 = 0x0596; +UCB1I2COA1_L = 0x0596; +UCB1I2COA1_H = 0x0597; +UCB1I2COA2 = 0x0598; +UCB1I2COA2_L = 0x0598; +UCB1I2COA2_H = 0x0599; +UCB1I2COA3 = 0x059A; +UCB1I2COA3_L = 0x059A; +UCB1I2COA3_H = 0x059B; +UCB1ADDRX = 0x059C; +UCB1ADDRX_L = 0x059C; +UCB1ADDRX_H = 0x059D; +UCB1ADDMASK = 0x059E; +UCB1ADDMASK_L = 0x059E; +UCB1ADDMASK_H = 0x059F; +UCB1I2CSA = 0x05A0; +UCB1I2CSA_L = 0x05A0; +UCB1I2CSA_H = 0x05A1; +UCB1IE = 0x05AA; +UCB1IE_L = 0x05AA; +UCB1IE_H = 0x05AB; +UCB1IFG = 0x05AC; +UCB1IFG_L = 0x05AC; +UCB1IFG_H = 0x05AD; +UCB1IV = 0x05AE; +UCB1IV_L = 0x05AE; +UCB1IV_H = 0x05AF; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr2673.cmd b/msp430/msp430fr2673.cmd new file mode 100644 index 00000000..d96c3116 --- /dev/null +++ b/msp430/msp430fr2673.cmd @@ -0,0 +1,1065 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr2673.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC +*****************************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; + + +/***************************************************************************** + BKMEM +*****************************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; + + +/***************************************************************************** + CAPTIVATE +*****************************************************************************/ +CAPIE = 0x0B20; +CAPIE_L = 0x0B20; +CAPIE_H = 0x0B21; +CAPIFG = 0x0B22; +CAPIFG_L = 0x0B22; +CAPIFG_H = 0x0B23; +CAPIV = 0x0B24; +CAPIV_L = 0x0B24; +CAPIV_H = 0x0B25; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + + + +/***************************************************************************** + FRCTL +*****************************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RTC +*****************************************************************************/ +RTCCTL = 0x0300; +RTCCTL_L = 0x0300; +RTCCTL_H = 0x0301; +RTCIV = 0x0304; +RTCIV_L = 0x0304; +RTCIV_H = 0x0305; +RTCMOD = 0x0308; +RTCMOD_L = 0x0308; +RTCMOD_H = 0x0309; +RTCCNT = 0x030C; +RTCCNT_L = 0x030C; +RTCCNT_H = 0x030D; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; +SYSCFG3 = 0x0166; +SYSCFG3_L = 0x0166; +SYSCFG3_H = 0x0167; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0380; +TA0CTL_L = 0x0380; +TA0CTL_H = 0x0381; +TA0CCTL0 = 0x0382; +TA0CCTL0_L = 0x0382; +TA0CCTL0_H = 0x0383; +TA0CCTL1 = 0x0384; +TA0CCTL1_L = 0x0384; +TA0CCTL1_H = 0x0385; +TA0CCTL2 = 0x0386; +TA0CCTL2_L = 0x0386; +TA0CCTL2_H = 0x0387; +TA0R = 0x0390; +TA0R_L = 0x0390; +TA0R_H = 0x0391; +TA0CCR0 = 0x0392; +TA0CCR0_L = 0x0392; +TA0CCR0_H = 0x0393; +TA0CCR1 = 0x0394; +TA0CCR1_L = 0x0394; +TA0CCR1_H = 0x0395; +TA0CCR2 = 0x0396; +TA0CCR2_L = 0x0396; +TA0CCR2_H = 0x0397; +TA0EX0 = 0x03A0; +TA0EX0_L = 0x03A0; +TA0EX0_H = 0x03A1; +TA0IV = 0x03AE; +TA0IV_L = 0x03AE; +TA0IV_H = 0x03AF; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x03C0; +TA1CTL_L = 0x03C0; +TA1CTL_H = 0x03C1; +TA1CCTL0 = 0x03C2; +TA1CCTL0_L = 0x03C2; +TA1CCTL0_H = 0x03C3; +TA1CCTL1 = 0x03C4; +TA1CCTL1_L = 0x03C4; +TA1CCTL1_H = 0x03C5; +TA1CCTL2 = 0x03C6; +TA1CCTL2_L = 0x03C6; +TA1CCTL2_H = 0x03C7; +TA1R = 0x03D0; +TA1R_L = 0x03D0; +TA1R_H = 0x03D1; +TA1CCR0 = 0x03D2; +TA1CCR0_L = 0x03D2; +TA1CCR0_H = 0x03D3; +TA1CCR1 = 0x03D4; +TA1CCR1_L = 0x03D4; +TA1CCR1_H = 0x03D5; +TA1CCR2 = 0x03D6; +TA1CCR2_L = 0x03D6; +TA1CCR2_H = 0x03D7; +TA1EX0 = 0x03E0; +TA1EX0_L = 0x03E0; +TA1EX0_H = 0x03E1; +TA1IV = 0x03EE; +TA1IV_L = 0x03EE; +TA1IV_H = 0x03EF; + + +/***************************************************************************** + TA2 +*****************************************************************************/ +TA2CTL = 0x0400; +TA2CTL_L = 0x0400; +TA2CTL_H = 0x0401; +TA2CCTL0 = 0x0402; +TA2CCTL0_L = 0x0402; +TA2CCTL0_H = 0x0403; +TA2CCTL1 = 0x0404; +TA2CCTL1_L = 0x0404; +TA2CCTL1_H = 0x0405; +TA2CCTL2 = 0x0406; +TA2CCTL2_L = 0x0406; +TA2CCTL2_H = 0x0407; +TA2R = 0x0410; +TA2R_L = 0x0410; +TA2R_H = 0x0411; +TA2CCR0 = 0x0412; +TA2CCR0_L = 0x0412; +TA2CCR0_H = 0x0413; +TA2CCR1 = 0x0414; +TA2CCR1_L = 0x0414; +TA2CCR1_H = 0x0415; +TA2CCR2 = 0x0416; +TA2CCR2_L = 0x0416; +TA2CCR2_H = 0x0417; +TA2EX0 = 0x0420; +TA2EX0_L = 0x0420; +TA2EX0_H = 0x0421; +TA2IV = 0x042E; +TA2IV_L = 0x042E; +TA2IV_H = 0x042F; + + +/***************************************************************************** + TA3 +*****************************************************************************/ +TA3CTL = 0x0440; +TA3CTL_L = 0x0440; +TA3CTL_H = 0x0441; +TA3CCTL0 = 0x0442; +TA3CCTL0_L = 0x0442; +TA3CCTL0_H = 0x0443; +TA3CCTL1 = 0x0444; +TA3CCTL1_L = 0x0444; +TA3CCTL1_H = 0x0445; +TA3CCTL2 = 0x0446; +TA3CCTL2_L = 0x0446; +TA3CCTL2_H = 0x0447; +TA3R = 0x0450; +TA3R_L = 0x0450; +TA3R_H = 0x0451; +TA3CCR0 = 0x0452; +TA3CCR0_L = 0x0452; +TA3CCR0_H = 0x0453; +TA3CCR1 = 0x0454; +TA3CCR1_L = 0x0454; +TA3CCR1_H = 0x0455; +TA3CCR2 = 0x0456; +TA3CCR2_L = 0x0456; +TA3CCR2_H = 0x0457; +TA3EX0 = 0x0460; +TA3EX0_L = 0x0460; +TA3EX0_H = 0x0461; +TA3IV = 0x046E; +TA3IV_L = 0x046E; +TA3IV_H = 0x046F; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x0480; +TB0CTL_L = 0x0480; +TB0CTL_H = 0x0481; +TB0CCTL0 = 0x0482; +TB0CCTL0_L = 0x0482; +TB0CCTL0_H = 0x0483; +TB0CCTL1 = 0x0484; +TB0CCTL1_L = 0x0484; +TB0CCTL1_H = 0x0485; +TB0CCTL2 = 0x0486; +TB0CCTL2_L = 0x0486; +TB0CCTL2_H = 0x0487; +TB0CCTL3 = 0x0488; +TB0CCTL3_L = 0x0488; +TB0CCTL3_H = 0x0489; +TB0CCTL4 = 0x048A; +TB0CCTL4_L = 0x048A; +TB0CCTL4_H = 0x048B; +TB0CCTL5 = 0x048C; +TB0CCTL5_L = 0x048C; +TB0CCTL5_H = 0x048D; +TB0CCTL6 = 0x048E; +TB0CCTL6_L = 0x048E; +TB0CCTL6_H = 0x048F; +TB0R = 0x0490; +TB0R_L = 0x0490; +TB0R_H = 0x0491; +TB0CCR0 = 0x0492; +TB0CCR0_L = 0x0492; +TB0CCR0_H = 0x0493; +TB0CCR1 = 0x0494; +TB0CCR1_L = 0x0494; +TB0CCR1_H = 0x0495; +TB0CCR2 = 0x0496; +TB0CCR2_L = 0x0496; +TB0CCR2_H = 0x0497; +TB0CCR3 = 0x0498; +TB0CCR3_L = 0x0498; +TB0CCR3_H = 0x0499; +TB0CCR4 = 0x049A; +TB0CCR4_L = 0x049A; +TB0CCR4_H = 0x049B; +TB0CCR5 = 0x049C; +TB0CCR5_L = 0x049C; +TB0CCR5_H = 0x049D; +TB0CCR6 = 0x049E; +TB0CCR6_L = 0x049E; +TB0CCR6_H = 0x049F; +TB0EX0 = 0x04A0; +TB0EX0_L = 0x04A0; +TB0EX0_H = 0x04A1; +TB0IV = 0x04AE; +TB0IV_L = 0x04AE; +TB0IV_H = 0x04AF; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; + + +/***************************************************************************** + eCOMP0 +*****************************************************************************/ +CP0CTL0 = 0x08E0; +CP0CTL0_L = 0x08E0; +CP0CTL0_H = 0x08E1; +CP0CTL1 = 0x08E2; +CP0CTL1_L = 0x08E2; +CP0CTL1_H = 0x08E3; +CP0INT = 0x08E6; +CP0INT_L = 0x08E6; +CP0INT_H = 0x08E7; +CP0IV = 0x08E8; +CP0IV_L = 0x08E8; +CP0IV_H = 0x08E9; +CP0DACCTL = 0x08F0; +CP0DACCTL_L = 0x08F0; +CP0DACCTL_H = 0x08F1; +CP0DACDATA = 0x08F2; +CP0DACDATA_L = 0x08F2; +CP0DACDATA_H = 0x08F3; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0STATW_L = 0x050A; +UCA0STATW_H = 0x050B; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0ABCTL_L = 0x0510; +UCA0ABCTL_H = 0x0511; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +UCA0IV_L = 0x051E; +UCA0IV_H = 0x051F; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x0520; +UCA1CTLW0_L = 0x0520; +UCA1CTLW0_H = 0x0521; +UCA1CTLW1 = 0x0522; +UCA1CTLW1_L = 0x0522; +UCA1CTLW1_H = 0x0523; +UCA1BRW = 0x0526; +UCA1BRW_L = 0x0526; +UCA1BRW_H = 0x0527; +UCA1MCTLW = 0x0528; +UCA1MCTLW_L = 0x0528; +UCA1MCTLW_H = 0x0529; +UCA1STATW = 0x052A; +UCA1STATW_L = 0x052A; +UCA1STATW_H = 0x052B; +UCA1RXBUF = 0x052C; +UCA1RXBUF_L = 0x052C; +UCA1RXBUF_H = 0x052D; +UCA1TXBUF = 0x052E; +UCA1TXBUF_L = 0x052E; +UCA1TXBUF_H = 0x052F; +UCA1ABCTL = 0x0530; +UCA1ABCTL_L = 0x0530; +UCA1ABCTL_H = 0x0531; +UCA1IRCTL = 0x0532; +UCA1IRCTL_L = 0x0532; +UCA1IRCTL_H = 0x0533; +UCA1IE = 0x053A; +UCA1IE_L = 0x053A; +UCA1IE_H = 0x053B; +UCA1IFG = 0x053C; +UCA1IFG_L = 0x053C; +UCA1IFG_H = 0x053D; +UCA1IV = 0x053E; +UCA1IV_L = 0x053E; +UCA1IV_H = 0x053F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0540; +UCB0CTLW0_L = 0x0540; +UCB0CTLW0_H = 0x0541; +UCB0CTLW1 = 0x0542; +UCB0CTLW1_L = 0x0542; +UCB0CTLW1_H = 0x0543; +UCB0BRW = 0x0546; +UCB0BRW_L = 0x0546; +UCB0BRW_H = 0x0547; +UCB0STATW = 0x0548; +UCB0STATW_L = 0x0548; +UCB0STATW_H = 0x0549; +UCB0TBCNT = 0x054A; +UCB0TBCNT_L = 0x054A; +UCB0TBCNT_H = 0x054B; +UCB0RXBUF = 0x054C; +UCB0RXBUF_L = 0x054C; +UCB0RXBUF_H = 0x054D; +UCB0TXBUF = 0x054E; +UCB0TXBUF_L = 0x054E; +UCB0TXBUF_H = 0x054F; +UCB0I2COA0 = 0x0554; +UCB0I2COA0_L = 0x0554; +UCB0I2COA0_H = 0x0555; +UCB0I2COA1 = 0x0556; +UCB0I2COA1_L = 0x0556; +UCB0I2COA1_H = 0x0557; +UCB0I2COA2 = 0x0558; +UCB0I2COA2_L = 0x0558; +UCB0I2COA2_H = 0x0559; +UCB0I2COA3 = 0x055A; +UCB0I2COA3_L = 0x055A; +UCB0I2COA3_H = 0x055B; +UCB0ADDRX = 0x055C; +UCB0ADDRX_L = 0x055C; +UCB0ADDRX_H = 0x055D; +UCB0ADDMASK = 0x055E; +UCB0ADDMASK_L = 0x055E; +UCB0ADDMASK_H = 0x055F; +UCB0I2CSA = 0x0560; +UCB0I2CSA_L = 0x0560; +UCB0I2CSA_H = 0x0561; +UCB0IE = 0x056A; +UCB0IE_L = 0x056A; +UCB0IE_H = 0x056B; +UCB0IFG = 0x056C; +UCB0IFG_L = 0x056C; +UCB0IFG_H = 0x056D; +UCB0IV = 0x056E; +UCB0IV_L = 0x056E; +UCB0IV_H = 0x056F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x0580; +UCB1CTLW0_L = 0x0580; +UCB1CTLW0_H = 0x0581; +UCB1CTLW1 = 0x0582; +UCB1CTLW1_L = 0x0582; +UCB1CTLW1_H = 0x0583; +UCB1BRW = 0x0586; +UCB1BRW_L = 0x0586; +UCB1BRW_H = 0x0587; +UCB1STATW = 0x0588; +UCB1STATW_L = 0x0588; +UCB1STATW_H = 0x0589; +UCB1TBCNT = 0x058A; +UCB1TBCNT_L = 0x058A; +UCB1TBCNT_H = 0x058B; +UCB1RXBUF = 0x058C; +UCB1RXBUF_L = 0x058C; +UCB1RXBUF_H = 0x058D; +UCB1TXBUF = 0x058E; +UCB1TXBUF_L = 0x058E; +UCB1TXBUF_H = 0x058F; +UCB1I2COA0 = 0x0594; +UCB1I2COA0_L = 0x0594; +UCB1I2COA0_H = 0x0595; +UCB1I2COA1 = 0x0596; +UCB1I2COA1_L = 0x0596; +UCB1I2COA1_H = 0x0597; +UCB1I2COA2 = 0x0598; +UCB1I2COA2_L = 0x0598; +UCB1I2COA2_H = 0x0599; +UCB1I2COA3 = 0x059A; +UCB1I2COA3_L = 0x059A; +UCB1I2COA3_H = 0x059B; +UCB1ADDRX = 0x059C; +UCB1ADDRX_L = 0x059C; +UCB1ADDRX_H = 0x059D; +UCB1ADDMASK = 0x059E; +UCB1ADDMASK_L = 0x059E; +UCB1ADDMASK_H = 0x059F; +UCB1I2CSA = 0x05A0; +UCB1I2CSA_L = 0x05A0; +UCB1I2CSA_H = 0x05A1; +UCB1IE = 0x05AA; +UCB1IE_L = 0x05AA; +UCB1IE_H = 0x05AB; +UCB1IFG = 0x05AC; +UCB1IFG_L = 0x05AC; +UCB1IFG_H = 0x05AD; +UCB1IV = 0x05AE; +UCB1IV_L = 0x05AE; +UCB1IV_H = 0x05AF; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr2675.cmd b/msp430/msp430fr2675.cmd new file mode 100644 index 00000000..833dd9bb --- /dev/null +++ b/msp430/msp430fr2675.cmd @@ -0,0 +1,1065 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr2675.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC +*****************************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; + + +/***************************************************************************** + BKMEM +*****************************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; + + +/***************************************************************************** + CAPTIVATE +*****************************************************************************/ +CAPIE = 0x0B20; +CAPIE_L = 0x0B20; +CAPIE_H = 0x0B21; +CAPIFG = 0x0B22; +CAPIFG_L = 0x0B22; +CAPIFG_H = 0x0B23; +CAPIV = 0x0B24; +CAPIV_L = 0x0B24; +CAPIV_H = 0x0B25; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + + + +/***************************************************************************** + FRCTL +*****************************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RTC +*****************************************************************************/ +RTCCTL = 0x0300; +RTCCTL_L = 0x0300; +RTCCTL_H = 0x0301; +RTCIV = 0x0304; +RTCIV_L = 0x0304; +RTCIV_H = 0x0305; +RTCMOD = 0x0308; +RTCMOD_L = 0x0308; +RTCMOD_H = 0x0309; +RTCCNT = 0x030C; +RTCCNT_L = 0x030C; +RTCCNT_H = 0x030D; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; +SYSCFG3 = 0x0166; +SYSCFG3_L = 0x0166; +SYSCFG3_H = 0x0167; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0380; +TA0CTL_L = 0x0380; +TA0CTL_H = 0x0381; +TA0CCTL0 = 0x0382; +TA0CCTL0_L = 0x0382; +TA0CCTL0_H = 0x0383; +TA0CCTL1 = 0x0384; +TA0CCTL1_L = 0x0384; +TA0CCTL1_H = 0x0385; +TA0CCTL2 = 0x0386; +TA0CCTL2_L = 0x0386; +TA0CCTL2_H = 0x0387; +TA0R = 0x0390; +TA0R_L = 0x0390; +TA0R_H = 0x0391; +TA0CCR0 = 0x0392; +TA0CCR0_L = 0x0392; +TA0CCR0_H = 0x0393; +TA0CCR1 = 0x0394; +TA0CCR1_L = 0x0394; +TA0CCR1_H = 0x0395; +TA0CCR2 = 0x0396; +TA0CCR2_L = 0x0396; +TA0CCR2_H = 0x0397; +TA0EX0 = 0x03A0; +TA0EX0_L = 0x03A0; +TA0EX0_H = 0x03A1; +TA0IV = 0x03AE; +TA0IV_L = 0x03AE; +TA0IV_H = 0x03AF; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x03C0; +TA1CTL_L = 0x03C0; +TA1CTL_H = 0x03C1; +TA1CCTL0 = 0x03C2; +TA1CCTL0_L = 0x03C2; +TA1CCTL0_H = 0x03C3; +TA1CCTL1 = 0x03C4; +TA1CCTL1_L = 0x03C4; +TA1CCTL1_H = 0x03C5; +TA1CCTL2 = 0x03C6; +TA1CCTL2_L = 0x03C6; +TA1CCTL2_H = 0x03C7; +TA1R = 0x03D0; +TA1R_L = 0x03D0; +TA1R_H = 0x03D1; +TA1CCR0 = 0x03D2; +TA1CCR0_L = 0x03D2; +TA1CCR0_H = 0x03D3; +TA1CCR1 = 0x03D4; +TA1CCR1_L = 0x03D4; +TA1CCR1_H = 0x03D5; +TA1CCR2 = 0x03D6; +TA1CCR2_L = 0x03D6; +TA1CCR2_H = 0x03D7; +TA1EX0 = 0x03E0; +TA1EX0_L = 0x03E0; +TA1EX0_H = 0x03E1; +TA1IV = 0x03EE; +TA1IV_L = 0x03EE; +TA1IV_H = 0x03EF; + + +/***************************************************************************** + TA2 +*****************************************************************************/ +TA2CTL = 0x0400; +TA2CTL_L = 0x0400; +TA2CTL_H = 0x0401; +TA2CCTL0 = 0x0402; +TA2CCTL0_L = 0x0402; +TA2CCTL0_H = 0x0403; +TA2CCTL1 = 0x0404; +TA2CCTL1_L = 0x0404; +TA2CCTL1_H = 0x0405; +TA2CCTL2 = 0x0406; +TA2CCTL2_L = 0x0406; +TA2CCTL2_H = 0x0407; +TA2R = 0x0410; +TA2R_L = 0x0410; +TA2R_H = 0x0411; +TA2CCR0 = 0x0412; +TA2CCR0_L = 0x0412; +TA2CCR0_H = 0x0413; +TA2CCR1 = 0x0414; +TA2CCR1_L = 0x0414; +TA2CCR1_H = 0x0415; +TA2CCR2 = 0x0416; +TA2CCR2_L = 0x0416; +TA2CCR2_H = 0x0417; +TA2EX0 = 0x0420; +TA2EX0_L = 0x0420; +TA2EX0_H = 0x0421; +TA2IV = 0x042E; +TA2IV_L = 0x042E; +TA2IV_H = 0x042F; + + +/***************************************************************************** + TA3 +*****************************************************************************/ +TA3CTL = 0x0440; +TA3CTL_L = 0x0440; +TA3CTL_H = 0x0441; +TA3CCTL0 = 0x0442; +TA3CCTL0_L = 0x0442; +TA3CCTL0_H = 0x0443; +TA3CCTL1 = 0x0444; +TA3CCTL1_L = 0x0444; +TA3CCTL1_H = 0x0445; +TA3CCTL2 = 0x0446; +TA3CCTL2_L = 0x0446; +TA3CCTL2_H = 0x0447; +TA3R = 0x0450; +TA3R_L = 0x0450; +TA3R_H = 0x0451; +TA3CCR0 = 0x0452; +TA3CCR0_L = 0x0452; +TA3CCR0_H = 0x0453; +TA3CCR1 = 0x0454; +TA3CCR1_L = 0x0454; +TA3CCR1_H = 0x0455; +TA3CCR2 = 0x0456; +TA3CCR2_L = 0x0456; +TA3CCR2_H = 0x0457; +TA3EX0 = 0x0460; +TA3EX0_L = 0x0460; +TA3EX0_H = 0x0461; +TA3IV = 0x046E; +TA3IV_L = 0x046E; +TA3IV_H = 0x046F; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x0480; +TB0CTL_L = 0x0480; +TB0CTL_H = 0x0481; +TB0CCTL0 = 0x0482; +TB0CCTL0_L = 0x0482; +TB0CCTL0_H = 0x0483; +TB0CCTL1 = 0x0484; +TB0CCTL1_L = 0x0484; +TB0CCTL1_H = 0x0485; +TB0CCTL2 = 0x0486; +TB0CCTL2_L = 0x0486; +TB0CCTL2_H = 0x0487; +TB0CCTL3 = 0x0488; +TB0CCTL3_L = 0x0488; +TB0CCTL3_H = 0x0489; +TB0CCTL4 = 0x048A; +TB0CCTL4_L = 0x048A; +TB0CCTL4_H = 0x048B; +TB0CCTL5 = 0x048C; +TB0CCTL5_L = 0x048C; +TB0CCTL5_H = 0x048D; +TB0CCTL6 = 0x048E; +TB0CCTL6_L = 0x048E; +TB0CCTL6_H = 0x048F; +TB0R = 0x0490; +TB0R_L = 0x0490; +TB0R_H = 0x0491; +TB0CCR0 = 0x0492; +TB0CCR0_L = 0x0492; +TB0CCR0_H = 0x0493; +TB0CCR1 = 0x0494; +TB0CCR1_L = 0x0494; +TB0CCR1_H = 0x0495; +TB0CCR2 = 0x0496; +TB0CCR2_L = 0x0496; +TB0CCR2_H = 0x0497; +TB0CCR3 = 0x0498; +TB0CCR3_L = 0x0498; +TB0CCR3_H = 0x0499; +TB0CCR4 = 0x049A; +TB0CCR4_L = 0x049A; +TB0CCR4_H = 0x049B; +TB0CCR5 = 0x049C; +TB0CCR5_L = 0x049C; +TB0CCR5_H = 0x049D; +TB0CCR6 = 0x049E; +TB0CCR6_L = 0x049E; +TB0CCR6_H = 0x049F; +TB0EX0 = 0x04A0; +TB0EX0_L = 0x04A0; +TB0EX0_H = 0x04A1; +TB0IV = 0x04AE; +TB0IV_L = 0x04AE; +TB0IV_H = 0x04AF; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; + + +/***************************************************************************** + eCOMP0 +*****************************************************************************/ +CP0CTL0 = 0x08E0; +CP0CTL0_L = 0x08E0; +CP0CTL0_H = 0x08E1; +CP0CTL1 = 0x08E2; +CP0CTL1_L = 0x08E2; +CP0CTL1_H = 0x08E3; +CP0INT = 0x08E6; +CP0INT_L = 0x08E6; +CP0INT_H = 0x08E7; +CP0IV = 0x08E8; +CP0IV_L = 0x08E8; +CP0IV_H = 0x08E9; +CP0DACCTL = 0x08F0; +CP0DACCTL_L = 0x08F0; +CP0DACCTL_H = 0x08F1; +CP0DACDATA = 0x08F2; +CP0DACDATA_L = 0x08F2; +CP0DACDATA_H = 0x08F3; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0STATW_L = 0x050A; +UCA0STATW_H = 0x050B; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0ABCTL_L = 0x0510; +UCA0ABCTL_H = 0x0511; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +UCA0IV_L = 0x051E; +UCA0IV_H = 0x051F; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x0520; +UCA1CTLW0_L = 0x0520; +UCA1CTLW0_H = 0x0521; +UCA1CTLW1 = 0x0522; +UCA1CTLW1_L = 0x0522; +UCA1CTLW1_H = 0x0523; +UCA1BRW = 0x0526; +UCA1BRW_L = 0x0526; +UCA1BRW_H = 0x0527; +UCA1MCTLW = 0x0528; +UCA1MCTLW_L = 0x0528; +UCA1MCTLW_H = 0x0529; +UCA1STATW = 0x052A; +UCA1STATW_L = 0x052A; +UCA1STATW_H = 0x052B; +UCA1RXBUF = 0x052C; +UCA1RXBUF_L = 0x052C; +UCA1RXBUF_H = 0x052D; +UCA1TXBUF = 0x052E; +UCA1TXBUF_L = 0x052E; +UCA1TXBUF_H = 0x052F; +UCA1ABCTL = 0x0530; +UCA1ABCTL_L = 0x0530; +UCA1ABCTL_H = 0x0531; +UCA1IRCTL = 0x0532; +UCA1IRCTL_L = 0x0532; +UCA1IRCTL_H = 0x0533; +UCA1IE = 0x053A; +UCA1IE_L = 0x053A; +UCA1IE_H = 0x053B; +UCA1IFG = 0x053C; +UCA1IFG_L = 0x053C; +UCA1IFG_H = 0x053D; +UCA1IV = 0x053E; +UCA1IV_L = 0x053E; +UCA1IV_H = 0x053F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0540; +UCB0CTLW0_L = 0x0540; +UCB0CTLW0_H = 0x0541; +UCB0CTLW1 = 0x0542; +UCB0CTLW1_L = 0x0542; +UCB0CTLW1_H = 0x0543; +UCB0BRW = 0x0546; +UCB0BRW_L = 0x0546; +UCB0BRW_H = 0x0547; +UCB0STATW = 0x0548; +UCB0STATW_L = 0x0548; +UCB0STATW_H = 0x0549; +UCB0TBCNT = 0x054A; +UCB0TBCNT_L = 0x054A; +UCB0TBCNT_H = 0x054B; +UCB0RXBUF = 0x054C; +UCB0RXBUF_L = 0x054C; +UCB0RXBUF_H = 0x054D; +UCB0TXBUF = 0x054E; +UCB0TXBUF_L = 0x054E; +UCB0TXBUF_H = 0x054F; +UCB0I2COA0 = 0x0554; +UCB0I2COA0_L = 0x0554; +UCB0I2COA0_H = 0x0555; +UCB0I2COA1 = 0x0556; +UCB0I2COA1_L = 0x0556; +UCB0I2COA1_H = 0x0557; +UCB0I2COA2 = 0x0558; +UCB0I2COA2_L = 0x0558; +UCB0I2COA2_H = 0x0559; +UCB0I2COA3 = 0x055A; +UCB0I2COA3_L = 0x055A; +UCB0I2COA3_H = 0x055B; +UCB0ADDRX = 0x055C; +UCB0ADDRX_L = 0x055C; +UCB0ADDRX_H = 0x055D; +UCB0ADDMASK = 0x055E; +UCB0ADDMASK_L = 0x055E; +UCB0ADDMASK_H = 0x055F; +UCB0I2CSA = 0x0560; +UCB0I2CSA_L = 0x0560; +UCB0I2CSA_H = 0x0561; +UCB0IE = 0x056A; +UCB0IE_L = 0x056A; +UCB0IE_H = 0x056B; +UCB0IFG = 0x056C; +UCB0IFG_L = 0x056C; +UCB0IFG_H = 0x056D; +UCB0IV = 0x056E; +UCB0IV_L = 0x056E; +UCB0IV_H = 0x056F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x0580; +UCB1CTLW0_L = 0x0580; +UCB1CTLW0_H = 0x0581; +UCB1CTLW1 = 0x0582; +UCB1CTLW1_L = 0x0582; +UCB1CTLW1_H = 0x0583; +UCB1BRW = 0x0586; +UCB1BRW_L = 0x0586; +UCB1BRW_H = 0x0587; +UCB1STATW = 0x0588; +UCB1STATW_L = 0x0588; +UCB1STATW_H = 0x0589; +UCB1TBCNT = 0x058A; +UCB1TBCNT_L = 0x058A; +UCB1TBCNT_H = 0x058B; +UCB1RXBUF = 0x058C; +UCB1RXBUF_L = 0x058C; +UCB1RXBUF_H = 0x058D; +UCB1TXBUF = 0x058E; +UCB1TXBUF_L = 0x058E; +UCB1TXBUF_H = 0x058F; +UCB1I2COA0 = 0x0594; +UCB1I2COA0_L = 0x0594; +UCB1I2COA0_H = 0x0595; +UCB1I2COA1 = 0x0596; +UCB1I2COA1_L = 0x0596; +UCB1I2COA1_H = 0x0597; +UCB1I2COA2 = 0x0598; +UCB1I2COA2_L = 0x0598; +UCB1I2COA2_H = 0x0599; +UCB1I2COA3 = 0x059A; +UCB1I2COA3_L = 0x059A; +UCB1I2COA3_H = 0x059B; +UCB1ADDRX = 0x059C; +UCB1ADDRX_L = 0x059C; +UCB1ADDRX_H = 0x059D; +UCB1ADDMASK = 0x059E; +UCB1ADDMASK_L = 0x059E; +UCB1ADDMASK_H = 0x059F; +UCB1I2CSA = 0x05A0; +UCB1I2CSA_L = 0x05A0; +UCB1I2CSA_H = 0x05A1; +UCB1IE = 0x05AA; +UCB1IE_L = 0x05AA; +UCB1IE_H = 0x05AB; +UCB1IFG = 0x05AC; +UCB1IFG_L = 0x05AC; +UCB1IFG_H = 0x05AD; +UCB1IV = 0x05AE; +UCB1IV_L = 0x05AE; +UCB1IV_H = 0x05AF; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr2676.cmd b/msp430/msp430fr2676.cmd new file mode 100644 index 00000000..bba7b585 --- /dev/null +++ b/msp430/msp430fr2676.cmd @@ -0,0 +1,1065 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr2676.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC +*****************************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; + + +/***************************************************************************** + BKMEM +*****************************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; + + +/***************************************************************************** + CAPTIVATE +*****************************************************************************/ +CAPIE = 0x0B20; +CAPIE_L = 0x0B20; +CAPIE_H = 0x0B21; +CAPIFG = 0x0B22; +CAPIFG_L = 0x0B22; +CAPIFG_H = 0x0B23; +CAPIV = 0x0B24; +CAPIV_L = 0x0B24; +CAPIV_H = 0x0B25; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + + + +/***************************************************************************** + FRCTL +*****************************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RTC +*****************************************************************************/ +RTCCTL = 0x0300; +RTCCTL_L = 0x0300; +RTCCTL_H = 0x0301; +RTCIV = 0x0304; +RTCIV_L = 0x0304; +RTCIV_H = 0x0305; +RTCMOD = 0x0308; +RTCMOD_L = 0x0308; +RTCMOD_H = 0x0309; +RTCCNT = 0x030C; +RTCCNT_L = 0x030C; +RTCCNT_H = 0x030D; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; +SYSCFG3 = 0x0166; +SYSCFG3_L = 0x0166; +SYSCFG3_H = 0x0167; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0380; +TA0CTL_L = 0x0380; +TA0CTL_H = 0x0381; +TA0CCTL0 = 0x0382; +TA0CCTL0_L = 0x0382; +TA0CCTL0_H = 0x0383; +TA0CCTL1 = 0x0384; +TA0CCTL1_L = 0x0384; +TA0CCTL1_H = 0x0385; +TA0CCTL2 = 0x0386; +TA0CCTL2_L = 0x0386; +TA0CCTL2_H = 0x0387; +TA0R = 0x0390; +TA0R_L = 0x0390; +TA0R_H = 0x0391; +TA0CCR0 = 0x0392; +TA0CCR0_L = 0x0392; +TA0CCR0_H = 0x0393; +TA0CCR1 = 0x0394; +TA0CCR1_L = 0x0394; +TA0CCR1_H = 0x0395; +TA0CCR2 = 0x0396; +TA0CCR2_L = 0x0396; +TA0CCR2_H = 0x0397; +TA0EX0 = 0x03A0; +TA0EX0_L = 0x03A0; +TA0EX0_H = 0x03A1; +TA0IV = 0x03AE; +TA0IV_L = 0x03AE; +TA0IV_H = 0x03AF; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x03C0; +TA1CTL_L = 0x03C0; +TA1CTL_H = 0x03C1; +TA1CCTL0 = 0x03C2; +TA1CCTL0_L = 0x03C2; +TA1CCTL0_H = 0x03C3; +TA1CCTL1 = 0x03C4; +TA1CCTL1_L = 0x03C4; +TA1CCTL1_H = 0x03C5; +TA1CCTL2 = 0x03C6; +TA1CCTL2_L = 0x03C6; +TA1CCTL2_H = 0x03C7; +TA1R = 0x03D0; +TA1R_L = 0x03D0; +TA1R_H = 0x03D1; +TA1CCR0 = 0x03D2; +TA1CCR0_L = 0x03D2; +TA1CCR0_H = 0x03D3; +TA1CCR1 = 0x03D4; +TA1CCR1_L = 0x03D4; +TA1CCR1_H = 0x03D5; +TA1CCR2 = 0x03D6; +TA1CCR2_L = 0x03D6; +TA1CCR2_H = 0x03D7; +TA1EX0 = 0x03E0; +TA1EX0_L = 0x03E0; +TA1EX0_H = 0x03E1; +TA1IV = 0x03EE; +TA1IV_L = 0x03EE; +TA1IV_H = 0x03EF; + + +/***************************************************************************** + TA2 +*****************************************************************************/ +TA2CTL = 0x0400; +TA2CTL_L = 0x0400; +TA2CTL_H = 0x0401; +TA2CCTL0 = 0x0402; +TA2CCTL0_L = 0x0402; +TA2CCTL0_H = 0x0403; +TA2CCTL1 = 0x0404; +TA2CCTL1_L = 0x0404; +TA2CCTL1_H = 0x0405; +TA2CCTL2 = 0x0406; +TA2CCTL2_L = 0x0406; +TA2CCTL2_H = 0x0407; +TA2R = 0x0410; +TA2R_L = 0x0410; +TA2R_H = 0x0411; +TA2CCR0 = 0x0412; +TA2CCR0_L = 0x0412; +TA2CCR0_H = 0x0413; +TA2CCR1 = 0x0414; +TA2CCR1_L = 0x0414; +TA2CCR1_H = 0x0415; +TA2CCR2 = 0x0416; +TA2CCR2_L = 0x0416; +TA2CCR2_H = 0x0417; +TA2EX0 = 0x0420; +TA2EX0_L = 0x0420; +TA2EX0_H = 0x0421; +TA2IV = 0x042E; +TA2IV_L = 0x042E; +TA2IV_H = 0x042F; + + +/***************************************************************************** + TA3 +*****************************************************************************/ +TA3CTL = 0x0440; +TA3CTL_L = 0x0440; +TA3CTL_H = 0x0441; +TA3CCTL0 = 0x0442; +TA3CCTL0_L = 0x0442; +TA3CCTL0_H = 0x0443; +TA3CCTL1 = 0x0444; +TA3CCTL1_L = 0x0444; +TA3CCTL1_H = 0x0445; +TA3CCTL2 = 0x0446; +TA3CCTL2_L = 0x0446; +TA3CCTL2_H = 0x0447; +TA3R = 0x0450; +TA3R_L = 0x0450; +TA3R_H = 0x0451; +TA3CCR0 = 0x0452; +TA3CCR0_L = 0x0452; +TA3CCR0_H = 0x0453; +TA3CCR1 = 0x0454; +TA3CCR1_L = 0x0454; +TA3CCR1_H = 0x0455; +TA3CCR2 = 0x0456; +TA3CCR2_L = 0x0456; +TA3CCR2_H = 0x0457; +TA3EX0 = 0x0460; +TA3EX0_L = 0x0460; +TA3EX0_H = 0x0461; +TA3IV = 0x046E; +TA3IV_L = 0x046E; +TA3IV_H = 0x046F; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x0480; +TB0CTL_L = 0x0480; +TB0CTL_H = 0x0481; +TB0CCTL0 = 0x0482; +TB0CCTL0_L = 0x0482; +TB0CCTL0_H = 0x0483; +TB0CCTL1 = 0x0484; +TB0CCTL1_L = 0x0484; +TB0CCTL1_H = 0x0485; +TB0CCTL2 = 0x0486; +TB0CCTL2_L = 0x0486; +TB0CCTL2_H = 0x0487; +TB0CCTL3 = 0x0488; +TB0CCTL3_L = 0x0488; +TB0CCTL3_H = 0x0489; +TB0CCTL4 = 0x048A; +TB0CCTL4_L = 0x048A; +TB0CCTL4_H = 0x048B; +TB0CCTL5 = 0x048C; +TB0CCTL5_L = 0x048C; +TB0CCTL5_H = 0x048D; +TB0CCTL6 = 0x048E; +TB0CCTL6_L = 0x048E; +TB0CCTL6_H = 0x048F; +TB0R = 0x0490; +TB0R_L = 0x0490; +TB0R_H = 0x0491; +TB0CCR0 = 0x0492; +TB0CCR0_L = 0x0492; +TB0CCR0_H = 0x0493; +TB0CCR1 = 0x0494; +TB0CCR1_L = 0x0494; +TB0CCR1_H = 0x0495; +TB0CCR2 = 0x0496; +TB0CCR2_L = 0x0496; +TB0CCR2_H = 0x0497; +TB0CCR3 = 0x0498; +TB0CCR3_L = 0x0498; +TB0CCR3_H = 0x0499; +TB0CCR4 = 0x049A; +TB0CCR4_L = 0x049A; +TB0CCR4_H = 0x049B; +TB0CCR5 = 0x049C; +TB0CCR5_L = 0x049C; +TB0CCR5_H = 0x049D; +TB0CCR6 = 0x049E; +TB0CCR6_L = 0x049E; +TB0CCR6_H = 0x049F; +TB0EX0 = 0x04A0; +TB0EX0_L = 0x04A0; +TB0EX0_H = 0x04A1; +TB0IV = 0x04AE; +TB0IV_L = 0x04AE; +TB0IV_H = 0x04AF; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; + + +/***************************************************************************** + eCOMP0 +*****************************************************************************/ +CP0CTL0 = 0x08E0; +CP0CTL0_L = 0x08E0; +CP0CTL0_H = 0x08E1; +CP0CTL1 = 0x08E2; +CP0CTL1_L = 0x08E2; +CP0CTL1_H = 0x08E3; +CP0INT = 0x08E6; +CP0INT_L = 0x08E6; +CP0INT_H = 0x08E7; +CP0IV = 0x08E8; +CP0IV_L = 0x08E8; +CP0IV_H = 0x08E9; +CP0DACCTL = 0x08F0; +CP0DACCTL_L = 0x08F0; +CP0DACCTL_H = 0x08F1; +CP0DACDATA = 0x08F2; +CP0DACDATA_L = 0x08F2; +CP0DACDATA_H = 0x08F3; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0STATW_L = 0x050A; +UCA0STATW_H = 0x050B; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0ABCTL_L = 0x0510; +UCA0ABCTL_H = 0x0511; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +UCA0IV_L = 0x051E; +UCA0IV_H = 0x051F; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x0520; +UCA1CTLW0_L = 0x0520; +UCA1CTLW0_H = 0x0521; +UCA1CTLW1 = 0x0522; +UCA1CTLW1_L = 0x0522; +UCA1CTLW1_H = 0x0523; +UCA1BRW = 0x0526; +UCA1BRW_L = 0x0526; +UCA1BRW_H = 0x0527; +UCA1MCTLW = 0x0528; +UCA1MCTLW_L = 0x0528; +UCA1MCTLW_H = 0x0529; +UCA1STATW = 0x052A; +UCA1STATW_L = 0x052A; +UCA1STATW_H = 0x052B; +UCA1RXBUF = 0x052C; +UCA1RXBUF_L = 0x052C; +UCA1RXBUF_H = 0x052D; +UCA1TXBUF = 0x052E; +UCA1TXBUF_L = 0x052E; +UCA1TXBUF_H = 0x052F; +UCA1ABCTL = 0x0530; +UCA1ABCTL_L = 0x0530; +UCA1ABCTL_H = 0x0531; +UCA1IRCTL = 0x0532; +UCA1IRCTL_L = 0x0532; +UCA1IRCTL_H = 0x0533; +UCA1IE = 0x053A; +UCA1IE_L = 0x053A; +UCA1IE_H = 0x053B; +UCA1IFG = 0x053C; +UCA1IFG_L = 0x053C; +UCA1IFG_H = 0x053D; +UCA1IV = 0x053E; +UCA1IV_L = 0x053E; +UCA1IV_H = 0x053F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0540; +UCB0CTLW0_L = 0x0540; +UCB0CTLW0_H = 0x0541; +UCB0CTLW1 = 0x0542; +UCB0CTLW1_L = 0x0542; +UCB0CTLW1_H = 0x0543; +UCB0BRW = 0x0546; +UCB0BRW_L = 0x0546; +UCB0BRW_H = 0x0547; +UCB0STATW = 0x0548; +UCB0STATW_L = 0x0548; +UCB0STATW_H = 0x0549; +UCB0TBCNT = 0x054A; +UCB0TBCNT_L = 0x054A; +UCB0TBCNT_H = 0x054B; +UCB0RXBUF = 0x054C; +UCB0RXBUF_L = 0x054C; +UCB0RXBUF_H = 0x054D; +UCB0TXBUF = 0x054E; +UCB0TXBUF_L = 0x054E; +UCB0TXBUF_H = 0x054F; +UCB0I2COA0 = 0x0554; +UCB0I2COA0_L = 0x0554; +UCB0I2COA0_H = 0x0555; +UCB0I2COA1 = 0x0556; +UCB0I2COA1_L = 0x0556; +UCB0I2COA1_H = 0x0557; +UCB0I2COA2 = 0x0558; +UCB0I2COA2_L = 0x0558; +UCB0I2COA2_H = 0x0559; +UCB0I2COA3 = 0x055A; +UCB0I2COA3_L = 0x055A; +UCB0I2COA3_H = 0x055B; +UCB0ADDRX = 0x055C; +UCB0ADDRX_L = 0x055C; +UCB0ADDRX_H = 0x055D; +UCB0ADDMASK = 0x055E; +UCB0ADDMASK_L = 0x055E; +UCB0ADDMASK_H = 0x055F; +UCB0I2CSA = 0x0560; +UCB0I2CSA_L = 0x0560; +UCB0I2CSA_H = 0x0561; +UCB0IE = 0x056A; +UCB0IE_L = 0x056A; +UCB0IE_H = 0x056B; +UCB0IFG = 0x056C; +UCB0IFG_L = 0x056C; +UCB0IFG_H = 0x056D; +UCB0IV = 0x056E; +UCB0IV_L = 0x056E; +UCB0IV_H = 0x056F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x0580; +UCB1CTLW0_L = 0x0580; +UCB1CTLW0_H = 0x0581; +UCB1CTLW1 = 0x0582; +UCB1CTLW1_L = 0x0582; +UCB1CTLW1_H = 0x0583; +UCB1BRW = 0x0586; +UCB1BRW_L = 0x0586; +UCB1BRW_H = 0x0587; +UCB1STATW = 0x0588; +UCB1STATW_L = 0x0588; +UCB1STATW_H = 0x0589; +UCB1TBCNT = 0x058A; +UCB1TBCNT_L = 0x058A; +UCB1TBCNT_H = 0x058B; +UCB1RXBUF = 0x058C; +UCB1RXBUF_L = 0x058C; +UCB1RXBUF_H = 0x058D; +UCB1TXBUF = 0x058E; +UCB1TXBUF_L = 0x058E; +UCB1TXBUF_H = 0x058F; +UCB1I2COA0 = 0x0594; +UCB1I2COA0_L = 0x0594; +UCB1I2COA0_H = 0x0595; +UCB1I2COA1 = 0x0596; +UCB1I2COA1_L = 0x0596; +UCB1I2COA1_H = 0x0597; +UCB1I2COA2 = 0x0598; +UCB1I2COA2_L = 0x0598; +UCB1I2COA2_H = 0x0599; +UCB1I2COA3 = 0x059A; +UCB1I2COA3_L = 0x059A; +UCB1I2COA3_H = 0x059B; +UCB1ADDRX = 0x059C; +UCB1ADDRX_L = 0x059C; +UCB1ADDRX_H = 0x059D; +UCB1ADDMASK = 0x059E; +UCB1ADDMASK_L = 0x059E; +UCB1ADDMASK_H = 0x059F; +UCB1I2CSA = 0x05A0; +UCB1I2CSA_L = 0x05A0; +UCB1I2CSA_H = 0x05A1; +UCB1IE = 0x05AA; +UCB1IE_L = 0x05AA; +UCB1IE_H = 0x05AB; +UCB1IFG = 0x05AC; +UCB1IFG_L = 0x05AC; +UCB1IFG_H = 0x05AD; +UCB1IV = 0x05AE; +UCB1IV_L = 0x05AE; +UCB1IV_H = 0x05AF; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr4131.cmd b/msp430/msp430fr4131.cmd new file mode 100644 index 00000000..94d5e5af --- /dev/null +++ b/msp430/msp430fr4131.cmd @@ -0,0 +1,627 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr4131.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC +************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; +/************************************************************* +* Backup Memory Module +*************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x02EE; +CAPTIO0CTL_L = 0x02EE; +CAPTIO0CTL_H = 0x02EF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; +/************************************************************ +* CLOCK SYSTEM CONTROL +************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; +/************************************************************ +* LCD_E +************************************************************/ +LCDCTL0 = 0x0600; +LCDCTL0_L = 0x0600; +LCDCTL0_H = 0x0601; +LCDCTL1 = 0x0602; +LCDCTL1_L = 0x0602; +LCDCTL1_H = 0x0603; +LCDBLKCTL = 0x0604; +LCDBLKCTL_L = 0x0604; +LCDBLKCTL_H = 0x0605; +LCDMEMCTL = 0x0606; +LCDMEMCTL_L = 0x0606; +LCDMEMCTL_H = 0x0607; +LCDVCTL = 0x0608; +LCDVCTL_L = 0x0608; +LCDVCTL_H = 0x0609; +LCDPCTL0 = 0x060A; +LCDPCTL0_L = 0x060A; +LCDPCTL0_H = 0x060B; +LCDPCTL1 = 0x060C; +LCDPCTL1_L = 0x060C; +LCDPCTL1_H = 0x060D; +LCDPCTL2 = 0x060E; +LCDPCTL2_L = 0x060E; +LCDPCTL2_H = 0x060F; +LCDCSSEL0 = 0x0614; +LCDCSSEL0_L = 0x0614; +LCDCSSEL0_H = 0x0615; +LCDCSSEL1 = 0x0616; +LCDCSSEL1_L = 0x0616; +LCDCSSEL1_H = 0x0617; +LCDCSSEL2 = 0x0618; +LCDCSSEL2_L = 0x0618; +LCDCSSEL2_H = 0x0619; +LCDIV = 0x061E; +LCDM0W = 0x0620; +LCDM0W_L = 0x0620; +LCDM0W_H = 0x0621; +LCDM2W = 0x0622; +LCDM2W_L = 0x0622; +LCDM2W_H = 0x0623; +LCDM4W = 0x0624; +LCDM4W_L = 0x0624; +LCDM4W_H = 0x0625; +LCDM6W = 0x0626; +LCDM6W_L = 0x0626; +LCDM6W_H = 0x0627; +LCDM8W = 0x0628; +LCDM8W_L = 0x0628; +LCDM8W_H = 0x0629; +LCDM10W = 0x062A; +LCDM10W_L = 0x062A; +LCDM10W_H = 0x062B; +LCDM12W = 0x062C; +LCDM12W_L = 0x062C; +LCDM12W_H = 0x062D; +LCDM14W = 0x062E; +LCDM14W_L = 0x062E; +LCDM14W_H = 0x062F; +LCDM16W = 0x0630; +LCDM16W_L = 0x0630; +LCDM16W_H = 0x0631; +LCDM18W = 0x0632; +LCDM18W_L = 0x0632; +LCDM18W_H = 0x0633; +LCDM20W = 0x0634; +LCDM20W_L = 0x0634; +LCDM20W_H = 0x0635; +LCDM22W = 0x0636; +LCDM22W_L = 0x0636; +LCDM22W_H = 0x0637; +LCDM24W = 0x0638; +LCDM24W_L = 0x0638; +LCDM24W_H = 0x0639; +LCDM26W = 0x063A; +LCDM26W_L = 0x063A; +LCDM26W_H = 0x063B; +LCDM28W = 0x063C; +LCDM28W_L = 0x063C; +LCDM28W_H = 0x063D; +LCDM30W = 0x063E; +LCDM30W_L = 0x063E; +LCDM30W_H = 0x063F; +LCDM32W = 0x0640; +LCDM32W_L = 0x0640; +LCDM32W_H = 0x0641; +LCDM34W = 0x0642; +LCDM34W_L = 0x0642; +LCDM34W_H = 0x0643; +LCDM36W = 0x0644; +LCDM36W_L = 0x0644; +LCDM36W_H = 0x0645; +LCDM38W = 0x0646; +LCDM38W_L = 0x0646; +LCDM38W_H = 0x0647; +LCDBM0W = 0x0640; +LCDBM0W_L = 0x0640; +LCDBM0W_H = 0x0641; +LCDBM2W = 0x0642; +LCDBM2W_L = 0x0642; +LCDBM2W_H = 0x0643; +LCDBM4W = 0x0644; +LCDBM4W_L = 0x0644; +LCDBM4W_H = 0x0645; +LCDBM6W = 0x0646; +LCDBM6W_L = 0x0646; +LCDBM6W_H = 0x0647; +LCDBM8W = 0x0648; +LCDBM8W_L = 0x0648; +LCDBM8W_H = 0x0649; +LCDBM10W = 0x064A; +LCDBM10W_L = 0x064A; +LCDBM10W_H = 0x064B; +LCDBM12W = 0x064C; +LCDBM12W_L = 0x064C; +LCDBM12W_H = 0x064D; +LCDBM14W = 0x064E; +LCDBM14W_L = 0x064E; +LCDBM14W_H = 0x064F; +LCDBM16W = 0x0650; +LCDBM16W_L = 0x0650; +LCDBM16W_H = 0x0651; +LCDBM18W = 0x0652; +LCDBM18W_L = 0x0652; +LCDBM18W_H = 0x0653; +/************************************************************ +* PMM - Power Management System for FR2xx/FR4xx +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PMMIE = 0x012E; +PMMIE_L = 0x012E; +PMMIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* Real-Time Clock (RTC) Counter +************************************************************/ +RTCCTL = 0x03C0; +RTCCTL_L = 0x03C0; +RTCCTL_H = 0x03C1; +RTCIV = 0x03C4; +RTCIV_L = 0x03C4; +RTCIV_H = 0x03C5; +RTCMOD = 0x03C8; +RTCMOD_L = 0x03C8; +RTCMOD_H = 0x03C9; +RTCCNT = 0x03CC; +RTCCNT_L = 0x03CC; +RTCCNT_H = 0x03CD; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSBERRIV = 0x0158; +SYSBERRIV_L = 0x0158; +SYSBERRIV_H = 0x0159; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0300; +TA0CCTL0 = 0x0302; +TA0CCTL1 = 0x0304; +TA0CCTL2 = 0x0306; +TA0R = 0x0310; +TA0CCR0 = 0x0312; +TA0CCR1 = 0x0314; +TA0CCR2 = 0x0316; +TA0IV = 0x032E; +TA0EX0 = 0x0320; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0340; +TA1CCTL0 = 0x0342; +TA1CCTL1 = 0x0344; +TA1CCTL2 = 0x0346; +TA1R = 0x0350; +TA1CCR0 = 0x0352; +TA1CCR1 = 0x0354; +TA1CCR2 = 0x0356; +TA1IV = 0x036E; +TA1EX0 = 0x0360; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0540; +UCB0CTLW0_L = 0x0540; +UCB0CTLW0_H = 0x0541; +UCB0CTLW1 = 0x0542; +UCB0CTLW1_L = 0x0542; +UCB0CTLW1_H = 0x0543; +UCB0BRW = 0x0546; +UCB0BRW_L = 0x0546; +UCB0BRW_H = 0x0547; +UCB0STATW = 0x0548; +UCB0STATW_L = 0x0548; +UCB0STATW_H = 0x0549; +UCB0TBCNT = 0x054A; +UCB0TBCNT_L = 0x054A; +UCB0TBCNT_H = 0x054B; +UCB0RXBUF = 0x054C; +UCB0RXBUF_L = 0x054C; +UCB0RXBUF_H = 0x054D; +UCB0TXBUF = 0x054E; +UCB0TXBUF_L = 0x054E; +UCB0TXBUF_H = 0x054F; +UCB0I2COA0 = 0x0554; +UCB0I2COA0_L = 0x0554; +UCB0I2COA0_H = 0x0555; +UCB0I2COA1 = 0x0556; +UCB0I2COA1_L = 0x0556; +UCB0I2COA1_H = 0x0557; +UCB0I2COA2 = 0x0558; +UCB0I2COA2_L = 0x0558; +UCB0I2COA2_H = 0x0559; +UCB0I2COA3 = 0x055A; +UCB0I2COA3_L = 0x055A; +UCB0I2COA3_H = 0x055B; +UCB0ADDRX = 0x055C; +UCB0ADDRX_L = 0x055C; +UCB0ADDRX_H = 0x055D; +UCB0ADDMASK = 0x055E; +UCB0ADDMASK_L = 0x055E; +UCB0ADDMASK_H = 0x055F; +UCB0I2CSA = 0x0560; +UCB0I2CSA_L = 0x0560; +UCB0I2CSA_H = 0x0561; +UCB0IE = 0x056A; +UCB0IE_L = 0x056A; +UCB0IE_H = 0x056B; +UCB0IFG = 0x056C; +UCB0IFG_L = 0x056C; +UCB0IFG_H = 0x056D; +UCB0IV = 0x056E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr4132.cmd b/msp430/msp430fr4132.cmd new file mode 100644 index 00000000..bb318650 --- /dev/null +++ b/msp430/msp430fr4132.cmd @@ -0,0 +1,627 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr4132.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC +************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; +/************************************************************* +* Backup Memory Module +*************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x02EE; +CAPTIO0CTL_L = 0x02EE; +CAPTIO0CTL_H = 0x02EF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; +/************************************************************ +* CLOCK SYSTEM CONTROL +************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; +/************************************************************ +* LCD_E +************************************************************/ +LCDCTL0 = 0x0600; +LCDCTL0_L = 0x0600; +LCDCTL0_H = 0x0601; +LCDCTL1 = 0x0602; +LCDCTL1_L = 0x0602; +LCDCTL1_H = 0x0603; +LCDBLKCTL = 0x0604; +LCDBLKCTL_L = 0x0604; +LCDBLKCTL_H = 0x0605; +LCDMEMCTL = 0x0606; +LCDMEMCTL_L = 0x0606; +LCDMEMCTL_H = 0x0607; +LCDVCTL = 0x0608; +LCDVCTL_L = 0x0608; +LCDVCTL_H = 0x0609; +LCDPCTL0 = 0x060A; +LCDPCTL0_L = 0x060A; +LCDPCTL0_H = 0x060B; +LCDPCTL1 = 0x060C; +LCDPCTL1_L = 0x060C; +LCDPCTL1_H = 0x060D; +LCDPCTL2 = 0x060E; +LCDPCTL2_L = 0x060E; +LCDPCTL2_H = 0x060F; +LCDCSSEL0 = 0x0614; +LCDCSSEL0_L = 0x0614; +LCDCSSEL0_H = 0x0615; +LCDCSSEL1 = 0x0616; +LCDCSSEL1_L = 0x0616; +LCDCSSEL1_H = 0x0617; +LCDCSSEL2 = 0x0618; +LCDCSSEL2_L = 0x0618; +LCDCSSEL2_H = 0x0619; +LCDIV = 0x061E; +LCDM0W = 0x0620; +LCDM0W_L = 0x0620; +LCDM0W_H = 0x0621; +LCDM2W = 0x0622; +LCDM2W_L = 0x0622; +LCDM2W_H = 0x0623; +LCDM4W = 0x0624; +LCDM4W_L = 0x0624; +LCDM4W_H = 0x0625; +LCDM6W = 0x0626; +LCDM6W_L = 0x0626; +LCDM6W_H = 0x0627; +LCDM8W = 0x0628; +LCDM8W_L = 0x0628; +LCDM8W_H = 0x0629; +LCDM10W = 0x062A; +LCDM10W_L = 0x062A; +LCDM10W_H = 0x062B; +LCDM12W = 0x062C; +LCDM12W_L = 0x062C; +LCDM12W_H = 0x062D; +LCDM14W = 0x062E; +LCDM14W_L = 0x062E; +LCDM14W_H = 0x062F; +LCDM16W = 0x0630; +LCDM16W_L = 0x0630; +LCDM16W_H = 0x0631; +LCDM18W = 0x0632; +LCDM18W_L = 0x0632; +LCDM18W_H = 0x0633; +LCDM20W = 0x0634; +LCDM20W_L = 0x0634; +LCDM20W_H = 0x0635; +LCDM22W = 0x0636; +LCDM22W_L = 0x0636; +LCDM22W_H = 0x0637; +LCDM24W = 0x0638; +LCDM24W_L = 0x0638; +LCDM24W_H = 0x0639; +LCDM26W = 0x063A; +LCDM26W_L = 0x063A; +LCDM26W_H = 0x063B; +LCDM28W = 0x063C; +LCDM28W_L = 0x063C; +LCDM28W_H = 0x063D; +LCDM30W = 0x063E; +LCDM30W_L = 0x063E; +LCDM30W_H = 0x063F; +LCDM32W = 0x0640; +LCDM32W_L = 0x0640; +LCDM32W_H = 0x0641; +LCDM34W = 0x0642; +LCDM34W_L = 0x0642; +LCDM34W_H = 0x0643; +LCDM36W = 0x0644; +LCDM36W_L = 0x0644; +LCDM36W_H = 0x0645; +LCDM38W = 0x0646; +LCDM38W_L = 0x0646; +LCDM38W_H = 0x0647; +LCDBM0W = 0x0640; +LCDBM0W_L = 0x0640; +LCDBM0W_H = 0x0641; +LCDBM2W = 0x0642; +LCDBM2W_L = 0x0642; +LCDBM2W_H = 0x0643; +LCDBM4W = 0x0644; +LCDBM4W_L = 0x0644; +LCDBM4W_H = 0x0645; +LCDBM6W = 0x0646; +LCDBM6W_L = 0x0646; +LCDBM6W_H = 0x0647; +LCDBM8W = 0x0648; +LCDBM8W_L = 0x0648; +LCDBM8W_H = 0x0649; +LCDBM10W = 0x064A; +LCDBM10W_L = 0x064A; +LCDBM10W_H = 0x064B; +LCDBM12W = 0x064C; +LCDBM12W_L = 0x064C; +LCDBM12W_H = 0x064D; +LCDBM14W = 0x064E; +LCDBM14W_L = 0x064E; +LCDBM14W_H = 0x064F; +LCDBM16W = 0x0650; +LCDBM16W_L = 0x0650; +LCDBM16W_H = 0x0651; +LCDBM18W = 0x0652; +LCDBM18W_L = 0x0652; +LCDBM18W_H = 0x0653; +/************************************************************ +* PMM - Power Management System for FR2xx/FR4xx +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PMMIE = 0x012E; +PMMIE_L = 0x012E; +PMMIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* Real-Time Clock (RTC) Counter +************************************************************/ +RTCCTL = 0x03C0; +RTCCTL_L = 0x03C0; +RTCCTL_H = 0x03C1; +RTCIV = 0x03C4; +RTCIV_L = 0x03C4; +RTCIV_H = 0x03C5; +RTCMOD = 0x03C8; +RTCMOD_L = 0x03C8; +RTCMOD_H = 0x03C9; +RTCCNT = 0x03CC; +RTCCNT_L = 0x03CC; +RTCCNT_H = 0x03CD; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSBERRIV = 0x0158; +SYSBERRIV_L = 0x0158; +SYSBERRIV_H = 0x0159; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0300; +TA0CCTL0 = 0x0302; +TA0CCTL1 = 0x0304; +TA0CCTL2 = 0x0306; +TA0R = 0x0310; +TA0CCR0 = 0x0312; +TA0CCR1 = 0x0314; +TA0CCR2 = 0x0316; +TA0IV = 0x032E; +TA0EX0 = 0x0320; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0340; +TA1CCTL0 = 0x0342; +TA1CCTL1 = 0x0344; +TA1CCTL2 = 0x0346; +TA1R = 0x0350; +TA1CCR0 = 0x0352; +TA1CCR1 = 0x0354; +TA1CCR2 = 0x0356; +TA1IV = 0x036E; +TA1EX0 = 0x0360; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0540; +UCB0CTLW0_L = 0x0540; +UCB0CTLW0_H = 0x0541; +UCB0CTLW1 = 0x0542; +UCB0CTLW1_L = 0x0542; +UCB0CTLW1_H = 0x0543; +UCB0BRW = 0x0546; +UCB0BRW_L = 0x0546; +UCB0BRW_H = 0x0547; +UCB0STATW = 0x0548; +UCB0STATW_L = 0x0548; +UCB0STATW_H = 0x0549; +UCB0TBCNT = 0x054A; +UCB0TBCNT_L = 0x054A; +UCB0TBCNT_H = 0x054B; +UCB0RXBUF = 0x054C; +UCB0RXBUF_L = 0x054C; +UCB0RXBUF_H = 0x054D; +UCB0TXBUF = 0x054E; +UCB0TXBUF_L = 0x054E; +UCB0TXBUF_H = 0x054F; +UCB0I2COA0 = 0x0554; +UCB0I2COA0_L = 0x0554; +UCB0I2COA0_H = 0x0555; +UCB0I2COA1 = 0x0556; +UCB0I2COA1_L = 0x0556; +UCB0I2COA1_H = 0x0557; +UCB0I2COA2 = 0x0558; +UCB0I2COA2_L = 0x0558; +UCB0I2COA2_H = 0x0559; +UCB0I2COA3 = 0x055A; +UCB0I2COA3_L = 0x055A; +UCB0I2COA3_H = 0x055B; +UCB0ADDRX = 0x055C; +UCB0ADDRX_L = 0x055C; +UCB0ADDRX_H = 0x055D; +UCB0ADDMASK = 0x055E; +UCB0ADDMASK_L = 0x055E; +UCB0ADDMASK_H = 0x055F; +UCB0I2CSA = 0x0560; +UCB0I2CSA_L = 0x0560; +UCB0I2CSA_H = 0x0561; +UCB0IE = 0x056A; +UCB0IE_L = 0x056A; +UCB0IE_H = 0x056B; +UCB0IFG = 0x056C; +UCB0IFG_L = 0x056C; +UCB0IFG_H = 0x056D; +UCB0IV = 0x056E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr4133.cmd b/msp430/msp430fr4133.cmd new file mode 100644 index 00000000..cf1724a6 --- /dev/null +++ b/msp430/msp430fr4133.cmd @@ -0,0 +1,627 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr4133.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC +************************************************************/ +ADCCTL0 = 0x0700; +ADCCTL0_L = 0x0700; +ADCCTL0_H = 0x0701; +ADCCTL1 = 0x0702; +ADCCTL1_L = 0x0702; +ADCCTL1_H = 0x0703; +ADCCTL2 = 0x0704; +ADCCTL2_L = 0x0704; +ADCCTL2_H = 0x0705; +ADCLO = 0x0706; +ADCLO_L = 0x0706; +ADCLO_H = 0x0707; +ADCHI = 0x0708; +ADCHI_L = 0x0708; +ADCHI_H = 0x0709; +ADCMCTL0 = 0x070A; +ADCMCTL0_L = 0x070A; +ADCMCTL0_H = 0x070B; +ADCMEM0 = 0x0712; +ADCMEM0_L = 0x0712; +ADCMEM0_H = 0x0713; +ADCIE = 0x071A; +ADCIE_L = 0x071A; +ADCIE_H = 0x071B; +ADCIFG = 0x071C; +ADCIFG_L = 0x071C; +ADCIFG_H = 0x071D; +ADCIV = 0x071E; +ADCIV_L = 0x071E; +ADCIV_H = 0x071F; +/************************************************************* +* Backup Memory Module +*************************************************************/ +BAKMEM0 = 0x0660; +BAKMEM0_L = 0x0660; +BAKMEM0_H = 0x0661; +BAKMEM1 = 0x0662; +BAKMEM1_L = 0x0662; +BAKMEM1_H = 0x0663; +BAKMEM2 = 0x0664; +BAKMEM2_L = 0x0664; +BAKMEM2_H = 0x0665; +BAKMEM3 = 0x0666; +BAKMEM3_L = 0x0666; +BAKMEM3_H = 0x0667; +BAKMEM4 = 0x0668; +BAKMEM4_L = 0x0668; +BAKMEM4_H = 0x0669; +BAKMEM5 = 0x066A; +BAKMEM5_L = 0x066A; +BAKMEM5_H = 0x066B; +BAKMEM6 = 0x066C; +BAKMEM6_L = 0x066C; +BAKMEM6_H = 0x066D; +BAKMEM7 = 0x066E; +BAKMEM7_L = 0x066E; +BAKMEM7_H = 0x066F; +BAKMEM8 = 0x0670; +BAKMEM8_L = 0x0670; +BAKMEM8_H = 0x0671; +BAKMEM9 = 0x0672; +BAKMEM9_L = 0x0672; +BAKMEM9_H = 0x0673; +BAKMEM10 = 0x0674; +BAKMEM10_L = 0x0674; +BAKMEM10_H = 0x0675; +BAKMEM11 = 0x0676; +BAKMEM11_L = 0x0676; +BAKMEM11_H = 0x0677; +BAKMEM12 = 0x0678; +BAKMEM12_L = 0x0678; +BAKMEM12_H = 0x0679; +BAKMEM13 = 0x067A; +BAKMEM13_L = 0x067A; +BAKMEM13_H = 0x067B; +BAKMEM14 = 0x067C; +BAKMEM14_L = 0x067C; +BAKMEM14_H = 0x067D; +BAKMEM15 = 0x067E; +BAKMEM15_L = 0x067E; +BAKMEM15_H = 0x067F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x02EE; +CAPTIO0CTL_L = 0x02EE; +CAPTIO0CTL_H = 0x02EF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x01C0; +CRCDI_L = 0x01C0; +CRCDI_H = 0x01C1; +CRCDIRB = 0x01C2; +CRCDIRB_L = 0x01C2; +CRCDIRB_H = 0x01C3; +CRCINIRES = 0x01C4; +CRCINIRES_L = 0x01C4; +CRCINIRES_H = 0x01C5; +CRCRESR = 0x01C6; +CRCRESR_L = 0x01C6; +CRCRESR_H = 0x01C7; +/************************************************************ +* CLOCK SYSTEM CONTROL +************************************************************/ +CSCTL0 = 0x0180; +CSCTL0_L = 0x0180; +CSCTL0_H = 0x0181; +CSCTL1 = 0x0182; +CSCTL1_L = 0x0182; +CSCTL1_H = 0x0183; +CSCTL2 = 0x0184; +CSCTL2_L = 0x0184; +CSCTL2_H = 0x0185; +CSCTL3 = 0x0186; +CSCTL3_L = 0x0186; +CSCTL3_H = 0x0187; +CSCTL4 = 0x0188; +CSCTL4_L = 0x0188; +CSCTL4_H = 0x0189; +CSCTL5 = 0x018A; +CSCTL5_L = 0x018A; +CSCTL5_H = 0x018B; +CSCTL6 = 0x018C; +CSCTL6_L = 0x018C; +CSCTL6_H = 0x018D; +CSCTL7 = 0x018E; +CSCTL7_L = 0x018E; +CSCTL7_H = 0x018F; +CSCTL8 = 0x0190; +CSCTL8_L = 0x0190; +CSCTL8_H = 0x0191; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x01A0; +FRCTL0_L = 0x01A0; +FRCTL0_H = 0x01A1; +GCCTL0 = 0x01A4; +GCCTL0_L = 0x01A4; +GCCTL0_H = 0x01A5; +GCCTL1 = 0x01A6; +GCCTL1_L = 0x01A6; +GCCTL1_H = 0x01A7; +/************************************************************ +* LCD_E +************************************************************/ +LCDCTL0 = 0x0600; +LCDCTL0_L = 0x0600; +LCDCTL0_H = 0x0601; +LCDCTL1 = 0x0602; +LCDCTL1_L = 0x0602; +LCDCTL1_H = 0x0603; +LCDBLKCTL = 0x0604; +LCDBLKCTL_L = 0x0604; +LCDBLKCTL_H = 0x0605; +LCDMEMCTL = 0x0606; +LCDMEMCTL_L = 0x0606; +LCDMEMCTL_H = 0x0607; +LCDVCTL = 0x0608; +LCDVCTL_L = 0x0608; +LCDVCTL_H = 0x0609; +LCDPCTL0 = 0x060A; +LCDPCTL0_L = 0x060A; +LCDPCTL0_H = 0x060B; +LCDPCTL1 = 0x060C; +LCDPCTL1_L = 0x060C; +LCDPCTL1_H = 0x060D; +LCDPCTL2 = 0x060E; +LCDPCTL2_L = 0x060E; +LCDPCTL2_H = 0x060F; +LCDCSSEL0 = 0x0614; +LCDCSSEL0_L = 0x0614; +LCDCSSEL0_H = 0x0615; +LCDCSSEL1 = 0x0616; +LCDCSSEL1_L = 0x0616; +LCDCSSEL1_H = 0x0617; +LCDCSSEL2 = 0x0618; +LCDCSSEL2_L = 0x0618; +LCDCSSEL2_H = 0x0619; +LCDIV = 0x061E; +LCDM0W = 0x0620; +LCDM0W_L = 0x0620; +LCDM0W_H = 0x0621; +LCDM2W = 0x0622; +LCDM2W_L = 0x0622; +LCDM2W_H = 0x0623; +LCDM4W = 0x0624; +LCDM4W_L = 0x0624; +LCDM4W_H = 0x0625; +LCDM6W = 0x0626; +LCDM6W_L = 0x0626; +LCDM6W_H = 0x0627; +LCDM8W = 0x0628; +LCDM8W_L = 0x0628; +LCDM8W_H = 0x0629; +LCDM10W = 0x062A; +LCDM10W_L = 0x062A; +LCDM10W_H = 0x062B; +LCDM12W = 0x062C; +LCDM12W_L = 0x062C; +LCDM12W_H = 0x062D; +LCDM14W = 0x062E; +LCDM14W_L = 0x062E; +LCDM14W_H = 0x062F; +LCDM16W = 0x0630; +LCDM16W_L = 0x0630; +LCDM16W_H = 0x0631; +LCDM18W = 0x0632; +LCDM18W_L = 0x0632; +LCDM18W_H = 0x0633; +LCDM20W = 0x0634; +LCDM20W_L = 0x0634; +LCDM20W_H = 0x0635; +LCDM22W = 0x0636; +LCDM22W_L = 0x0636; +LCDM22W_H = 0x0637; +LCDM24W = 0x0638; +LCDM24W_L = 0x0638; +LCDM24W_H = 0x0639; +LCDM26W = 0x063A; +LCDM26W_L = 0x063A; +LCDM26W_H = 0x063B; +LCDM28W = 0x063C; +LCDM28W_L = 0x063C; +LCDM28W_H = 0x063D; +LCDM30W = 0x063E; +LCDM30W_L = 0x063E; +LCDM30W_H = 0x063F; +LCDM32W = 0x0640; +LCDM32W_L = 0x0640; +LCDM32W_H = 0x0641; +LCDM34W = 0x0642; +LCDM34W_L = 0x0642; +LCDM34W_H = 0x0643; +LCDM36W = 0x0644; +LCDM36W_L = 0x0644; +LCDM36W_H = 0x0645; +LCDM38W = 0x0646; +LCDM38W_L = 0x0646; +LCDM38W_H = 0x0647; +LCDBM0W = 0x0640; +LCDBM0W_L = 0x0640; +LCDBM0W_H = 0x0641; +LCDBM2W = 0x0642; +LCDBM2W_L = 0x0642; +LCDBM2W_H = 0x0643; +LCDBM4W = 0x0644; +LCDBM4W_L = 0x0644; +LCDBM4W_H = 0x0645; +LCDBM6W = 0x0646; +LCDBM6W_L = 0x0646; +LCDBM6W_H = 0x0647; +LCDBM8W = 0x0648; +LCDBM8W_L = 0x0648; +LCDBM8W_H = 0x0649; +LCDBM10W = 0x064A; +LCDBM10W_L = 0x064A; +LCDBM10W_H = 0x064B; +LCDBM12W = 0x064C; +LCDBM12W_L = 0x064C; +LCDBM12W_H = 0x064D; +LCDBM14W = 0x064E; +LCDBM14W_L = 0x064E; +LCDBM14W_H = 0x064F; +LCDBM16W = 0x0650; +LCDBM16W_L = 0x0650; +LCDBM16W_H = 0x0651; +LCDBM18W = 0x0652; +LCDBM18W_L = 0x0652; +LCDBM18W_H = 0x0653; +/************************************************************ +* PMM - Power Management System for FR2xx/FR4xx +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +PMMCTL2 = 0x0124; +PMMCTL2_L = 0x0124; +PMMCTL2_H = 0x0125; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PMMIE = 0x012E; +PMMIE_L = 0x012E; +PMMIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +/************************************************************ +* Real-Time Clock (RTC) Counter +************************************************************/ +RTCCTL = 0x03C0; +RTCCTL_L = 0x03C0; +RTCCTL_H = 0x03C1; +RTCIV = 0x03C4; +RTCIV_L = 0x03C4; +RTCIV_H = 0x03C5; +RTCMOD = 0x03C8; +RTCMOD_L = 0x03C8; +RTCMOD_H = 0x03C9; +RTCCNT = 0x03CC; +RTCCNT_L = 0x03CC; +RTCCNT_H = 0x03CD; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0140; +SYSCTL_L = 0x0140; +SYSCTL_H = 0x0141; +SYSBSLC = 0x0142; +SYSBSLC_L = 0x0142; +SYSBSLC_H = 0x0143; +SYSJMBC = 0x0146; +SYSJMBC_L = 0x0146; +SYSJMBC_H = 0x0147; +SYSJMBI0 = 0x0148; +SYSJMBI0_L = 0x0148; +SYSJMBI0_H = 0x0149; +SYSJMBI1 = 0x014A; +SYSJMBI1_L = 0x014A; +SYSJMBI1_H = 0x014B; +SYSJMBO0 = 0x014C; +SYSJMBO0_L = 0x014C; +SYSJMBO0_H = 0x014D; +SYSJMBO1 = 0x014E; +SYSJMBO1_L = 0x014E; +SYSJMBO1_H = 0x014F; +SYSBERRIV = 0x0158; +SYSBERRIV_L = 0x0158; +SYSBERRIV_H = 0x0159; +SYSUNIV = 0x015A; +SYSUNIV_L = 0x015A; +SYSUNIV_H = 0x015B; +SYSSNIV = 0x015C; +SYSSNIV_L = 0x015C; +SYSSNIV_H = 0x015D; +SYSRSTIV = 0x015E; +SYSRSTIV_L = 0x015E; +SYSRSTIV_H = 0x015F; +SYSCFG0 = 0x0160; +SYSCFG0_L = 0x0160; +SYSCFG0_H = 0x0161; +SYSCFG1 = 0x0162; +SYSCFG1_L = 0x0162; +SYSCFG1_H = 0x0163; +SYSCFG2 = 0x0164; +SYSCFG2_L = 0x0164; +SYSCFG2_H = 0x0165; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0300; +TA0CCTL0 = 0x0302; +TA0CCTL1 = 0x0304; +TA0CCTL2 = 0x0306; +TA0R = 0x0310; +TA0CCR0 = 0x0312; +TA0CCR1 = 0x0314; +TA0CCR2 = 0x0316; +TA0IV = 0x032E; +TA0EX0 = 0x0320; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0340; +TA1CCTL0 = 0x0342; +TA1CCTL1 = 0x0344; +TA1CCTL2 = 0x0346; +TA1R = 0x0350; +TA1CCR0 = 0x0352; +TA1CCR1 = 0x0354; +TA1CCR2 = 0x0356; +TA1IV = 0x036E; +TA1EX0 = 0x0360; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x0500; +UCA0CTLW0_L = 0x0500; +UCA0CTLW0_H = 0x0501; +UCA0CTLW1 = 0x0502; +UCA0CTLW1_L = 0x0502; +UCA0CTLW1_H = 0x0503; +UCA0BRW = 0x0506; +UCA0BRW_L = 0x0506; +UCA0BRW_H = 0x0507; +UCA0MCTLW = 0x0508; +UCA0MCTLW_L = 0x0508; +UCA0MCTLW_H = 0x0509; +UCA0STATW = 0x050A; +UCA0RXBUF = 0x050C; +UCA0RXBUF_L = 0x050C; +UCA0RXBUF_H = 0x050D; +UCA0TXBUF = 0x050E; +UCA0TXBUF_L = 0x050E; +UCA0TXBUF_H = 0x050F; +UCA0ABCTL = 0x0510; +UCA0IRCTL = 0x0512; +UCA0IRCTL_L = 0x0512; +UCA0IRCTL_H = 0x0513; +UCA0IE = 0x051A; +UCA0IE_L = 0x051A; +UCA0IE_H = 0x051B; +UCA0IFG = 0x051C; +UCA0IFG_L = 0x051C; +UCA0IFG_H = 0x051D; +UCA0IV = 0x051E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0540; +UCB0CTLW0_L = 0x0540; +UCB0CTLW0_H = 0x0541; +UCB0CTLW1 = 0x0542; +UCB0CTLW1_L = 0x0542; +UCB0CTLW1_H = 0x0543; +UCB0BRW = 0x0546; +UCB0BRW_L = 0x0546; +UCB0BRW_H = 0x0547; +UCB0STATW = 0x0548; +UCB0STATW_L = 0x0548; +UCB0STATW_H = 0x0549; +UCB0TBCNT = 0x054A; +UCB0TBCNT_L = 0x054A; +UCB0TBCNT_H = 0x054B; +UCB0RXBUF = 0x054C; +UCB0RXBUF_L = 0x054C; +UCB0RXBUF_H = 0x054D; +UCB0TXBUF = 0x054E; +UCB0TXBUF_L = 0x054E; +UCB0TXBUF_H = 0x054F; +UCB0I2COA0 = 0x0554; +UCB0I2COA0_L = 0x0554; +UCB0I2COA0_H = 0x0555; +UCB0I2COA1 = 0x0556; +UCB0I2COA1_L = 0x0556; +UCB0I2COA1_H = 0x0557; +UCB0I2COA2 = 0x0558; +UCB0I2COA2_L = 0x0558; +UCB0I2COA2_H = 0x0559; +UCB0I2COA3 = 0x055A; +UCB0I2COA3_L = 0x055A; +UCB0I2COA3_H = 0x055B; +UCB0ADDRX = 0x055C; +UCB0ADDRX_L = 0x055C; +UCB0ADDRX_H = 0x055D; +UCB0ADDMASK = 0x055E; +UCB0ADDMASK_L = 0x055E; +UCB0ADDMASK_H = 0x055F; +UCB0I2CSA = 0x0560; +UCB0I2CSA_L = 0x0560; +UCB0I2CSA_H = 0x0561; +UCB0IE = 0x056A; +UCB0IE_L = 0x056A; +UCB0IE_H = 0x056B; +UCB0IFG = 0x056C; +UCB0IFG_L = 0x056C; +UCB0IFG_H = 0x056D; +UCB0IV = 0x056E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x01CC; +WDTCTL_L = 0x01CC; +WDTCTL_H = 0x01CD; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5041.cmd b/msp430/msp430fr5041.cmd new file mode 100644 index 00000000..a7535d11 --- /dev/null +++ b/msp430/msp430fr5041.cmd @@ -0,0 +1,2072 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr5041.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC12_B +*****************************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; + + +/***************************************************************************** + AES256 +*****************************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; + + +/***************************************************************************** + CAPTIO0 +*****************************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; + + +/***************************************************************************** + CAPTIO1 +*****************************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; + + +/***************************************************************************** + COMP_E +*****************************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; + + +/***************************************************************************** + CRC32 +*****************************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +P7IV = 0x026E; +P7IV_L = 0x026E; +P7IV_H = 0x026F; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +PDIES = 0x0278; +PDIES_L = 0x0278; +PDIES_H = 0x0279; +PDIE = 0x027A; +PDIE_L = 0x027A; +PDIE_H = 0x027B; +PDIFG = 0x027C; +PDIFG_L = 0x027C; +PDIFG_H = 0x027D; +P8IV = 0x027E; +P8IV_L = 0x027E; +P8IV_H = 0x027F; +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +P9IV = 0x028E; +P9IV_L = 0x028E; +P9IV_H = 0x028F; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +PEIES = 0x0298; +PEIES_L = 0x0298; +PEIES_H = 0x0299; +PEIE = 0x029A; +PEIE_L = 0x029A; +PEIE_H = 0x029B; +PEIFG = 0x029C; +PEIFG_L = 0x029C; +PEIFG_H = 0x029D; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + +P7IN = 0x0260; + +P8IN = 0x0261; + +P7OUT = 0x0262; + +P8OUT = 0x0263; + +P7DIR = 0x0264; + +P8DIR = 0x0265; + +P7REN = 0x0266; + +P8REN = 0x0267; + +P7SEL0 = 0x026A; + +P8SEL0 = 0x026B; + +P7SEL1 = 0x026C; + +P8SEL1 = 0x026D; + +P7SELC = 0x0276; + +P8SELC = 0x0277; + +P7IES = 0x0278; + +P8IES = 0x0279; + +P7IE = 0x027A; + +P8IE = 0x027B; + +P7IFG = 0x027C; + +P8IFG = 0x027D; + +P9IN = 0x0280; + +P9OUT = 0x0282; + +P9DIR = 0x0284; + +P9REN = 0x0286; + +P9SEL0 = 0x028A; + +P9SEL1 = 0x028C; + +P9SELC = 0x0296; + +P9IES = 0x0298; + +P9IE = 0x029A; + +P9IFG = 0x029C; + + + +/***************************************************************************** + DMA +*****************************************************************************/ +DMACTL0 = 0x0500; +DMACTL0_L = 0x0500; +DMACTL0_H = 0x0501; +DMACTL1 = 0x0502; +DMACTL1_L = 0x0502; +DMACTL1_H = 0x0503; +DMACTL2 = 0x0504; +DMACTL2_L = 0x0504; +DMACTL2_H = 0x0505; +DMACTL4 = 0x0508; +DMACTL4_L = 0x0508; +DMACTL4_H = 0x0509; +DMAIV = 0x050E; +DMAIV_L = 0x050E; +DMAIV_H = 0x050F; +DMA0CTL = 0x0510; +DMA0CTL_L = 0x0510; +DMA0CTL_H = 0x0511; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA0SZ_L = 0x051A; +DMA0SZ_H = 0x051B; +DMA1CTL = 0x0520; +DMA1CTL_L = 0x0520; +DMA1CTL_H = 0x0521; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA1SZ_L = 0x052A; +DMA1SZ_H = 0x052B; +DMA2CTL = 0x0530; +DMA2CTL_L = 0x0530; +DMA2CTL_H = 0x0531; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA2SZ_L = 0x053A; +DMA2SZ_H = 0x053B; +DMA3CTL = 0x0540; +DMA3CTL_L = 0x0540; +DMA3CTL_H = 0x0541; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA3SZ_L = 0x054A; +DMA3SZ_H = 0x054B; +DMA4CTL = 0x0550; +DMA4CTL_L = 0x0550; +DMA4CTL_H = 0x0551; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA4SZ_L = 0x055A; +DMA4SZ_H = 0x055B; +DMA5CTL = 0x0560; +DMA5CTL_L = 0x0560; +DMA5CTL_H = 0x0561; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +DMA5SZ_L = 0x056A; +DMA5SZ_H = 0x056B; + + +/***************************************************************************** + FRCTL_A +*****************************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; + + +/***************************************************************************** + HSPLL +*****************************************************************************/ +HSPLLIIDX = 0x0EE0; +HSPLLIIDX_L = 0x0EE0; +HSPLLIIDX_H = 0x0EE1; +HSPLLMIS = 0x0EE2; +HSPLLMIS_L = 0x0EE2; +HSPLLMIS_H = 0x0EE3; +HSPLLRIS = 0x0EE4; +HSPLLRIS_L = 0x0EE4; +HSPLLRIS_H = 0x0EE5; +HSPLLIMSC = 0x0EE6; +HSPLLIMSC_L = 0x0EE6; +HSPLLIMSC_H = 0x0EE7; +HSPLLICR = 0x0EE8; +HSPLLICR_L = 0x0EE8; +HSPLLICR_H = 0x0EE9; +HSPLLISR = 0x0EEA; +HSPLLISR_L = 0x0EEA; +HSPLLISR_H = 0x0EEB; +HSPLLDESCLO = 0x0EEC; +HSPLLDESCLO_L = 0x0EEC; +HSPLLDESCLO_H = 0x0EED; +HSPLLDESCHI = 0x0EEE; +HSPLLDESCHI_L = 0x0EEE; +HSPLLDESCHI_H = 0x0EEF; +HSPLLCTL = 0x0EF0; +HSPLLCTL_L = 0x0EF0; +HSPLLCTL_H = 0x0EF1; +HSPLLUSSXTLCTL = 0x0EF2; +HSPLLUSSXTLCTL_L = 0x0EF2; +HSPLLUSSXTLCTL_H = 0x0EF3; + + +/***************************************************************************** + LEA +*****************************************************************************/ +LEACAP = 0x0A80; +LEACAPL = 0x0A80; +LEACAPH = 0x0A82; + +LEACNF0 = 0x0A84; +LEACNF0L = 0x0A84; +LEACNF0H = 0x0A86; + +LEACNF1 = 0x0A88; +LEACNF1L = 0x0A88; +LEACNF1H = 0x0A8A; + +LEACNF2 = 0x0A8C; +LEACNF2L = 0x0A8C; +LEACNF2H = 0x0A8E; + +LEAMB = 0x0A90; +LEAMBL = 0x0A90; +LEAMBH = 0x0A92; + +LEAMT = 0x0A94; +LEAMTL = 0x0A94; +LEAMTH = 0x0A96; + +LEACMA = 0x0A98; +LEACMAL = 0x0A98; +LEACMAH = 0x0A9A; + +LEACMCTL = 0x0A9C; +LEACMCTLL = 0x0A9C; +LEACMCTLH = 0x0A9E; + +LEACMDSTAT = 0x0AA8; +LEACMDSTATL = 0x0AA8; +LEACMDSTATH = 0x0AAA; + +LEAS1STAT = 0x0AAC; +LEAS1STATL = 0x0AAC; +LEAS1STATH = 0x0AAE; + +LEAS0STAT = 0x0AB0; +LEAS0STATL = 0x0AB0; +LEAS0STATH = 0x0AB2; + +LEADSTSTAT = 0x0AB4; +LEADSTSTATL = 0x0AB4; +LEADSTSTATH = 0x0AB6; + +LEAPMCTL = 0x0AC0; +LEAPMCTLL = 0x0AC0; +LEAPMCTLH = 0x0AC2; + +LEAPMDST = 0x0AC4; +LEAPMDSTL = 0x0AC4; +LEAPMDSTH = 0x0AC6; + +LEAPMS1 = 0x0AC8; +LEAPMS1L = 0x0AC8; +LEAPMS1H = 0x0ACA; + +LEAPMS0 = 0x0ACC; +LEAPMS0L = 0x0ACC; +LEAPMS0H = 0x0ACE; + +LEAPMCB = 0x0AD0; +LEAPMCBL = 0x0AD0; +LEAPMCBH = 0x0AD2; + +LEAIFGSET = 0x0AF0; +LEAIFGSETL = 0x0AF0; +LEAIFGSETH = 0x0AF2; + +LEAIE = 0x0AF4; +LEAIEL = 0x0AF4; +LEAIEH = 0x0AF6; + +LEAIFG = 0x0AF8; +LEAIFGL = 0x0AF8; +LEAIFGH = 0x0AFA; + +LEAIV = 0x0AFC; +LEAIVL = 0x0AFC; +LEAIVH = 0x0AFE; + + + +/***************************************************************************** + MPU +*****************************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + MTIF +*****************************************************************************/ +MTIFPGCNF = 0x0F00; +MTIFPGCNF_L = 0x0F00; +MTIFPGCNF_H = 0x0F01; +MTIFPGKVAL = 0x0F02; +MTIFPGKVAL_L = 0x0F02; +MTIFPGKVAL_H = 0x0F03; +MTIFPGCTL = 0x0F04; +MTIFPGCTL_L = 0x0F04; +MTIFPGCTL_H = 0x0F05; +MTIFPGSR = 0x0F06; +MTIFPGSR_L = 0x0F06; +MTIFPGSR_H = 0x0F07; +MTIFPCCNF = 0x0F08; +MTIFPCCNF_L = 0x0F08; +MTIFPCCNF_H = 0x0F09; +MTIFPCR = 0x0F0A; +MTIFPCR_L = 0x0F0A; +MTIFPCR_H = 0x0F0B; +MTIFPCCTL = 0x0F0C; +MTIFPCCTL_L = 0x0F0C; +MTIFPCCTL_H = 0x0F0D; +MTIFPCSR = 0x0F0E; +MTIFPCSR_L = 0x0F0E; +MTIFPCSR_H = 0x0F0F; +MTIFTPCTL = 0x0F10; +MTIFTPCTL_L = 0x0F10; +MTIFTPCTL_H = 0x0F11; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RAMCTL +*****************************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +RCCTL1 = 0x015A; +RCCTL1_L = 0x015A; +RCCTL1_H = 0x015B; + + +/***************************************************************************** + REF_A +*****************************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; + + +/***************************************************************************** + RTC_C +*****************************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCIV_L = 0x04AE; +RTCIV_H = 0x04AF; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCCNT12 = 0x04B0; +RTCCNT12_L = 0x04B0; +RTCCNT12_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCCNT34 = 0x04B2; +RTCCNT34_L = 0x04B2; +RTCCNT34_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BIN2BCD_L = 0x04BC; +BIN2BCD_H = 0x04BD; +BCD2BIN = 0x04BE; +BCD2BIN_L = 0x04BE; +BCD2BIN_H = 0x04BF; +RT0PS = 0x04AC; + +RT1PS = 0x04AD; + +RTCCNT1 = 0x04B0; + +RTCCNT2 = 0x04B1; + +RTCCNT3 = 0x04B2; + +RTCCNT4 = 0x04B3; + + + +/***************************************************************************** + SAPH_A +*****************************************************************************/ +SAPH_AIIDX = 0x0E00; +SAPH_AIIDX_L = 0x0E00; +SAPH_AIIDX_H = 0x0E01; +SAPH_AMIS = 0x0E02; +SAPH_AMIS_L = 0x0E02; +SAPH_AMIS_H = 0x0E03; +SAPH_ARIS = 0x0E04; +SAPH_ARIS_L = 0x0E04; +SAPH_ARIS_H = 0x0E05; +SAPH_AIMSC = 0x0E06; +SAPH_AIMSC_L = 0x0E06; +SAPH_AIMSC_H = 0x0E07; +SAPH_AICR = 0x0E08; +SAPH_AICR_L = 0x0E08; +SAPH_AICR_H = 0x0E09; +SAPH_AISR = 0x0E0A; +SAPH_AISR_L = 0x0E0A; +SAPH_AISR_H = 0x0E0B; +SAPH_ADESCLO = 0x0E0C; +SAPH_ADESCLO_L = 0x0E0C; +SAPH_ADESCLO_H = 0x0E0D; +SAPH_ADESCHI = 0x0E0E; +SAPH_ADESCHI_L = 0x0E0E; +SAPH_ADESCHI_H = 0x0E0F; +SAPH_AKEY = 0x0E10; +SAPH_AKEY_L = 0x0E10; +SAPH_AKEY_H = 0x0E11; +SAPH_AOCTL0 = 0x0E12; +SAPH_AOCTL0_L = 0x0E12; +SAPH_AOCTL0_H = 0x0E13; +SAPH_AOCTL1 = 0x0E14; +SAPH_AOCTL1_L = 0x0E14; +SAPH_AOCTL1_H = 0x0E15; +SAPH_AOSEL = 0x0E16; +SAPH_AOSEL_L = 0x0E16; +SAPH_AOSEL_H = 0x0E17; +SAPH_ACH0PUT = 0x0E20; +SAPH_ACH0PUT_L = 0x0E20; +SAPH_ACH0PUT_H = 0x0E21; +SAPH_ACH0PDT = 0x0E22; +SAPH_ACH0PDT_L = 0x0E22; +SAPH_ACH0PDT_H = 0x0E23; +SAPH_ACH0TT = 0x0E24; +SAPH_ACH0TT_L = 0x0E24; +SAPH_ACH0TT_H = 0x0E25; +SAPH_ACH1PUT = 0x0E26; +SAPH_ACH1PUT_L = 0x0E26; +SAPH_ACH1PUT_H = 0x0E27; +SAPH_ACH1PDT = 0x0E28; +SAPH_ACH1PDT_L = 0x0E28; +SAPH_ACH1PDT_H = 0x0E29; +SAPH_ACH1TT = 0x0E2A; +SAPH_ACH1TT_L = 0x0E2A; +SAPH_ACH1TT_H = 0x0E2B; +SAPH_AMCNF = 0x0E2C; +SAPH_AMCNF_L = 0x0E2C; +SAPH_AMCNF_H = 0x0E2D; +SAPH_ATACTL = 0x0E2E; +SAPH_ATACTL_L = 0x0E2E; +SAPH_ATACTL_H = 0x0E2F; +SAPH_AICTL0 = 0x0E30; +SAPH_AICTL0_L = 0x0E30; +SAPH_AICTL0_H = 0x0E31; +SAPH_ABCTL = 0x0E34; +SAPH_ABCTL_L = 0x0E34; +SAPH_ABCTL_H = 0x0E35; +SAPH_APGC = 0x0E40; +SAPH_APGC_L = 0x0E40; +SAPH_APGC_H = 0x0E41; +SAPH_APGLPER = 0x0E42; +SAPH_APGLPER_L = 0x0E42; +SAPH_APGLPER_H = 0x0E43; +SAPH_APGHPER = 0x0E44; +SAPH_APGHPER_L = 0x0E44; +SAPH_APGHPER_H = 0x0E45; +SAPH_APGCTL = 0x0E46; +SAPH_APGCTL_L = 0x0E46; +SAPH_APGCTL_H = 0x0E47; +SAPH_APPGTRIG = 0x0E48; +SAPH_APPGTRIG_L = 0x0E48; +SAPH_APPGTRIG_H = 0x0E49; +SAPH_AXPGCTL = 0x0E4A; +SAPH_AXPGCTL_L = 0x0E4A; +SAPH_AXPGCTL_H = 0x0E4B; +SAPH_AXPGLPER = 0x0E4C; +SAPH_AXPGLPER_L = 0x0E4C; +SAPH_AXPGLPER_H = 0x0E4D; +SAPH_AXPGHPER = 0x0E4E; +SAPH_AXPGHPER_L = 0x0E4E; +SAPH_AXPGHPER_H = 0x0E4F; +SAPH_AASCTL0 = 0x0E60; +SAPH_AASCTL0_L = 0x0E60; +SAPH_AASCTL0_H = 0x0E61; +SAPH_AASCTL1 = 0x0E62; +SAPH_AASCTL1_L = 0x0E62; +SAPH_AASCTL1_H = 0x0E63; +SAPH_AASQTRIG = 0x0E64; + +SAPH_AAPOL = 0x0E66; +SAPH_AAPOL_L = 0x0E66; +SAPH_AAPOL_H = 0x0E67; +SAPH_AAPLEV = 0x0E68; +SAPH_AAPLEV_L = 0x0E68; +SAPH_AAPLEV_H = 0x0E69; +SAPH_AAPHIZ = 0x0E6A; +SAPH_AAPHIZ_L = 0x0E6A; +SAPH_AAPHIZ_H = 0x0E6B; +SAPH_AATM_A = 0x0E6E; +SAPH_AATM_A_L = 0x0E6E; +SAPH_AATM_A_H = 0x0E6F; +SAPH_AATM_B = 0x0E70; +SAPH_AATM_B_L = 0x0E70; +SAPH_AATM_B_H = 0x0E71; +SAPH_AATM_C = 0x0E72; +SAPH_AATM_C_L = 0x0E72; +SAPH_AATM_C_H = 0x0E73; +SAPH_AATM_D = 0x0E74; +SAPH_AATM_D_L = 0x0E74; +SAPH_AATM_D_H = 0x0E75; +SAPH_AATM_E = 0x0E76; +SAPH_AATM_E_L = 0x0E76; +SAPH_AATM_E_H = 0x0E77; +SAPH_AATM_F = 0x0E78; +SAPH_AATM_F_L = 0x0E78; +SAPH_AATM_F_H = 0x0E79; +SAPH_ATBCTL = 0x0E7A; +SAPH_ATBCTL_L = 0x0E7A; +SAPH_ATBCTL_H = 0x0E7B; +SAPH_AATIMLO = 0x0E7C; +SAPH_AATIMLO_L = 0x0E7C; +SAPH_AATIMLO_H = 0x0E7D; +SAPH_AATIMHI = 0x0E7E; +SAPH_AATIMHI_L = 0x0E7E; +SAPH_AATIMHI_H = 0x0E7F; + + +/***************************************************************************** + SDHS +*****************************************************************************/ +SDHSIIDX = 0x0E80; +SDHSIIDX_L = 0x0E80; +SDHSIIDX_H = 0x0E81; +SDHSMIS = 0x0E82; +SDHSMIS_L = 0x0E82; +SDHSMIS_H = 0x0E83; +SDHSRIS = 0x0E84; +SDHSRIS_L = 0x0E84; +SDHSRIS_H = 0x0E85; +SDHSIMSC = 0x0E86; +SDHSIMSC_L = 0x0E86; +SDHSIMSC_H = 0x0E87; +SDHSICR = 0x0E88; +SDHSICR_L = 0x0E88; +SDHSICR_H = 0x0E89; +SDHSISR = 0x0E8A; +SDHSISR_L = 0x0E8A; +SDHSISR_H = 0x0E8B; +SDHSDESCLO = 0x0E8C; +SDHSDESCLO_L = 0x0E8C; +SDHSDESCLO_H = 0x0E8D; +SDHSDESCHI = 0x0E8E; +SDHSDESCHI_L = 0x0E8E; +SDHSDESCHI_H = 0x0E8F; +SDHSCTL0 = 0x0E90; +SDHSCTL0_L = 0x0E90; +SDHSCTL0_H = 0x0E91; +SDHSCTL1 = 0x0E92; +SDHSCTL1_L = 0x0E92; +SDHSCTL1_H = 0x0E93; +SDHSCTL2 = 0x0E94; +SDHSCTL2_L = 0x0E94; +SDHSCTL2_H = 0x0E95; +SDHSCTL3 = 0x0E96; +SDHSCTL3_L = 0x0E96; +SDHSCTL3_H = 0x0E97; +SDHSCTL4 = 0x0E98; +SDHSCTL4_L = 0x0E98; +SDHSCTL4_H = 0x0E99; +SDHSCTL5 = 0x0E9A; +SDHSCTL5_L = 0x0E9A; +SDHSCTL5_H = 0x0E9B; +SDHSCTL6 = 0x0E9C; +SDHSCTL6_L = 0x0E9C; +SDHSCTL6_H = 0x0E9D; +SDHSCTL7 = 0x0E9E; +SDHSCTL7_L = 0x0E9E; +SDHSCTL7_H = 0x0E9F; +SDHSDT = 0x0EA2; +SDHSDT_L = 0x0EA2; +SDHSDT_H = 0x0EA3; +SDHSWINHITH = 0x0EA4; +SDHSWINHITH_L = 0x0EA4; +SDHSWINHITH_H = 0x0EA5; +SDHSWINLOTH = 0x0EA6; +SDHSWINLOTH_L = 0x0EA6; +SDHSWINLOTH_H = 0x0EA7; +SDHSDTCDA = 0x0EA8; +SDHSDTCDA_L = 0x0EA8; +SDHSDTCDA_H = 0x0EA9; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0340; +TA0CTL_L = 0x0340; +TA0CTL_H = 0x0341; +TA0CCTL0 = 0x0342; +TA0CCTL0_L = 0x0342; +TA0CCTL0_H = 0x0343; +TA0CCTL1 = 0x0344; +TA0CCTL1_L = 0x0344; +TA0CCTL1_H = 0x0345; +TA0CCTL2 = 0x0346; +TA0CCTL2_L = 0x0346; +TA0CCTL2_H = 0x0347; +TA0R = 0x0350; +TA0R_L = 0x0350; +TA0R_H = 0x0351; +TA0CCR0 = 0x0352; +TA0CCR0_L = 0x0352; +TA0CCR0_H = 0x0353; +TA0CCR1 = 0x0354; +TA0CCR1_L = 0x0354; +TA0CCR1_H = 0x0355; +TA0CCR2 = 0x0356; +TA0CCR2_L = 0x0356; +TA0CCR2_H = 0x0357; +TA0EX0 = 0x0360; +TA0EX0_L = 0x0360; +TA0EX0_H = 0x0361; +TA0IV = 0x036E; +TA0IV_L = 0x036E; +TA0IV_H = 0x036F; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x0380; +TA1CTL_L = 0x0380; +TA1CTL_H = 0x0381; +TA1CCTL0 = 0x0382; +TA1CCTL0_L = 0x0382; +TA1CCTL0_H = 0x0383; +TA1CCTL1 = 0x0384; +TA1CCTL1_L = 0x0384; +TA1CCTL1_H = 0x0385; +TA1CCTL2 = 0x0386; +TA1CCTL2_L = 0x0386; +TA1CCTL2_H = 0x0387; +TA1R = 0x0390; +TA1R_L = 0x0390; +TA1R_H = 0x0391; +TA1CCR0 = 0x0392; +TA1CCR0_L = 0x0392; +TA1CCR0_H = 0x0393; +TA1CCR1 = 0x0394; +TA1CCR1_L = 0x0394; +TA1CCR1_H = 0x0395; +TA1CCR2 = 0x0396; +TA1CCR2_L = 0x0396; +TA1CCR2_H = 0x0397; +TA1EX0 = 0x03A0; +TA1EX0_L = 0x03A0; +TA1EX0_H = 0x03A1; +TA1IV = 0x03AE; +TA1IV_L = 0x03AE; +TA1IV_H = 0x03AF; + + +/***************************************************************************** + TA2 +*****************************************************************************/ +TA2CTL = 0x0400; +TA2CTL_L = 0x0400; +TA2CTL_H = 0x0401; +TA2CCTL0 = 0x0402; +TA2CCTL0_L = 0x0402; +TA2CCTL0_H = 0x0403; +TA2CCTL1 = 0x0404; +TA2CCTL1_L = 0x0404; +TA2CCTL1_H = 0x0405; +TA2R = 0x0410; +TA2R_L = 0x0410; +TA2R_H = 0x0411; +TA2CCR0 = 0x0412; +TA2CCR0_L = 0x0412; +TA2CCR0_H = 0x0413; +TA2CCR1 = 0x0414; +TA2CCR1_L = 0x0414; +TA2CCR1_H = 0x0415; +TA2EX0 = 0x0420; +TA2EX0_L = 0x0420; +TA2EX0_H = 0x0421; +TA2IV = 0x042E; +TA2IV_L = 0x042E; +TA2IV_H = 0x042F; + + +/***************************************************************************** + TA3 +*****************************************************************************/ +TA3CTL = 0x0440; +TA3CTL_L = 0x0440; +TA3CTL_H = 0x0441; +TA3CCTL0 = 0x0442; +TA3CCTL0_L = 0x0442; +TA3CCTL0_H = 0x0443; +TA3CCTL1 = 0x0444; +TA3CCTL1_L = 0x0444; +TA3CCTL1_H = 0x0445; +TA3R = 0x0450; +TA3R_L = 0x0450; +TA3R_H = 0x0451; +TA3CCR0 = 0x0452; +TA3CCR0_L = 0x0452; +TA3CCR0_H = 0x0453; +TA3CCR1 = 0x0454; +TA3CCR1_L = 0x0454; +TA3CCR1_H = 0x0455; +TA3EX0 = 0x0460; +TA3EX0_L = 0x0460; +TA3EX0_H = 0x0461; +TA3IV = 0x046E; +TA3IV_L = 0x046E; +TA3IV_H = 0x046F; + + +/***************************************************************************** + TA4 +*****************************************************************************/ +TA4CTL = 0x07C0; +TA4CTL_L = 0x07C0; +TA4CTL_H = 0x07C1; +TA4CCTL0 = 0x07C2; +TA4CCTL0_L = 0x07C2; +TA4CCTL0_H = 0x07C3; +TA4CCTL1 = 0x07C4; +TA4CCTL1_L = 0x07C4; +TA4CCTL1_H = 0x07C5; +TA4R = 0x07D0; +TA4R_L = 0x07D0; +TA4R_H = 0x07D1; +TA4CCR0 = 0x07D2; +TA4CCR0_L = 0x07D2; +TA4CCR0_H = 0x07D3; +TA4CCR1 = 0x07D4; +TA4CCR1_L = 0x07D4; +TA4CCR1_H = 0x07D5; +TA4EX0 = 0x07E0; +TA4EX0_L = 0x07E0; +TA4EX0_H = 0x07E1; +TA4IV = 0x07EE; +TA4IV_L = 0x07EE; +TA4IV_H = 0x07EF; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x03C0; +TB0CTL_L = 0x03C0; +TB0CTL_H = 0x03C1; +TB0CCTL0 = 0x03C2; +TB0CCTL0_L = 0x03C2; +TB0CCTL0_H = 0x03C3; +TB0CCTL1 = 0x03C4; +TB0CCTL1_L = 0x03C4; +TB0CCTL1_H = 0x03C5; +TB0CCTL2 = 0x03C6; +TB0CCTL2_L = 0x03C6; +TB0CCTL2_H = 0x03C7; +TB0CCTL3 = 0x03C8; +TB0CCTL3_L = 0x03C8; +TB0CCTL3_H = 0x03C9; +TB0CCTL4 = 0x03CA; +TB0CCTL4_L = 0x03CA; +TB0CCTL4_H = 0x03CB; +TB0CCTL5 = 0x03CC; +TB0CCTL5_L = 0x03CC; +TB0CCTL5_H = 0x03CD; +TB0CCTL6 = 0x03CE; +TB0CCTL6_L = 0x03CE; +TB0CCTL6_H = 0x03CF; +TB0R = 0x03D0; +TB0R_L = 0x03D0; +TB0R_H = 0x03D1; +TB0CCR0 = 0x03D2; +TB0CCR0_L = 0x03D2; +TB0CCR0_H = 0x03D3; +TB0CCR1 = 0x03D4; +TB0CCR1_L = 0x03D4; +TB0CCR1_H = 0x03D5; +TB0CCR2 = 0x03D6; +TB0CCR2_L = 0x03D6; +TB0CCR2_H = 0x03D7; +TB0CCR3 = 0x03D8; +TB0CCR3_L = 0x03D8; +TB0CCR3_H = 0x03D9; +TB0CCR4 = 0x03DA; +TB0CCR4_L = 0x03DA; +TB0CCR4_H = 0x03DB; +TB0CCR5 = 0x03DC; +TB0CCR5_L = 0x03DC; +TB0CCR5_H = 0x03DD; +TB0CCR6 = 0x03DE; +TB0CCR6_L = 0x03DE; +TB0CCR6_H = 0x03DF; +TB0EX0 = 0x03E0; +TB0EX0_L = 0x03E0; +TB0EX0_H = 0x03E1; +TB0IV = 0x03EE; +TB0IV_L = 0x03EE; +TB0IV_H = 0x03EF; + + +/***************************************************************************** + UUPS +*****************************************************************************/ +UUPSIIDX = 0x0EC0; +UUPSIIDX_L = 0x0EC0; +UUPSIIDX_H = 0x0EC1; +UUPSMIS = 0x0EC2; +UUPSMIS_L = 0x0EC2; +UUPSMIS_H = 0x0EC3; +UUPSRIS = 0x0EC4; +UUPSRIS_L = 0x0EC4; +UUPSRIS_H = 0x0EC5; +UUPSIMSC = 0x0EC6; +UUPSIMSC_L = 0x0EC6; +UUPSIMSC_H = 0x0EC7; +UUPSICR = 0x0EC8; +UUPSICR_L = 0x0EC8; +UUPSICR_H = 0x0EC9; +UUPSISR = 0x0ECA; +UUPSISR_L = 0x0ECA; +UUPSISR_H = 0x0ECB; +UUPSDESCLO = 0x0ECC; +UUPSDESCLO_L = 0x0ECC; +UUPSDESCLO_H = 0x0ECD; +UUPSDESCHI = 0x0ECE; +UUPSDESCHI_L = 0x0ECE; +UUPSDESCHI_H = 0x0ECF; +UUPSCTL = 0x0ED0; +UUPSCTL_L = 0x0ED0; +UUPSCTL_H = 0x0ED1; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0STATW_L = 0x05CA; +UCA0STATW_H = 0x05CB; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0ABCTL_L = 0x05D0; +UCA0ABCTL_H = 0x05D1; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +UCA0IV_L = 0x05DE; +UCA0IV_H = 0x05DF; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1STATW_L = 0x05EA; +UCA1STATW_H = 0x05EB; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1ABCTL_L = 0x05F0; +UCA1ABCTL_H = 0x05F1; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +UCA1IV_L = 0x05FE; +UCA1IV_H = 0x05FF; + + +/***************************************************************************** + eUSCI_A2 +*****************************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2STATW_L = 0x060A; +UCA2STATW_H = 0x060B; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2ABCTL_L = 0x0610; +UCA2ABCTL_H = 0x0611; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +UCA2IV_L = 0x061E; +UCA2IV_H = 0x061F; + + +/***************************************************************************** + eUSCI_A3 +*****************************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3STATW_L = 0x062A; +UCA3STATW_H = 0x062B; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3ABCTL_L = 0x0630; +UCA3ABCTL_H = 0x0631; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +UCA3IV_L = 0x063E; +UCA3IV_H = 0x063F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +UCB0IV_L = 0x066E; +UCB0IV_H = 0x066F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +UCB1IV_L = 0x06AE; +UCB1IV_H = 0x06AF; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr5043.cmd b/msp430/msp430fr5043.cmd new file mode 100644 index 00000000..43e15717 --- /dev/null +++ b/msp430/msp430fr5043.cmd @@ -0,0 +1,2072 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr5043.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC12_B +*****************************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; + + +/***************************************************************************** + AES256 +*****************************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; + + +/***************************************************************************** + CAPTIO0 +*****************************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; + + +/***************************************************************************** + CAPTIO1 +*****************************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; + + +/***************************************************************************** + COMP_E +*****************************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; + + +/***************************************************************************** + CRC32 +*****************************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +P7IV = 0x026E; +P7IV_L = 0x026E; +P7IV_H = 0x026F; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +PDIES = 0x0278; +PDIES_L = 0x0278; +PDIES_H = 0x0279; +PDIE = 0x027A; +PDIE_L = 0x027A; +PDIE_H = 0x027B; +PDIFG = 0x027C; +PDIFG_L = 0x027C; +PDIFG_H = 0x027D; +P8IV = 0x027E; +P8IV_L = 0x027E; +P8IV_H = 0x027F; +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +P9IV = 0x028E; +P9IV_L = 0x028E; +P9IV_H = 0x028F; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +PEIES = 0x0298; +PEIES_L = 0x0298; +PEIES_H = 0x0299; +PEIE = 0x029A; +PEIE_L = 0x029A; +PEIE_H = 0x029B; +PEIFG = 0x029C; +PEIFG_L = 0x029C; +PEIFG_H = 0x029D; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + +P7IN = 0x0260; + +P8IN = 0x0261; + +P7OUT = 0x0262; + +P8OUT = 0x0263; + +P7DIR = 0x0264; + +P8DIR = 0x0265; + +P7REN = 0x0266; + +P8REN = 0x0267; + +P7SEL0 = 0x026A; + +P8SEL0 = 0x026B; + +P7SEL1 = 0x026C; + +P8SEL1 = 0x026D; + +P7SELC = 0x0276; + +P8SELC = 0x0277; + +P7IES = 0x0278; + +P8IES = 0x0279; + +P7IE = 0x027A; + +P8IE = 0x027B; + +P7IFG = 0x027C; + +P8IFG = 0x027D; + +P9IN = 0x0280; + +P9OUT = 0x0282; + +P9DIR = 0x0284; + +P9REN = 0x0286; + +P9SEL0 = 0x028A; + +P9SEL1 = 0x028C; + +P9SELC = 0x0296; + +P9IES = 0x0298; + +P9IE = 0x029A; + +P9IFG = 0x029C; + + + +/***************************************************************************** + DMA +*****************************************************************************/ +DMACTL0 = 0x0500; +DMACTL0_L = 0x0500; +DMACTL0_H = 0x0501; +DMACTL1 = 0x0502; +DMACTL1_L = 0x0502; +DMACTL1_H = 0x0503; +DMACTL2 = 0x0504; +DMACTL2_L = 0x0504; +DMACTL2_H = 0x0505; +DMACTL4 = 0x0508; +DMACTL4_L = 0x0508; +DMACTL4_H = 0x0509; +DMAIV = 0x050E; +DMAIV_L = 0x050E; +DMAIV_H = 0x050F; +DMA0CTL = 0x0510; +DMA0CTL_L = 0x0510; +DMA0CTL_H = 0x0511; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA0SZ_L = 0x051A; +DMA0SZ_H = 0x051B; +DMA1CTL = 0x0520; +DMA1CTL_L = 0x0520; +DMA1CTL_H = 0x0521; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA1SZ_L = 0x052A; +DMA1SZ_H = 0x052B; +DMA2CTL = 0x0530; +DMA2CTL_L = 0x0530; +DMA2CTL_H = 0x0531; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA2SZ_L = 0x053A; +DMA2SZ_H = 0x053B; +DMA3CTL = 0x0540; +DMA3CTL_L = 0x0540; +DMA3CTL_H = 0x0541; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA3SZ_L = 0x054A; +DMA3SZ_H = 0x054B; +DMA4CTL = 0x0550; +DMA4CTL_L = 0x0550; +DMA4CTL_H = 0x0551; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA4SZ_L = 0x055A; +DMA4SZ_H = 0x055B; +DMA5CTL = 0x0560; +DMA5CTL_L = 0x0560; +DMA5CTL_H = 0x0561; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +DMA5SZ_L = 0x056A; +DMA5SZ_H = 0x056B; + + +/***************************************************************************** + FRCTL_A +*****************************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; + + +/***************************************************************************** + HSPLL +*****************************************************************************/ +HSPLLIIDX = 0x0EE0; +HSPLLIIDX_L = 0x0EE0; +HSPLLIIDX_H = 0x0EE1; +HSPLLMIS = 0x0EE2; +HSPLLMIS_L = 0x0EE2; +HSPLLMIS_H = 0x0EE3; +HSPLLRIS = 0x0EE4; +HSPLLRIS_L = 0x0EE4; +HSPLLRIS_H = 0x0EE5; +HSPLLIMSC = 0x0EE6; +HSPLLIMSC_L = 0x0EE6; +HSPLLIMSC_H = 0x0EE7; +HSPLLICR = 0x0EE8; +HSPLLICR_L = 0x0EE8; +HSPLLICR_H = 0x0EE9; +HSPLLISR = 0x0EEA; +HSPLLISR_L = 0x0EEA; +HSPLLISR_H = 0x0EEB; +HSPLLDESCLO = 0x0EEC; +HSPLLDESCLO_L = 0x0EEC; +HSPLLDESCLO_H = 0x0EED; +HSPLLDESCHI = 0x0EEE; +HSPLLDESCHI_L = 0x0EEE; +HSPLLDESCHI_H = 0x0EEF; +HSPLLCTL = 0x0EF0; +HSPLLCTL_L = 0x0EF0; +HSPLLCTL_H = 0x0EF1; +HSPLLUSSXTLCTL = 0x0EF2; +HSPLLUSSXTLCTL_L = 0x0EF2; +HSPLLUSSXTLCTL_H = 0x0EF3; + + +/***************************************************************************** + LEA +*****************************************************************************/ +LEACAP = 0x0A80; +LEACAPL = 0x0A80; +LEACAPH = 0x0A82; + +LEACNF0 = 0x0A84; +LEACNF0L = 0x0A84; +LEACNF0H = 0x0A86; + +LEACNF1 = 0x0A88; +LEACNF1L = 0x0A88; +LEACNF1H = 0x0A8A; + +LEACNF2 = 0x0A8C; +LEACNF2L = 0x0A8C; +LEACNF2H = 0x0A8E; + +LEAMB = 0x0A90; +LEAMBL = 0x0A90; +LEAMBH = 0x0A92; + +LEAMT = 0x0A94; +LEAMTL = 0x0A94; +LEAMTH = 0x0A96; + +LEACMA = 0x0A98; +LEACMAL = 0x0A98; +LEACMAH = 0x0A9A; + +LEACMCTL = 0x0A9C; +LEACMCTLL = 0x0A9C; +LEACMCTLH = 0x0A9E; + +LEACMDSTAT = 0x0AA8; +LEACMDSTATL = 0x0AA8; +LEACMDSTATH = 0x0AAA; + +LEAS1STAT = 0x0AAC; +LEAS1STATL = 0x0AAC; +LEAS1STATH = 0x0AAE; + +LEAS0STAT = 0x0AB0; +LEAS0STATL = 0x0AB0; +LEAS0STATH = 0x0AB2; + +LEADSTSTAT = 0x0AB4; +LEADSTSTATL = 0x0AB4; +LEADSTSTATH = 0x0AB6; + +LEAPMCTL = 0x0AC0; +LEAPMCTLL = 0x0AC0; +LEAPMCTLH = 0x0AC2; + +LEAPMDST = 0x0AC4; +LEAPMDSTL = 0x0AC4; +LEAPMDSTH = 0x0AC6; + +LEAPMS1 = 0x0AC8; +LEAPMS1L = 0x0AC8; +LEAPMS1H = 0x0ACA; + +LEAPMS0 = 0x0ACC; +LEAPMS0L = 0x0ACC; +LEAPMS0H = 0x0ACE; + +LEAPMCB = 0x0AD0; +LEAPMCBL = 0x0AD0; +LEAPMCBH = 0x0AD2; + +LEAIFGSET = 0x0AF0; +LEAIFGSETL = 0x0AF0; +LEAIFGSETH = 0x0AF2; + +LEAIE = 0x0AF4; +LEAIEL = 0x0AF4; +LEAIEH = 0x0AF6; + +LEAIFG = 0x0AF8; +LEAIFGL = 0x0AF8; +LEAIFGH = 0x0AFA; + +LEAIV = 0x0AFC; +LEAIVL = 0x0AFC; +LEAIVH = 0x0AFE; + + + +/***************************************************************************** + MPU +*****************************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + MTIF +*****************************************************************************/ +MTIFPGCNF = 0x0F00; +MTIFPGCNF_L = 0x0F00; +MTIFPGCNF_H = 0x0F01; +MTIFPGKVAL = 0x0F02; +MTIFPGKVAL_L = 0x0F02; +MTIFPGKVAL_H = 0x0F03; +MTIFPGCTL = 0x0F04; +MTIFPGCTL_L = 0x0F04; +MTIFPGCTL_H = 0x0F05; +MTIFPGSR = 0x0F06; +MTIFPGSR_L = 0x0F06; +MTIFPGSR_H = 0x0F07; +MTIFPCCNF = 0x0F08; +MTIFPCCNF_L = 0x0F08; +MTIFPCCNF_H = 0x0F09; +MTIFPCR = 0x0F0A; +MTIFPCR_L = 0x0F0A; +MTIFPCR_H = 0x0F0B; +MTIFPCCTL = 0x0F0C; +MTIFPCCTL_L = 0x0F0C; +MTIFPCCTL_H = 0x0F0D; +MTIFPCSR = 0x0F0E; +MTIFPCSR_L = 0x0F0E; +MTIFPCSR_H = 0x0F0F; +MTIFTPCTL = 0x0F10; +MTIFTPCTL_L = 0x0F10; +MTIFTPCTL_H = 0x0F11; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RAMCTL +*****************************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +RCCTL1 = 0x015A; +RCCTL1_L = 0x015A; +RCCTL1_H = 0x015B; + + +/***************************************************************************** + REF_A +*****************************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; + + +/***************************************************************************** + RTC_C +*****************************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCIV_L = 0x04AE; +RTCIV_H = 0x04AF; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCCNT12 = 0x04B0; +RTCCNT12_L = 0x04B0; +RTCCNT12_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCCNT34 = 0x04B2; +RTCCNT34_L = 0x04B2; +RTCCNT34_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BIN2BCD_L = 0x04BC; +BIN2BCD_H = 0x04BD; +BCD2BIN = 0x04BE; +BCD2BIN_L = 0x04BE; +BCD2BIN_H = 0x04BF; +RT0PS = 0x04AC; + +RT1PS = 0x04AD; + +RTCCNT1 = 0x04B0; + +RTCCNT2 = 0x04B1; + +RTCCNT3 = 0x04B2; + +RTCCNT4 = 0x04B3; + + + +/***************************************************************************** + SAPH_A +*****************************************************************************/ +SAPH_AIIDX = 0x0E00; +SAPH_AIIDX_L = 0x0E00; +SAPH_AIIDX_H = 0x0E01; +SAPH_AMIS = 0x0E02; +SAPH_AMIS_L = 0x0E02; +SAPH_AMIS_H = 0x0E03; +SAPH_ARIS = 0x0E04; +SAPH_ARIS_L = 0x0E04; +SAPH_ARIS_H = 0x0E05; +SAPH_AIMSC = 0x0E06; +SAPH_AIMSC_L = 0x0E06; +SAPH_AIMSC_H = 0x0E07; +SAPH_AICR = 0x0E08; +SAPH_AICR_L = 0x0E08; +SAPH_AICR_H = 0x0E09; +SAPH_AISR = 0x0E0A; +SAPH_AISR_L = 0x0E0A; +SAPH_AISR_H = 0x0E0B; +SAPH_ADESCLO = 0x0E0C; +SAPH_ADESCLO_L = 0x0E0C; +SAPH_ADESCLO_H = 0x0E0D; +SAPH_ADESCHI = 0x0E0E; +SAPH_ADESCHI_L = 0x0E0E; +SAPH_ADESCHI_H = 0x0E0F; +SAPH_AKEY = 0x0E10; +SAPH_AKEY_L = 0x0E10; +SAPH_AKEY_H = 0x0E11; +SAPH_AOCTL0 = 0x0E12; +SAPH_AOCTL0_L = 0x0E12; +SAPH_AOCTL0_H = 0x0E13; +SAPH_AOCTL1 = 0x0E14; +SAPH_AOCTL1_L = 0x0E14; +SAPH_AOCTL1_H = 0x0E15; +SAPH_AOSEL = 0x0E16; +SAPH_AOSEL_L = 0x0E16; +SAPH_AOSEL_H = 0x0E17; +SAPH_ACH0PUT = 0x0E20; +SAPH_ACH0PUT_L = 0x0E20; +SAPH_ACH0PUT_H = 0x0E21; +SAPH_ACH0PDT = 0x0E22; +SAPH_ACH0PDT_L = 0x0E22; +SAPH_ACH0PDT_H = 0x0E23; +SAPH_ACH0TT = 0x0E24; +SAPH_ACH0TT_L = 0x0E24; +SAPH_ACH0TT_H = 0x0E25; +SAPH_ACH1PUT = 0x0E26; +SAPH_ACH1PUT_L = 0x0E26; +SAPH_ACH1PUT_H = 0x0E27; +SAPH_ACH1PDT = 0x0E28; +SAPH_ACH1PDT_L = 0x0E28; +SAPH_ACH1PDT_H = 0x0E29; +SAPH_ACH1TT = 0x0E2A; +SAPH_ACH1TT_L = 0x0E2A; +SAPH_ACH1TT_H = 0x0E2B; +SAPH_AMCNF = 0x0E2C; +SAPH_AMCNF_L = 0x0E2C; +SAPH_AMCNF_H = 0x0E2D; +SAPH_ATACTL = 0x0E2E; +SAPH_ATACTL_L = 0x0E2E; +SAPH_ATACTL_H = 0x0E2F; +SAPH_AICTL0 = 0x0E30; +SAPH_AICTL0_L = 0x0E30; +SAPH_AICTL0_H = 0x0E31; +SAPH_ABCTL = 0x0E34; +SAPH_ABCTL_L = 0x0E34; +SAPH_ABCTL_H = 0x0E35; +SAPH_APGC = 0x0E40; +SAPH_APGC_L = 0x0E40; +SAPH_APGC_H = 0x0E41; +SAPH_APGLPER = 0x0E42; +SAPH_APGLPER_L = 0x0E42; +SAPH_APGLPER_H = 0x0E43; +SAPH_APGHPER = 0x0E44; +SAPH_APGHPER_L = 0x0E44; +SAPH_APGHPER_H = 0x0E45; +SAPH_APGCTL = 0x0E46; +SAPH_APGCTL_L = 0x0E46; +SAPH_APGCTL_H = 0x0E47; +SAPH_APPGTRIG = 0x0E48; +SAPH_APPGTRIG_L = 0x0E48; +SAPH_APPGTRIG_H = 0x0E49; +SAPH_AXPGCTL = 0x0E4A; +SAPH_AXPGCTL_L = 0x0E4A; +SAPH_AXPGCTL_H = 0x0E4B; +SAPH_AXPGLPER = 0x0E4C; +SAPH_AXPGLPER_L = 0x0E4C; +SAPH_AXPGLPER_H = 0x0E4D; +SAPH_AXPGHPER = 0x0E4E; +SAPH_AXPGHPER_L = 0x0E4E; +SAPH_AXPGHPER_H = 0x0E4F; +SAPH_AASCTL0 = 0x0E60; +SAPH_AASCTL0_L = 0x0E60; +SAPH_AASCTL0_H = 0x0E61; +SAPH_AASCTL1 = 0x0E62; +SAPH_AASCTL1_L = 0x0E62; +SAPH_AASCTL1_H = 0x0E63; +SAPH_AASQTRIG = 0x0E64; + +SAPH_AAPOL = 0x0E66; +SAPH_AAPOL_L = 0x0E66; +SAPH_AAPOL_H = 0x0E67; +SAPH_AAPLEV = 0x0E68; +SAPH_AAPLEV_L = 0x0E68; +SAPH_AAPLEV_H = 0x0E69; +SAPH_AAPHIZ = 0x0E6A; +SAPH_AAPHIZ_L = 0x0E6A; +SAPH_AAPHIZ_H = 0x0E6B; +SAPH_AATM_A = 0x0E6E; +SAPH_AATM_A_L = 0x0E6E; +SAPH_AATM_A_H = 0x0E6F; +SAPH_AATM_B = 0x0E70; +SAPH_AATM_B_L = 0x0E70; +SAPH_AATM_B_H = 0x0E71; +SAPH_AATM_C = 0x0E72; +SAPH_AATM_C_L = 0x0E72; +SAPH_AATM_C_H = 0x0E73; +SAPH_AATM_D = 0x0E74; +SAPH_AATM_D_L = 0x0E74; +SAPH_AATM_D_H = 0x0E75; +SAPH_AATM_E = 0x0E76; +SAPH_AATM_E_L = 0x0E76; +SAPH_AATM_E_H = 0x0E77; +SAPH_AATM_F = 0x0E78; +SAPH_AATM_F_L = 0x0E78; +SAPH_AATM_F_H = 0x0E79; +SAPH_ATBCTL = 0x0E7A; +SAPH_ATBCTL_L = 0x0E7A; +SAPH_ATBCTL_H = 0x0E7B; +SAPH_AATIMLO = 0x0E7C; +SAPH_AATIMLO_L = 0x0E7C; +SAPH_AATIMLO_H = 0x0E7D; +SAPH_AATIMHI = 0x0E7E; +SAPH_AATIMHI_L = 0x0E7E; +SAPH_AATIMHI_H = 0x0E7F; + + +/***************************************************************************** + SDHS +*****************************************************************************/ +SDHSIIDX = 0x0E80; +SDHSIIDX_L = 0x0E80; +SDHSIIDX_H = 0x0E81; +SDHSMIS = 0x0E82; +SDHSMIS_L = 0x0E82; +SDHSMIS_H = 0x0E83; +SDHSRIS = 0x0E84; +SDHSRIS_L = 0x0E84; +SDHSRIS_H = 0x0E85; +SDHSIMSC = 0x0E86; +SDHSIMSC_L = 0x0E86; +SDHSIMSC_H = 0x0E87; +SDHSICR = 0x0E88; +SDHSICR_L = 0x0E88; +SDHSICR_H = 0x0E89; +SDHSISR = 0x0E8A; +SDHSISR_L = 0x0E8A; +SDHSISR_H = 0x0E8B; +SDHSDESCLO = 0x0E8C; +SDHSDESCLO_L = 0x0E8C; +SDHSDESCLO_H = 0x0E8D; +SDHSDESCHI = 0x0E8E; +SDHSDESCHI_L = 0x0E8E; +SDHSDESCHI_H = 0x0E8F; +SDHSCTL0 = 0x0E90; +SDHSCTL0_L = 0x0E90; +SDHSCTL0_H = 0x0E91; +SDHSCTL1 = 0x0E92; +SDHSCTL1_L = 0x0E92; +SDHSCTL1_H = 0x0E93; +SDHSCTL2 = 0x0E94; +SDHSCTL2_L = 0x0E94; +SDHSCTL2_H = 0x0E95; +SDHSCTL3 = 0x0E96; +SDHSCTL3_L = 0x0E96; +SDHSCTL3_H = 0x0E97; +SDHSCTL4 = 0x0E98; +SDHSCTL4_L = 0x0E98; +SDHSCTL4_H = 0x0E99; +SDHSCTL5 = 0x0E9A; +SDHSCTL5_L = 0x0E9A; +SDHSCTL5_H = 0x0E9B; +SDHSCTL6 = 0x0E9C; +SDHSCTL6_L = 0x0E9C; +SDHSCTL6_H = 0x0E9D; +SDHSCTL7 = 0x0E9E; +SDHSCTL7_L = 0x0E9E; +SDHSCTL7_H = 0x0E9F; +SDHSDT = 0x0EA2; +SDHSDT_L = 0x0EA2; +SDHSDT_H = 0x0EA3; +SDHSWINHITH = 0x0EA4; +SDHSWINHITH_L = 0x0EA4; +SDHSWINHITH_H = 0x0EA5; +SDHSWINLOTH = 0x0EA6; +SDHSWINLOTH_L = 0x0EA6; +SDHSWINLOTH_H = 0x0EA7; +SDHSDTCDA = 0x0EA8; +SDHSDTCDA_L = 0x0EA8; +SDHSDTCDA_H = 0x0EA9; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0340; +TA0CTL_L = 0x0340; +TA0CTL_H = 0x0341; +TA0CCTL0 = 0x0342; +TA0CCTL0_L = 0x0342; +TA0CCTL0_H = 0x0343; +TA0CCTL1 = 0x0344; +TA0CCTL1_L = 0x0344; +TA0CCTL1_H = 0x0345; +TA0CCTL2 = 0x0346; +TA0CCTL2_L = 0x0346; +TA0CCTL2_H = 0x0347; +TA0R = 0x0350; +TA0R_L = 0x0350; +TA0R_H = 0x0351; +TA0CCR0 = 0x0352; +TA0CCR0_L = 0x0352; +TA0CCR0_H = 0x0353; +TA0CCR1 = 0x0354; +TA0CCR1_L = 0x0354; +TA0CCR1_H = 0x0355; +TA0CCR2 = 0x0356; +TA0CCR2_L = 0x0356; +TA0CCR2_H = 0x0357; +TA0EX0 = 0x0360; +TA0EX0_L = 0x0360; +TA0EX0_H = 0x0361; +TA0IV = 0x036E; +TA0IV_L = 0x036E; +TA0IV_H = 0x036F; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x0380; +TA1CTL_L = 0x0380; +TA1CTL_H = 0x0381; +TA1CCTL0 = 0x0382; +TA1CCTL0_L = 0x0382; +TA1CCTL0_H = 0x0383; +TA1CCTL1 = 0x0384; +TA1CCTL1_L = 0x0384; +TA1CCTL1_H = 0x0385; +TA1CCTL2 = 0x0386; +TA1CCTL2_L = 0x0386; +TA1CCTL2_H = 0x0387; +TA1R = 0x0390; +TA1R_L = 0x0390; +TA1R_H = 0x0391; +TA1CCR0 = 0x0392; +TA1CCR0_L = 0x0392; +TA1CCR0_H = 0x0393; +TA1CCR1 = 0x0394; +TA1CCR1_L = 0x0394; +TA1CCR1_H = 0x0395; +TA1CCR2 = 0x0396; +TA1CCR2_L = 0x0396; +TA1CCR2_H = 0x0397; +TA1EX0 = 0x03A0; +TA1EX0_L = 0x03A0; +TA1EX0_H = 0x03A1; +TA1IV = 0x03AE; +TA1IV_L = 0x03AE; +TA1IV_H = 0x03AF; + + +/***************************************************************************** + TA2 +*****************************************************************************/ +TA2CTL = 0x0400; +TA2CTL_L = 0x0400; +TA2CTL_H = 0x0401; +TA2CCTL0 = 0x0402; +TA2CCTL0_L = 0x0402; +TA2CCTL0_H = 0x0403; +TA2CCTL1 = 0x0404; +TA2CCTL1_L = 0x0404; +TA2CCTL1_H = 0x0405; +TA2R = 0x0410; +TA2R_L = 0x0410; +TA2R_H = 0x0411; +TA2CCR0 = 0x0412; +TA2CCR0_L = 0x0412; +TA2CCR0_H = 0x0413; +TA2CCR1 = 0x0414; +TA2CCR1_L = 0x0414; +TA2CCR1_H = 0x0415; +TA2EX0 = 0x0420; +TA2EX0_L = 0x0420; +TA2EX0_H = 0x0421; +TA2IV = 0x042E; +TA2IV_L = 0x042E; +TA2IV_H = 0x042F; + + +/***************************************************************************** + TA3 +*****************************************************************************/ +TA3CTL = 0x0440; +TA3CTL_L = 0x0440; +TA3CTL_H = 0x0441; +TA3CCTL0 = 0x0442; +TA3CCTL0_L = 0x0442; +TA3CCTL0_H = 0x0443; +TA3CCTL1 = 0x0444; +TA3CCTL1_L = 0x0444; +TA3CCTL1_H = 0x0445; +TA3R = 0x0450; +TA3R_L = 0x0450; +TA3R_H = 0x0451; +TA3CCR0 = 0x0452; +TA3CCR0_L = 0x0452; +TA3CCR0_H = 0x0453; +TA3CCR1 = 0x0454; +TA3CCR1_L = 0x0454; +TA3CCR1_H = 0x0455; +TA3EX0 = 0x0460; +TA3EX0_L = 0x0460; +TA3EX0_H = 0x0461; +TA3IV = 0x046E; +TA3IV_L = 0x046E; +TA3IV_H = 0x046F; + + +/***************************************************************************** + TA4 +*****************************************************************************/ +TA4CTL = 0x07C0; +TA4CTL_L = 0x07C0; +TA4CTL_H = 0x07C1; +TA4CCTL0 = 0x07C2; +TA4CCTL0_L = 0x07C2; +TA4CCTL0_H = 0x07C3; +TA4CCTL1 = 0x07C4; +TA4CCTL1_L = 0x07C4; +TA4CCTL1_H = 0x07C5; +TA4R = 0x07D0; +TA4R_L = 0x07D0; +TA4R_H = 0x07D1; +TA4CCR0 = 0x07D2; +TA4CCR0_L = 0x07D2; +TA4CCR0_H = 0x07D3; +TA4CCR1 = 0x07D4; +TA4CCR1_L = 0x07D4; +TA4CCR1_H = 0x07D5; +TA4EX0 = 0x07E0; +TA4EX0_L = 0x07E0; +TA4EX0_H = 0x07E1; +TA4IV = 0x07EE; +TA4IV_L = 0x07EE; +TA4IV_H = 0x07EF; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x03C0; +TB0CTL_L = 0x03C0; +TB0CTL_H = 0x03C1; +TB0CCTL0 = 0x03C2; +TB0CCTL0_L = 0x03C2; +TB0CCTL0_H = 0x03C3; +TB0CCTL1 = 0x03C4; +TB0CCTL1_L = 0x03C4; +TB0CCTL1_H = 0x03C5; +TB0CCTL2 = 0x03C6; +TB0CCTL2_L = 0x03C6; +TB0CCTL2_H = 0x03C7; +TB0CCTL3 = 0x03C8; +TB0CCTL3_L = 0x03C8; +TB0CCTL3_H = 0x03C9; +TB0CCTL4 = 0x03CA; +TB0CCTL4_L = 0x03CA; +TB0CCTL4_H = 0x03CB; +TB0CCTL5 = 0x03CC; +TB0CCTL5_L = 0x03CC; +TB0CCTL5_H = 0x03CD; +TB0CCTL6 = 0x03CE; +TB0CCTL6_L = 0x03CE; +TB0CCTL6_H = 0x03CF; +TB0R = 0x03D0; +TB0R_L = 0x03D0; +TB0R_H = 0x03D1; +TB0CCR0 = 0x03D2; +TB0CCR0_L = 0x03D2; +TB0CCR0_H = 0x03D3; +TB0CCR1 = 0x03D4; +TB0CCR1_L = 0x03D4; +TB0CCR1_H = 0x03D5; +TB0CCR2 = 0x03D6; +TB0CCR2_L = 0x03D6; +TB0CCR2_H = 0x03D7; +TB0CCR3 = 0x03D8; +TB0CCR3_L = 0x03D8; +TB0CCR3_H = 0x03D9; +TB0CCR4 = 0x03DA; +TB0CCR4_L = 0x03DA; +TB0CCR4_H = 0x03DB; +TB0CCR5 = 0x03DC; +TB0CCR5_L = 0x03DC; +TB0CCR5_H = 0x03DD; +TB0CCR6 = 0x03DE; +TB0CCR6_L = 0x03DE; +TB0CCR6_H = 0x03DF; +TB0EX0 = 0x03E0; +TB0EX0_L = 0x03E0; +TB0EX0_H = 0x03E1; +TB0IV = 0x03EE; +TB0IV_L = 0x03EE; +TB0IV_H = 0x03EF; + + +/***************************************************************************** + UUPS +*****************************************************************************/ +UUPSIIDX = 0x0EC0; +UUPSIIDX_L = 0x0EC0; +UUPSIIDX_H = 0x0EC1; +UUPSMIS = 0x0EC2; +UUPSMIS_L = 0x0EC2; +UUPSMIS_H = 0x0EC3; +UUPSRIS = 0x0EC4; +UUPSRIS_L = 0x0EC4; +UUPSRIS_H = 0x0EC5; +UUPSIMSC = 0x0EC6; +UUPSIMSC_L = 0x0EC6; +UUPSIMSC_H = 0x0EC7; +UUPSICR = 0x0EC8; +UUPSICR_L = 0x0EC8; +UUPSICR_H = 0x0EC9; +UUPSISR = 0x0ECA; +UUPSISR_L = 0x0ECA; +UUPSISR_H = 0x0ECB; +UUPSDESCLO = 0x0ECC; +UUPSDESCLO_L = 0x0ECC; +UUPSDESCLO_H = 0x0ECD; +UUPSDESCHI = 0x0ECE; +UUPSDESCHI_L = 0x0ECE; +UUPSDESCHI_H = 0x0ECF; +UUPSCTL = 0x0ED0; +UUPSCTL_L = 0x0ED0; +UUPSCTL_H = 0x0ED1; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0STATW_L = 0x05CA; +UCA0STATW_H = 0x05CB; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0ABCTL_L = 0x05D0; +UCA0ABCTL_H = 0x05D1; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +UCA0IV_L = 0x05DE; +UCA0IV_H = 0x05DF; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1STATW_L = 0x05EA; +UCA1STATW_H = 0x05EB; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1ABCTL_L = 0x05F0; +UCA1ABCTL_H = 0x05F1; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +UCA1IV_L = 0x05FE; +UCA1IV_H = 0x05FF; + + +/***************************************************************************** + eUSCI_A2 +*****************************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2STATW_L = 0x060A; +UCA2STATW_H = 0x060B; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2ABCTL_L = 0x0610; +UCA2ABCTL_H = 0x0611; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +UCA2IV_L = 0x061E; +UCA2IV_H = 0x061F; + + +/***************************************************************************** + eUSCI_A3 +*****************************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3STATW_L = 0x062A; +UCA3STATW_H = 0x062B; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3ABCTL_L = 0x0630; +UCA3ABCTL_H = 0x0631; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +UCA3IV_L = 0x063E; +UCA3IV_H = 0x063F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +UCB0IV_L = 0x066E; +UCB0IV_H = 0x066F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +UCB1IV_L = 0x06AE; +UCB1IV_H = 0x06AF; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr50431.cmd b/msp430/msp430fr50431.cmd new file mode 100644 index 00000000..5180a4b9 --- /dev/null +++ b/msp430/msp430fr50431.cmd @@ -0,0 +1,2072 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr50431.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC12_B +*****************************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; + + +/***************************************************************************** + AES256 +*****************************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; + + +/***************************************************************************** + CAPTIO0 +*****************************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; + + +/***************************************************************************** + CAPTIO1 +*****************************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; + + +/***************************************************************************** + COMP_E +*****************************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; + + +/***************************************************************************** + CRC32 +*****************************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +P7IV = 0x026E; +P7IV_L = 0x026E; +P7IV_H = 0x026F; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +PDIES = 0x0278; +PDIES_L = 0x0278; +PDIES_H = 0x0279; +PDIE = 0x027A; +PDIE_L = 0x027A; +PDIE_H = 0x027B; +PDIFG = 0x027C; +PDIFG_L = 0x027C; +PDIFG_H = 0x027D; +P8IV = 0x027E; +P8IV_L = 0x027E; +P8IV_H = 0x027F; +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +P9IV = 0x028E; +P9IV_L = 0x028E; +P9IV_H = 0x028F; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +PEIES = 0x0298; +PEIES_L = 0x0298; +PEIES_H = 0x0299; +PEIE = 0x029A; +PEIE_L = 0x029A; +PEIE_H = 0x029B; +PEIFG = 0x029C; +PEIFG_L = 0x029C; +PEIFG_H = 0x029D; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + +P7IN = 0x0260; + +P8IN = 0x0261; + +P7OUT = 0x0262; + +P8OUT = 0x0263; + +P7DIR = 0x0264; + +P8DIR = 0x0265; + +P7REN = 0x0266; + +P8REN = 0x0267; + +P7SEL0 = 0x026A; + +P8SEL0 = 0x026B; + +P7SEL1 = 0x026C; + +P8SEL1 = 0x026D; + +P7SELC = 0x0276; + +P8SELC = 0x0277; + +P7IES = 0x0278; + +P8IES = 0x0279; + +P7IE = 0x027A; + +P8IE = 0x027B; + +P7IFG = 0x027C; + +P8IFG = 0x027D; + +P9IN = 0x0280; + +P9OUT = 0x0282; + +P9DIR = 0x0284; + +P9REN = 0x0286; + +P9SEL0 = 0x028A; + +P9SEL1 = 0x028C; + +P9SELC = 0x0296; + +P9IES = 0x0298; + +P9IE = 0x029A; + +P9IFG = 0x029C; + + + +/***************************************************************************** + DMA +*****************************************************************************/ +DMACTL0 = 0x0500; +DMACTL0_L = 0x0500; +DMACTL0_H = 0x0501; +DMACTL1 = 0x0502; +DMACTL1_L = 0x0502; +DMACTL1_H = 0x0503; +DMACTL2 = 0x0504; +DMACTL2_L = 0x0504; +DMACTL2_H = 0x0505; +DMACTL4 = 0x0508; +DMACTL4_L = 0x0508; +DMACTL4_H = 0x0509; +DMAIV = 0x050E; +DMAIV_L = 0x050E; +DMAIV_H = 0x050F; +DMA0CTL = 0x0510; +DMA0CTL_L = 0x0510; +DMA0CTL_H = 0x0511; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA0SZ_L = 0x051A; +DMA0SZ_H = 0x051B; +DMA1CTL = 0x0520; +DMA1CTL_L = 0x0520; +DMA1CTL_H = 0x0521; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA1SZ_L = 0x052A; +DMA1SZ_H = 0x052B; +DMA2CTL = 0x0530; +DMA2CTL_L = 0x0530; +DMA2CTL_H = 0x0531; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA2SZ_L = 0x053A; +DMA2SZ_H = 0x053B; +DMA3CTL = 0x0540; +DMA3CTL_L = 0x0540; +DMA3CTL_H = 0x0541; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA3SZ_L = 0x054A; +DMA3SZ_H = 0x054B; +DMA4CTL = 0x0550; +DMA4CTL_L = 0x0550; +DMA4CTL_H = 0x0551; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA4SZ_L = 0x055A; +DMA4SZ_H = 0x055B; +DMA5CTL = 0x0560; +DMA5CTL_L = 0x0560; +DMA5CTL_H = 0x0561; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +DMA5SZ_L = 0x056A; +DMA5SZ_H = 0x056B; + + +/***************************************************************************** + FRCTL_A +*****************************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; + + +/***************************************************************************** + HSPLL +*****************************************************************************/ +HSPLLIIDX = 0x0EE0; +HSPLLIIDX_L = 0x0EE0; +HSPLLIIDX_H = 0x0EE1; +HSPLLMIS = 0x0EE2; +HSPLLMIS_L = 0x0EE2; +HSPLLMIS_H = 0x0EE3; +HSPLLRIS = 0x0EE4; +HSPLLRIS_L = 0x0EE4; +HSPLLRIS_H = 0x0EE5; +HSPLLIMSC = 0x0EE6; +HSPLLIMSC_L = 0x0EE6; +HSPLLIMSC_H = 0x0EE7; +HSPLLICR = 0x0EE8; +HSPLLICR_L = 0x0EE8; +HSPLLICR_H = 0x0EE9; +HSPLLISR = 0x0EEA; +HSPLLISR_L = 0x0EEA; +HSPLLISR_H = 0x0EEB; +HSPLLDESCLO = 0x0EEC; +HSPLLDESCLO_L = 0x0EEC; +HSPLLDESCLO_H = 0x0EED; +HSPLLDESCHI = 0x0EEE; +HSPLLDESCHI_L = 0x0EEE; +HSPLLDESCHI_H = 0x0EEF; +HSPLLCTL = 0x0EF0; +HSPLLCTL_L = 0x0EF0; +HSPLLCTL_H = 0x0EF1; +HSPLLUSSXTLCTL = 0x0EF2; +HSPLLUSSXTLCTL_L = 0x0EF2; +HSPLLUSSXTLCTL_H = 0x0EF3; + + +/***************************************************************************** + LEA +*****************************************************************************/ +LEACAP = 0x0A80; +LEACAPL = 0x0A80; +LEACAPH = 0x0A82; + +LEACNF0 = 0x0A84; +LEACNF0L = 0x0A84; +LEACNF0H = 0x0A86; + +LEACNF1 = 0x0A88; +LEACNF1L = 0x0A88; +LEACNF1H = 0x0A8A; + +LEACNF2 = 0x0A8C; +LEACNF2L = 0x0A8C; +LEACNF2H = 0x0A8E; + +LEAMB = 0x0A90; +LEAMBL = 0x0A90; +LEAMBH = 0x0A92; + +LEAMT = 0x0A94; +LEAMTL = 0x0A94; +LEAMTH = 0x0A96; + +LEACMA = 0x0A98; +LEACMAL = 0x0A98; +LEACMAH = 0x0A9A; + +LEACMCTL = 0x0A9C; +LEACMCTLL = 0x0A9C; +LEACMCTLH = 0x0A9E; + +LEACMDSTAT = 0x0AA8; +LEACMDSTATL = 0x0AA8; +LEACMDSTATH = 0x0AAA; + +LEAS1STAT = 0x0AAC; +LEAS1STATL = 0x0AAC; +LEAS1STATH = 0x0AAE; + +LEAS0STAT = 0x0AB0; +LEAS0STATL = 0x0AB0; +LEAS0STATH = 0x0AB2; + +LEADSTSTAT = 0x0AB4; +LEADSTSTATL = 0x0AB4; +LEADSTSTATH = 0x0AB6; + +LEAPMCTL = 0x0AC0; +LEAPMCTLL = 0x0AC0; +LEAPMCTLH = 0x0AC2; + +LEAPMDST = 0x0AC4; +LEAPMDSTL = 0x0AC4; +LEAPMDSTH = 0x0AC6; + +LEAPMS1 = 0x0AC8; +LEAPMS1L = 0x0AC8; +LEAPMS1H = 0x0ACA; + +LEAPMS0 = 0x0ACC; +LEAPMS0L = 0x0ACC; +LEAPMS0H = 0x0ACE; + +LEAPMCB = 0x0AD0; +LEAPMCBL = 0x0AD0; +LEAPMCBH = 0x0AD2; + +LEAIFGSET = 0x0AF0; +LEAIFGSETL = 0x0AF0; +LEAIFGSETH = 0x0AF2; + +LEAIE = 0x0AF4; +LEAIEL = 0x0AF4; +LEAIEH = 0x0AF6; + +LEAIFG = 0x0AF8; +LEAIFGL = 0x0AF8; +LEAIFGH = 0x0AFA; + +LEAIV = 0x0AFC; +LEAIVL = 0x0AFC; +LEAIVH = 0x0AFE; + + + +/***************************************************************************** + MPU +*****************************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + MTIF +*****************************************************************************/ +MTIFPGCNF = 0x0F00; +MTIFPGCNF_L = 0x0F00; +MTIFPGCNF_H = 0x0F01; +MTIFPGKVAL = 0x0F02; +MTIFPGKVAL_L = 0x0F02; +MTIFPGKVAL_H = 0x0F03; +MTIFPGCTL = 0x0F04; +MTIFPGCTL_L = 0x0F04; +MTIFPGCTL_H = 0x0F05; +MTIFPGSR = 0x0F06; +MTIFPGSR_L = 0x0F06; +MTIFPGSR_H = 0x0F07; +MTIFPCCNF = 0x0F08; +MTIFPCCNF_L = 0x0F08; +MTIFPCCNF_H = 0x0F09; +MTIFPCR = 0x0F0A; +MTIFPCR_L = 0x0F0A; +MTIFPCR_H = 0x0F0B; +MTIFPCCTL = 0x0F0C; +MTIFPCCTL_L = 0x0F0C; +MTIFPCCTL_H = 0x0F0D; +MTIFPCSR = 0x0F0E; +MTIFPCSR_L = 0x0F0E; +MTIFPCSR_H = 0x0F0F; +MTIFTPCTL = 0x0F10; +MTIFTPCTL_L = 0x0F10; +MTIFTPCTL_H = 0x0F11; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RAMCTL +*****************************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +RCCTL1 = 0x015A; +RCCTL1_L = 0x015A; +RCCTL1_H = 0x015B; + + +/***************************************************************************** + REF_A +*****************************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; + + +/***************************************************************************** + RTC_C +*****************************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCIV_L = 0x04AE; +RTCIV_H = 0x04AF; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCCNT12 = 0x04B0; +RTCCNT12_L = 0x04B0; +RTCCNT12_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCCNT34 = 0x04B2; +RTCCNT34_L = 0x04B2; +RTCCNT34_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BIN2BCD_L = 0x04BC; +BIN2BCD_H = 0x04BD; +BCD2BIN = 0x04BE; +BCD2BIN_L = 0x04BE; +BCD2BIN_H = 0x04BF; +RT0PS = 0x04AC; + +RT1PS = 0x04AD; + +RTCCNT1 = 0x04B0; + +RTCCNT2 = 0x04B1; + +RTCCNT3 = 0x04B2; + +RTCCNT4 = 0x04B3; + + + +/***************************************************************************** + SAPH_A +*****************************************************************************/ +SAPH_AIIDX = 0x0E00; +SAPH_AIIDX_L = 0x0E00; +SAPH_AIIDX_H = 0x0E01; +SAPH_AMIS = 0x0E02; +SAPH_AMIS_L = 0x0E02; +SAPH_AMIS_H = 0x0E03; +SAPH_ARIS = 0x0E04; +SAPH_ARIS_L = 0x0E04; +SAPH_ARIS_H = 0x0E05; +SAPH_AIMSC = 0x0E06; +SAPH_AIMSC_L = 0x0E06; +SAPH_AIMSC_H = 0x0E07; +SAPH_AICR = 0x0E08; +SAPH_AICR_L = 0x0E08; +SAPH_AICR_H = 0x0E09; +SAPH_AISR = 0x0E0A; +SAPH_AISR_L = 0x0E0A; +SAPH_AISR_H = 0x0E0B; +SAPH_ADESCLO = 0x0E0C; +SAPH_ADESCLO_L = 0x0E0C; +SAPH_ADESCLO_H = 0x0E0D; +SAPH_ADESCHI = 0x0E0E; +SAPH_ADESCHI_L = 0x0E0E; +SAPH_ADESCHI_H = 0x0E0F; +SAPH_AKEY = 0x0E10; +SAPH_AKEY_L = 0x0E10; +SAPH_AKEY_H = 0x0E11; +SAPH_AOCTL0 = 0x0E12; +SAPH_AOCTL0_L = 0x0E12; +SAPH_AOCTL0_H = 0x0E13; +SAPH_AOCTL1 = 0x0E14; +SAPH_AOCTL1_L = 0x0E14; +SAPH_AOCTL1_H = 0x0E15; +SAPH_AOSEL = 0x0E16; +SAPH_AOSEL_L = 0x0E16; +SAPH_AOSEL_H = 0x0E17; +SAPH_ACH0PUT = 0x0E20; +SAPH_ACH0PUT_L = 0x0E20; +SAPH_ACH0PUT_H = 0x0E21; +SAPH_ACH0PDT = 0x0E22; +SAPH_ACH0PDT_L = 0x0E22; +SAPH_ACH0PDT_H = 0x0E23; +SAPH_ACH0TT = 0x0E24; +SAPH_ACH0TT_L = 0x0E24; +SAPH_ACH0TT_H = 0x0E25; +SAPH_ACH1PUT = 0x0E26; +SAPH_ACH1PUT_L = 0x0E26; +SAPH_ACH1PUT_H = 0x0E27; +SAPH_ACH1PDT = 0x0E28; +SAPH_ACH1PDT_L = 0x0E28; +SAPH_ACH1PDT_H = 0x0E29; +SAPH_ACH1TT = 0x0E2A; +SAPH_ACH1TT_L = 0x0E2A; +SAPH_ACH1TT_H = 0x0E2B; +SAPH_AMCNF = 0x0E2C; +SAPH_AMCNF_L = 0x0E2C; +SAPH_AMCNF_H = 0x0E2D; +SAPH_ATACTL = 0x0E2E; +SAPH_ATACTL_L = 0x0E2E; +SAPH_ATACTL_H = 0x0E2F; +SAPH_AICTL0 = 0x0E30; +SAPH_AICTL0_L = 0x0E30; +SAPH_AICTL0_H = 0x0E31; +SAPH_ABCTL = 0x0E34; +SAPH_ABCTL_L = 0x0E34; +SAPH_ABCTL_H = 0x0E35; +SAPH_APGC = 0x0E40; +SAPH_APGC_L = 0x0E40; +SAPH_APGC_H = 0x0E41; +SAPH_APGLPER = 0x0E42; +SAPH_APGLPER_L = 0x0E42; +SAPH_APGLPER_H = 0x0E43; +SAPH_APGHPER = 0x0E44; +SAPH_APGHPER_L = 0x0E44; +SAPH_APGHPER_H = 0x0E45; +SAPH_APGCTL = 0x0E46; +SAPH_APGCTL_L = 0x0E46; +SAPH_APGCTL_H = 0x0E47; +SAPH_APPGTRIG = 0x0E48; +SAPH_APPGTRIG_L = 0x0E48; +SAPH_APPGTRIG_H = 0x0E49; +SAPH_AXPGCTL = 0x0E4A; +SAPH_AXPGCTL_L = 0x0E4A; +SAPH_AXPGCTL_H = 0x0E4B; +SAPH_AXPGLPER = 0x0E4C; +SAPH_AXPGLPER_L = 0x0E4C; +SAPH_AXPGLPER_H = 0x0E4D; +SAPH_AXPGHPER = 0x0E4E; +SAPH_AXPGHPER_L = 0x0E4E; +SAPH_AXPGHPER_H = 0x0E4F; +SAPH_AASCTL0 = 0x0E60; +SAPH_AASCTL0_L = 0x0E60; +SAPH_AASCTL0_H = 0x0E61; +SAPH_AASCTL1 = 0x0E62; +SAPH_AASCTL1_L = 0x0E62; +SAPH_AASCTL1_H = 0x0E63; +SAPH_AASQTRIG = 0x0E64; + +SAPH_AAPOL = 0x0E66; +SAPH_AAPOL_L = 0x0E66; +SAPH_AAPOL_H = 0x0E67; +SAPH_AAPLEV = 0x0E68; +SAPH_AAPLEV_L = 0x0E68; +SAPH_AAPLEV_H = 0x0E69; +SAPH_AAPHIZ = 0x0E6A; +SAPH_AAPHIZ_L = 0x0E6A; +SAPH_AAPHIZ_H = 0x0E6B; +SAPH_AATM_A = 0x0E6E; +SAPH_AATM_A_L = 0x0E6E; +SAPH_AATM_A_H = 0x0E6F; +SAPH_AATM_B = 0x0E70; +SAPH_AATM_B_L = 0x0E70; +SAPH_AATM_B_H = 0x0E71; +SAPH_AATM_C = 0x0E72; +SAPH_AATM_C_L = 0x0E72; +SAPH_AATM_C_H = 0x0E73; +SAPH_AATM_D = 0x0E74; +SAPH_AATM_D_L = 0x0E74; +SAPH_AATM_D_H = 0x0E75; +SAPH_AATM_E = 0x0E76; +SAPH_AATM_E_L = 0x0E76; +SAPH_AATM_E_H = 0x0E77; +SAPH_AATM_F = 0x0E78; +SAPH_AATM_F_L = 0x0E78; +SAPH_AATM_F_H = 0x0E79; +SAPH_ATBCTL = 0x0E7A; +SAPH_ATBCTL_L = 0x0E7A; +SAPH_ATBCTL_H = 0x0E7B; +SAPH_AATIMLO = 0x0E7C; +SAPH_AATIMLO_L = 0x0E7C; +SAPH_AATIMLO_H = 0x0E7D; +SAPH_AATIMHI = 0x0E7E; +SAPH_AATIMHI_L = 0x0E7E; +SAPH_AATIMHI_H = 0x0E7F; + + +/***************************************************************************** + SDHS +*****************************************************************************/ +SDHSIIDX = 0x0E80; +SDHSIIDX_L = 0x0E80; +SDHSIIDX_H = 0x0E81; +SDHSMIS = 0x0E82; +SDHSMIS_L = 0x0E82; +SDHSMIS_H = 0x0E83; +SDHSRIS = 0x0E84; +SDHSRIS_L = 0x0E84; +SDHSRIS_H = 0x0E85; +SDHSIMSC = 0x0E86; +SDHSIMSC_L = 0x0E86; +SDHSIMSC_H = 0x0E87; +SDHSICR = 0x0E88; +SDHSICR_L = 0x0E88; +SDHSICR_H = 0x0E89; +SDHSISR = 0x0E8A; +SDHSISR_L = 0x0E8A; +SDHSISR_H = 0x0E8B; +SDHSDESCLO = 0x0E8C; +SDHSDESCLO_L = 0x0E8C; +SDHSDESCLO_H = 0x0E8D; +SDHSDESCHI = 0x0E8E; +SDHSDESCHI_L = 0x0E8E; +SDHSDESCHI_H = 0x0E8F; +SDHSCTL0 = 0x0E90; +SDHSCTL0_L = 0x0E90; +SDHSCTL0_H = 0x0E91; +SDHSCTL1 = 0x0E92; +SDHSCTL1_L = 0x0E92; +SDHSCTL1_H = 0x0E93; +SDHSCTL2 = 0x0E94; +SDHSCTL2_L = 0x0E94; +SDHSCTL2_H = 0x0E95; +SDHSCTL3 = 0x0E96; +SDHSCTL3_L = 0x0E96; +SDHSCTL3_H = 0x0E97; +SDHSCTL4 = 0x0E98; +SDHSCTL4_L = 0x0E98; +SDHSCTL4_H = 0x0E99; +SDHSCTL5 = 0x0E9A; +SDHSCTL5_L = 0x0E9A; +SDHSCTL5_H = 0x0E9B; +SDHSCTL6 = 0x0E9C; +SDHSCTL6_L = 0x0E9C; +SDHSCTL6_H = 0x0E9D; +SDHSCTL7 = 0x0E9E; +SDHSCTL7_L = 0x0E9E; +SDHSCTL7_H = 0x0E9F; +SDHSDT = 0x0EA2; +SDHSDT_L = 0x0EA2; +SDHSDT_H = 0x0EA3; +SDHSWINHITH = 0x0EA4; +SDHSWINHITH_L = 0x0EA4; +SDHSWINHITH_H = 0x0EA5; +SDHSWINLOTH = 0x0EA6; +SDHSWINLOTH_L = 0x0EA6; +SDHSWINLOTH_H = 0x0EA7; +SDHSDTCDA = 0x0EA8; +SDHSDTCDA_L = 0x0EA8; +SDHSDTCDA_H = 0x0EA9; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0340; +TA0CTL_L = 0x0340; +TA0CTL_H = 0x0341; +TA0CCTL0 = 0x0342; +TA0CCTL0_L = 0x0342; +TA0CCTL0_H = 0x0343; +TA0CCTL1 = 0x0344; +TA0CCTL1_L = 0x0344; +TA0CCTL1_H = 0x0345; +TA0CCTL2 = 0x0346; +TA0CCTL2_L = 0x0346; +TA0CCTL2_H = 0x0347; +TA0R = 0x0350; +TA0R_L = 0x0350; +TA0R_H = 0x0351; +TA0CCR0 = 0x0352; +TA0CCR0_L = 0x0352; +TA0CCR0_H = 0x0353; +TA0CCR1 = 0x0354; +TA0CCR1_L = 0x0354; +TA0CCR1_H = 0x0355; +TA0CCR2 = 0x0356; +TA0CCR2_L = 0x0356; +TA0CCR2_H = 0x0357; +TA0EX0 = 0x0360; +TA0EX0_L = 0x0360; +TA0EX0_H = 0x0361; +TA0IV = 0x036E; +TA0IV_L = 0x036E; +TA0IV_H = 0x036F; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x0380; +TA1CTL_L = 0x0380; +TA1CTL_H = 0x0381; +TA1CCTL0 = 0x0382; +TA1CCTL0_L = 0x0382; +TA1CCTL0_H = 0x0383; +TA1CCTL1 = 0x0384; +TA1CCTL1_L = 0x0384; +TA1CCTL1_H = 0x0385; +TA1CCTL2 = 0x0386; +TA1CCTL2_L = 0x0386; +TA1CCTL2_H = 0x0387; +TA1R = 0x0390; +TA1R_L = 0x0390; +TA1R_H = 0x0391; +TA1CCR0 = 0x0392; +TA1CCR0_L = 0x0392; +TA1CCR0_H = 0x0393; +TA1CCR1 = 0x0394; +TA1CCR1_L = 0x0394; +TA1CCR1_H = 0x0395; +TA1CCR2 = 0x0396; +TA1CCR2_L = 0x0396; +TA1CCR2_H = 0x0397; +TA1EX0 = 0x03A0; +TA1EX0_L = 0x03A0; +TA1EX0_H = 0x03A1; +TA1IV = 0x03AE; +TA1IV_L = 0x03AE; +TA1IV_H = 0x03AF; + + +/***************************************************************************** + TA2 +*****************************************************************************/ +TA2CTL = 0x0400; +TA2CTL_L = 0x0400; +TA2CTL_H = 0x0401; +TA2CCTL0 = 0x0402; +TA2CCTL0_L = 0x0402; +TA2CCTL0_H = 0x0403; +TA2CCTL1 = 0x0404; +TA2CCTL1_L = 0x0404; +TA2CCTL1_H = 0x0405; +TA2R = 0x0410; +TA2R_L = 0x0410; +TA2R_H = 0x0411; +TA2CCR0 = 0x0412; +TA2CCR0_L = 0x0412; +TA2CCR0_H = 0x0413; +TA2CCR1 = 0x0414; +TA2CCR1_L = 0x0414; +TA2CCR1_H = 0x0415; +TA2EX0 = 0x0420; +TA2EX0_L = 0x0420; +TA2EX0_H = 0x0421; +TA2IV = 0x042E; +TA2IV_L = 0x042E; +TA2IV_H = 0x042F; + + +/***************************************************************************** + TA3 +*****************************************************************************/ +TA3CTL = 0x0440; +TA3CTL_L = 0x0440; +TA3CTL_H = 0x0441; +TA3CCTL0 = 0x0442; +TA3CCTL0_L = 0x0442; +TA3CCTL0_H = 0x0443; +TA3CCTL1 = 0x0444; +TA3CCTL1_L = 0x0444; +TA3CCTL1_H = 0x0445; +TA3R = 0x0450; +TA3R_L = 0x0450; +TA3R_H = 0x0451; +TA3CCR0 = 0x0452; +TA3CCR0_L = 0x0452; +TA3CCR0_H = 0x0453; +TA3CCR1 = 0x0454; +TA3CCR1_L = 0x0454; +TA3CCR1_H = 0x0455; +TA3EX0 = 0x0460; +TA3EX0_L = 0x0460; +TA3EX0_H = 0x0461; +TA3IV = 0x046E; +TA3IV_L = 0x046E; +TA3IV_H = 0x046F; + + +/***************************************************************************** + TA4 +*****************************************************************************/ +TA4CTL = 0x07C0; +TA4CTL_L = 0x07C0; +TA4CTL_H = 0x07C1; +TA4CCTL0 = 0x07C2; +TA4CCTL0_L = 0x07C2; +TA4CCTL0_H = 0x07C3; +TA4CCTL1 = 0x07C4; +TA4CCTL1_L = 0x07C4; +TA4CCTL1_H = 0x07C5; +TA4R = 0x07D0; +TA4R_L = 0x07D0; +TA4R_H = 0x07D1; +TA4CCR0 = 0x07D2; +TA4CCR0_L = 0x07D2; +TA4CCR0_H = 0x07D3; +TA4CCR1 = 0x07D4; +TA4CCR1_L = 0x07D4; +TA4CCR1_H = 0x07D5; +TA4EX0 = 0x07E0; +TA4EX0_L = 0x07E0; +TA4EX0_H = 0x07E1; +TA4IV = 0x07EE; +TA4IV_L = 0x07EE; +TA4IV_H = 0x07EF; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x03C0; +TB0CTL_L = 0x03C0; +TB0CTL_H = 0x03C1; +TB0CCTL0 = 0x03C2; +TB0CCTL0_L = 0x03C2; +TB0CCTL0_H = 0x03C3; +TB0CCTL1 = 0x03C4; +TB0CCTL1_L = 0x03C4; +TB0CCTL1_H = 0x03C5; +TB0CCTL2 = 0x03C6; +TB0CCTL2_L = 0x03C6; +TB0CCTL2_H = 0x03C7; +TB0CCTL3 = 0x03C8; +TB0CCTL3_L = 0x03C8; +TB0CCTL3_H = 0x03C9; +TB0CCTL4 = 0x03CA; +TB0CCTL4_L = 0x03CA; +TB0CCTL4_H = 0x03CB; +TB0CCTL5 = 0x03CC; +TB0CCTL5_L = 0x03CC; +TB0CCTL5_H = 0x03CD; +TB0CCTL6 = 0x03CE; +TB0CCTL6_L = 0x03CE; +TB0CCTL6_H = 0x03CF; +TB0R = 0x03D0; +TB0R_L = 0x03D0; +TB0R_H = 0x03D1; +TB0CCR0 = 0x03D2; +TB0CCR0_L = 0x03D2; +TB0CCR0_H = 0x03D3; +TB0CCR1 = 0x03D4; +TB0CCR1_L = 0x03D4; +TB0CCR1_H = 0x03D5; +TB0CCR2 = 0x03D6; +TB0CCR2_L = 0x03D6; +TB0CCR2_H = 0x03D7; +TB0CCR3 = 0x03D8; +TB0CCR3_L = 0x03D8; +TB0CCR3_H = 0x03D9; +TB0CCR4 = 0x03DA; +TB0CCR4_L = 0x03DA; +TB0CCR4_H = 0x03DB; +TB0CCR5 = 0x03DC; +TB0CCR5_L = 0x03DC; +TB0CCR5_H = 0x03DD; +TB0CCR6 = 0x03DE; +TB0CCR6_L = 0x03DE; +TB0CCR6_H = 0x03DF; +TB0EX0 = 0x03E0; +TB0EX0_L = 0x03E0; +TB0EX0_H = 0x03E1; +TB0IV = 0x03EE; +TB0IV_L = 0x03EE; +TB0IV_H = 0x03EF; + + +/***************************************************************************** + UUPS +*****************************************************************************/ +UUPSIIDX = 0x0EC0; +UUPSIIDX_L = 0x0EC0; +UUPSIIDX_H = 0x0EC1; +UUPSMIS = 0x0EC2; +UUPSMIS_L = 0x0EC2; +UUPSMIS_H = 0x0EC3; +UUPSRIS = 0x0EC4; +UUPSRIS_L = 0x0EC4; +UUPSRIS_H = 0x0EC5; +UUPSIMSC = 0x0EC6; +UUPSIMSC_L = 0x0EC6; +UUPSIMSC_H = 0x0EC7; +UUPSICR = 0x0EC8; +UUPSICR_L = 0x0EC8; +UUPSICR_H = 0x0EC9; +UUPSISR = 0x0ECA; +UUPSISR_L = 0x0ECA; +UUPSISR_H = 0x0ECB; +UUPSDESCLO = 0x0ECC; +UUPSDESCLO_L = 0x0ECC; +UUPSDESCLO_H = 0x0ECD; +UUPSDESCHI = 0x0ECE; +UUPSDESCHI_L = 0x0ECE; +UUPSDESCHI_H = 0x0ECF; +UUPSCTL = 0x0ED0; +UUPSCTL_L = 0x0ED0; +UUPSCTL_H = 0x0ED1; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0STATW_L = 0x05CA; +UCA0STATW_H = 0x05CB; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0ABCTL_L = 0x05D0; +UCA0ABCTL_H = 0x05D1; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +UCA0IV_L = 0x05DE; +UCA0IV_H = 0x05DF; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1STATW_L = 0x05EA; +UCA1STATW_H = 0x05EB; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1ABCTL_L = 0x05F0; +UCA1ABCTL_H = 0x05F1; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +UCA1IV_L = 0x05FE; +UCA1IV_H = 0x05FF; + + +/***************************************************************************** + eUSCI_A2 +*****************************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2STATW_L = 0x060A; +UCA2STATW_H = 0x060B; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2ABCTL_L = 0x0610; +UCA2ABCTL_H = 0x0611; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +UCA2IV_L = 0x061E; +UCA2IV_H = 0x061F; + + +/***************************************************************************** + eUSCI_A3 +*****************************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3STATW_L = 0x062A; +UCA3STATW_H = 0x062B; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3ABCTL_L = 0x0630; +UCA3ABCTL_H = 0x0631; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +UCA3IV_L = 0x063E; +UCA3IV_H = 0x063F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +UCB0IV_L = 0x066E; +UCB0IV_H = 0x066F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +UCB1IV_L = 0x06AE; +UCB1IV_H = 0x06AF; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr5720.cmd b/msp430/msp430fr5720.cmd new file mode 100644 index 00000000..d53fd99a --- /dev/null +++ b/msp430/msp430fr5720.cmd @@ -0,0 +1,576 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5720.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_B +************************************************************/ +ADC10CTL0 = 0x0700; +ADC10CTL0_L = 0x0700; +ADC10CTL0_H = 0x0701; +ADC10CTL1 = 0x0702; +ADC10CTL1_L = 0x0702; +ADC10CTL1_H = 0x0703; +ADC10CTL2 = 0x0704; +ADC10CTL2_L = 0x0704; +ADC10CTL2_H = 0x0705; +ADC10LO = 0x0706; +ADC10LO_L = 0x0706; +ADC10LO_H = 0x0707; +ADC10HI = 0x0708; +ADC10HI_L = 0x0708; +ADC10HI_H = 0x0709; +ADC10MCTL0 = 0x070A; +ADC10MCTL0_L = 0x070A; +ADC10MCTL0_H = 0x070B; +ADC10MEM0 = 0x0712; +ADC10MEM0_L = 0x0712; +ADC10MEM0_H = 0x0713; +ADC10IE = 0x071A; +ADC10IE_L = 0x071A; +ADC10IE_H = 0x071B; +ADC10IFG = 0x071C; +ADC10IFG_L = 0x071C; +ADC10IFG_H = 0x071D; +ADC10IV = 0x071E; +ADC10IV_L = 0x071E; +ADC10IV_H = 0x071F; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* Comparator D +************************************************************/ +CDCTL0 = 0x08C0; +CDCTL0_L = 0x08C0; +CDCTL0_H = 0x08C1; +CDCTL1 = 0x08C2; +CDCTL1_L = 0x08C2; +CDCTL1_H = 0x08C3; +CDCTL2 = 0x08C4; +CDCTL2_L = 0x08C4; +CDCTL2_H = 0x08C5; +CDCTL3 = 0x08C6; +CDCTL3_L = 0x08C6; +CDCTL3_H = 0x08C7; +CDINT = 0x08CC; +CDINT_L = 0x08CC; +CDINT_H = 0x08CD; +CDIV = 0x08CE; +CDIV_L = 0x08CE; +CDIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEG = 0x05A4; +MPUSEG_L = 0x05A4; +MPUSEG_H = 0x05A5; +MPUSAM = 0x05A6; +MPUSAM_L = 0x05A6; +MPUSAM_H = 0x05A7; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B3 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5721.cmd b/msp430/msp430fr5721.cmd new file mode 100644 index 00000000..20bd1d86 --- /dev/null +++ b/msp430/msp430fr5721.cmd @@ -0,0 +1,670 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5721.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_B +************************************************************/ +ADC10CTL0 = 0x0700; +ADC10CTL0_L = 0x0700; +ADC10CTL0_H = 0x0701; +ADC10CTL1 = 0x0702; +ADC10CTL1_L = 0x0702; +ADC10CTL1_H = 0x0703; +ADC10CTL2 = 0x0704; +ADC10CTL2_L = 0x0704; +ADC10CTL2_H = 0x0705; +ADC10LO = 0x0706; +ADC10LO_L = 0x0706; +ADC10LO_H = 0x0707; +ADC10HI = 0x0708; +ADC10HI_L = 0x0708; +ADC10HI_H = 0x0709; +ADC10MCTL0 = 0x070A; +ADC10MCTL0_L = 0x070A; +ADC10MCTL0_H = 0x070B; +ADC10MEM0 = 0x0712; +ADC10MEM0_L = 0x0712; +ADC10MEM0_H = 0x0713; +ADC10IE = 0x071A; +ADC10IE_L = 0x071A; +ADC10IE_H = 0x071B; +ADC10IFG = 0x071C; +ADC10IFG_L = 0x071C; +ADC10IFG_H = 0x071D; +ADC10IV = 0x071E; +ADC10IV_L = 0x071E; +ADC10IV_H = 0x071F; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* Comparator D +************************************************************/ +CDCTL0 = 0x08C0; +CDCTL0_L = 0x08C0; +CDCTL0_H = 0x08C1; +CDCTL1 = 0x08C2; +CDCTL1_L = 0x08C2; +CDCTL1_H = 0x08C3; +CDCTL2 = 0x08C4; +CDCTL2_L = 0x08C4; +CDCTL2_H = 0x08C5; +CDCTL3 = 0x08C6; +CDCTL3_L = 0x08C6; +CDCTL3_H = 0x08C7; +CDINT = 0x08CC; +CDINT_L = 0x08CC; +CDINT_H = 0x08CD; +CDIV = 0x08CE; +CDIV_L = 0x08CE; +CDIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEG = 0x05A4; +MPUSEG_L = 0x05A4; +MPUSEG_H = 0x05A5; +MPUSAM = 0x05A6; +MPUSAM_L = 0x05A6; +MPUSAM_H = 0x05A7; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B3 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* Timer1_B3 +************************************************************/ +TB1CTL = 0x0400; +TB1CCTL0 = 0x0402; +TB1CCTL1 = 0x0404; +TB1CCTL2 = 0x0406; +TB1R = 0x0410; +TB1CCR0 = 0x0412; +TB1CCR1 = 0x0414; +TB1CCR2 = 0x0416; +TB1IV = 0x042E; +TB1EX0 = 0x0420; +/************************************************************ +* Timer2_B3 +************************************************************/ +TB2CTL = 0x0440; +TB2CCTL0 = 0x0442; +TB2CCTL1 = 0x0444; +TB2CCTL2 = 0x0446; +TB2R = 0x0450; +TB2CCR0 = 0x0452; +TB2CCR1 = 0x0454; +TB2CCR2 = 0x0456; +TB2IV = 0x046E; +TB2EX0 = 0x0460; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5722.cmd b/msp430/msp430fr5722.cmd new file mode 100644 index 00000000..3a88c934 --- /dev/null +++ b/msp430/msp430fr5722.cmd @@ -0,0 +1,543 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5722.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* Comparator D +************************************************************/ +CDCTL0 = 0x08C0; +CDCTL0_L = 0x08C0; +CDCTL0_H = 0x08C1; +CDCTL1 = 0x08C2; +CDCTL1_L = 0x08C2; +CDCTL1_H = 0x08C3; +CDCTL2 = 0x08C4; +CDCTL2_L = 0x08C4; +CDCTL2_H = 0x08C5; +CDCTL3 = 0x08C6; +CDCTL3_L = 0x08C6; +CDCTL3_H = 0x08C7; +CDINT = 0x08CC; +CDINT_L = 0x08CC; +CDINT_H = 0x08CD; +CDIV = 0x08CE; +CDIV_L = 0x08CE; +CDIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEG = 0x05A4; +MPUSEG_L = 0x05A4; +MPUSEG_H = 0x05A5; +MPUSAM = 0x05A6; +MPUSAM_L = 0x05A6; +MPUSAM_H = 0x05A7; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B3 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5723.cmd b/msp430/msp430fr5723.cmd new file mode 100644 index 00000000..912963de --- /dev/null +++ b/msp430/msp430fr5723.cmd @@ -0,0 +1,637 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5723.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* Comparator D +************************************************************/ +CDCTL0 = 0x08C0; +CDCTL0_L = 0x08C0; +CDCTL0_H = 0x08C1; +CDCTL1 = 0x08C2; +CDCTL1_L = 0x08C2; +CDCTL1_H = 0x08C3; +CDCTL2 = 0x08C4; +CDCTL2_L = 0x08C4; +CDCTL2_H = 0x08C5; +CDCTL3 = 0x08C6; +CDCTL3_L = 0x08C6; +CDCTL3_H = 0x08C7; +CDINT = 0x08CC; +CDINT_L = 0x08CC; +CDINT_H = 0x08CD; +CDIV = 0x08CE; +CDIV_L = 0x08CE; +CDIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEG = 0x05A4; +MPUSEG_L = 0x05A4; +MPUSEG_H = 0x05A5; +MPUSAM = 0x05A6; +MPUSAM_L = 0x05A6; +MPUSAM_H = 0x05A7; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B3 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* Timer1_B3 +************************************************************/ +TB1CTL = 0x0400; +TB1CCTL0 = 0x0402; +TB1CCTL1 = 0x0404; +TB1CCTL2 = 0x0406; +TB1R = 0x0410; +TB1CCR0 = 0x0412; +TB1CCR1 = 0x0414; +TB1CCR2 = 0x0416; +TB1IV = 0x042E; +TB1EX0 = 0x0420; +/************************************************************ +* Timer2_B3 +************************************************************/ +TB2CTL = 0x0440; +TB2CCTL0 = 0x0442; +TB2CCTL1 = 0x0444; +TB2CCTL2 = 0x0446; +TB2R = 0x0450; +TB2CCR0 = 0x0452; +TB2CCR1 = 0x0454; +TB2CCR2 = 0x0456; +TB2IV = 0x046E; +TB2EX0 = 0x0460; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5724.cmd b/msp430/msp430fr5724.cmd new file mode 100644 index 00000000..9492590a --- /dev/null +++ b/msp430/msp430fr5724.cmd @@ -0,0 +1,576 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5724.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_B +************************************************************/ +ADC10CTL0 = 0x0700; +ADC10CTL0_L = 0x0700; +ADC10CTL0_H = 0x0701; +ADC10CTL1 = 0x0702; +ADC10CTL1_L = 0x0702; +ADC10CTL1_H = 0x0703; +ADC10CTL2 = 0x0704; +ADC10CTL2_L = 0x0704; +ADC10CTL2_H = 0x0705; +ADC10LO = 0x0706; +ADC10LO_L = 0x0706; +ADC10LO_H = 0x0707; +ADC10HI = 0x0708; +ADC10HI_L = 0x0708; +ADC10HI_H = 0x0709; +ADC10MCTL0 = 0x070A; +ADC10MCTL0_L = 0x070A; +ADC10MCTL0_H = 0x070B; +ADC10MEM0 = 0x0712; +ADC10MEM0_L = 0x0712; +ADC10MEM0_H = 0x0713; +ADC10IE = 0x071A; +ADC10IE_L = 0x071A; +ADC10IE_H = 0x071B; +ADC10IFG = 0x071C; +ADC10IFG_L = 0x071C; +ADC10IFG_H = 0x071D; +ADC10IV = 0x071E; +ADC10IV_L = 0x071E; +ADC10IV_H = 0x071F; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* Comparator D +************************************************************/ +CDCTL0 = 0x08C0; +CDCTL0_L = 0x08C0; +CDCTL0_H = 0x08C1; +CDCTL1 = 0x08C2; +CDCTL1_L = 0x08C2; +CDCTL1_H = 0x08C3; +CDCTL2 = 0x08C4; +CDCTL2_L = 0x08C4; +CDCTL2_H = 0x08C5; +CDCTL3 = 0x08C6; +CDCTL3_L = 0x08C6; +CDCTL3_H = 0x08C7; +CDINT = 0x08CC; +CDINT_L = 0x08CC; +CDINT_H = 0x08CD; +CDIV = 0x08CE; +CDIV_L = 0x08CE; +CDIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEG = 0x05A4; +MPUSEG_L = 0x05A4; +MPUSEG_H = 0x05A5; +MPUSAM = 0x05A6; +MPUSAM_L = 0x05A6; +MPUSAM_H = 0x05A7; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B3 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5725.cmd b/msp430/msp430fr5725.cmd new file mode 100644 index 00000000..f7c1c5a3 --- /dev/null +++ b/msp430/msp430fr5725.cmd @@ -0,0 +1,670 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5725.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_B +************************************************************/ +ADC10CTL0 = 0x0700; +ADC10CTL0_L = 0x0700; +ADC10CTL0_H = 0x0701; +ADC10CTL1 = 0x0702; +ADC10CTL1_L = 0x0702; +ADC10CTL1_H = 0x0703; +ADC10CTL2 = 0x0704; +ADC10CTL2_L = 0x0704; +ADC10CTL2_H = 0x0705; +ADC10LO = 0x0706; +ADC10LO_L = 0x0706; +ADC10LO_H = 0x0707; +ADC10HI = 0x0708; +ADC10HI_L = 0x0708; +ADC10HI_H = 0x0709; +ADC10MCTL0 = 0x070A; +ADC10MCTL0_L = 0x070A; +ADC10MCTL0_H = 0x070B; +ADC10MEM0 = 0x0712; +ADC10MEM0_L = 0x0712; +ADC10MEM0_H = 0x0713; +ADC10IE = 0x071A; +ADC10IE_L = 0x071A; +ADC10IE_H = 0x071B; +ADC10IFG = 0x071C; +ADC10IFG_L = 0x071C; +ADC10IFG_H = 0x071D; +ADC10IV = 0x071E; +ADC10IV_L = 0x071E; +ADC10IV_H = 0x071F; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* Comparator D +************************************************************/ +CDCTL0 = 0x08C0; +CDCTL0_L = 0x08C0; +CDCTL0_H = 0x08C1; +CDCTL1 = 0x08C2; +CDCTL1_L = 0x08C2; +CDCTL1_H = 0x08C3; +CDCTL2 = 0x08C4; +CDCTL2_L = 0x08C4; +CDCTL2_H = 0x08C5; +CDCTL3 = 0x08C6; +CDCTL3_L = 0x08C6; +CDCTL3_H = 0x08C7; +CDINT = 0x08CC; +CDINT_L = 0x08CC; +CDINT_H = 0x08CD; +CDIV = 0x08CE; +CDIV_L = 0x08CE; +CDIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEG = 0x05A4; +MPUSEG_L = 0x05A4; +MPUSEG_H = 0x05A5; +MPUSAM = 0x05A6; +MPUSAM_L = 0x05A6; +MPUSAM_H = 0x05A7; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B3 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* Timer1_B3 +************************************************************/ +TB1CTL = 0x0400; +TB1CCTL0 = 0x0402; +TB1CCTL1 = 0x0404; +TB1CCTL2 = 0x0406; +TB1R = 0x0410; +TB1CCR0 = 0x0412; +TB1CCR1 = 0x0414; +TB1CCR2 = 0x0416; +TB1IV = 0x042E; +TB1EX0 = 0x0420; +/************************************************************ +* Timer2_B3 +************************************************************/ +TB2CTL = 0x0440; +TB2CCTL0 = 0x0442; +TB2CCTL1 = 0x0444; +TB2CCTL2 = 0x0446; +TB2R = 0x0450; +TB2CCR0 = 0x0452; +TB2CCR1 = 0x0454; +TB2CCR2 = 0x0456; +TB2IV = 0x046E; +TB2EX0 = 0x0460; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5726.cmd b/msp430/msp430fr5726.cmd new file mode 100644 index 00000000..b97bfb4c --- /dev/null +++ b/msp430/msp430fr5726.cmd @@ -0,0 +1,543 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5726.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* Comparator D +************************************************************/ +CDCTL0 = 0x08C0; +CDCTL0_L = 0x08C0; +CDCTL0_H = 0x08C1; +CDCTL1 = 0x08C2; +CDCTL1_L = 0x08C2; +CDCTL1_H = 0x08C3; +CDCTL2 = 0x08C4; +CDCTL2_L = 0x08C4; +CDCTL2_H = 0x08C5; +CDCTL3 = 0x08C6; +CDCTL3_L = 0x08C6; +CDCTL3_H = 0x08C7; +CDINT = 0x08CC; +CDINT_L = 0x08CC; +CDINT_H = 0x08CD; +CDIV = 0x08CE; +CDIV_L = 0x08CE; +CDIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEG = 0x05A4; +MPUSEG_L = 0x05A4; +MPUSEG_H = 0x05A5; +MPUSAM = 0x05A6; +MPUSAM_L = 0x05A6; +MPUSAM_H = 0x05A7; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B3 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5727.cmd b/msp430/msp430fr5727.cmd new file mode 100644 index 00000000..2f2a5fbf --- /dev/null +++ b/msp430/msp430fr5727.cmd @@ -0,0 +1,637 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5727.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* Comparator D +************************************************************/ +CDCTL0 = 0x08C0; +CDCTL0_L = 0x08C0; +CDCTL0_H = 0x08C1; +CDCTL1 = 0x08C2; +CDCTL1_L = 0x08C2; +CDCTL1_H = 0x08C3; +CDCTL2 = 0x08C4; +CDCTL2_L = 0x08C4; +CDCTL2_H = 0x08C5; +CDCTL3 = 0x08C6; +CDCTL3_L = 0x08C6; +CDCTL3_H = 0x08C7; +CDINT = 0x08CC; +CDINT_L = 0x08CC; +CDINT_H = 0x08CD; +CDIV = 0x08CE; +CDIV_L = 0x08CE; +CDIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEG = 0x05A4; +MPUSEG_L = 0x05A4; +MPUSEG_H = 0x05A5; +MPUSAM = 0x05A6; +MPUSAM_L = 0x05A6; +MPUSAM_H = 0x05A7; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B3 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* Timer1_B3 +************************************************************/ +TB1CTL = 0x0400; +TB1CCTL0 = 0x0402; +TB1CCTL1 = 0x0404; +TB1CCTL2 = 0x0406; +TB1R = 0x0410; +TB1CCR0 = 0x0412; +TB1CCR1 = 0x0414; +TB1CCR2 = 0x0416; +TB1IV = 0x042E; +TB1EX0 = 0x0420; +/************************************************************ +* Timer2_B3 +************************************************************/ +TB2CTL = 0x0440; +TB2CCTL0 = 0x0442; +TB2CCTL1 = 0x0444; +TB2CCTL2 = 0x0446; +TB2R = 0x0450; +TB2CCR0 = 0x0452; +TB2CCR1 = 0x0454; +TB2CCR2 = 0x0456; +TB2IV = 0x046E; +TB2EX0 = 0x0460; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5728.cmd b/msp430/msp430fr5728.cmd new file mode 100644 index 00000000..5803393d --- /dev/null +++ b/msp430/msp430fr5728.cmd @@ -0,0 +1,576 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5728.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_B +************************************************************/ +ADC10CTL0 = 0x0700; +ADC10CTL0_L = 0x0700; +ADC10CTL0_H = 0x0701; +ADC10CTL1 = 0x0702; +ADC10CTL1_L = 0x0702; +ADC10CTL1_H = 0x0703; +ADC10CTL2 = 0x0704; +ADC10CTL2_L = 0x0704; +ADC10CTL2_H = 0x0705; +ADC10LO = 0x0706; +ADC10LO_L = 0x0706; +ADC10LO_H = 0x0707; +ADC10HI = 0x0708; +ADC10HI_L = 0x0708; +ADC10HI_H = 0x0709; +ADC10MCTL0 = 0x070A; +ADC10MCTL0_L = 0x070A; +ADC10MCTL0_H = 0x070B; +ADC10MEM0 = 0x0712; +ADC10MEM0_L = 0x0712; +ADC10MEM0_H = 0x0713; +ADC10IE = 0x071A; +ADC10IE_L = 0x071A; +ADC10IE_H = 0x071B; +ADC10IFG = 0x071C; +ADC10IFG_L = 0x071C; +ADC10IFG_H = 0x071D; +ADC10IV = 0x071E; +ADC10IV_L = 0x071E; +ADC10IV_H = 0x071F; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* Comparator D +************************************************************/ +CDCTL0 = 0x08C0; +CDCTL0_L = 0x08C0; +CDCTL0_H = 0x08C1; +CDCTL1 = 0x08C2; +CDCTL1_L = 0x08C2; +CDCTL1_H = 0x08C3; +CDCTL2 = 0x08C4; +CDCTL2_L = 0x08C4; +CDCTL2_H = 0x08C5; +CDCTL3 = 0x08C6; +CDCTL3_L = 0x08C6; +CDCTL3_H = 0x08C7; +CDINT = 0x08CC; +CDINT_L = 0x08CC; +CDINT_H = 0x08CD; +CDIV = 0x08CE; +CDIV_L = 0x08CE; +CDIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEG = 0x05A4; +MPUSEG_L = 0x05A4; +MPUSEG_H = 0x05A5; +MPUSAM = 0x05A6; +MPUSAM_L = 0x05A6; +MPUSAM_H = 0x05A7; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B3 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5729.cmd b/msp430/msp430fr5729.cmd new file mode 100644 index 00000000..a2b46e08 --- /dev/null +++ b/msp430/msp430fr5729.cmd @@ -0,0 +1,670 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5729.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_B +************************************************************/ +ADC10CTL0 = 0x0700; +ADC10CTL0_L = 0x0700; +ADC10CTL0_H = 0x0701; +ADC10CTL1 = 0x0702; +ADC10CTL1_L = 0x0702; +ADC10CTL1_H = 0x0703; +ADC10CTL2 = 0x0704; +ADC10CTL2_L = 0x0704; +ADC10CTL2_H = 0x0705; +ADC10LO = 0x0706; +ADC10LO_L = 0x0706; +ADC10LO_H = 0x0707; +ADC10HI = 0x0708; +ADC10HI_L = 0x0708; +ADC10HI_H = 0x0709; +ADC10MCTL0 = 0x070A; +ADC10MCTL0_L = 0x070A; +ADC10MCTL0_H = 0x070B; +ADC10MEM0 = 0x0712; +ADC10MEM0_L = 0x0712; +ADC10MEM0_H = 0x0713; +ADC10IE = 0x071A; +ADC10IE_L = 0x071A; +ADC10IE_H = 0x071B; +ADC10IFG = 0x071C; +ADC10IFG_L = 0x071C; +ADC10IFG_H = 0x071D; +ADC10IV = 0x071E; +ADC10IV_L = 0x071E; +ADC10IV_H = 0x071F; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* Comparator D +************************************************************/ +CDCTL0 = 0x08C0; +CDCTL0_L = 0x08C0; +CDCTL0_H = 0x08C1; +CDCTL1 = 0x08C2; +CDCTL1_L = 0x08C2; +CDCTL1_H = 0x08C3; +CDCTL2 = 0x08C4; +CDCTL2_L = 0x08C4; +CDCTL2_H = 0x08C5; +CDCTL3 = 0x08C6; +CDCTL3_L = 0x08C6; +CDCTL3_H = 0x08C7; +CDINT = 0x08CC; +CDINT_L = 0x08CC; +CDINT_H = 0x08CD; +CDIV = 0x08CE; +CDIV_L = 0x08CE; +CDIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEG = 0x05A4; +MPUSEG_L = 0x05A4; +MPUSEG_H = 0x05A5; +MPUSAM = 0x05A6; +MPUSAM_L = 0x05A6; +MPUSAM_H = 0x05A7; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B3 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* Timer1_B3 +************************************************************/ +TB1CTL = 0x0400; +TB1CCTL0 = 0x0402; +TB1CCTL1 = 0x0404; +TB1CCTL2 = 0x0406; +TB1R = 0x0410; +TB1CCR0 = 0x0412; +TB1CCR1 = 0x0414; +TB1CCR2 = 0x0416; +TB1IV = 0x042E; +TB1EX0 = 0x0420; +/************************************************************ +* Timer2_B3 +************************************************************/ +TB2CTL = 0x0440; +TB2CCTL0 = 0x0442; +TB2CCTL1 = 0x0444; +TB2CCTL2 = 0x0446; +TB2R = 0x0450; +TB2CCR0 = 0x0452; +TB2CCR1 = 0x0454; +TB2CCR2 = 0x0456; +TB2IV = 0x046E; +TB2EX0 = 0x0460; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5730.cmd b/msp430/msp430fr5730.cmd new file mode 100644 index 00000000..7f096efa --- /dev/null +++ b/msp430/msp430fr5730.cmd @@ -0,0 +1,576 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5730.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_B +************************************************************/ +ADC10CTL0 = 0x0700; +ADC10CTL0_L = 0x0700; +ADC10CTL0_H = 0x0701; +ADC10CTL1 = 0x0702; +ADC10CTL1_L = 0x0702; +ADC10CTL1_H = 0x0703; +ADC10CTL2 = 0x0704; +ADC10CTL2_L = 0x0704; +ADC10CTL2_H = 0x0705; +ADC10LO = 0x0706; +ADC10LO_L = 0x0706; +ADC10LO_H = 0x0707; +ADC10HI = 0x0708; +ADC10HI_L = 0x0708; +ADC10HI_H = 0x0709; +ADC10MCTL0 = 0x070A; +ADC10MCTL0_L = 0x070A; +ADC10MCTL0_H = 0x070B; +ADC10MEM0 = 0x0712; +ADC10MEM0_L = 0x0712; +ADC10MEM0_H = 0x0713; +ADC10IE = 0x071A; +ADC10IE_L = 0x071A; +ADC10IE_H = 0x071B; +ADC10IFG = 0x071C; +ADC10IFG_L = 0x071C; +ADC10IFG_H = 0x071D; +ADC10IV = 0x071E; +ADC10IV_L = 0x071E; +ADC10IV_H = 0x071F; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* Comparator D +************************************************************/ +CDCTL0 = 0x08C0; +CDCTL0_L = 0x08C0; +CDCTL0_H = 0x08C1; +CDCTL1 = 0x08C2; +CDCTL1_L = 0x08C2; +CDCTL1_H = 0x08C3; +CDCTL2 = 0x08C4; +CDCTL2_L = 0x08C4; +CDCTL2_H = 0x08C5; +CDCTL3 = 0x08C6; +CDCTL3_L = 0x08C6; +CDCTL3_H = 0x08C7; +CDINT = 0x08CC; +CDINT_L = 0x08CC; +CDINT_H = 0x08CD; +CDIV = 0x08CE; +CDIV_L = 0x08CE; +CDIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEG = 0x05A4; +MPUSEG_L = 0x05A4; +MPUSEG_H = 0x05A5; +MPUSAM = 0x05A6; +MPUSAM_L = 0x05A6; +MPUSAM_H = 0x05A7; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B3 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5731.cmd b/msp430/msp430fr5731.cmd new file mode 100644 index 00000000..9028fb8e --- /dev/null +++ b/msp430/msp430fr5731.cmd @@ -0,0 +1,670 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5731.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_B +************************************************************/ +ADC10CTL0 = 0x0700; +ADC10CTL0_L = 0x0700; +ADC10CTL0_H = 0x0701; +ADC10CTL1 = 0x0702; +ADC10CTL1_L = 0x0702; +ADC10CTL1_H = 0x0703; +ADC10CTL2 = 0x0704; +ADC10CTL2_L = 0x0704; +ADC10CTL2_H = 0x0705; +ADC10LO = 0x0706; +ADC10LO_L = 0x0706; +ADC10LO_H = 0x0707; +ADC10HI = 0x0708; +ADC10HI_L = 0x0708; +ADC10HI_H = 0x0709; +ADC10MCTL0 = 0x070A; +ADC10MCTL0_L = 0x070A; +ADC10MCTL0_H = 0x070B; +ADC10MEM0 = 0x0712; +ADC10MEM0_L = 0x0712; +ADC10MEM0_H = 0x0713; +ADC10IE = 0x071A; +ADC10IE_L = 0x071A; +ADC10IE_H = 0x071B; +ADC10IFG = 0x071C; +ADC10IFG_L = 0x071C; +ADC10IFG_H = 0x071D; +ADC10IV = 0x071E; +ADC10IV_L = 0x071E; +ADC10IV_H = 0x071F; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* Comparator D +************************************************************/ +CDCTL0 = 0x08C0; +CDCTL0_L = 0x08C0; +CDCTL0_H = 0x08C1; +CDCTL1 = 0x08C2; +CDCTL1_L = 0x08C2; +CDCTL1_H = 0x08C3; +CDCTL2 = 0x08C4; +CDCTL2_L = 0x08C4; +CDCTL2_H = 0x08C5; +CDCTL3 = 0x08C6; +CDCTL3_L = 0x08C6; +CDCTL3_H = 0x08C7; +CDINT = 0x08CC; +CDINT_L = 0x08CC; +CDINT_H = 0x08CD; +CDIV = 0x08CE; +CDIV_L = 0x08CE; +CDIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEG = 0x05A4; +MPUSEG_L = 0x05A4; +MPUSEG_H = 0x05A5; +MPUSAM = 0x05A6; +MPUSAM_L = 0x05A6; +MPUSAM_H = 0x05A7; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B3 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* Timer1_B3 +************************************************************/ +TB1CTL = 0x0400; +TB1CCTL0 = 0x0402; +TB1CCTL1 = 0x0404; +TB1CCTL2 = 0x0406; +TB1R = 0x0410; +TB1CCR0 = 0x0412; +TB1CCR1 = 0x0414; +TB1CCR2 = 0x0416; +TB1IV = 0x042E; +TB1EX0 = 0x0420; +/************************************************************ +* Timer2_B3 +************************************************************/ +TB2CTL = 0x0440; +TB2CCTL0 = 0x0442; +TB2CCTL1 = 0x0444; +TB2CCTL2 = 0x0446; +TB2R = 0x0450; +TB2CCR0 = 0x0452; +TB2CCR1 = 0x0454; +TB2CCR2 = 0x0456; +TB2IV = 0x046E; +TB2EX0 = 0x0460; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5732.cmd b/msp430/msp430fr5732.cmd new file mode 100644 index 00000000..9a8ce4a4 --- /dev/null +++ b/msp430/msp430fr5732.cmd @@ -0,0 +1,543 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5732.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* Comparator D +************************************************************/ +CDCTL0 = 0x08C0; +CDCTL0_L = 0x08C0; +CDCTL0_H = 0x08C1; +CDCTL1 = 0x08C2; +CDCTL1_L = 0x08C2; +CDCTL1_H = 0x08C3; +CDCTL2 = 0x08C4; +CDCTL2_L = 0x08C4; +CDCTL2_H = 0x08C5; +CDCTL3 = 0x08C6; +CDCTL3_L = 0x08C6; +CDCTL3_H = 0x08C7; +CDINT = 0x08CC; +CDINT_L = 0x08CC; +CDINT_H = 0x08CD; +CDIV = 0x08CE; +CDIV_L = 0x08CE; +CDIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEG = 0x05A4; +MPUSEG_L = 0x05A4; +MPUSEG_H = 0x05A5; +MPUSAM = 0x05A6; +MPUSAM_L = 0x05A6; +MPUSAM_H = 0x05A7; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B3 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5733.cmd b/msp430/msp430fr5733.cmd new file mode 100644 index 00000000..a1779264 --- /dev/null +++ b/msp430/msp430fr5733.cmd @@ -0,0 +1,637 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5733.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* Comparator D +************************************************************/ +CDCTL0 = 0x08C0; +CDCTL0_L = 0x08C0; +CDCTL0_H = 0x08C1; +CDCTL1 = 0x08C2; +CDCTL1_L = 0x08C2; +CDCTL1_H = 0x08C3; +CDCTL2 = 0x08C4; +CDCTL2_L = 0x08C4; +CDCTL2_H = 0x08C5; +CDCTL3 = 0x08C6; +CDCTL3_L = 0x08C6; +CDCTL3_H = 0x08C7; +CDINT = 0x08CC; +CDINT_L = 0x08CC; +CDINT_H = 0x08CD; +CDIV = 0x08CE; +CDIV_L = 0x08CE; +CDIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEG = 0x05A4; +MPUSEG_L = 0x05A4; +MPUSEG_H = 0x05A5; +MPUSAM = 0x05A6; +MPUSAM_L = 0x05A6; +MPUSAM_H = 0x05A7; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B3 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* Timer1_B3 +************************************************************/ +TB1CTL = 0x0400; +TB1CCTL0 = 0x0402; +TB1CCTL1 = 0x0404; +TB1CCTL2 = 0x0406; +TB1R = 0x0410; +TB1CCR0 = 0x0412; +TB1CCR1 = 0x0414; +TB1CCR2 = 0x0416; +TB1IV = 0x042E; +TB1EX0 = 0x0420; +/************************************************************ +* Timer2_B3 +************************************************************/ +TB2CTL = 0x0440; +TB2CCTL0 = 0x0442; +TB2CCTL1 = 0x0444; +TB2CCTL2 = 0x0446; +TB2R = 0x0450; +TB2CCR0 = 0x0452; +TB2CCR1 = 0x0454; +TB2CCR2 = 0x0456; +TB2IV = 0x046E; +TB2EX0 = 0x0460; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5734.cmd b/msp430/msp430fr5734.cmd new file mode 100644 index 00000000..2cb77a9b --- /dev/null +++ b/msp430/msp430fr5734.cmd @@ -0,0 +1,576 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5734.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_B +************************************************************/ +ADC10CTL0 = 0x0700; +ADC10CTL0_L = 0x0700; +ADC10CTL0_H = 0x0701; +ADC10CTL1 = 0x0702; +ADC10CTL1_L = 0x0702; +ADC10CTL1_H = 0x0703; +ADC10CTL2 = 0x0704; +ADC10CTL2_L = 0x0704; +ADC10CTL2_H = 0x0705; +ADC10LO = 0x0706; +ADC10LO_L = 0x0706; +ADC10LO_H = 0x0707; +ADC10HI = 0x0708; +ADC10HI_L = 0x0708; +ADC10HI_H = 0x0709; +ADC10MCTL0 = 0x070A; +ADC10MCTL0_L = 0x070A; +ADC10MCTL0_H = 0x070B; +ADC10MEM0 = 0x0712; +ADC10MEM0_L = 0x0712; +ADC10MEM0_H = 0x0713; +ADC10IE = 0x071A; +ADC10IE_L = 0x071A; +ADC10IE_H = 0x071B; +ADC10IFG = 0x071C; +ADC10IFG_L = 0x071C; +ADC10IFG_H = 0x071D; +ADC10IV = 0x071E; +ADC10IV_L = 0x071E; +ADC10IV_H = 0x071F; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* Comparator D +************************************************************/ +CDCTL0 = 0x08C0; +CDCTL0_L = 0x08C0; +CDCTL0_H = 0x08C1; +CDCTL1 = 0x08C2; +CDCTL1_L = 0x08C2; +CDCTL1_H = 0x08C3; +CDCTL2 = 0x08C4; +CDCTL2_L = 0x08C4; +CDCTL2_H = 0x08C5; +CDCTL3 = 0x08C6; +CDCTL3_L = 0x08C6; +CDCTL3_H = 0x08C7; +CDINT = 0x08CC; +CDINT_L = 0x08CC; +CDINT_H = 0x08CD; +CDIV = 0x08CE; +CDIV_L = 0x08CE; +CDIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEG = 0x05A4; +MPUSEG_L = 0x05A4; +MPUSEG_H = 0x05A5; +MPUSAM = 0x05A6; +MPUSAM_L = 0x05A6; +MPUSAM_H = 0x05A7; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B3 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5735.cmd b/msp430/msp430fr5735.cmd new file mode 100644 index 00000000..a0bb9c5c --- /dev/null +++ b/msp430/msp430fr5735.cmd @@ -0,0 +1,670 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5735.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_B +************************************************************/ +ADC10CTL0 = 0x0700; +ADC10CTL0_L = 0x0700; +ADC10CTL0_H = 0x0701; +ADC10CTL1 = 0x0702; +ADC10CTL1_L = 0x0702; +ADC10CTL1_H = 0x0703; +ADC10CTL2 = 0x0704; +ADC10CTL2_L = 0x0704; +ADC10CTL2_H = 0x0705; +ADC10LO = 0x0706; +ADC10LO_L = 0x0706; +ADC10LO_H = 0x0707; +ADC10HI = 0x0708; +ADC10HI_L = 0x0708; +ADC10HI_H = 0x0709; +ADC10MCTL0 = 0x070A; +ADC10MCTL0_L = 0x070A; +ADC10MCTL0_H = 0x070B; +ADC10MEM0 = 0x0712; +ADC10MEM0_L = 0x0712; +ADC10MEM0_H = 0x0713; +ADC10IE = 0x071A; +ADC10IE_L = 0x071A; +ADC10IE_H = 0x071B; +ADC10IFG = 0x071C; +ADC10IFG_L = 0x071C; +ADC10IFG_H = 0x071D; +ADC10IV = 0x071E; +ADC10IV_L = 0x071E; +ADC10IV_H = 0x071F; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* Comparator D +************************************************************/ +CDCTL0 = 0x08C0; +CDCTL0_L = 0x08C0; +CDCTL0_H = 0x08C1; +CDCTL1 = 0x08C2; +CDCTL1_L = 0x08C2; +CDCTL1_H = 0x08C3; +CDCTL2 = 0x08C4; +CDCTL2_L = 0x08C4; +CDCTL2_H = 0x08C5; +CDCTL3 = 0x08C6; +CDCTL3_L = 0x08C6; +CDCTL3_H = 0x08C7; +CDINT = 0x08CC; +CDINT_L = 0x08CC; +CDINT_H = 0x08CD; +CDIV = 0x08CE; +CDIV_L = 0x08CE; +CDIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEG = 0x05A4; +MPUSEG_L = 0x05A4; +MPUSEG_H = 0x05A5; +MPUSAM = 0x05A6; +MPUSAM_L = 0x05A6; +MPUSAM_H = 0x05A7; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B3 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* Timer1_B3 +************************************************************/ +TB1CTL = 0x0400; +TB1CCTL0 = 0x0402; +TB1CCTL1 = 0x0404; +TB1CCTL2 = 0x0406; +TB1R = 0x0410; +TB1CCR0 = 0x0412; +TB1CCR1 = 0x0414; +TB1CCR2 = 0x0416; +TB1IV = 0x042E; +TB1EX0 = 0x0420; +/************************************************************ +* Timer2_B3 +************************************************************/ +TB2CTL = 0x0440; +TB2CCTL0 = 0x0442; +TB2CCTL1 = 0x0444; +TB2CCTL2 = 0x0446; +TB2R = 0x0450; +TB2CCR0 = 0x0452; +TB2CCR1 = 0x0454; +TB2CCR2 = 0x0456; +TB2IV = 0x046E; +TB2EX0 = 0x0460; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5736.cmd b/msp430/msp430fr5736.cmd new file mode 100644 index 00000000..0f283a0f --- /dev/null +++ b/msp430/msp430fr5736.cmd @@ -0,0 +1,543 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5736.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* Comparator D +************************************************************/ +CDCTL0 = 0x08C0; +CDCTL0_L = 0x08C0; +CDCTL0_H = 0x08C1; +CDCTL1 = 0x08C2; +CDCTL1_L = 0x08C2; +CDCTL1_H = 0x08C3; +CDCTL2 = 0x08C4; +CDCTL2_L = 0x08C4; +CDCTL2_H = 0x08C5; +CDCTL3 = 0x08C6; +CDCTL3_L = 0x08C6; +CDCTL3_H = 0x08C7; +CDINT = 0x08CC; +CDINT_L = 0x08CC; +CDINT_H = 0x08CD; +CDIV = 0x08CE; +CDIV_L = 0x08CE; +CDIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEG = 0x05A4; +MPUSEG_L = 0x05A4; +MPUSEG_H = 0x05A5; +MPUSAM = 0x05A6; +MPUSAM_L = 0x05A6; +MPUSAM_H = 0x05A7; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B3 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5737.cmd b/msp430/msp430fr5737.cmd new file mode 100644 index 00000000..e50ece6a --- /dev/null +++ b/msp430/msp430fr5737.cmd @@ -0,0 +1,637 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5737.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* Comparator D +************************************************************/ +CDCTL0 = 0x08C0; +CDCTL0_L = 0x08C0; +CDCTL0_H = 0x08C1; +CDCTL1 = 0x08C2; +CDCTL1_L = 0x08C2; +CDCTL1_H = 0x08C3; +CDCTL2 = 0x08C4; +CDCTL2_L = 0x08C4; +CDCTL2_H = 0x08C5; +CDCTL3 = 0x08C6; +CDCTL3_L = 0x08C6; +CDCTL3_H = 0x08C7; +CDINT = 0x08CC; +CDINT_L = 0x08CC; +CDINT_H = 0x08CD; +CDIV = 0x08CE; +CDIV_L = 0x08CE; +CDIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEG = 0x05A4; +MPUSEG_L = 0x05A4; +MPUSEG_H = 0x05A5; +MPUSAM = 0x05A6; +MPUSAM_L = 0x05A6; +MPUSAM_H = 0x05A7; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B3 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* Timer1_B3 +************************************************************/ +TB1CTL = 0x0400; +TB1CCTL0 = 0x0402; +TB1CCTL1 = 0x0404; +TB1CCTL2 = 0x0406; +TB1R = 0x0410; +TB1CCR0 = 0x0412; +TB1CCR1 = 0x0414; +TB1CCR2 = 0x0416; +TB1IV = 0x042E; +TB1EX0 = 0x0420; +/************************************************************ +* Timer2_B3 +************************************************************/ +TB2CTL = 0x0440; +TB2CCTL0 = 0x0442; +TB2CCTL1 = 0x0444; +TB2CCTL2 = 0x0446; +TB2R = 0x0450; +TB2CCR0 = 0x0452; +TB2CCR1 = 0x0454; +TB2CCR2 = 0x0456; +TB2IV = 0x046E; +TB2EX0 = 0x0460; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5738.cmd b/msp430/msp430fr5738.cmd new file mode 100644 index 00000000..ff465cd3 --- /dev/null +++ b/msp430/msp430fr5738.cmd @@ -0,0 +1,576 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5738.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_B +************************************************************/ +ADC10CTL0 = 0x0700; +ADC10CTL0_L = 0x0700; +ADC10CTL0_H = 0x0701; +ADC10CTL1 = 0x0702; +ADC10CTL1_L = 0x0702; +ADC10CTL1_H = 0x0703; +ADC10CTL2 = 0x0704; +ADC10CTL2_L = 0x0704; +ADC10CTL2_H = 0x0705; +ADC10LO = 0x0706; +ADC10LO_L = 0x0706; +ADC10LO_H = 0x0707; +ADC10HI = 0x0708; +ADC10HI_L = 0x0708; +ADC10HI_H = 0x0709; +ADC10MCTL0 = 0x070A; +ADC10MCTL0_L = 0x070A; +ADC10MCTL0_H = 0x070B; +ADC10MEM0 = 0x0712; +ADC10MEM0_L = 0x0712; +ADC10MEM0_H = 0x0713; +ADC10IE = 0x071A; +ADC10IE_L = 0x071A; +ADC10IE_H = 0x071B; +ADC10IFG = 0x071C; +ADC10IFG_L = 0x071C; +ADC10IFG_H = 0x071D; +ADC10IV = 0x071E; +ADC10IV_L = 0x071E; +ADC10IV_H = 0x071F; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* Comparator D +************************************************************/ +CDCTL0 = 0x08C0; +CDCTL0_L = 0x08C0; +CDCTL0_H = 0x08C1; +CDCTL1 = 0x08C2; +CDCTL1_L = 0x08C2; +CDCTL1_H = 0x08C3; +CDCTL2 = 0x08C4; +CDCTL2_L = 0x08C4; +CDCTL2_H = 0x08C5; +CDCTL3 = 0x08C6; +CDCTL3_L = 0x08C6; +CDCTL3_H = 0x08C7; +CDINT = 0x08CC; +CDINT_L = 0x08CC; +CDINT_H = 0x08CD; +CDIV = 0x08CE; +CDIV_L = 0x08CE; +CDIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEG = 0x05A4; +MPUSEG_L = 0x05A4; +MPUSEG_H = 0x05A5; +MPUSAM = 0x05A6; +MPUSAM_L = 0x05A6; +MPUSAM_H = 0x05A7; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B3 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5739.cmd b/msp430/msp430fr5739.cmd new file mode 100644 index 00000000..21af37b7 --- /dev/null +++ b/msp430/msp430fr5739.cmd @@ -0,0 +1,670 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5739.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_B +************************************************************/ +ADC10CTL0 = 0x0700; +ADC10CTL0_L = 0x0700; +ADC10CTL0_H = 0x0701; +ADC10CTL1 = 0x0702; +ADC10CTL1_L = 0x0702; +ADC10CTL1_H = 0x0703; +ADC10CTL2 = 0x0704; +ADC10CTL2_L = 0x0704; +ADC10CTL2_H = 0x0705; +ADC10LO = 0x0706; +ADC10LO_L = 0x0706; +ADC10LO_H = 0x0707; +ADC10HI = 0x0708; +ADC10HI_L = 0x0708; +ADC10HI_H = 0x0709; +ADC10MCTL0 = 0x070A; +ADC10MCTL0_L = 0x070A; +ADC10MCTL0_H = 0x070B; +ADC10MEM0 = 0x0712; +ADC10MEM0_L = 0x0712; +ADC10MEM0_H = 0x0713; +ADC10IE = 0x071A; +ADC10IE_L = 0x071A; +ADC10IE_H = 0x071B; +ADC10IFG = 0x071C; +ADC10IFG_L = 0x071C; +ADC10IFG_H = 0x071D; +ADC10IV = 0x071E; +ADC10IV_L = 0x071E; +ADC10IV_H = 0x071F; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* Comparator D +************************************************************/ +CDCTL0 = 0x08C0; +CDCTL0_L = 0x08C0; +CDCTL0_H = 0x08C1; +CDCTL1 = 0x08C2; +CDCTL1_L = 0x08C2; +CDCTL1_H = 0x08C3; +CDCTL2 = 0x08C4; +CDCTL2_L = 0x08C4; +CDCTL2_H = 0x08C5; +CDCTL3 = 0x08C6; +CDCTL3_L = 0x08C6; +CDCTL3_H = 0x08C7; +CDINT = 0x08CC; +CDINT_L = 0x08CC; +CDINT_H = 0x08CD; +CDIV = 0x08CE; +CDIV_L = 0x08CE; +CDIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEG = 0x05A4; +MPUSEG_L = 0x05A4; +MPUSEG_H = 0x05A5; +MPUSAM = 0x05A6; +MPUSAM_L = 0x05A6; +MPUSAM_H = 0x05A7; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B3 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* Timer1_B3 +************************************************************/ +TB1CTL = 0x0400; +TB1CCTL0 = 0x0402; +TB1CCTL1 = 0x0404; +TB1CCTL2 = 0x0406; +TB1R = 0x0410; +TB1CCR0 = 0x0412; +TB1CCR1 = 0x0414; +TB1CCR2 = 0x0416; +TB1IV = 0x042E; +TB1EX0 = 0x0420; +/************************************************************ +* Timer2_B3 +************************************************************/ +TB2CTL = 0x0440; +TB2CCTL0 = 0x0442; +TB2CCTL1 = 0x0444; +TB2CCTL2 = 0x0446; +TB2R = 0x0450; +TB2CCR0 = 0x0452; +TB2CCR1 = 0x0454; +TB2CCR2 = 0x0456; +TB2IV = 0x046E; +TB2EX0 = 0x0460; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5847.cmd b/msp430/msp430fr5847.cmd new file mode 100644 index 00000000..5930b078 --- /dev/null +++ b/msp430/msp430fr5847.cmd @@ -0,0 +1,896 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5847.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr58471.cmd b/msp430/msp430fr58471.cmd new file mode 100644 index 00000000..628ddd54 --- /dev/null +++ b/msp430/msp430fr58471.cmd @@ -0,0 +1,896 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr58471.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5848.cmd b/msp430/msp430fr5848.cmd new file mode 100644 index 00000000..b633b47f --- /dev/null +++ b/msp430/msp430fr5848.cmd @@ -0,0 +1,896 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5848.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5849.cmd b/msp430/msp430fr5849.cmd new file mode 100644 index 00000000..972e9e14 --- /dev/null +++ b/msp430/msp430fr5849.cmd @@ -0,0 +1,896 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5849.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5857.cmd b/msp430/msp430fr5857.cmd new file mode 100644 index 00000000..04b9ead1 --- /dev/null +++ b/msp430/msp430fr5857.cmd @@ -0,0 +1,896 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5857.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5858.cmd b/msp430/msp430fr5858.cmd new file mode 100644 index 00000000..d29905f1 --- /dev/null +++ b/msp430/msp430fr5858.cmd @@ -0,0 +1,896 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5858.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5859.cmd b/msp430/msp430fr5859.cmd new file mode 100644 index 00000000..e6561cf7 --- /dev/null +++ b/msp430/msp430fr5859.cmd @@ -0,0 +1,896 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5859.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5867.cmd b/msp430/msp430fr5867.cmd new file mode 100644 index 00000000..72e2d893 --- /dev/null +++ b/msp430/msp430fr5867.cmd @@ -0,0 +1,896 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5867.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr58671.cmd b/msp430/msp430fr58671.cmd new file mode 100644 index 00000000..02a2b2ed --- /dev/null +++ b/msp430/msp430fr58671.cmd @@ -0,0 +1,896 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr58671.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5868.cmd b/msp430/msp430fr5868.cmd new file mode 100644 index 00000000..284a06ad --- /dev/null +++ b/msp430/msp430fr5868.cmd @@ -0,0 +1,896 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5868.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5869.cmd b/msp430/msp430fr5869.cmd new file mode 100644 index 00000000..6bc498d4 --- /dev/null +++ b/msp430/msp430fr5869.cmd @@ -0,0 +1,896 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5869.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5870.cmd b/msp430/msp430fr5870.cmd new file mode 100644 index 00000000..d5d0d5fe --- /dev/null +++ b/msp430/msp430fr5870.cmd @@ -0,0 +1,1086 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5870.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5872.cmd b/msp430/msp430fr5872.cmd new file mode 100644 index 00000000..8fc37152 --- /dev/null +++ b/msp430/msp430fr5872.cmd @@ -0,0 +1,1086 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5872.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr58721.cmd b/msp430/msp430fr58721.cmd new file mode 100644 index 00000000..21510d63 --- /dev/null +++ b/msp430/msp430fr58721.cmd @@ -0,0 +1,1086 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr58721.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5887.cmd b/msp430/msp430fr5887.cmd new file mode 100644 index 00000000..47d77caf --- /dev/null +++ b/msp430/msp430fr5887.cmd @@ -0,0 +1,1424 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5887.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************ +* EXTENDED SCAN INTERFACE +************************************************************/ +ESIDEBUG1 = 0x0D00; +ESIDEBUG1_L = 0x0D00; +ESIDEBUG1_H = 0x0D01; +ESIDEBUG2 = 0x0D02; +ESIDEBUG2_L = 0x0D02; +ESIDEBUG2_H = 0x0D03; +ESIDEBUG3 = 0x0D04; +ESIDEBUG3_L = 0x0D04; +ESIDEBUG3_H = 0x0D05; +ESIDEBUG4 = 0x0D06; +ESIDEBUG4_L = 0x0D06; +ESIDEBUG4_H = 0x0D07; +ESIDEBUG5 = 0x0D08; +ESIDEBUG5_L = 0x0D08; +ESIDEBUG5_H = 0x0D09; +ESICNT0 = 0x0D10; +ESICNT0_L = 0x0D10; +ESICNT0_H = 0x0D11; +ESICNT1 = 0x0D12; +ESICNT1_L = 0x0D12; +ESICNT1_H = 0x0D13; +ESICNT2 = 0x0D14; +ESICNT2_L = 0x0D14; +ESICNT2_H = 0x0D15; +ESICNT3 = 0x0D16; +ESICNT3_L = 0x0D16; +ESICNT3_H = 0x0D17; +ESIIV = 0x0D1A; +ESIIV_L = 0x0D1A; +ESIIV_H = 0x0D1B; +ESIINT1 = 0x0D1C; +ESIINT1_L = 0x0D1C; +ESIINT1_H = 0x0D1D; +ESIINT2 = 0x0D1E; +ESIINT2_L = 0x0D1E; +ESIINT2_H = 0x0D1F; +ESIAFE = 0x0D20; +ESIAFE_L = 0x0D20; +ESIAFE_H = 0x0D21; +ESIPPU = 0x0D22; +ESIPPU_L = 0x0D22; +ESIPPU_H = 0x0D23; +ESITSM = 0x0D24; +ESITSM_L = 0x0D24; +ESITSM_H = 0x0D25; +ESIPSM = 0x0D26; +ESIPSM_L = 0x0D26; +ESIPSM_H = 0x0D27; +ESIOSC = 0x0D28; +ESIOSC_L = 0x0D28; +ESIOSC_H = 0x0D29; +ESICTL = 0x0D2A; +ESICTL_L = 0x0D2A; +ESICTL_H = 0x0D2B; +ESITHR1 = 0x0D2C; +ESITHR1_L = 0x0D2C; +ESITHR1_H = 0x0D2D; +ESITHR2 = 0x0D2E; +ESITHR2_L = 0x0D2E; +ESITHR2_H = 0x0D2F; +ESIDAC1R0 = 0x0D40; +ESIDAC1R0_L = 0x0D40; +ESIDAC1R0_H = 0x0D41; +ESIDAC1R1 = 0x0D42; +ESIDAC1R1_L = 0x0D42; +ESIDAC1R1_H = 0x0D43; +ESIDAC1R2 = 0x0D44; +ESIDAC1R2_L = 0x0D44; +ESIDAC1R2_H = 0x0D45; +ESIDAC1R3 = 0x0D46; +ESIDAC1R3_L = 0x0D46; +ESIDAC1R3_H = 0x0D47; +ESIDAC1R4 = 0x0D48; +ESIDAC1R4_L = 0x0D48; +ESIDAC1R4_H = 0x0D49; +ESIDAC1R5 = 0x0D4A; +ESIDAC1R5_L = 0x0D4A; +ESIDAC1R5_H = 0x0D4B; +ESIDAC1R6 = 0x0D4C; +ESIDAC1R6_L = 0x0D4C; +ESIDAC1R6_H = 0x0D4D; +ESIDAC1R7 = 0x0D4E; +ESIDAC1R7_L = 0x0D4E; +ESIDAC1R7_H = 0x0D4F; +ESIDAC2R0 = 0x0D50; +ESIDAC2R0_L = 0x0D50; +ESIDAC2R0_H = 0x0D51; +ESIDAC2R1 = 0x0D52; +ESIDAC2R1_L = 0x0D52; +ESIDAC2R1_H = 0x0D53; +ESIDAC2R2 = 0x0D54; +ESIDAC2R2_L = 0x0D54; +ESIDAC2R2_H = 0x0D55; +ESIDAC2R3 = 0x0D56; +ESIDAC2R3_L = 0x0D56; +ESIDAC2R3_H = 0x0D57; +ESIDAC2R4 = 0x0D58; +ESIDAC2R4_L = 0x0D58; +ESIDAC2R4_H = 0x0D59; +ESIDAC2R5 = 0x0D5A; +ESIDAC2R5_L = 0x0D5A; +ESIDAC2R5_H = 0x0D5B; +ESIDAC2R6 = 0x0D5C; +ESIDAC2R6_L = 0x0D5C; +ESIDAC2R6_H = 0x0D5D; +ESIDAC2R7 = 0x0D5E; +ESIDAC2R7_L = 0x0D5E; +ESIDAC2R7_H = 0x0D5F; +ESITSM0 = 0x0D60; +ESITSM0_L = 0x0D60; +ESITSM0_H = 0x0D61; +ESITSM1 = 0x0D62; +ESITSM1_L = 0x0D62; +ESITSM1_H = 0x0D63; +ESITSM2 = 0x0D64; +ESITSM2_L = 0x0D64; +ESITSM2_H = 0x0D65; +ESITSM3 = 0x0D66; +ESITSM3_L = 0x0D66; +ESITSM3_H = 0x0D67; +ESITSM4 = 0x0D68; +ESITSM4_L = 0x0D68; +ESITSM4_H = 0x0D69; +ESITSM5 = 0x0D6A; +ESITSM5_L = 0x0D6A; +ESITSM5_H = 0x0D6B; +ESITSM6 = 0x0D6C; +ESITSM6_L = 0x0D6C; +ESITSM6_H = 0x0D6D; +ESITSM7 = 0x0D6E; +ESITSM7_L = 0x0D6E; +ESITSM7_H = 0x0D6F; +ESITSM8 = 0x0D70; +ESITSM8_L = 0x0D70; +ESITSM8_H = 0x0D71; +ESITSM9 = 0x0D72; +ESITSM9_L = 0x0D72; +ESITSM9_H = 0x0D73; +ESITSM10 = 0x0D74; +ESITSM10_L = 0x0D74; +ESITSM10_H = 0x0D75; +ESITSM11 = 0x0D76; +ESITSM11_L = 0x0D76; +ESITSM11_H = 0x0D77; +ESITSM12 = 0x0D78; +ESITSM12_L = 0x0D78; +ESITSM12_H = 0x0D79; +ESITSM13 = 0x0D7A; +ESITSM13_L = 0x0D7A; +ESITSM13_H = 0x0D7B; +ESITSM14 = 0x0D7C; +ESITSM14_L = 0x0D7C; +ESITSM14_H = 0x0D7D; +ESITSM15 = 0x0D7E; +ESITSM15_L = 0x0D7E; +ESITSM15_H = 0x0D7F; +ESITSM16 = 0x0D80; +ESITSM16_L = 0x0D80; +ESITSM16_H = 0x0D81; +ESITSM17 = 0x0D82; +ESITSM17_L = 0x0D82; +ESITSM17_H = 0x0D83; +ESITSM18 = 0x0D84; +ESITSM18_L = 0x0D84; +ESITSM18_H = 0x0D85; +ESITSM19 = 0x0D86; +ESITSM19_L = 0x0D86; +ESITSM19_H = 0x0D87; +ESITSM20 = 0x0D88; +ESITSM20_L = 0x0D88; +ESITSM20_H = 0x0D89; +ESITSM21 = 0x0D8A; +ESITSM21_L = 0x0D8A; +ESITSM21_H = 0x0D8B; +ESITSM22 = 0x0D8C; +ESITSM22_L = 0x0D8C; +ESITSM22_H = 0x0D8D; +ESITSM23 = 0x0D8E; +ESITSM23_L = 0x0D8E; +ESITSM23_H = 0x0D8F; +ESITSM24 = 0x0D90; +ESITSM24_L = 0x0D90; +ESITSM24_H = 0x0D91; +ESITSM25 = 0x0D92; +ESITSM25_L = 0x0D92; +ESITSM25_H = 0x0D93; +ESITSM26 = 0x0D94; +ESITSM26_L = 0x0D94; +ESITSM26_H = 0x0D95; +ESITSM27 = 0x0D96; +ESITSM27_L = 0x0D96; +ESITSM27_H = 0x0D97; +ESITSM28 = 0x0D98; +ESITSM28_L = 0x0D98; +ESITSM28_H = 0x0D99; +ESITSM29 = 0x0D9A; +ESITSM29_L = 0x0D9A; +ESITSM29_H = 0x0D9B; +ESITSM30 = 0x0D9C; +ESITSM30_L = 0x0D9C; +ESITSM30_H = 0x0D9D; +ESITSM31 = 0x0D9E; +ESITSM31_L = 0x0D9E; +ESITSM31_H = 0x0D9F; +/************************************************************ +* EXTENDED SCAN INTERFACE RAM +************************************************************/ +ESIRAM0 = 0x0E00; +ESIRAM1 = 0x0E01; +ESIRAM2 = 0x0E02; +ESIRAM3 = 0x0E03; +ESIRAM4 = 0x0E04; +ESIRAM5 = 0x0E05; +ESIRAM6 = 0x0E06; +ESIRAM7 = 0x0E07; +ESIRAM8 = 0x0E08; +ESIRAM9 = 0x0E09; +ESIRAM10 = 0x0E0A; +ESIRAM11 = 0x0E0B; +ESIRAM12 = 0x0E0C; +ESIRAM13 = 0x0E0D; +ESIRAM14 = 0x0E0E; +ESIRAM15 = 0x0E0F; +ESIRAM16 = 0x0E10; +ESIRAM17 = 0x0E11; +ESIRAM18 = 0x0E12; +ESIRAM19 = 0x0E13; +ESIRAM20 = 0x0E14; +ESIRAM21 = 0x0E15; +ESIRAM22 = 0x0E16; +ESIRAM23 = 0x0E17; +ESIRAM24 = 0x0E18; +ESIRAM25 = 0x0E19; +ESIRAM26 = 0x0E1A; +ESIRAM27 = 0x0E1B; +ESIRAM28 = 0x0E1C; +ESIRAM29 = 0x0E1D; +ESIRAM30 = 0x0E1E; +ESIRAM31 = 0x0E1F; +ESIRAM32 = 0x0E20; +ESIRAM33 = 0x0E21; +ESIRAM34 = 0x0E22; +ESIRAM35 = 0x0E23; +ESIRAM36 = 0x0E24; +ESIRAM37 = 0x0E25; +ESIRAM38 = 0x0E26; +ESIRAM39 = 0x0E27; +ESIRAM40 = 0x0E28; +ESIRAM41 = 0x0E29; +ESIRAM42 = 0x0E2A; +ESIRAM43 = 0x0E2B; +ESIRAM44 = 0x0E2C; +ESIRAM45 = 0x0E2D; +ESIRAM46 = 0x0E2E; +ESIRAM47 = 0x0E2F; +ESIRAM48 = 0x0E30; +ESIRAM49 = 0x0E31; +ESIRAM50 = 0x0E32; +ESIRAM51 = 0x0E33; +ESIRAM52 = 0x0E34; +ESIRAM53 = 0x0E35; +ESIRAM54 = 0x0E36; +ESIRAM55 = 0x0E37; +ESIRAM56 = 0x0E38; +ESIRAM57 = 0x0E39; +ESIRAM58 = 0x0E3A; +ESIRAM59 = 0x0E3B; +ESIRAM60 = 0x0E3C; +ESIRAM61 = 0x0E3D; +ESIRAM62 = 0x0E3E; +ESIRAM63 = 0x0E3F; +ESIRAM64 = 0x0E40; +ESIRAM65 = 0x0E41; +ESIRAM66 = 0x0E42; +ESIRAM67 = 0x0E43; +ESIRAM68 = 0x0E44; +ESIRAM69 = 0x0E45; +ESIRAM70 = 0x0E46; +ESIRAM71 = 0x0E47; +ESIRAM72 = 0x0E48; +ESIRAM73 = 0x0E49; +ESIRAM74 = 0x0E4A; +ESIRAM75 = 0x0E4B; +ESIRAM76 = 0x0E4C; +ESIRAM77 = 0x0E4D; +ESIRAM78 = 0x0E4E; +ESIRAM79 = 0x0E4F; +ESIRAM80 = 0x0E50; +ESIRAM81 = 0x0E51; +ESIRAM82 = 0x0E52; +ESIRAM83 = 0x0E53; +ESIRAM84 = 0x0E54; +ESIRAM85 = 0x0E55; +ESIRAM86 = 0x0E56; +ESIRAM87 = 0x0E57; +ESIRAM88 = 0x0E58; +ESIRAM89 = 0x0E59; +ESIRAM90 = 0x0E5A; +ESIRAM91 = 0x0E5B; +ESIRAM92 = 0x0E5C; +ESIRAM93 = 0x0E5D; +ESIRAM94 = 0x0E5E; +ESIRAM95 = 0x0E5F; +ESIRAM96 = 0x0E60; +ESIRAM97 = 0x0E61; +ESIRAM98 = 0x0E62; +ESIRAM99 = 0x0E63; +ESIRAM100 = 0x0E64; +ESIRAM101 = 0x0E65; +ESIRAM102 = 0x0E66; +ESIRAM103 = 0x0E67; +ESIRAM104 = 0x0E68; +ESIRAM105 = 0x0E69; +ESIRAM106 = 0x0E6A; +ESIRAM107 = 0x0E6B; +ESIRAM108 = 0x0E6C; +ESIRAM109 = 0x0E6D; +ESIRAM110 = 0x0E6E; +ESIRAM111 = 0x0E6F; +ESIRAM112 = 0x0E70; +ESIRAM113 = 0x0E71; +ESIRAM114 = 0x0E72; +ESIRAM115 = 0x0E73; +ESIRAM116 = 0x0E74; +ESIRAM117 = 0x0E75; +ESIRAM118 = 0x0E76; +ESIRAM119 = 0x0E77; +ESIRAM120 = 0x0E78; +ESIRAM121 = 0x0E79; +ESIRAM122 = 0x0E7A; +ESIRAM123 = 0x0E7B; +ESIRAM124 = 0x0E7C; +ESIRAM125 = 0x0E7D; +ESIRAM126 = 0x0E7E; +ESIRAM127 = 0x0E7F; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5888.cmd b/msp430/msp430fr5888.cmd new file mode 100644 index 00000000..657a3c8c --- /dev/null +++ b/msp430/msp430fr5888.cmd @@ -0,0 +1,1424 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5888.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************ +* EXTENDED SCAN INTERFACE +************************************************************/ +ESIDEBUG1 = 0x0D00; +ESIDEBUG1_L = 0x0D00; +ESIDEBUG1_H = 0x0D01; +ESIDEBUG2 = 0x0D02; +ESIDEBUG2_L = 0x0D02; +ESIDEBUG2_H = 0x0D03; +ESIDEBUG3 = 0x0D04; +ESIDEBUG3_L = 0x0D04; +ESIDEBUG3_H = 0x0D05; +ESIDEBUG4 = 0x0D06; +ESIDEBUG4_L = 0x0D06; +ESIDEBUG4_H = 0x0D07; +ESIDEBUG5 = 0x0D08; +ESIDEBUG5_L = 0x0D08; +ESIDEBUG5_H = 0x0D09; +ESICNT0 = 0x0D10; +ESICNT0_L = 0x0D10; +ESICNT0_H = 0x0D11; +ESICNT1 = 0x0D12; +ESICNT1_L = 0x0D12; +ESICNT1_H = 0x0D13; +ESICNT2 = 0x0D14; +ESICNT2_L = 0x0D14; +ESICNT2_H = 0x0D15; +ESICNT3 = 0x0D16; +ESICNT3_L = 0x0D16; +ESICNT3_H = 0x0D17; +ESIIV = 0x0D1A; +ESIIV_L = 0x0D1A; +ESIIV_H = 0x0D1B; +ESIINT1 = 0x0D1C; +ESIINT1_L = 0x0D1C; +ESIINT1_H = 0x0D1D; +ESIINT2 = 0x0D1E; +ESIINT2_L = 0x0D1E; +ESIINT2_H = 0x0D1F; +ESIAFE = 0x0D20; +ESIAFE_L = 0x0D20; +ESIAFE_H = 0x0D21; +ESIPPU = 0x0D22; +ESIPPU_L = 0x0D22; +ESIPPU_H = 0x0D23; +ESITSM = 0x0D24; +ESITSM_L = 0x0D24; +ESITSM_H = 0x0D25; +ESIPSM = 0x0D26; +ESIPSM_L = 0x0D26; +ESIPSM_H = 0x0D27; +ESIOSC = 0x0D28; +ESIOSC_L = 0x0D28; +ESIOSC_H = 0x0D29; +ESICTL = 0x0D2A; +ESICTL_L = 0x0D2A; +ESICTL_H = 0x0D2B; +ESITHR1 = 0x0D2C; +ESITHR1_L = 0x0D2C; +ESITHR1_H = 0x0D2D; +ESITHR2 = 0x0D2E; +ESITHR2_L = 0x0D2E; +ESITHR2_H = 0x0D2F; +ESIDAC1R0 = 0x0D40; +ESIDAC1R0_L = 0x0D40; +ESIDAC1R0_H = 0x0D41; +ESIDAC1R1 = 0x0D42; +ESIDAC1R1_L = 0x0D42; +ESIDAC1R1_H = 0x0D43; +ESIDAC1R2 = 0x0D44; +ESIDAC1R2_L = 0x0D44; +ESIDAC1R2_H = 0x0D45; +ESIDAC1R3 = 0x0D46; +ESIDAC1R3_L = 0x0D46; +ESIDAC1R3_H = 0x0D47; +ESIDAC1R4 = 0x0D48; +ESIDAC1R4_L = 0x0D48; +ESIDAC1R4_H = 0x0D49; +ESIDAC1R5 = 0x0D4A; +ESIDAC1R5_L = 0x0D4A; +ESIDAC1R5_H = 0x0D4B; +ESIDAC1R6 = 0x0D4C; +ESIDAC1R6_L = 0x0D4C; +ESIDAC1R6_H = 0x0D4D; +ESIDAC1R7 = 0x0D4E; +ESIDAC1R7_L = 0x0D4E; +ESIDAC1R7_H = 0x0D4F; +ESIDAC2R0 = 0x0D50; +ESIDAC2R0_L = 0x0D50; +ESIDAC2R0_H = 0x0D51; +ESIDAC2R1 = 0x0D52; +ESIDAC2R1_L = 0x0D52; +ESIDAC2R1_H = 0x0D53; +ESIDAC2R2 = 0x0D54; +ESIDAC2R2_L = 0x0D54; +ESIDAC2R2_H = 0x0D55; +ESIDAC2R3 = 0x0D56; +ESIDAC2R3_L = 0x0D56; +ESIDAC2R3_H = 0x0D57; +ESIDAC2R4 = 0x0D58; +ESIDAC2R4_L = 0x0D58; +ESIDAC2R4_H = 0x0D59; +ESIDAC2R5 = 0x0D5A; +ESIDAC2R5_L = 0x0D5A; +ESIDAC2R5_H = 0x0D5B; +ESIDAC2R6 = 0x0D5C; +ESIDAC2R6_L = 0x0D5C; +ESIDAC2R6_H = 0x0D5D; +ESIDAC2R7 = 0x0D5E; +ESIDAC2R7_L = 0x0D5E; +ESIDAC2R7_H = 0x0D5F; +ESITSM0 = 0x0D60; +ESITSM0_L = 0x0D60; +ESITSM0_H = 0x0D61; +ESITSM1 = 0x0D62; +ESITSM1_L = 0x0D62; +ESITSM1_H = 0x0D63; +ESITSM2 = 0x0D64; +ESITSM2_L = 0x0D64; +ESITSM2_H = 0x0D65; +ESITSM3 = 0x0D66; +ESITSM3_L = 0x0D66; +ESITSM3_H = 0x0D67; +ESITSM4 = 0x0D68; +ESITSM4_L = 0x0D68; +ESITSM4_H = 0x0D69; +ESITSM5 = 0x0D6A; +ESITSM5_L = 0x0D6A; +ESITSM5_H = 0x0D6B; +ESITSM6 = 0x0D6C; +ESITSM6_L = 0x0D6C; +ESITSM6_H = 0x0D6D; +ESITSM7 = 0x0D6E; +ESITSM7_L = 0x0D6E; +ESITSM7_H = 0x0D6F; +ESITSM8 = 0x0D70; +ESITSM8_L = 0x0D70; +ESITSM8_H = 0x0D71; +ESITSM9 = 0x0D72; +ESITSM9_L = 0x0D72; +ESITSM9_H = 0x0D73; +ESITSM10 = 0x0D74; +ESITSM10_L = 0x0D74; +ESITSM10_H = 0x0D75; +ESITSM11 = 0x0D76; +ESITSM11_L = 0x0D76; +ESITSM11_H = 0x0D77; +ESITSM12 = 0x0D78; +ESITSM12_L = 0x0D78; +ESITSM12_H = 0x0D79; +ESITSM13 = 0x0D7A; +ESITSM13_L = 0x0D7A; +ESITSM13_H = 0x0D7B; +ESITSM14 = 0x0D7C; +ESITSM14_L = 0x0D7C; +ESITSM14_H = 0x0D7D; +ESITSM15 = 0x0D7E; +ESITSM15_L = 0x0D7E; +ESITSM15_H = 0x0D7F; +ESITSM16 = 0x0D80; +ESITSM16_L = 0x0D80; +ESITSM16_H = 0x0D81; +ESITSM17 = 0x0D82; +ESITSM17_L = 0x0D82; +ESITSM17_H = 0x0D83; +ESITSM18 = 0x0D84; +ESITSM18_L = 0x0D84; +ESITSM18_H = 0x0D85; +ESITSM19 = 0x0D86; +ESITSM19_L = 0x0D86; +ESITSM19_H = 0x0D87; +ESITSM20 = 0x0D88; +ESITSM20_L = 0x0D88; +ESITSM20_H = 0x0D89; +ESITSM21 = 0x0D8A; +ESITSM21_L = 0x0D8A; +ESITSM21_H = 0x0D8B; +ESITSM22 = 0x0D8C; +ESITSM22_L = 0x0D8C; +ESITSM22_H = 0x0D8D; +ESITSM23 = 0x0D8E; +ESITSM23_L = 0x0D8E; +ESITSM23_H = 0x0D8F; +ESITSM24 = 0x0D90; +ESITSM24_L = 0x0D90; +ESITSM24_H = 0x0D91; +ESITSM25 = 0x0D92; +ESITSM25_L = 0x0D92; +ESITSM25_H = 0x0D93; +ESITSM26 = 0x0D94; +ESITSM26_L = 0x0D94; +ESITSM26_H = 0x0D95; +ESITSM27 = 0x0D96; +ESITSM27_L = 0x0D96; +ESITSM27_H = 0x0D97; +ESITSM28 = 0x0D98; +ESITSM28_L = 0x0D98; +ESITSM28_H = 0x0D99; +ESITSM29 = 0x0D9A; +ESITSM29_L = 0x0D9A; +ESITSM29_H = 0x0D9B; +ESITSM30 = 0x0D9C; +ESITSM30_L = 0x0D9C; +ESITSM30_H = 0x0D9D; +ESITSM31 = 0x0D9E; +ESITSM31_L = 0x0D9E; +ESITSM31_H = 0x0D9F; +/************************************************************ +* EXTENDED SCAN INTERFACE RAM +************************************************************/ +ESIRAM0 = 0x0E00; +ESIRAM1 = 0x0E01; +ESIRAM2 = 0x0E02; +ESIRAM3 = 0x0E03; +ESIRAM4 = 0x0E04; +ESIRAM5 = 0x0E05; +ESIRAM6 = 0x0E06; +ESIRAM7 = 0x0E07; +ESIRAM8 = 0x0E08; +ESIRAM9 = 0x0E09; +ESIRAM10 = 0x0E0A; +ESIRAM11 = 0x0E0B; +ESIRAM12 = 0x0E0C; +ESIRAM13 = 0x0E0D; +ESIRAM14 = 0x0E0E; +ESIRAM15 = 0x0E0F; +ESIRAM16 = 0x0E10; +ESIRAM17 = 0x0E11; +ESIRAM18 = 0x0E12; +ESIRAM19 = 0x0E13; +ESIRAM20 = 0x0E14; +ESIRAM21 = 0x0E15; +ESIRAM22 = 0x0E16; +ESIRAM23 = 0x0E17; +ESIRAM24 = 0x0E18; +ESIRAM25 = 0x0E19; +ESIRAM26 = 0x0E1A; +ESIRAM27 = 0x0E1B; +ESIRAM28 = 0x0E1C; +ESIRAM29 = 0x0E1D; +ESIRAM30 = 0x0E1E; +ESIRAM31 = 0x0E1F; +ESIRAM32 = 0x0E20; +ESIRAM33 = 0x0E21; +ESIRAM34 = 0x0E22; +ESIRAM35 = 0x0E23; +ESIRAM36 = 0x0E24; +ESIRAM37 = 0x0E25; +ESIRAM38 = 0x0E26; +ESIRAM39 = 0x0E27; +ESIRAM40 = 0x0E28; +ESIRAM41 = 0x0E29; +ESIRAM42 = 0x0E2A; +ESIRAM43 = 0x0E2B; +ESIRAM44 = 0x0E2C; +ESIRAM45 = 0x0E2D; +ESIRAM46 = 0x0E2E; +ESIRAM47 = 0x0E2F; +ESIRAM48 = 0x0E30; +ESIRAM49 = 0x0E31; +ESIRAM50 = 0x0E32; +ESIRAM51 = 0x0E33; +ESIRAM52 = 0x0E34; +ESIRAM53 = 0x0E35; +ESIRAM54 = 0x0E36; +ESIRAM55 = 0x0E37; +ESIRAM56 = 0x0E38; +ESIRAM57 = 0x0E39; +ESIRAM58 = 0x0E3A; +ESIRAM59 = 0x0E3B; +ESIRAM60 = 0x0E3C; +ESIRAM61 = 0x0E3D; +ESIRAM62 = 0x0E3E; +ESIRAM63 = 0x0E3F; +ESIRAM64 = 0x0E40; +ESIRAM65 = 0x0E41; +ESIRAM66 = 0x0E42; +ESIRAM67 = 0x0E43; +ESIRAM68 = 0x0E44; +ESIRAM69 = 0x0E45; +ESIRAM70 = 0x0E46; +ESIRAM71 = 0x0E47; +ESIRAM72 = 0x0E48; +ESIRAM73 = 0x0E49; +ESIRAM74 = 0x0E4A; +ESIRAM75 = 0x0E4B; +ESIRAM76 = 0x0E4C; +ESIRAM77 = 0x0E4D; +ESIRAM78 = 0x0E4E; +ESIRAM79 = 0x0E4F; +ESIRAM80 = 0x0E50; +ESIRAM81 = 0x0E51; +ESIRAM82 = 0x0E52; +ESIRAM83 = 0x0E53; +ESIRAM84 = 0x0E54; +ESIRAM85 = 0x0E55; +ESIRAM86 = 0x0E56; +ESIRAM87 = 0x0E57; +ESIRAM88 = 0x0E58; +ESIRAM89 = 0x0E59; +ESIRAM90 = 0x0E5A; +ESIRAM91 = 0x0E5B; +ESIRAM92 = 0x0E5C; +ESIRAM93 = 0x0E5D; +ESIRAM94 = 0x0E5E; +ESIRAM95 = 0x0E5F; +ESIRAM96 = 0x0E60; +ESIRAM97 = 0x0E61; +ESIRAM98 = 0x0E62; +ESIRAM99 = 0x0E63; +ESIRAM100 = 0x0E64; +ESIRAM101 = 0x0E65; +ESIRAM102 = 0x0E66; +ESIRAM103 = 0x0E67; +ESIRAM104 = 0x0E68; +ESIRAM105 = 0x0E69; +ESIRAM106 = 0x0E6A; +ESIRAM107 = 0x0E6B; +ESIRAM108 = 0x0E6C; +ESIRAM109 = 0x0E6D; +ESIRAM110 = 0x0E6E; +ESIRAM111 = 0x0E6F; +ESIRAM112 = 0x0E70; +ESIRAM113 = 0x0E71; +ESIRAM114 = 0x0E72; +ESIRAM115 = 0x0E73; +ESIRAM116 = 0x0E74; +ESIRAM117 = 0x0E75; +ESIRAM118 = 0x0E76; +ESIRAM119 = 0x0E77; +ESIRAM120 = 0x0E78; +ESIRAM121 = 0x0E79; +ESIRAM122 = 0x0E7A; +ESIRAM123 = 0x0E7B; +ESIRAM124 = 0x0E7C; +ESIRAM125 = 0x0E7D; +ESIRAM126 = 0x0E7E; +ESIRAM127 = 0x0E7F; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5889.cmd b/msp430/msp430fr5889.cmd new file mode 100644 index 00000000..5bb00895 --- /dev/null +++ b/msp430/msp430fr5889.cmd @@ -0,0 +1,1424 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5889.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************ +* EXTENDED SCAN INTERFACE +************************************************************/ +ESIDEBUG1 = 0x0D00; +ESIDEBUG1_L = 0x0D00; +ESIDEBUG1_H = 0x0D01; +ESIDEBUG2 = 0x0D02; +ESIDEBUG2_L = 0x0D02; +ESIDEBUG2_H = 0x0D03; +ESIDEBUG3 = 0x0D04; +ESIDEBUG3_L = 0x0D04; +ESIDEBUG3_H = 0x0D05; +ESIDEBUG4 = 0x0D06; +ESIDEBUG4_L = 0x0D06; +ESIDEBUG4_H = 0x0D07; +ESIDEBUG5 = 0x0D08; +ESIDEBUG5_L = 0x0D08; +ESIDEBUG5_H = 0x0D09; +ESICNT0 = 0x0D10; +ESICNT0_L = 0x0D10; +ESICNT0_H = 0x0D11; +ESICNT1 = 0x0D12; +ESICNT1_L = 0x0D12; +ESICNT1_H = 0x0D13; +ESICNT2 = 0x0D14; +ESICNT2_L = 0x0D14; +ESICNT2_H = 0x0D15; +ESICNT3 = 0x0D16; +ESICNT3_L = 0x0D16; +ESICNT3_H = 0x0D17; +ESIIV = 0x0D1A; +ESIIV_L = 0x0D1A; +ESIIV_H = 0x0D1B; +ESIINT1 = 0x0D1C; +ESIINT1_L = 0x0D1C; +ESIINT1_H = 0x0D1D; +ESIINT2 = 0x0D1E; +ESIINT2_L = 0x0D1E; +ESIINT2_H = 0x0D1F; +ESIAFE = 0x0D20; +ESIAFE_L = 0x0D20; +ESIAFE_H = 0x0D21; +ESIPPU = 0x0D22; +ESIPPU_L = 0x0D22; +ESIPPU_H = 0x0D23; +ESITSM = 0x0D24; +ESITSM_L = 0x0D24; +ESITSM_H = 0x0D25; +ESIPSM = 0x0D26; +ESIPSM_L = 0x0D26; +ESIPSM_H = 0x0D27; +ESIOSC = 0x0D28; +ESIOSC_L = 0x0D28; +ESIOSC_H = 0x0D29; +ESICTL = 0x0D2A; +ESICTL_L = 0x0D2A; +ESICTL_H = 0x0D2B; +ESITHR1 = 0x0D2C; +ESITHR1_L = 0x0D2C; +ESITHR1_H = 0x0D2D; +ESITHR2 = 0x0D2E; +ESITHR2_L = 0x0D2E; +ESITHR2_H = 0x0D2F; +ESIDAC1R0 = 0x0D40; +ESIDAC1R0_L = 0x0D40; +ESIDAC1R0_H = 0x0D41; +ESIDAC1R1 = 0x0D42; +ESIDAC1R1_L = 0x0D42; +ESIDAC1R1_H = 0x0D43; +ESIDAC1R2 = 0x0D44; +ESIDAC1R2_L = 0x0D44; +ESIDAC1R2_H = 0x0D45; +ESIDAC1R3 = 0x0D46; +ESIDAC1R3_L = 0x0D46; +ESIDAC1R3_H = 0x0D47; +ESIDAC1R4 = 0x0D48; +ESIDAC1R4_L = 0x0D48; +ESIDAC1R4_H = 0x0D49; +ESIDAC1R5 = 0x0D4A; +ESIDAC1R5_L = 0x0D4A; +ESIDAC1R5_H = 0x0D4B; +ESIDAC1R6 = 0x0D4C; +ESIDAC1R6_L = 0x0D4C; +ESIDAC1R6_H = 0x0D4D; +ESIDAC1R7 = 0x0D4E; +ESIDAC1R7_L = 0x0D4E; +ESIDAC1R7_H = 0x0D4F; +ESIDAC2R0 = 0x0D50; +ESIDAC2R0_L = 0x0D50; +ESIDAC2R0_H = 0x0D51; +ESIDAC2R1 = 0x0D52; +ESIDAC2R1_L = 0x0D52; +ESIDAC2R1_H = 0x0D53; +ESIDAC2R2 = 0x0D54; +ESIDAC2R2_L = 0x0D54; +ESIDAC2R2_H = 0x0D55; +ESIDAC2R3 = 0x0D56; +ESIDAC2R3_L = 0x0D56; +ESIDAC2R3_H = 0x0D57; +ESIDAC2R4 = 0x0D58; +ESIDAC2R4_L = 0x0D58; +ESIDAC2R4_H = 0x0D59; +ESIDAC2R5 = 0x0D5A; +ESIDAC2R5_L = 0x0D5A; +ESIDAC2R5_H = 0x0D5B; +ESIDAC2R6 = 0x0D5C; +ESIDAC2R6_L = 0x0D5C; +ESIDAC2R6_H = 0x0D5D; +ESIDAC2R7 = 0x0D5E; +ESIDAC2R7_L = 0x0D5E; +ESIDAC2R7_H = 0x0D5F; +ESITSM0 = 0x0D60; +ESITSM0_L = 0x0D60; +ESITSM0_H = 0x0D61; +ESITSM1 = 0x0D62; +ESITSM1_L = 0x0D62; +ESITSM1_H = 0x0D63; +ESITSM2 = 0x0D64; +ESITSM2_L = 0x0D64; +ESITSM2_H = 0x0D65; +ESITSM3 = 0x0D66; +ESITSM3_L = 0x0D66; +ESITSM3_H = 0x0D67; +ESITSM4 = 0x0D68; +ESITSM4_L = 0x0D68; +ESITSM4_H = 0x0D69; +ESITSM5 = 0x0D6A; +ESITSM5_L = 0x0D6A; +ESITSM5_H = 0x0D6B; +ESITSM6 = 0x0D6C; +ESITSM6_L = 0x0D6C; +ESITSM6_H = 0x0D6D; +ESITSM7 = 0x0D6E; +ESITSM7_L = 0x0D6E; +ESITSM7_H = 0x0D6F; +ESITSM8 = 0x0D70; +ESITSM8_L = 0x0D70; +ESITSM8_H = 0x0D71; +ESITSM9 = 0x0D72; +ESITSM9_L = 0x0D72; +ESITSM9_H = 0x0D73; +ESITSM10 = 0x0D74; +ESITSM10_L = 0x0D74; +ESITSM10_H = 0x0D75; +ESITSM11 = 0x0D76; +ESITSM11_L = 0x0D76; +ESITSM11_H = 0x0D77; +ESITSM12 = 0x0D78; +ESITSM12_L = 0x0D78; +ESITSM12_H = 0x0D79; +ESITSM13 = 0x0D7A; +ESITSM13_L = 0x0D7A; +ESITSM13_H = 0x0D7B; +ESITSM14 = 0x0D7C; +ESITSM14_L = 0x0D7C; +ESITSM14_H = 0x0D7D; +ESITSM15 = 0x0D7E; +ESITSM15_L = 0x0D7E; +ESITSM15_H = 0x0D7F; +ESITSM16 = 0x0D80; +ESITSM16_L = 0x0D80; +ESITSM16_H = 0x0D81; +ESITSM17 = 0x0D82; +ESITSM17_L = 0x0D82; +ESITSM17_H = 0x0D83; +ESITSM18 = 0x0D84; +ESITSM18_L = 0x0D84; +ESITSM18_H = 0x0D85; +ESITSM19 = 0x0D86; +ESITSM19_L = 0x0D86; +ESITSM19_H = 0x0D87; +ESITSM20 = 0x0D88; +ESITSM20_L = 0x0D88; +ESITSM20_H = 0x0D89; +ESITSM21 = 0x0D8A; +ESITSM21_L = 0x0D8A; +ESITSM21_H = 0x0D8B; +ESITSM22 = 0x0D8C; +ESITSM22_L = 0x0D8C; +ESITSM22_H = 0x0D8D; +ESITSM23 = 0x0D8E; +ESITSM23_L = 0x0D8E; +ESITSM23_H = 0x0D8F; +ESITSM24 = 0x0D90; +ESITSM24_L = 0x0D90; +ESITSM24_H = 0x0D91; +ESITSM25 = 0x0D92; +ESITSM25_L = 0x0D92; +ESITSM25_H = 0x0D93; +ESITSM26 = 0x0D94; +ESITSM26_L = 0x0D94; +ESITSM26_H = 0x0D95; +ESITSM27 = 0x0D96; +ESITSM27_L = 0x0D96; +ESITSM27_H = 0x0D97; +ESITSM28 = 0x0D98; +ESITSM28_L = 0x0D98; +ESITSM28_H = 0x0D99; +ESITSM29 = 0x0D9A; +ESITSM29_L = 0x0D9A; +ESITSM29_H = 0x0D9B; +ESITSM30 = 0x0D9C; +ESITSM30_L = 0x0D9C; +ESITSM30_H = 0x0D9D; +ESITSM31 = 0x0D9E; +ESITSM31_L = 0x0D9E; +ESITSM31_H = 0x0D9F; +/************************************************************ +* EXTENDED SCAN INTERFACE RAM +************************************************************/ +ESIRAM0 = 0x0E00; +ESIRAM1 = 0x0E01; +ESIRAM2 = 0x0E02; +ESIRAM3 = 0x0E03; +ESIRAM4 = 0x0E04; +ESIRAM5 = 0x0E05; +ESIRAM6 = 0x0E06; +ESIRAM7 = 0x0E07; +ESIRAM8 = 0x0E08; +ESIRAM9 = 0x0E09; +ESIRAM10 = 0x0E0A; +ESIRAM11 = 0x0E0B; +ESIRAM12 = 0x0E0C; +ESIRAM13 = 0x0E0D; +ESIRAM14 = 0x0E0E; +ESIRAM15 = 0x0E0F; +ESIRAM16 = 0x0E10; +ESIRAM17 = 0x0E11; +ESIRAM18 = 0x0E12; +ESIRAM19 = 0x0E13; +ESIRAM20 = 0x0E14; +ESIRAM21 = 0x0E15; +ESIRAM22 = 0x0E16; +ESIRAM23 = 0x0E17; +ESIRAM24 = 0x0E18; +ESIRAM25 = 0x0E19; +ESIRAM26 = 0x0E1A; +ESIRAM27 = 0x0E1B; +ESIRAM28 = 0x0E1C; +ESIRAM29 = 0x0E1D; +ESIRAM30 = 0x0E1E; +ESIRAM31 = 0x0E1F; +ESIRAM32 = 0x0E20; +ESIRAM33 = 0x0E21; +ESIRAM34 = 0x0E22; +ESIRAM35 = 0x0E23; +ESIRAM36 = 0x0E24; +ESIRAM37 = 0x0E25; +ESIRAM38 = 0x0E26; +ESIRAM39 = 0x0E27; +ESIRAM40 = 0x0E28; +ESIRAM41 = 0x0E29; +ESIRAM42 = 0x0E2A; +ESIRAM43 = 0x0E2B; +ESIRAM44 = 0x0E2C; +ESIRAM45 = 0x0E2D; +ESIRAM46 = 0x0E2E; +ESIRAM47 = 0x0E2F; +ESIRAM48 = 0x0E30; +ESIRAM49 = 0x0E31; +ESIRAM50 = 0x0E32; +ESIRAM51 = 0x0E33; +ESIRAM52 = 0x0E34; +ESIRAM53 = 0x0E35; +ESIRAM54 = 0x0E36; +ESIRAM55 = 0x0E37; +ESIRAM56 = 0x0E38; +ESIRAM57 = 0x0E39; +ESIRAM58 = 0x0E3A; +ESIRAM59 = 0x0E3B; +ESIRAM60 = 0x0E3C; +ESIRAM61 = 0x0E3D; +ESIRAM62 = 0x0E3E; +ESIRAM63 = 0x0E3F; +ESIRAM64 = 0x0E40; +ESIRAM65 = 0x0E41; +ESIRAM66 = 0x0E42; +ESIRAM67 = 0x0E43; +ESIRAM68 = 0x0E44; +ESIRAM69 = 0x0E45; +ESIRAM70 = 0x0E46; +ESIRAM71 = 0x0E47; +ESIRAM72 = 0x0E48; +ESIRAM73 = 0x0E49; +ESIRAM74 = 0x0E4A; +ESIRAM75 = 0x0E4B; +ESIRAM76 = 0x0E4C; +ESIRAM77 = 0x0E4D; +ESIRAM78 = 0x0E4E; +ESIRAM79 = 0x0E4F; +ESIRAM80 = 0x0E50; +ESIRAM81 = 0x0E51; +ESIRAM82 = 0x0E52; +ESIRAM83 = 0x0E53; +ESIRAM84 = 0x0E54; +ESIRAM85 = 0x0E55; +ESIRAM86 = 0x0E56; +ESIRAM87 = 0x0E57; +ESIRAM88 = 0x0E58; +ESIRAM89 = 0x0E59; +ESIRAM90 = 0x0E5A; +ESIRAM91 = 0x0E5B; +ESIRAM92 = 0x0E5C; +ESIRAM93 = 0x0E5D; +ESIRAM94 = 0x0E5E; +ESIRAM95 = 0x0E5F; +ESIRAM96 = 0x0E60; +ESIRAM97 = 0x0E61; +ESIRAM98 = 0x0E62; +ESIRAM99 = 0x0E63; +ESIRAM100 = 0x0E64; +ESIRAM101 = 0x0E65; +ESIRAM102 = 0x0E66; +ESIRAM103 = 0x0E67; +ESIRAM104 = 0x0E68; +ESIRAM105 = 0x0E69; +ESIRAM106 = 0x0E6A; +ESIRAM107 = 0x0E6B; +ESIRAM108 = 0x0E6C; +ESIRAM109 = 0x0E6D; +ESIRAM110 = 0x0E6E; +ESIRAM111 = 0x0E6F; +ESIRAM112 = 0x0E70; +ESIRAM113 = 0x0E71; +ESIRAM114 = 0x0E72; +ESIRAM115 = 0x0E73; +ESIRAM116 = 0x0E74; +ESIRAM117 = 0x0E75; +ESIRAM118 = 0x0E76; +ESIRAM119 = 0x0E77; +ESIRAM120 = 0x0E78; +ESIRAM121 = 0x0E79; +ESIRAM122 = 0x0E7A; +ESIRAM123 = 0x0E7B; +ESIRAM124 = 0x0E7C; +ESIRAM125 = 0x0E7D; +ESIRAM126 = 0x0E7E; +ESIRAM127 = 0x0E7F; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr58891.cmd b/msp430/msp430fr58891.cmd new file mode 100644 index 00000000..01af96c7 --- /dev/null +++ b/msp430/msp430fr58891.cmd @@ -0,0 +1,1424 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr58891.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************ +* EXTENDED SCAN INTERFACE +************************************************************/ +ESIDEBUG1 = 0x0D00; +ESIDEBUG1_L = 0x0D00; +ESIDEBUG1_H = 0x0D01; +ESIDEBUG2 = 0x0D02; +ESIDEBUG2_L = 0x0D02; +ESIDEBUG2_H = 0x0D03; +ESIDEBUG3 = 0x0D04; +ESIDEBUG3_L = 0x0D04; +ESIDEBUG3_H = 0x0D05; +ESIDEBUG4 = 0x0D06; +ESIDEBUG4_L = 0x0D06; +ESIDEBUG4_H = 0x0D07; +ESIDEBUG5 = 0x0D08; +ESIDEBUG5_L = 0x0D08; +ESIDEBUG5_H = 0x0D09; +ESICNT0 = 0x0D10; +ESICNT0_L = 0x0D10; +ESICNT0_H = 0x0D11; +ESICNT1 = 0x0D12; +ESICNT1_L = 0x0D12; +ESICNT1_H = 0x0D13; +ESICNT2 = 0x0D14; +ESICNT2_L = 0x0D14; +ESICNT2_H = 0x0D15; +ESICNT3 = 0x0D16; +ESICNT3_L = 0x0D16; +ESICNT3_H = 0x0D17; +ESIIV = 0x0D1A; +ESIIV_L = 0x0D1A; +ESIIV_H = 0x0D1B; +ESIINT1 = 0x0D1C; +ESIINT1_L = 0x0D1C; +ESIINT1_H = 0x0D1D; +ESIINT2 = 0x0D1E; +ESIINT2_L = 0x0D1E; +ESIINT2_H = 0x0D1F; +ESIAFE = 0x0D20; +ESIAFE_L = 0x0D20; +ESIAFE_H = 0x0D21; +ESIPPU = 0x0D22; +ESIPPU_L = 0x0D22; +ESIPPU_H = 0x0D23; +ESITSM = 0x0D24; +ESITSM_L = 0x0D24; +ESITSM_H = 0x0D25; +ESIPSM = 0x0D26; +ESIPSM_L = 0x0D26; +ESIPSM_H = 0x0D27; +ESIOSC = 0x0D28; +ESIOSC_L = 0x0D28; +ESIOSC_H = 0x0D29; +ESICTL = 0x0D2A; +ESICTL_L = 0x0D2A; +ESICTL_H = 0x0D2B; +ESITHR1 = 0x0D2C; +ESITHR1_L = 0x0D2C; +ESITHR1_H = 0x0D2D; +ESITHR2 = 0x0D2E; +ESITHR2_L = 0x0D2E; +ESITHR2_H = 0x0D2F; +ESIDAC1R0 = 0x0D40; +ESIDAC1R0_L = 0x0D40; +ESIDAC1R0_H = 0x0D41; +ESIDAC1R1 = 0x0D42; +ESIDAC1R1_L = 0x0D42; +ESIDAC1R1_H = 0x0D43; +ESIDAC1R2 = 0x0D44; +ESIDAC1R2_L = 0x0D44; +ESIDAC1R2_H = 0x0D45; +ESIDAC1R3 = 0x0D46; +ESIDAC1R3_L = 0x0D46; +ESIDAC1R3_H = 0x0D47; +ESIDAC1R4 = 0x0D48; +ESIDAC1R4_L = 0x0D48; +ESIDAC1R4_H = 0x0D49; +ESIDAC1R5 = 0x0D4A; +ESIDAC1R5_L = 0x0D4A; +ESIDAC1R5_H = 0x0D4B; +ESIDAC1R6 = 0x0D4C; +ESIDAC1R6_L = 0x0D4C; +ESIDAC1R6_H = 0x0D4D; +ESIDAC1R7 = 0x0D4E; +ESIDAC1R7_L = 0x0D4E; +ESIDAC1R7_H = 0x0D4F; +ESIDAC2R0 = 0x0D50; +ESIDAC2R0_L = 0x0D50; +ESIDAC2R0_H = 0x0D51; +ESIDAC2R1 = 0x0D52; +ESIDAC2R1_L = 0x0D52; +ESIDAC2R1_H = 0x0D53; +ESIDAC2R2 = 0x0D54; +ESIDAC2R2_L = 0x0D54; +ESIDAC2R2_H = 0x0D55; +ESIDAC2R3 = 0x0D56; +ESIDAC2R3_L = 0x0D56; +ESIDAC2R3_H = 0x0D57; +ESIDAC2R4 = 0x0D58; +ESIDAC2R4_L = 0x0D58; +ESIDAC2R4_H = 0x0D59; +ESIDAC2R5 = 0x0D5A; +ESIDAC2R5_L = 0x0D5A; +ESIDAC2R5_H = 0x0D5B; +ESIDAC2R6 = 0x0D5C; +ESIDAC2R6_L = 0x0D5C; +ESIDAC2R6_H = 0x0D5D; +ESIDAC2R7 = 0x0D5E; +ESIDAC2R7_L = 0x0D5E; +ESIDAC2R7_H = 0x0D5F; +ESITSM0 = 0x0D60; +ESITSM0_L = 0x0D60; +ESITSM0_H = 0x0D61; +ESITSM1 = 0x0D62; +ESITSM1_L = 0x0D62; +ESITSM1_H = 0x0D63; +ESITSM2 = 0x0D64; +ESITSM2_L = 0x0D64; +ESITSM2_H = 0x0D65; +ESITSM3 = 0x0D66; +ESITSM3_L = 0x0D66; +ESITSM3_H = 0x0D67; +ESITSM4 = 0x0D68; +ESITSM4_L = 0x0D68; +ESITSM4_H = 0x0D69; +ESITSM5 = 0x0D6A; +ESITSM5_L = 0x0D6A; +ESITSM5_H = 0x0D6B; +ESITSM6 = 0x0D6C; +ESITSM6_L = 0x0D6C; +ESITSM6_H = 0x0D6D; +ESITSM7 = 0x0D6E; +ESITSM7_L = 0x0D6E; +ESITSM7_H = 0x0D6F; +ESITSM8 = 0x0D70; +ESITSM8_L = 0x0D70; +ESITSM8_H = 0x0D71; +ESITSM9 = 0x0D72; +ESITSM9_L = 0x0D72; +ESITSM9_H = 0x0D73; +ESITSM10 = 0x0D74; +ESITSM10_L = 0x0D74; +ESITSM10_H = 0x0D75; +ESITSM11 = 0x0D76; +ESITSM11_L = 0x0D76; +ESITSM11_H = 0x0D77; +ESITSM12 = 0x0D78; +ESITSM12_L = 0x0D78; +ESITSM12_H = 0x0D79; +ESITSM13 = 0x0D7A; +ESITSM13_L = 0x0D7A; +ESITSM13_H = 0x0D7B; +ESITSM14 = 0x0D7C; +ESITSM14_L = 0x0D7C; +ESITSM14_H = 0x0D7D; +ESITSM15 = 0x0D7E; +ESITSM15_L = 0x0D7E; +ESITSM15_H = 0x0D7F; +ESITSM16 = 0x0D80; +ESITSM16_L = 0x0D80; +ESITSM16_H = 0x0D81; +ESITSM17 = 0x0D82; +ESITSM17_L = 0x0D82; +ESITSM17_H = 0x0D83; +ESITSM18 = 0x0D84; +ESITSM18_L = 0x0D84; +ESITSM18_H = 0x0D85; +ESITSM19 = 0x0D86; +ESITSM19_L = 0x0D86; +ESITSM19_H = 0x0D87; +ESITSM20 = 0x0D88; +ESITSM20_L = 0x0D88; +ESITSM20_H = 0x0D89; +ESITSM21 = 0x0D8A; +ESITSM21_L = 0x0D8A; +ESITSM21_H = 0x0D8B; +ESITSM22 = 0x0D8C; +ESITSM22_L = 0x0D8C; +ESITSM22_H = 0x0D8D; +ESITSM23 = 0x0D8E; +ESITSM23_L = 0x0D8E; +ESITSM23_H = 0x0D8F; +ESITSM24 = 0x0D90; +ESITSM24_L = 0x0D90; +ESITSM24_H = 0x0D91; +ESITSM25 = 0x0D92; +ESITSM25_L = 0x0D92; +ESITSM25_H = 0x0D93; +ESITSM26 = 0x0D94; +ESITSM26_L = 0x0D94; +ESITSM26_H = 0x0D95; +ESITSM27 = 0x0D96; +ESITSM27_L = 0x0D96; +ESITSM27_H = 0x0D97; +ESITSM28 = 0x0D98; +ESITSM28_L = 0x0D98; +ESITSM28_H = 0x0D99; +ESITSM29 = 0x0D9A; +ESITSM29_L = 0x0D9A; +ESITSM29_H = 0x0D9B; +ESITSM30 = 0x0D9C; +ESITSM30_L = 0x0D9C; +ESITSM30_H = 0x0D9D; +ESITSM31 = 0x0D9E; +ESITSM31_L = 0x0D9E; +ESITSM31_H = 0x0D9F; +/************************************************************ +* EXTENDED SCAN INTERFACE RAM +************************************************************/ +ESIRAM0 = 0x0E00; +ESIRAM1 = 0x0E01; +ESIRAM2 = 0x0E02; +ESIRAM3 = 0x0E03; +ESIRAM4 = 0x0E04; +ESIRAM5 = 0x0E05; +ESIRAM6 = 0x0E06; +ESIRAM7 = 0x0E07; +ESIRAM8 = 0x0E08; +ESIRAM9 = 0x0E09; +ESIRAM10 = 0x0E0A; +ESIRAM11 = 0x0E0B; +ESIRAM12 = 0x0E0C; +ESIRAM13 = 0x0E0D; +ESIRAM14 = 0x0E0E; +ESIRAM15 = 0x0E0F; +ESIRAM16 = 0x0E10; +ESIRAM17 = 0x0E11; +ESIRAM18 = 0x0E12; +ESIRAM19 = 0x0E13; +ESIRAM20 = 0x0E14; +ESIRAM21 = 0x0E15; +ESIRAM22 = 0x0E16; +ESIRAM23 = 0x0E17; +ESIRAM24 = 0x0E18; +ESIRAM25 = 0x0E19; +ESIRAM26 = 0x0E1A; +ESIRAM27 = 0x0E1B; +ESIRAM28 = 0x0E1C; +ESIRAM29 = 0x0E1D; +ESIRAM30 = 0x0E1E; +ESIRAM31 = 0x0E1F; +ESIRAM32 = 0x0E20; +ESIRAM33 = 0x0E21; +ESIRAM34 = 0x0E22; +ESIRAM35 = 0x0E23; +ESIRAM36 = 0x0E24; +ESIRAM37 = 0x0E25; +ESIRAM38 = 0x0E26; +ESIRAM39 = 0x0E27; +ESIRAM40 = 0x0E28; +ESIRAM41 = 0x0E29; +ESIRAM42 = 0x0E2A; +ESIRAM43 = 0x0E2B; +ESIRAM44 = 0x0E2C; +ESIRAM45 = 0x0E2D; +ESIRAM46 = 0x0E2E; +ESIRAM47 = 0x0E2F; +ESIRAM48 = 0x0E30; +ESIRAM49 = 0x0E31; +ESIRAM50 = 0x0E32; +ESIRAM51 = 0x0E33; +ESIRAM52 = 0x0E34; +ESIRAM53 = 0x0E35; +ESIRAM54 = 0x0E36; +ESIRAM55 = 0x0E37; +ESIRAM56 = 0x0E38; +ESIRAM57 = 0x0E39; +ESIRAM58 = 0x0E3A; +ESIRAM59 = 0x0E3B; +ESIRAM60 = 0x0E3C; +ESIRAM61 = 0x0E3D; +ESIRAM62 = 0x0E3E; +ESIRAM63 = 0x0E3F; +ESIRAM64 = 0x0E40; +ESIRAM65 = 0x0E41; +ESIRAM66 = 0x0E42; +ESIRAM67 = 0x0E43; +ESIRAM68 = 0x0E44; +ESIRAM69 = 0x0E45; +ESIRAM70 = 0x0E46; +ESIRAM71 = 0x0E47; +ESIRAM72 = 0x0E48; +ESIRAM73 = 0x0E49; +ESIRAM74 = 0x0E4A; +ESIRAM75 = 0x0E4B; +ESIRAM76 = 0x0E4C; +ESIRAM77 = 0x0E4D; +ESIRAM78 = 0x0E4E; +ESIRAM79 = 0x0E4F; +ESIRAM80 = 0x0E50; +ESIRAM81 = 0x0E51; +ESIRAM82 = 0x0E52; +ESIRAM83 = 0x0E53; +ESIRAM84 = 0x0E54; +ESIRAM85 = 0x0E55; +ESIRAM86 = 0x0E56; +ESIRAM87 = 0x0E57; +ESIRAM88 = 0x0E58; +ESIRAM89 = 0x0E59; +ESIRAM90 = 0x0E5A; +ESIRAM91 = 0x0E5B; +ESIRAM92 = 0x0E5C; +ESIRAM93 = 0x0E5D; +ESIRAM94 = 0x0E5E; +ESIRAM95 = 0x0E5F; +ESIRAM96 = 0x0E60; +ESIRAM97 = 0x0E61; +ESIRAM98 = 0x0E62; +ESIRAM99 = 0x0E63; +ESIRAM100 = 0x0E64; +ESIRAM101 = 0x0E65; +ESIRAM102 = 0x0E66; +ESIRAM103 = 0x0E67; +ESIRAM104 = 0x0E68; +ESIRAM105 = 0x0E69; +ESIRAM106 = 0x0E6A; +ESIRAM107 = 0x0E6B; +ESIRAM108 = 0x0E6C; +ESIRAM109 = 0x0E6D; +ESIRAM110 = 0x0E6E; +ESIRAM111 = 0x0E6F; +ESIRAM112 = 0x0E70; +ESIRAM113 = 0x0E71; +ESIRAM114 = 0x0E72; +ESIRAM115 = 0x0E73; +ESIRAM116 = 0x0E74; +ESIRAM117 = 0x0E75; +ESIRAM118 = 0x0E76; +ESIRAM119 = 0x0E77; +ESIRAM120 = 0x0E78; +ESIRAM121 = 0x0E79; +ESIRAM122 = 0x0E7A; +ESIRAM123 = 0x0E7B; +ESIRAM124 = 0x0E7C; +ESIRAM125 = 0x0E7D; +ESIRAM126 = 0x0E7E; +ESIRAM127 = 0x0E7F; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5922.cmd b/msp430/msp430fr5922.cmd new file mode 100644 index 00000000..27fba476 --- /dev/null +++ b/msp430/msp430fr5922.cmd @@ -0,0 +1,1113 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5922.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr59221.cmd b/msp430/msp430fr59221.cmd new file mode 100644 index 00000000..30a087ef --- /dev/null +++ b/msp430/msp430fr59221.cmd @@ -0,0 +1,1113 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr59221.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5947.cmd b/msp430/msp430fr5947.cmd new file mode 100644 index 00000000..91560f33 --- /dev/null +++ b/msp430/msp430fr5947.cmd @@ -0,0 +1,923 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5947.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr59471.cmd b/msp430/msp430fr59471.cmd new file mode 100644 index 00000000..f94ca9d3 --- /dev/null +++ b/msp430/msp430fr59471.cmd @@ -0,0 +1,923 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr59471.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5948.cmd b/msp430/msp430fr5948.cmd new file mode 100644 index 00000000..fe0d196d --- /dev/null +++ b/msp430/msp430fr5948.cmd @@ -0,0 +1,923 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5948.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5949.cmd b/msp430/msp430fr5949.cmd new file mode 100644 index 00000000..aeea765f --- /dev/null +++ b/msp430/msp430fr5949.cmd @@ -0,0 +1,923 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5949.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5957.cmd b/msp430/msp430fr5957.cmd new file mode 100644 index 00000000..6dc20eb4 --- /dev/null +++ b/msp430/msp430fr5957.cmd @@ -0,0 +1,923 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5957.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5958.cmd b/msp430/msp430fr5958.cmd new file mode 100644 index 00000000..6b5b473d --- /dev/null +++ b/msp430/msp430fr5958.cmd @@ -0,0 +1,923 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5958.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5959.cmd b/msp430/msp430fr5959.cmd new file mode 100644 index 00000000..1c60f769 --- /dev/null +++ b/msp430/msp430fr5959.cmd @@ -0,0 +1,923 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5959.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5962.cmd b/msp430/msp430fr5962.cmd new file mode 100644 index 00000000..53899ff6 --- /dev/null +++ b/msp430/msp430fr5962.cmd @@ -0,0 +1,1795 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr5962.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC12_B +*****************************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; + + +/***************************************************************************** + AES256 +*****************************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; + + +/***************************************************************************** + CAPTIO0 +*****************************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; + + +/***************************************************************************** + CAPTIO1 +*****************************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; + + +/***************************************************************************** + COMP_E +*****************************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; + + +/***************************************************************************** + CRC32 +*****************************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +P7IV = 0x026E; +P7IV_L = 0x026E; +P7IV_H = 0x026F; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +PDIES = 0x0278; +PDIES_L = 0x0278; +PDIES_H = 0x0279; +PDIE = 0x027A; +PDIE_L = 0x027A; +PDIE_H = 0x027B; +PDIFG = 0x027C; +PDIFG_L = 0x027C; +PDIFG_H = 0x027D; +P8IV = 0x027E; +P8IV_L = 0x027E; +P8IV_H = 0x027F; +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +P9IV = 0x028E; +P9IV_L = 0x028E; +P9IV_H = 0x028F; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +PEIES = 0x0298; +PEIES_L = 0x0298; +PEIES_H = 0x0299; +PEIE = 0x029A; +PEIE_L = 0x029A; +PEIE_H = 0x029B; +PEIFG = 0x029C; +PEIFG_L = 0x029C; +PEIFG_H = 0x029D; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + +P7IN = 0x0260; + +P8IN = 0x0261; + +P7OUT = 0x0262; + +P8OUT = 0x0263; + +P7DIR = 0x0264; + +P8DIR = 0x0265; + +P7REN = 0x0266; + +P8REN = 0x0267; + +P7SEL0 = 0x026A; + +P8SEL0 = 0x026B; + +P7SEL1 = 0x026C; + +P8SEL1 = 0x026D; + +P7SELC = 0x0276; + +P8SELC = 0x0277; + +P7IES = 0x0278; + +P8IES = 0x0279; + +P7IE = 0x027A; + +P8IE = 0x027B; + +P7IFG = 0x027C; + +P8IFG = 0x027D; + +P9IN = 0x0280; + +P9OUT = 0x0282; + +P9DIR = 0x0284; + +P9REN = 0x0286; + +P9SEL0 = 0x028A; + +P9SEL1 = 0x028C; + +P9SELC = 0x0296; + +P9IES = 0x0298; + +P9IE = 0x029A; + +P9IFG = 0x029C; + + + +/***************************************************************************** + DMA +*****************************************************************************/ +DMACTL0 = 0x0500; +DMACTL0_L = 0x0500; +DMACTL0_H = 0x0501; +DMACTL1 = 0x0502; +DMACTL1_L = 0x0502; +DMACTL1_H = 0x0503; +DMACTL2 = 0x0504; +DMACTL2_L = 0x0504; +DMACTL2_H = 0x0505; +DMACTL4 = 0x0508; +DMACTL4_L = 0x0508; +DMACTL4_H = 0x0509; +DMAIV = 0x050E; +DMAIV_L = 0x050E; +DMAIV_H = 0x050F; +DMA0CTL = 0x0510; +DMA0CTL_L = 0x0510; +DMA0CTL_H = 0x0511; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA0SZ_L = 0x051A; +DMA0SZ_H = 0x051B; +DMA1CTL = 0x0520; +DMA1CTL_L = 0x0520; +DMA1CTL_H = 0x0521; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA1SZ_L = 0x052A; +DMA1SZ_H = 0x052B; +DMA2CTL = 0x0530; +DMA2CTL_L = 0x0530; +DMA2CTL_H = 0x0531; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA2SZ_L = 0x053A; +DMA2SZ_H = 0x053B; +DMA3CTL = 0x0540; +DMA3CTL_L = 0x0540; +DMA3CTL_H = 0x0541; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA3SZ_L = 0x054A; +DMA3SZ_H = 0x054B; +DMA4CTL = 0x0550; +DMA4CTL_L = 0x0550; +DMA4CTL_H = 0x0551; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA4SZ_L = 0x055A; +DMA4SZ_H = 0x055B; +DMA5CTL = 0x0560; +DMA5CTL_L = 0x0560; +DMA5CTL_H = 0x0561; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +DMA5SZ_L = 0x056A; +DMA5SZ_H = 0x056B; + + +/***************************************************************************** + FRCTL_A +*****************************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; + + +/***************************************************************************** + MPU +*****************************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RAMCTL +*****************************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; + + +/***************************************************************************** + REF_A +*****************************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; + + +/***************************************************************************** + RTC_C +*****************************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCIV_L = 0x04AE; +RTCIV_H = 0x04AF; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCCNT12 = 0x04B0; +RTCCNT12_L = 0x04B0; +RTCCNT12_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCCNT34 = 0x04B2; +RTCCNT34_L = 0x04B2; +RTCCNT34_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BIN2BCD_L = 0x04BC; +BIN2BCD_H = 0x04BD; +BCD2BIN = 0x04BE; +BCD2BIN_L = 0x04BE; +BCD2BIN_H = 0x04BF; +RT0PS = 0x04AC; + +RT1PS = 0x04AD; + +RTCCNT1 = 0x04B0; + +RTCCNT2 = 0x04B1; + +RTCCNT3 = 0x04B2; + +RTCCNT4 = 0x04B3; + + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0340; +TA0CTL_L = 0x0340; +TA0CTL_H = 0x0341; +TA0CCTL0 = 0x0342; +TA0CCTL0_L = 0x0342; +TA0CCTL0_H = 0x0343; +TA0CCTL1 = 0x0344; +TA0CCTL1_L = 0x0344; +TA0CCTL1_H = 0x0345; +TA0CCTL2 = 0x0346; +TA0CCTL2_L = 0x0346; +TA0CCTL2_H = 0x0347; +TA0R = 0x0350; +TA0R_L = 0x0350; +TA0R_H = 0x0351; +TA0CCR0 = 0x0352; +TA0CCR0_L = 0x0352; +TA0CCR0_H = 0x0353; +TA0CCR1 = 0x0354; +TA0CCR1_L = 0x0354; +TA0CCR1_H = 0x0355; +TA0CCR2 = 0x0356; +TA0CCR2_L = 0x0356; +TA0CCR2_H = 0x0357; +TA0EX0 = 0x0360; +TA0EX0_L = 0x0360; +TA0EX0_H = 0x0361; +TA0IV = 0x036E; +TA0IV_L = 0x036E; +TA0IV_H = 0x036F; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x0380; +TA1CTL_L = 0x0380; +TA1CTL_H = 0x0381; +TA1CCTL0 = 0x0382; +TA1CCTL0_L = 0x0382; +TA1CCTL0_H = 0x0383; +TA1CCTL1 = 0x0384; +TA1CCTL1_L = 0x0384; +TA1CCTL1_H = 0x0385; +TA1CCTL2 = 0x0386; +TA1CCTL2_L = 0x0386; +TA1CCTL2_H = 0x0387; +TA1R = 0x0390; +TA1R_L = 0x0390; +TA1R_H = 0x0391; +TA1CCR0 = 0x0392; +TA1CCR0_L = 0x0392; +TA1CCR0_H = 0x0393; +TA1CCR1 = 0x0394; +TA1CCR1_L = 0x0394; +TA1CCR1_H = 0x0395; +TA1CCR2 = 0x0396; +TA1CCR2_L = 0x0396; +TA1CCR2_H = 0x0397; +TA1EX0 = 0x03A0; +TA1EX0_L = 0x03A0; +TA1EX0_H = 0x03A1; +TA1IV = 0x03AE; +TA1IV_L = 0x03AE; +TA1IV_H = 0x03AF; + + +/***************************************************************************** + TA2 +*****************************************************************************/ +TA2CTL = 0x0400; +TA2CTL_L = 0x0400; +TA2CTL_H = 0x0401; +TA2CCTL0 = 0x0402; +TA2CCTL0_L = 0x0402; +TA2CCTL0_H = 0x0403; +TA2CCTL1 = 0x0404; +TA2CCTL1_L = 0x0404; +TA2CCTL1_H = 0x0405; +TA2R = 0x0410; +TA2R_L = 0x0410; +TA2R_H = 0x0411; +TA2CCR0 = 0x0412; +TA2CCR0_L = 0x0412; +TA2CCR0_H = 0x0413; +TA2CCR1 = 0x0414; +TA2CCR1_L = 0x0414; +TA2CCR1_H = 0x0415; +TA2EX0 = 0x0420; +TA2EX0_L = 0x0420; +TA2EX0_H = 0x0421; +TA2IV = 0x042E; +TA2IV_L = 0x042E; +TA2IV_H = 0x042F; + + +/***************************************************************************** + TA3 +*****************************************************************************/ +TA3CTL = 0x0440; +TA3CTL_L = 0x0440; +TA3CTL_H = 0x0441; +TA3CCTL0 = 0x0442; +TA3CCTL0_L = 0x0442; +TA3CCTL0_H = 0x0443; +TA3CCTL1 = 0x0444; +TA3CCTL1_L = 0x0444; +TA3CCTL1_H = 0x0445; +TA3R = 0x0450; +TA3R_L = 0x0450; +TA3R_H = 0x0451; +TA3CCR0 = 0x0452; +TA3CCR0_L = 0x0452; +TA3CCR0_H = 0x0453; +TA3CCR1 = 0x0454; +TA3CCR1_L = 0x0454; +TA3CCR1_H = 0x0455; +TA3EX0 = 0x0460; +TA3EX0_L = 0x0460; +TA3EX0_H = 0x0461; +TA3IV = 0x046E; +TA3IV_L = 0x046E; +TA3IV_H = 0x046F; + + +/***************************************************************************** + TA4 +*****************************************************************************/ +TA4CTL = 0x07C0; +TA4CTL_L = 0x07C0; +TA4CTL_H = 0x07C1; +TA4CCTL0 = 0x07C2; +TA4CCTL0_L = 0x07C2; +TA4CCTL0_H = 0x07C3; +TA4CCTL1 = 0x07C4; +TA4CCTL1_L = 0x07C4; +TA4CCTL1_H = 0x07C5; +TA4CCTL2 = 0x07C6; +TA4CCTL2_L = 0x07C6; +TA4CCTL2_H = 0x07C7; +TA4R = 0x07D0; +TA4R_L = 0x07D0; +TA4R_H = 0x07D1; +TA4CCR0 = 0x07D2; +TA4CCR0_L = 0x07D2; +TA4CCR0_H = 0x07D3; +TA4CCR1 = 0x07D4; +TA4CCR1_L = 0x07D4; +TA4CCR1_H = 0x07D5; +TA4CCR2 = 0x07D6; +TA4CCR2_L = 0x07D6; +TA4CCR2_H = 0x07D7; +TA4EX0 = 0x07E0; +TA4EX0_L = 0x07E0; +TA4EX0_H = 0x07E1; +TA4IV = 0x07EE; +TA4IV_L = 0x07EE; +TA4IV_H = 0x07EF; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x03C0; +TB0CTL_L = 0x03C0; +TB0CTL_H = 0x03C1; +TB0CCTL0 = 0x03C2; +TB0CCTL0_L = 0x03C2; +TB0CCTL0_H = 0x03C3; +TB0CCTL1 = 0x03C4; +TB0CCTL1_L = 0x03C4; +TB0CCTL1_H = 0x03C5; +TB0CCTL2 = 0x03C6; +TB0CCTL2_L = 0x03C6; +TB0CCTL2_H = 0x03C7; +TB0CCTL3 = 0x03C8; +TB0CCTL3_L = 0x03C8; +TB0CCTL3_H = 0x03C9; +TB0CCTL4 = 0x03CA; +TB0CCTL4_L = 0x03CA; +TB0CCTL4_H = 0x03CB; +TB0CCTL5 = 0x03CC; +TB0CCTL5_L = 0x03CC; +TB0CCTL5_H = 0x03CD; +TB0CCTL6 = 0x03CE; +TB0CCTL6_L = 0x03CE; +TB0CCTL6_H = 0x03CF; +TB0R = 0x03D0; +TB0R_L = 0x03D0; +TB0R_H = 0x03D1; +TB0CCR0 = 0x03D2; +TB0CCR0_L = 0x03D2; +TB0CCR0_H = 0x03D3; +TB0CCR1 = 0x03D4; +TB0CCR1_L = 0x03D4; +TB0CCR1_H = 0x03D5; +TB0CCR2 = 0x03D6; +TB0CCR2_L = 0x03D6; +TB0CCR2_H = 0x03D7; +TB0CCR3 = 0x03D8; +TB0CCR3_L = 0x03D8; +TB0CCR3_H = 0x03D9; +TB0CCR4 = 0x03DA; +TB0CCR4_L = 0x03DA; +TB0CCR4_H = 0x03DB; +TB0CCR5 = 0x03DC; +TB0CCR5_L = 0x03DC; +TB0CCR5_H = 0x03DD; +TB0CCR6 = 0x03DE; +TB0CCR6_L = 0x03DE; +TB0CCR6_H = 0x03DF; +TB0EX0 = 0x03E0; +TB0EX0_L = 0x03E0; +TB0EX0_H = 0x03E1; +TB0IV = 0x03EE; +TB0IV_L = 0x03EE; +TB0IV_H = 0x03EF; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0STATW_L = 0x05CA; +UCA0STATW_H = 0x05CB; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0ABCTL_L = 0x05D0; +UCA0ABCTL_H = 0x05D1; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +UCA0IV_L = 0x05DE; +UCA0IV_H = 0x05DF; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1STATW_L = 0x05EA; +UCA1STATW_H = 0x05EB; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1ABCTL_L = 0x05F0; +UCA1ABCTL_H = 0x05F1; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +UCA1IV_L = 0x05FE; +UCA1IV_H = 0x05FF; + + +/***************************************************************************** + eUSCI_A2 +*****************************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2STATW_L = 0x060A; +UCA2STATW_H = 0x060B; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2ABCTL_L = 0x0610; +UCA2ABCTL_H = 0x0611; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +UCA2IV_L = 0x061E; +UCA2IV_H = 0x061F; + + +/***************************************************************************** + eUSCI_A3 +*****************************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3STATW_L = 0x062A; +UCA3STATW_H = 0x062B; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3ABCTL_L = 0x0630; +UCA3ABCTL_H = 0x0631; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +UCA3IV_L = 0x063E; +UCA3IV_H = 0x063F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +UCB0IV_L = 0x066E; +UCB0IV_H = 0x066F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +UCB1IV_L = 0x06AE; +UCB1IV_H = 0x06AF; + + +/***************************************************************************** + eUSCI_B2 +*****************************************************************************/ +UCB2CTLW0 = 0x06C0; +UCB2CTLW0_L = 0x06C0; +UCB2CTLW0_H = 0x06C1; +UCB2CTLW1 = 0x06C2; +UCB2CTLW1_L = 0x06C2; +UCB2CTLW1_H = 0x06C3; +UCB2BRW = 0x06C6; +UCB2BRW_L = 0x06C6; +UCB2BRW_H = 0x06C7; +UCB2STATW = 0x06C8; +UCB2STATW_L = 0x06C8; +UCB2STATW_H = 0x06C9; +UCB2TBCNT = 0x06CA; +UCB2TBCNT_L = 0x06CA; +UCB2TBCNT_H = 0x06CB; +UCB2RXBUF = 0x06CC; +UCB2RXBUF_L = 0x06CC; +UCB2RXBUF_H = 0x06CD; +UCB2TXBUF = 0x06CE; +UCB2TXBUF_L = 0x06CE; +UCB2TXBUF_H = 0x06CF; +UCB2I2COA0 = 0x06D4; +UCB2I2COA0_L = 0x06D4; +UCB2I2COA0_H = 0x06D5; +UCB2I2COA1 = 0x06D6; +UCB2I2COA1_L = 0x06D6; +UCB2I2COA1_H = 0x06D7; +UCB2I2COA2 = 0x06D8; +UCB2I2COA2_L = 0x06D8; +UCB2I2COA2_H = 0x06D9; +UCB2I2COA3 = 0x06DA; +UCB2I2COA3_L = 0x06DA; +UCB2I2COA3_H = 0x06DB; +UCB2ADDRX = 0x06DC; +UCB2ADDRX_L = 0x06DC; +UCB2ADDRX_H = 0x06DD; +UCB2ADDMASK = 0x06DE; +UCB2ADDMASK_L = 0x06DE; +UCB2ADDMASK_H = 0x06DF; +UCB2I2CSA = 0x06E0; +UCB2I2CSA_L = 0x06E0; +UCB2I2CSA_H = 0x06E1; +UCB2IE = 0x06EA; +UCB2IE_L = 0x06EA; +UCB2IE_H = 0x06EB; +UCB2IFG = 0x06EC; +UCB2IFG_L = 0x06EC; +UCB2IFG_H = 0x06ED; +UCB2IV = 0x06EE; +UCB2IV_L = 0x06EE; +UCB2IV_H = 0x06EF; + + +/***************************************************************************** + eUSCI_B3 +*****************************************************************************/ +UCB3CTLW0 = 0x0700; +UCB3CTLW0_L = 0x0700; +UCB3CTLW0_H = 0x0701; +UCB3CTLW1 = 0x0702; +UCB3CTLW1_L = 0x0702; +UCB3CTLW1_H = 0x0703; +UCB3BRW = 0x0706; +UCB3BRW_L = 0x0706; +UCB3BRW_H = 0x0707; +UCB3STATW = 0x0708; +UCB3STATW_L = 0x0708; +UCB3STATW_H = 0x0709; +UCB3TBCNT = 0x070A; +UCB3TBCNT_L = 0x070A; +UCB3TBCNT_H = 0x070B; +UCB3RXBUF = 0x070C; +UCB3RXBUF_L = 0x070C; +UCB3RXBUF_H = 0x070D; +UCB3TXBUF = 0x070E; +UCB3TXBUF_L = 0x070E; +UCB3TXBUF_H = 0x070F; +UCB3I2COA0 = 0x0714; +UCB3I2COA0_L = 0x0714; +UCB3I2COA0_H = 0x0715; +UCB3I2COA1 = 0x0716; +UCB3I2COA1_L = 0x0716; +UCB3I2COA1_H = 0x0717; +UCB3I2COA2 = 0x0718; +UCB3I2COA2_L = 0x0718; +UCB3I2COA2_H = 0x0719; +UCB3I2COA3 = 0x071A; +UCB3I2COA3_L = 0x071A; +UCB3I2COA3_H = 0x071B; +UCB3ADDRX = 0x071C; +UCB3ADDRX_L = 0x071C; +UCB3ADDRX_H = 0x071D; +UCB3ADDMASK = 0x071E; +UCB3ADDMASK_L = 0x071E; +UCB3ADDMASK_H = 0x071F; +UCB3I2CSA = 0x0720; +UCB3I2CSA_L = 0x0720; +UCB3I2CSA_H = 0x0721; +UCB3IE = 0x072A; +UCB3IE_L = 0x072A; +UCB3IE_H = 0x072B; +UCB3IFG = 0x072C; +UCB3IFG_L = 0x072C; +UCB3IFG_H = 0x072D; +UCB3IV = 0x072E; +UCB3IV_L = 0x072E; +UCB3IV_H = 0x072F; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr5964.cmd b/msp430/msp430fr5964.cmd new file mode 100644 index 00000000..841b263a --- /dev/null +++ b/msp430/msp430fr5964.cmd @@ -0,0 +1,1795 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr5964.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC12_B +*****************************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; + + +/***************************************************************************** + AES256 +*****************************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; + + +/***************************************************************************** + CAPTIO0 +*****************************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; + + +/***************************************************************************** + CAPTIO1 +*****************************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; + + +/***************************************************************************** + COMP_E +*****************************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; + + +/***************************************************************************** + CRC32 +*****************************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +P7IV = 0x026E; +P7IV_L = 0x026E; +P7IV_H = 0x026F; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +PDIES = 0x0278; +PDIES_L = 0x0278; +PDIES_H = 0x0279; +PDIE = 0x027A; +PDIE_L = 0x027A; +PDIE_H = 0x027B; +PDIFG = 0x027C; +PDIFG_L = 0x027C; +PDIFG_H = 0x027D; +P8IV = 0x027E; +P8IV_L = 0x027E; +P8IV_H = 0x027F; +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +P9IV = 0x028E; +P9IV_L = 0x028E; +P9IV_H = 0x028F; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +PEIES = 0x0298; +PEIES_L = 0x0298; +PEIES_H = 0x0299; +PEIE = 0x029A; +PEIE_L = 0x029A; +PEIE_H = 0x029B; +PEIFG = 0x029C; +PEIFG_L = 0x029C; +PEIFG_H = 0x029D; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + +P7IN = 0x0260; + +P8IN = 0x0261; + +P7OUT = 0x0262; + +P8OUT = 0x0263; + +P7DIR = 0x0264; + +P8DIR = 0x0265; + +P7REN = 0x0266; + +P8REN = 0x0267; + +P7SEL0 = 0x026A; + +P8SEL0 = 0x026B; + +P7SEL1 = 0x026C; + +P8SEL1 = 0x026D; + +P7SELC = 0x0276; + +P8SELC = 0x0277; + +P7IES = 0x0278; + +P8IES = 0x0279; + +P7IE = 0x027A; + +P8IE = 0x027B; + +P7IFG = 0x027C; + +P8IFG = 0x027D; + +P9IN = 0x0280; + +P9OUT = 0x0282; + +P9DIR = 0x0284; + +P9REN = 0x0286; + +P9SEL0 = 0x028A; + +P9SEL1 = 0x028C; + +P9SELC = 0x0296; + +P9IES = 0x0298; + +P9IE = 0x029A; + +P9IFG = 0x029C; + + + +/***************************************************************************** + DMA +*****************************************************************************/ +DMACTL0 = 0x0500; +DMACTL0_L = 0x0500; +DMACTL0_H = 0x0501; +DMACTL1 = 0x0502; +DMACTL1_L = 0x0502; +DMACTL1_H = 0x0503; +DMACTL2 = 0x0504; +DMACTL2_L = 0x0504; +DMACTL2_H = 0x0505; +DMACTL4 = 0x0508; +DMACTL4_L = 0x0508; +DMACTL4_H = 0x0509; +DMAIV = 0x050E; +DMAIV_L = 0x050E; +DMAIV_H = 0x050F; +DMA0CTL = 0x0510; +DMA0CTL_L = 0x0510; +DMA0CTL_H = 0x0511; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA0SZ_L = 0x051A; +DMA0SZ_H = 0x051B; +DMA1CTL = 0x0520; +DMA1CTL_L = 0x0520; +DMA1CTL_H = 0x0521; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA1SZ_L = 0x052A; +DMA1SZ_H = 0x052B; +DMA2CTL = 0x0530; +DMA2CTL_L = 0x0530; +DMA2CTL_H = 0x0531; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA2SZ_L = 0x053A; +DMA2SZ_H = 0x053B; +DMA3CTL = 0x0540; +DMA3CTL_L = 0x0540; +DMA3CTL_H = 0x0541; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA3SZ_L = 0x054A; +DMA3SZ_H = 0x054B; +DMA4CTL = 0x0550; +DMA4CTL_L = 0x0550; +DMA4CTL_H = 0x0551; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA4SZ_L = 0x055A; +DMA4SZ_H = 0x055B; +DMA5CTL = 0x0560; +DMA5CTL_L = 0x0560; +DMA5CTL_H = 0x0561; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +DMA5SZ_L = 0x056A; +DMA5SZ_H = 0x056B; + + +/***************************************************************************** + FRCTL_A +*****************************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; + + +/***************************************************************************** + MPU +*****************************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RAMCTL +*****************************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; + + +/***************************************************************************** + REF_A +*****************************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; + + +/***************************************************************************** + RTC_C +*****************************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCIV_L = 0x04AE; +RTCIV_H = 0x04AF; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCCNT12 = 0x04B0; +RTCCNT12_L = 0x04B0; +RTCCNT12_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCCNT34 = 0x04B2; +RTCCNT34_L = 0x04B2; +RTCCNT34_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BIN2BCD_L = 0x04BC; +BIN2BCD_H = 0x04BD; +BCD2BIN = 0x04BE; +BCD2BIN_L = 0x04BE; +BCD2BIN_H = 0x04BF; +RT0PS = 0x04AC; + +RT1PS = 0x04AD; + +RTCCNT1 = 0x04B0; + +RTCCNT2 = 0x04B1; + +RTCCNT3 = 0x04B2; + +RTCCNT4 = 0x04B3; + + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0340; +TA0CTL_L = 0x0340; +TA0CTL_H = 0x0341; +TA0CCTL0 = 0x0342; +TA0CCTL0_L = 0x0342; +TA0CCTL0_H = 0x0343; +TA0CCTL1 = 0x0344; +TA0CCTL1_L = 0x0344; +TA0CCTL1_H = 0x0345; +TA0CCTL2 = 0x0346; +TA0CCTL2_L = 0x0346; +TA0CCTL2_H = 0x0347; +TA0R = 0x0350; +TA0R_L = 0x0350; +TA0R_H = 0x0351; +TA0CCR0 = 0x0352; +TA0CCR0_L = 0x0352; +TA0CCR0_H = 0x0353; +TA0CCR1 = 0x0354; +TA0CCR1_L = 0x0354; +TA0CCR1_H = 0x0355; +TA0CCR2 = 0x0356; +TA0CCR2_L = 0x0356; +TA0CCR2_H = 0x0357; +TA0EX0 = 0x0360; +TA0EX0_L = 0x0360; +TA0EX0_H = 0x0361; +TA0IV = 0x036E; +TA0IV_L = 0x036E; +TA0IV_H = 0x036F; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x0380; +TA1CTL_L = 0x0380; +TA1CTL_H = 0x0381; +TA1CCTL0 = 0x0382; +TA1CCTL0_L = 0x0382; +TA1CCTL0_H = 0x0383; +TA1CCTL1 = 0x0384; +TA1CCTL1_L = 0x0384; +TA1CCTL1_H = 0x0385; +TA1CCTL2 = 0x0386; +TA1CCTL2_L = 0x0386; +TA1CCTL2_H = 0x0387; +TA1R = 0x0390; +TA1R_L = 0x0390; +TA1R_H = 0x0391; +TA1CCR0 = 0x0392; +TA1CCR0_L = 0x0392; +TA1CCR0_H = 0x0393; +TA1CCR1 = 0x0394; +TA1CCR1_L = 0x0394; +TA1CCR1_H = 0x0395; +TA1CCR2 = 0x0396; +TA1CCR2_L = 0x0396; +TA1CCR2_H = 0x0397; +TA1EX0 = 0x03A0; +TA1EX0_L = 0x03A0; +TA1EX0_H = 0x03A1; +TA1IV = 0x03AE; +TA1IV_L = 0x03AE; +TA1IV_H = 0x03AF; + + +/***************************************************************************** + TA2 +*****************************************************************************/ +TA2CTL = 0x0400; +TA2CTL_L = 0x0400; +TA2CTL_H = 0x0401; +TA2CCTL0 = 0x0402; +TA2CCTL0_L = 0x0402; +TA2CCTL0_H = 0x0403; +TA2CCTL1 = 0x0404; +TA2CCTL1_L = 0x0404; +TA2CCTL1_H = 0x0405; +TA2R = 0x0410; +TA2R_L = 0x0410; +TA2R_H = 0x0411; +TA2CCR0 = 0x0412; +TA2CCR0_L = 0x0412; +TA2CCR0_H = 0x0413; +TA2CCR1 = 0x0414; +TA2CCR1_L = 0x0414; +TA2CCR1_H = 0x0415; +TA2EX0 = 0x0420; +TA2EX0_L = 0x0420; +TA2EX0_H = 0x0421; +TA2IV = 0x042E; +TA2IV_L = 0x042E; +TA2IV_H = 0x042F; + + +/***************************************************************************** + TA3 +*****************************************************************************/ +TA3CTL = 0x0440; +TA3CTL_L = 0x0440; +TA3CTL_H = 0x0441; +TA3CCTL0 = 0x0442; +TA3CCTL0_L = 0x0442; +TA3CCTL0_H = 0x0443; +TA3CCTL1 = 0x0444; +TA3CCTL1_L = 0x0444; +TA3CCTL1_H = 0x0445; +TA3R = 0x0450; +TA3R_L = 0x0450; +TA3R_H = 0x0451; +TA3CCR0 = 0x0452; +TA3CCR0_L = 0x0452; +TA3CCR0_H = 0x0453; +TA3CCR1 = 0x0454; +TA3CCR1_L = 0x0454; +TA3CCR1_H = 0x0455; +TA3EX0 = 0x0460; +TA3EX0_L = 0x0460; +TA3EX0_H = 0x0461; +TA3IV = 0x046E; +TA3IV_L = 0x046E; +TA3IV_H = 0x046F; + + +/***************************************************************************** + TA4 +*****************************************************************************/ +TA4CTL = 0x07C0; +TA4CTL_L = 0x07C0; +TA4CTL_H = 0x07C1; +TA4CCTL0 = 0x07C2; +TA4CCTL0_L = 0x07C2; +TA4CCTL0_H = 0x07C3; +TA4CCTL1 = 0x07C4; +TA4CCTL1_L = 0x07C4; +TA4CCTL1_H = 0x07C5; +TA4CCTL2 = 0x07C6; +TA4CCTL2_L = 0x07C6; +TA4CCTL2_H = 0x07C7; +TA4R = 0x07D0; +TA4R_L = 0x07D0; +TA4R_H = 0x07D1; +TA4CCR0 = 0x07D2; +TA4CCR0_L = 0x07D2; +TA4CCR0_H = 0x07D3; +TA4CCR1 = 0x07D4; +TA4CCR1_L = 0x07D4; +TA4CCR1_H = 0x07D5; +TA4CCR2 = 0x07D6; +TA4CCR2_L = 0x07D6; +TA4CCR2_H = 0x07D7; +TA4EX0 = 0x07E0; +TA4EX0_L = 0x07E0; +TA4EX0_H = 0x07E1; +TA4IV = 0x07EE; +TA4IV_L = 0x07EE; +TA4IV_H = 0x07EF; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x03C0; +TB0CTL_L = 0x03C0; +TB0CTL_H = 0x03C1; +TB0CCTL0 = 0x03C2; +TB0CCTL0_L = 0x03C2; +TB0CCTL0_H = 0x03C3; +TB0CCTL1 = 0x03C4; +TB0CCTL1_L = 0x03C4; +TB0CCTL1_H = 0x03C5; +TB0CCTL2 = 0x03C6; +TB0CCTL2_L = 0x03C6; +TB0CCTL2_H = 0x03C7; +TB0CCTL3 = 0x03C8; +TB0CCTL3_L = 0x03C8; +TB0CCTL3_H = 0x03C9; +TB0CCTL4 = 0x03CA; +TB0CCTL4_L = 0x03CA; +TB0CCTL4_H = 0x03CB; +TB0CCTL5 = 0x03CC; +TB0CCTL5_L = 0x03CC; +TB0CCTL5_H = 0x03CD; +TB0CCTL6 = 0x03CE; +TB0CCTL6_L = 0x03CE; +TB0CCTL6_H = 0x03CF; +TB0R = 0x03D0; +TB0R_L = 0x03D0; +TB0R_H = 0x03D1; +TB0CCR0 = 0x03D2; +TB0CCR0_L = 0x03D2; +TB0CCR0_H = 0x03D3; +TB0CCR1 = 0x03D4; +TB0CCR1_L = 0x03D4; +TB0CCR1_H = 0x03D5; +TB0CCR2 = 0x03D6; +TB0CCR2_L = 0x03D6; +TB0CCR2_H = 0x03D7; +TB0CCR3 = 0x03D8; +TB0CCR3_L = 0x03D8; +TB0CCR3_H = 0x03D9; +TB0CCR4 = 0x03DA; +TB0CCR4_L = 0x03DA; +TB0CCR4_H = 0x03DB; +TB0CCR5 = 0x03DC; +TB0CCR5_L = 0x03DC; +TB0CCR5_H = 0x03DD; +TB0CCR6 = 0x03DE; +TB0CCR6_L = 0x03DE; +TB0CCR6_H = 0x03DF; +TB0EX0 = 0x03E0; +TB0EX0_L = 0x03E0; +TB0EX0_H = 0x03E1; +TB0IV = 0x03EE; +TB0IV_L = 0x03EE; +TB0IV_H = 0x03EF; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0STATW_L = 0x05CA; +UCA0STATW_H = 0x05CB; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0ABCTL_L = 0x05D0; +UCA0ABCTL_H = 0x05D1; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +UCA0IV_L = 0x05DE; +UCA0IV_H = 0x05DF; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1STATW_L = 0x05EA; +UCA1STATW_H = 0x05EB; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1ABCTL_L = 0x05F0; +UCA1ABCTL_H = 0x05F1; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +UCA1IV_L = 0x05FE; +UCA1IV_H = 0x05FF; + + +/***************************************************************************** + eUSCI_A2 +*****************************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2STATW_L = 0x060A; +UCA2STATW_H = 0x060B; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2ABCTL_L = 0x0610; +UCA2ABCTL_H = 0x0611; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +UCA2IV_L = 0x061E; +UCA2IV_H = 0x061F; + + +/***************************************************************************** + eUSCI_A3 +*****************************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3STATW_L = 0x062A; +UCA3STATW_H = 0x062B; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3ABCTL_L = 0x0630; +UCA3ABCTL_H = 0x0631; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +UCA3IV_L = 0x063E; +UCA3IV_H = 0x063F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +UCB0IV_L = 0x066E; +UCB0IV_H = 0x066F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +UCB1IV_L = 0x06AE; +UCB1IV_H = 0x06AF; + + +/***************************************************************************** + eUSCI_B2 +*****************************************************************************/ +UCB2CTLW0 = 0x06C0; +UCB2CTLW0_L = 0x06C0; +UCB2CTLW0_H = 0x06C1; +UCB2CTLW1 = 0x06C2; +UCB2CTLW1_L = 0x06C2; +UCB2CTLW1_H = 0x06C3; +UCB2BRW = 0x06C6; +UCB2BRW_L = 0x06C6; +UCB2BRW_H = 0x06C7; +UCB2STATW = 0x06C8; +UCB2STATW_L = 0x06C8; +UCB2STATW_H = 0x06C9; +UCB2TBCNT = 0x06CA; +UCB2TBCNT_L = 0x06CA; +UCB2TBCNT_H = 0x06CB; +UCB2RXBUF = 0x06CC; +UCB2RXBUF_L = 0x06CC; +UCB2RXBUF_H = 0x06CD; +UCB2TXBUF = 0x06CE; +UCB2TXBUF_L = 0x06CE; +UCB2TXBUF_H = 0x06CF; +UCB2I2COA0 = 0x06D4; +UCB2I2COA0_L = 0x06D4; +UCB2I2COA0_H = 0x06D5; +UCB2I2COA1 = 0x06D6; +UCB2I2COA1_L = 0x06D6; +UCB2I2COA1_H = 0x06D7; +UCB2I2COA2 = 0x06D8; +UCB2I2COA2_L = 0x06D8; +UCB2I2COA2_H = 0x06D9; +UCB2I2COA3 = 0x06DA; +UCB2I2COA3_L = 0x06DA; +UCB2I2COA3_H = 0x06DB; +UCB2ADDRX = 0x06DC; +UCB2ADDRX_L = 0x06DC; +UCB2ADDRX_H = 0x06DD; +UCB2ADDMASK = 0x06DE; +UCB2ADDMASK_L = 0x06DE; +UCB2ADDMASK_H = 0x06DF; +UCB2I2CSA = 0x06E0; +UCB2I2CSA_L = 0x06E0; +UCB2I2CSA_H = 0x06E1; +UCB2IE = 0x06EA; +UCB2IE_L = 0x06EA; +UCB2IE_H = 0x06EB; +UCB2IFG = 0x06EC; +UCB2IFG_L = 0x06EC; +UCB2IFG_H = 0x06ED; +UCB2IV = 0x06EE; +UCB2IV_L = 0x06EE; +UCB2IV_H = 0x06EF; + + +/***************************************************************************** + eUSCI_B3 +*****************************************************************************/ +UCB3CTLW0 = 0x0700; +UCB3CTLW0_L = 0x0700; +UCB3CTLW0_H = 0x0701; +UCB3CTLW1 = 0x0702; +UCB3CTLW1_L = 0x0702; +UCB3CTLW1_H = 0x0703; +UCB3BRW = 0x0706; +UCB3BRW_L = 0x0706; +UCB3BRW_H = 0x0707; +UCB3STATW = 0x0708; +UCB3STATW_L = 0x0708; +UCB3STATW_H = 0x0709; +UCB3TBCNT = 0x070A; +UCB3TBCNT_L = 0x070A; +UCB3TBCNT_H = 0x070B; +UCB3RXBUF = 0x070C; +UCB3RXBUF_L = 0x070C; +UCB3RXBUF_H = 0x070D; +UCB3TXBUF = 0x070E; +UCB3TXBUF_L = 0x070E; +UCB3TXBUF_H = 0x070F; +UCB3I2COA0 = 0x0714; +UCB3I2COA0_L = 0x0714; +UCB3I2COA0_H = 0x0715; +UCB3I2COA1 = 0x0716; +UCB3I2COA1_L = 0x0716; +UCB3I2COA1_H = 0x0717; +UCB3I2COA2 = 0x0718; +UCB3I2COA2_L = 0x0718; +UCB3I2COA2_H = 0x0719; +UCB3I2COA3 = 0x071A; +UCB3I2COA3_L = 0x071A; +UCB3I2COA3_H = 0x071B; +UCB3ADDRX = 0x071C; +UCB3ADDRX_L = 0x071C; +UCB3ADDRX_H = 0x071D; +UCB3ADDMASK = 0x071E; +UCB3ADDMASK_L = 0x071E; +UCB3ADDMASK_H = 0x071F; +UCB3I2CSA = 0x0720; +UCB3I2CSA_L = 0x0720; +UCB3I2CSA_H = 0x0721; +UCB3IE = 0x072A; +UCB3IE_L = 0x072A; +UCB3IE_H = 0x072B; +UCB3IFG = 0x072C; +UCB3IFG_L = 0x072C; +UCB3IFG_H = 0x072D; +UCB3IV = 0x072E; +UCB3IV_L = 0x072E; +UCB3IV_H = 0x072F; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr5967.cmd b/msp430/msp430fr5967.cmd new file mode 100644 index 00000000..f9b18da1 --- /dev/null +++ b/msp430/msp430fr5967.cmd @@ -0,0 +1,923 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5967.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5968.cmd b/msp430/msp430fr5968.cmd new file mode 100644 index 00000000..d58ae21f --- /dev/null +++ b/msp430/msp430fr5968.cmd @@ -0,0 +1,923 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5968.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5969.cmd b/msp430/msp430fr5969.cmd new file mode 100644 index 00000000..7643e94d --- /dev/null +++ b/msp430/msp430fr5969.cmd @@ -0,0 +1,923 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5969.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr59691.cmd b/msp430/msp430fr59691.cmd new file mode 100644 index 00000000..96c06f95 --- /dev/null +++ b/msp430/msp430fr59691.cmd @@ -0,0 +1,923 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr59691.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A2 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5970.cmd b/msp430/msp430fr5970.cmd new file mode 100644 index 00000000..79bbd620 --- /dev/null +++ b/msp430/msp430fr5970.cmd @@ -0,0 +1,1113 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5970.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5972.cmd b/msp430/msp430fr5972.cmd new file mode 100644 index 00000000..3c21efa1 --- /dev/null +++ b/msp430/msp430fr5972.cmd @@ -0,0 +1,1113 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5972.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr59721.cmd b/msp430/msp430fr59721.cmd new file mode 100644 index 00000000..5ed3bd74 --- /dev/null +++ b/msp430/msp430fr59721.cmd @@ -0,0 +1,1113 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr59721.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5986.cmd b/msp430/msp430fr5986.cmd new file mode 100644 index 00000000..1eb60890 --- /dev/null +++ b/msp430/msp430fr5986.cmd @@ -0,0 +1,1451 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5986.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************ +* EXTENDED SCAN INTERFACE +************************************************************/ +ESIDEBUG1 = 0x0D00; +ESIDEBUG1_L = 0x0D00; +ESIDEBUG1_H = 0x0D01; +ESIDEBUG2 = 0x0D02; +ESIDEBUG2_L = 0x0D02; +ESIDEBUG2_H = 0x0D03; +ESIDEBUG3 = 0x0D04; +ESIDEBUG3_L = 0x0D04; +ESIDEBUG3_H = 0x0D05; +ESIDEBUG4 = 0x0D06; +ESIDEBUG4_L = 0x0D06; +ESIDEBUG4_H = 0x0D07; +ESIDEBUG5 = 0x0D08; +ESIDEBUG5_L = 0x0D08; +ESIDEBUG5_H = 0x0D09; +ESICNT0 = 0x0D10; +ESICNT0_L = 0x0D10; +ESICNT0_H = 0x0D11; +ESICNT1 = 0x0D12; +ESICNT1_L = 0x0D12; +ESICNT1_H = 0x0D13; +ESICNT2 = 0x0D14; +ESICNT2_L = 0x0D14; +ESICNT2_H = 0x0D15; +ESICNT3 = 0x0D16; +ESICNT3_L = 0x0D16; +ESICNT3_H = 0x0D17; +ESIIV = 0x0D1A; +ESIIV_L = 0x0D1A; +ESIIV_H = 0x0D1B; +ESIINT1 = 0x0D1C; +ESIINT1_L = 0x0D1C; +ESIINT1_H = 0x0D1D; +ESIINT2 = 0x0D1E; +ESIINT2_L = 0x0D1E; +ESIINT2_H = 0x0D1F; +ESIAFE = 0x0D20; +ESIAFE_L = 0x0D20; +ESIAFE_H = 0x0D21; +ESIPPU = 0x0D22; +ESIPPU_L = 0x0D22; +ESIPPU_H = 0x0D23; +ESITSM = 0x0D24; +ESITSM_L = 0x0D24; +ESITSM_H = 0x0D25; +ESIPSM = 0x0D26; +ESIPSM_L = 0x0D26; +ESIPSM_H = 0x0D27; +ESIOSC = 0x0D28; +ESIOSC_L = 0x0D28; +ESIOSC_H = 0x0D29; +ESICTL = 0x0D2A; +ESICTL_L = 0x0D2A; +ESICTL_H = 0x0D2B; +ESITHR1 = 0x0D2C; +ESITHR1_L = 0x0D2C; +ESITHR1_H = 0x0D2D; +ESITHR2 = 0x0D2E; +ESITHR2_L = 0x0D2E; +ESITHR2_H = 0x0D2F; +ESIDAC1R0 = 0x0D40; +ESIDAC1R0_L = 0x0D40; +ESIDAC1R0_H = 0x0D41; +ESIDAC1R1 = 0x0D42; +ESIDAC1R1_L = 0x0D42; +ESIDAC1R1_H = 0x0D43; +ESIDAC1R2 = 0x0D44; +ESIDAC1R2_L = 0x0D44; +ESIDAC1R2_H = 0x0D45; +ESIDAC1R3 = 0x0D46; +ESIDAC1R3_L = 0x0D46; +ESIDAC1R3_H = 0x0D47; +ESIDAC1R4 = 0x0D48; +ESIDAC1R4_L = 0x0D48; +ESIDAC1R4_H = 0x0D49; +ESIDAC1R5 = 0x0D4A; +ESIDAC1R5_L = 0x0D4A; +ESIDAC1R5_H = 0x0D4B; +ESIDAC1R6 = 0x0D4C; +ESIDAC1R6_L = 0x0D4C; +ESIDAC1R6_H = 0x0D4D; +ESIDAC1R7 = 0x0D4E; +ESIDAC1R7_L = 0x0D4E; +ESIDAC1R7_H = 0x0D4F; +ESIDAC2R0 = 0x0D50; +ESIDAC2R0_L = 0x0D50; +ESIDAC2R0_H = 0x0D51; +ESIDAC2R1 = 0x0D52; +ESIDAC2R1_L = 0x0D52; +ESIDAC2R1_H = 0x0D53; +ESIDAC2R2 = 0x0D54; +ESIDAC2R2_L = 0x0D54; +ESIDAC2R2_H = 0x0D55; +ESIDAC2R3 = 0x0D56; +ESIDAC2R3_L = 0x0D56; +ESIDAC2R3_H = 0x0D57; +ESIDAC2R4 = 0x0D58; +ESIDAC2R4_L = 0x0D58; +ESIDAC2R4_H = 0x0D59; +ESIDAC2R5 = 0x0D5A; +ESIDAC2R5_L = 0x0D5A; +ESIDAC2R5_H = 0x0D5B; +ESIDAC2R6 = 0x0D5C; +ESIDAC2R6_L = 0x0D5C; +ESIDAC2R6_H = 0x0D5D; +ESIDAC2R7 = 0x0D5E; +ESIDAC2R7_L = 0x0D5E; +ESIDAC2R7_H = 0x0D5F; +ESITSM0 = 0x0D60; +ESITSM0_L = 0x0D60; +ESITSM0_H = 0x0D61; +ESITSM1 = 0x0D62; +ESITSM1_L = 0x0D62; +ESITSM1_H = 0x0D63; +ESITSM2 = 0x0D64; +ESITSM2_L = 0x0D64; +ESITSM2_H = 0x0D65; +ESITSM3 = 0x0D66; +ESITSM3_L = 0x0D66; +ESITSM3_H = 0x0D67; +ESITSM4 = 0x0D68; +ESITSM4_L = 0x0D68; +ESITSM4_H = 0x0D69; +ESITSM5 = 0x0D6A; +ESITSM5_L = 0x0D6A; +ESITSM5_H = 0x0D6B; +ESITSM6 = 0x0D6C; +ESITSM6_L = 0x0D6C; +ESITSM6_H = 0x0D6D; +ESITSM7 = 0x0D6E; +ESITSM7_L = 0x0D6E; +ESITSM7_H = 0x0D6F; +ESITSM8 = 0x0D70; +ESITSM8_L = 0x0D70; +ESITSM8_H = 0x0D71; +ESITSM9 = 0x0D72; +ESITSM9_L = 0x0D72; +ESITSM9_H = 0x0D73; +ESITSM10 = 0x0D74; +ESITSM10_L = 0x0D74; +ESITSM10_H = 0x0D75; +ESITSM11 = 0x0D76; +ESITSM11_L = 0x0D76; +ESITSM11_H = 0x0D77; +ESITSM12 = 0x0D78; +ESITSM12_L = 0x0D78; +ESITSM12_H = 0x0D79; +ESITSM13 = 0x0D7A; +ESITSM13_L = 0x0D7A; +ESITSM13_H = 0x0D7B; +ESITSM14 = 0x0D7C; +ESITSM14_L = 0x0D7C; +ESITSM14_H = 0x0D7D; +ESITSM15 = 0x0D7E; +ESITSM15_L = 0x0D7E; +ESITSM15_H = 0x0D7F; +ESITSM16 = 0x0D80; +ESITSM16_L = 0x0D80; +ESITSM16_H = 0x0D81; +ESITSM17 = 0x0D82; +ESITSM17_L = 0x0D82; +ESITSM17_H = 0x0D83; +ESITSM18 = 0x0D84; +ESITSM18_L = 0x0D84; +ESITSM18_H = 0x0D85; +ESITSM19 = 0x0D86; +ESITSM19_L = 0x0D86; +ESITSM19_H = 0x0D87; +ESITSM20 = 0x0D88; +ESITSM20_L = 0x0D88; +ESITSM20_H = 0x0D89; +ESITSM21 = 0x0D8A; +ESITSM21_L = 0x0D8A; +ESITSM21_H = 0x0D8B; +ESITSM22 = 0x0D8C; +ESITSM22_L = 0x0D8C; +ESITSM22_H = 0x0D8D; +ESITSM23 = 0x0D8E; +ESITSM23_L = 0x0D8E; +ESITSM23_H = 0x0D8F; +ESITSM24 = 0x0D90; +ESITSM24_L = 0x0D90; +ESITSM24_H = 0x0D91; +ESITSM25 = 0x0D92; +ESITSM25_L = 0x0D92; +ESITSM25_H = 0x0D93; +ESITSM26 = 0x0D94; +ESITSM26_L = 0x0D94; +ESITSM26_H = 0x0D95; +ESITSM27 = 0x0D96; +ESITSM27_L = 0x0D96; +ESITSM27_H = 0x0D97; +ESITSM28 = 0x0D98; +ESITSM28_L = 0x0D98; +ESITSM28_H = 0x0D99; +ESITSM29 = 0x0D9A; +ESITSM29_L = 0x0D9A; +ESITSM29_H = 0x0D9B; +ESITSM30 = 0x0D9C; +ESITSM30_L = 0x0D9C; +ESITSM30_H = 0x0D9D; +ESITSM31 = 0x0D9E; +ESITSM31_L = 0x0D9E; +ESITSM31_H = 0x0D9F; +/************************************************************ +* EXTENDED SCAN INTERFACE RAM +************************************************************/ +ESIRAM0 = 0x0E00; +ESIRAM1 = 0x0E01; +ESIRAM2 = 0x0E02; +ESIRAM3 = 0x0E03; +ESIRAM4 = 0x0E04; +ESIRAM5 = 0x0E05; +ESIRAM6 = 0x0E06; +ESIRAM7 = 0x0E07; +ESIRAM8 = 0x0E08; +ESIRAM9 = 0x0E09; +ESIRAM10 = 0x0E0A; +ESIRAM11 = 0x0E0B; +ESIRAM12 = 0x0E0C; +ESIRAM13 = 0x0E0D; +ESIRAM14 = 0x0E0E; +ESIRAM15 = 0x0E0F; +ESIRAM16 = 0x0E10; +ESIRAM17 = 0x0E11; +ESIRAM18 = 0x0E12; +ESIRAM19 = 0x0E13; +ESIRAM20 = 0x0E14; +ESIRAM21 = 0x0E15; +ESIRAM22 = 0x0E16; +ESIRAM23 = 0x0E17; +ESIRAM24 = 0x0E18; +ESIRAM25 = 0x0E19; +ESIRAM26 = 0x0E1A; +ESIRAM27 = 0x0E1B; +ESIRAM28 = 0x0E1C; +ESIRAM29 = 0x0E1D; +ESIRAM30 = 0x0E1E; +ESIRAM31 = 0x0E1F; +ESIRAM32 = 0x0E20; +ESIRAM33 = 0x0E21; +ESIRAM34 = 0x0E22; +ESIRAM35 = 0x0E23; +ESIRAM36 = 0x0E24; +ESIRAM37 = 0x0E25; +ESIRAM38 = 0x0E26; +ESIRAM39 = 0x0E27; +ESIRAM40 = 0x0E28; +ESIRAM41 = 0x0E29; +ESIRAM42 = 0x0E2A; +ESIRAM43 = 0x0E2B; +ESIRAM44 = 0x0E2C; +ESIRAM45 = 0x0E2D; +ESIRAM46 = 0x0E2E; +ESIRAM47 = 0x0E2F; +ESIRAM48 = 0x0E30; +ESIRAM49 = 0x0E31; +ESIRAM50 = 0x0E32; +ESIRAM51 = 0x0E33; +ESIRAM52 = 0x0E34; +ESIRAM53 = 0x0E35; +ESIRAM54 = 0x0E36; +ESIRAM55 = 0x0E37; +ESIRAM56 = 0x0E38; +ESIRAM57 = 0x0E39; +ESIRAM58 = 0x0E3A; +ESIRAM59 = 0x0E3B; +ESIRAM60 = 0x0E3C; +ESIRAM61 = 0x0E3D; +ESIRAM62 = 0x0E3E; +ESIRAM63 = 0x0E3F; +ESIRAM64 = 0x0E40; +ESIRAM65 = 0x0E41; +ESIRAM66 = 0x0E42; +ESIRAM67 = 0x0E43; +ESIRAM68 = 0x0E44; +ESIRAM69 = 0x0E45; +ESIRAM70 = 0x0E46; +ESIRAM71 = 0x0E47; +ESIRAM72 = 0x0E48; +ESIRAM73 = 0x0E49; +ESIRAM74 = 0x0E4A; +ESIRAM75 = 0x0E4B; +ESIRAM76 = 0x0E4C; +ESIRAM77 = 0x0E4D; +ESIRAM78 = 0x0E4E; +ESIRAM79 = 0x0E4F; +ESIRAM80 = 0x0E50; +ESIRAM81 = 0x0E51; +ESIRAM82 = 0x0E52; +ESIRAM83 = 0x0E53; +ESIRAM84 = 0x0E54; +ESIRAM85 = 0x0E55; +ESIRAM86 = 0x0E56; +ESIRAM87 = 0x0E57; +ESIRAM88 = 0x0E58; +ESIRAM89 = 0x0E59; +ESIRAM90 = 0x0E5A; +ESIRAM91 = 0x0E5B; +ESIRAM92 = 0x0E5C; +ESIRAM93 = 0x0E5D; +ESIRAM94 = 0x0E5E; +ESIRAM95 = 0x0E5F; +ESIRAM96 = 0x0E60; +ESIRAM97 = 0x0E61; +ESIRAM98 = 0x0E62; +ESIRAM99 = 0x0E63; +ESIRAM100 = 0x0E64; +ESIRAM101 = 0x0E65; +ESIRAM102 = 0x0E66; +ESIRAM103 = 0x0E67; +ESIRAM104 = 0x0E68; +ESIRAM105 = 0x0E69; +ESIRAM106 = 0x0E6A; +ESIRAM107 = 0x0E6B; +ESIRAM108 = 0x0E6C; +ESIRAM109 = 0x0E6D; +ESIRAM110 = 0x0E6E; +ESIRAM111 = 0x0E6F; +ESIRAM112 = 0x0E70; +ESIRAM113 = 0x0E71; +ESIRAM114 = 0x0E72; +ESIRAM115 = 0x0E73; +ESIRAM116 = 0x0E74; +ESIRAM117 = 0x0E75; +ESIRAM118 = 0x0E76; +ESIRAM119 = 0x0E77; +ESIRAM120 = 0x0E78; +ESIRAM121 = 0x0E79; +ESIRAM122 = 0x0E7A; +ESIRAM123 = 0x0E7B; +ESIRAM124 = 0x0E7C; +ESIRAM125 = 0x0E7D; +ESIRAM126 = 0x0E7E; +ESIRAM127 = 0x0E7F; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5987.cmd b/msp430/msp430fr5987.cmd new file mode 100644 index 00000000..d3b0e71d --- /dev/null +++ b/msp430/msp430fr5987.cmd @@ -0,0 +1,1451 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5987.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************ +* EXTENDED SCAN INTERFACE +************************************************************/ +ESIDEBUG1 = 0x0D00; +ESIDEBUG1_L = 0x0D00; +ESIDEBUG1_H = 0x0D01; +ESIDEBUG2 = 0x0D02; +ESIDEBUG2_L = 0x0D02; +ESIDEBUG2_H = 0x0D03; +ESIDEBUG3 = 0x0D04; +ESIDEBUG3_L = 0x0D04; +ESIDEBUG3_H = 0x0D05; +ESIDEBUG4 = 0x0D06; +ESIDEBUG4_L = 0x0D06; +ESIDEBUG4_H = 0x0D07; +ESIDEBUG5 = 0x0D08; +ESIDEBUG5_L = 0x0D08; +ESIDEBUG5_H = 0x0D09; +ESICNT0 = 0x0D10; +ESICNT0_L = 0x0D10; +ESICNT0_H = 0x0D11; +ESICNT1 = 0x0D12; +ESICNT1_L = 0x0D12; +ESICNT1_H = 0x0D13; +ESICNT2 = 0x0D14; +ESICNT2_L = 0x0D14; +ESICNT2_H = 0x0D15; +ESICNT3 = 0x0D16; +ESICNT3_L = 0x0D16; +ESICNT3_H = 0x0D17; +ESIIV = 0x0D1A; +ESIIV_L = 0x0D1A; +ESIIV_H = 0x0D1B; +ESIINT1 = 0x0D1C; +ESIINT1_L = 0x0D1C; +ESIINT1_H = 0x0D1D; +ESIINT2 = 0x0D1E; +ESIINT2_L = 0x0D1E; +ESIINT2_H = 0x0D1F; +ESIAFE = 0x0D20; +ESIAFE_L = 0x0D20; +ESIAFE_H = 0x0D21; +ESIPPU = 0x0D22; +ESIPPU_L = 0x0D22; +ESIPPU_H = 0x0D23; +ESITSM = 0x0D24; +ESITSM_L = 0x0D24; +ESITSM_H = 0x0D25; +ESIPSM = 0x0D26; +ESIPSM_L = 0x0D26; +ESIPSM_H = 0x0D27; +ESIOSC = 0x0D28; +ESIOSC_L = 0x0D28; +ESIOSC_H = 0x0D29; +ESICTL = 0x0D2A; +ESICTL_L = 0x0D2A; +ESICTL_H = 0x0D2B; +ESITHR1 = 0x0D2C; +ESITHR1_L = 0x0D2C; +ESITHR1_H = 0x0D2D; +ESITHR2 = 0x0D2E; +ESITHR2_L = 0x0D2E; +ESITHR2_H = 0x0D2F; +ESIDAC1R0 = 0x0D40; +ESIDAC1R0_L = 0x0D40; +ESIDAC1R0_H = 0x0D41; +ESIDAC1R1 = 0x0D42; +ESIDAC1R1_L = 0x0D42; +ESIDAC1R1_H = 0x0D43; +ESIDAC1R2 = 0x0D44; +ESIDAC1R2_L = 0x0D44; +ESIDAC1R2_H = 0x0D45; +ESIDAC1R3 = 0x0D46; +ESIDAC1R3_L = 0x0D46; +ESIDAC1R3_H = 0x0D47; +ESIDAC1R4 = 0x0D48; +ESIDAC1R4_L = 0x0D48; +ESIDAC1R4_H = 0x0D49; +ESIDAC1R5 = 0x0D4A; +ESIDAC1R5_L = 0x0D4A; +ESIDAC1R5_H = 0x0D4B; +ESIDAC1R6 = 0x0D4C; +ESIDAC1R6_L = 0x0D4C; +ESIDAC1R6_H = 0x0D4D; +ESIDAC1R7 = 0x0D4E; +ESIDAC1R7_L = 0x0D4E; +ESIDAC1R7_H = 0x0D4F; +ESIDAC2R0 = 0x0D50; +ESIDAC2R0_L = 0x0D50; +ESIDAC2R0_H = 0x0D51; +ESIDAC2R1 = 0x0D52; +ESIDAC2R1_L = 0x0D52; +ESIDAC2R1_H = 0x0D53; +ESIDAC2R2 = 0x0D54; +ESIDAC2R2_L = 0x0D54; +ESIDAC2R2_H = 0x0D55; +ESIDAC2R3 = 0x0D56; +ESIDAC2R3_L = 0x0D56; +ESIDAC2R3_H = 0x0D57; +ESIDAC2R4 = 0x0D58; +ESIDAC2R4_L = 0x0D58; +ESIDAC2R4_H = 0x0D59; +ESIDAC2R5 = 0x0D5A; +ESIDAC2R5_L = 0x0D5A; +ESIDAC2R5_H = 0x0D5B; +ESIDAC2R6 = 0x0D5C; +ESIDAC2R6_L = 0x0D5C; +ESIDAC2R6_H = 0x0D5D; +ESIDAC2R7 = 0x0D5E; +ESIDAC2R7_L = 0x0D5E; +ESIDAC2R7_H = 0x0D5F; +ESITSM0 = 0x0D60; +ESITSM0_L = 0x0D60; +ESITSM0_H = 0x0D61; +ESITSM1 = 0x0D62; +ESITSM1_L = 0x0D62; +ESITSM1_H = 0x0D63; +ESITSM2 = 0x0D64; +ESITSM2_L = 0x0D64; +ESITSM2_H = 0x0D65; +ESITSM3 = 0x0D66; +ESITSM3_L = 0x0D66; +ESITSM3_H = 0x0D67; +ESITSM4 = 0x0D68; +ESITSM4_L = 0x0D68; +ESITSM4_H = 0x0D69; +ESITSM5 = 0x0D6A; +ESITSM5_L = 0x0D6A; +ESITSM5_H = 0x0D6B; +ESITSM6 = 0x0D6C; +ESITSM6_L = 0x0D6C; +ESITSM6_H = 0x0D6D; +ESITSM7 = 0x0D6E; +ESITSM7_L = 0x0D6E; +ESITSM7_H = 0x0D6F; +ESITSM8 = 0x0D70; +ESITSM8_L = 0x0D70; +ESITSM8_H = 0x0D71; +ESITSM9 = 0x0D72; +ESITSM9_L = 0x0D72; +ESITSM9_H = 0x0D73; +ESITSM10 = 0x0D74; +ESITSM10_L = 0x0D74; +ESITSM10_H = 0x0D75; +ESITSM11 = 0x0D76; +ESITSM11_L = 0x0D76; +ESITSM11_H = 0x0D77; +ESITSM12 = 0x0D78; +ESITSM12_L = 0x0D78; +ESITSM12_H = 0x0D79; +ESITSM13 = 0x0D7A; +ESITSM13_L = 0x0D7A; +ESITSM13_H = 0x0D7B; +ESITSM14 = 0x0D7C; +ESITSM14_L = 0x0D7C; +ESITSM14_H = 0x0D7D; +ESITSM15 = 0x0D7E; +ESITSM15_L = 0x0D7E; +ESITSM15_H = 0x0D7F; +ESITSM16 = 0x0D80; +ESITSM16_L = 0x0D80; +ESITSM16_H = 0x0D81; +ESITSM17 = 0x0D82; +ESITSM17_L = 0x0D82; +ESITSM17_H = 0x0D83; +ESITSM18 = 0x0D84; +ESITSM18_L = 0x0D84; +ESITSM18_H = 0x0D85; +ESITSM19 = 0x0D86; +ESITSM19_L = 0x0D86; +ESITSM19_H = 0x0D87; +ESITSM20 = 0x0D88; +ESITSM20_L = 0x0D88; +ESITSM20_H = 0x0D89; +ESITSM21 = 0x0D8A; +ESITSM21_L = 0x0D8A; +ESITSM21_H = 0x0D8B; +ESITSM22 = 0x0D8C; +ESITSM22_L = 0x0D8C; +ESITSM22_H = 0x0D8D; +ESITSM23 = 0x0D8E; +ESITSM23_L = 0x0D8E; +ESITSM23_H = 0x0D8F; +ESITSM24 = 0x0D90; +ESITSM24_L = 0x0D90; +ESITSM24_H = 0x0D91; +ESITSM25 = 0x0D92; +ESITSM25_L = 0x0D92; +ESITSM25_H = 0x0D93; +ESITSM26 = 0x0D94; +ESITSM26_L = 0x0D94; +ESITSM26_H = 0x0D95; +ESITSM27 = 0x0D96; +ESITSM27_L = 0x0D96; +ESITSM27_H = 0x0D97; +ESITSM28 = 0x0D98; +ESITSM28_L = 0x0D98; +ESITSM28_H = 0x0D99; +ESITSM29 = 0x0D9A; +ESITSM29_L = 0x0D9A; +ESITSM29_H = 0x0D9B; +ESITSM30 = 0x0D9C; +ESITSM30_L = 0x0D9C; +ESITSM30_H = 0x0D9D; +ESITSM31 = 0x0D9E; +ESITSM31_L = 0x0D9E; +ESITSM31_H = 0x0D9F; +/************************************************************ +* EXTENDED SCAN INTERFACE RAM +************************************************************/ +ESIRAM0 = 0x0E00; +ESIRAM1 = 0x0E01; +ESIRAM2 = 0x0E02; +ESIRAM3 = 0x0E03; +ESIRAM4 = 0x0E04; +ESIRAM5 = 0x0E05; +ESIRAM6 = 0x0E06; +ESIRAM7 = 0x0E07; +ESIRAM8 = 0x0E08; +ESIRAM9 = 0x0E09; +ESIRAM10 = 0x0E0A; +ESIRAM11 = 0x0E0B; +ESIRAM12 = 0x0E0C; +ESIRAM13 = 0x0E0D; +ESIRAM14 = 0x0E0E; +ESIRAM15 = 0x0E0F; +ESIRAM16 = 0x0E10; +ESIRAM17 = 0x0E11; +ESIRAM18 = 0x0E12; +ESIRAM19 = 0x0E13; +ESIRAM20 = 0x0E14; +ESIRAM21 = 0x0E15; +ESIRAM22 = 0x0E16; +ESIRAM23 = 0x0E17; +ESIRAM24 = 0x0E18; +ESIRAM25 = 0x0E19; +ESIRAM26 = 0x0E1A; +ESIRAM27 = 0x0E1B; +ESIRAM28 = 0x0E1C; +ESIRAM29 = 0x0E1D; +ESIRAM30 = 0x0E1E; +ESIRAM31 = 0x0E1F; +ESIRAM32 = 0x0E20; +ESIRAM33 = 0x0E21; +ESIRAM34 = 0x0E22; +ESIRAM35 = 0x0E23; +ESIRAM36 = 0x0E24; +ESIRAM37 = 0x0E25; +ESIRAM38 = 0x0E26; +ESIRAM39 = 0x0E27; +ESIRAM40 = 0x0E28; +ESIRAM41 = 0x0E29; +ESIRAM42 = 0x0E2A; +ESIRAM43 = 0x0E2B; +ESIRAM44 = 0x0E2C; +ESIRAM45 = 0x0E2D; +ESIRAM46 = 0x0E2E; +ESIRAM47 = 0x0E2F; +ESIRAM48 = 0x0E30; +ESIRAM49 = 0x0E31; +ESIRAM50 = 0x0E32; +ESIRAM51 = 0x0E33; +ESIRAM52 = 0x0E34; +ESIRAM53 = 0x0E35; +ESIRAM54 = 0x0E36; +ESIRAM55 = 0x0E37; +ESIRAM56 = 0x0E38; +ESIRAM57 = 0x0E39; +ESIRAM58 = 0x0E3A; +ESIRAM59 = 0x0E3B; +ESIRAM60 = 0x0E3C; +ESIRAM61 = 0x0E3D; +ESIRAM62 = 0x0E3E; +ESIRAM63 = 0x0E3F; +ESIRAM64 = 0x0E40; +ESIRAM65 = 0x0E41; +ESIRAM66 = 0x0E42; +ESIRAM67 = 0x0E43; +ESIRAM68 = 0x0E44; +ESIRAM69 = 0x0E45; +ESIRAM70 = 0x0E46; +ESIRAM71 = 0x0E47; +ESIRAM72 = 0x0E48; +ESIRAM73 = 0x0E49; +ESIRAM74 = 0x0E4A; +ESIRAM75 = 0x0E4B; +ESIRAM76 = 0x0E4C; +ESIRAM77 = 0x0E4D; +ESIRAM78 = 0x0E4E; +ESIRAM79 = 0x0E4F; +ESIRAM80 = 0x0E50; +ESIRAM81 = 0x0E51; +ESIRAM82 = 0x0E52; +ESIRAM83 = 0x0E53; +ESIRAM84 = 0x0E54; +ESIRAM85 = 0x0E55; +ESIRAM86 = 0x0E56; +ESIRAM87 = 0x0E57; +ESIRAM88 = 0x0E58; +ESIRAM89 = 0x0E59; +ESIRAM90 = 0x0E5A; +ESIRAM91 = 0x0E5B; +ESIRAM92 = 0x0E5C; +ESIRAM93 = 0x0E5D; +ESIRAM94 = 0x0E5E; +ESIRAM95 = 0x0E5F; +ESIRAM96 = 0x0E60; +ESIRAM97 = 0x0E61; +ESIRAM98 = 0x0E62; +ESIRAM99 = 0x0E63; +ESIRAM100 = 0x0E64; +ESIRAM101 = 0x0E65; +ESIRAM102 = 0x0E66; +ESIRAM103 = 0x0E67; +ESIRAM104 = 0x0E68; +ESIRAM105 = 0x0E69; +ESIRAM106 = 0x0E6A; +ESIRAM107 = 0x0E6B; +ESIRAM108 = 0x0E6C; +ESIRAM109 = 0x0E6D; +ESIRAM110 = 0x0E6E; +ESIRAM111 = 0x0E6F; +ESIRAM112 = 0x0E70; +ESIRAM113 = 0x0E71; +ESIRAM114 = 0x0E72; +ESIRAM115 = 0x0E73; +ESIRAM116 = 0x0E74; +ESIRAM117 = 0x0E75; +ESIRAM118 = 0x0E76; +ESIRAM119 = 0x0E77; +ESIRAM120 = 0x0E78; +ESIRAM121 = 0x0E79; +ESIRAM122 = 0x0E7A; +ESIRAM123 = 0x0E7B; +ESIRAM124 = 0x0E7C; +ESIRAM125 = 0x0E7D; +ESIRAM126 = 0x0E7E; +ESIRAM127 = 0x0E7F; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5988.cmd b/msp430/msp430fr5988.cmd new file mode 100644 index 00000000..3eb83a94 --- /dev/null +++ b/msp430/msp430fr5988.cmd @@ -0,0 +1,1451 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5988.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************ +* EXTENDED SCAN INTERFACE +************************************************************/ +ESIDEBUG1 = 0x0D00; +ESIDEBUG1_L = 0x0D00; +ESIDEBUG1_H = 0x0D01; +ESIDEBUG2 = 0x0D02; +ESIDEBUG2_L = 0x0D02; +ESIDEBUG2_H = 0x0D03; +ESIDEBUG3 = 0x0D04; +ESIDEBUG3_L = 0x0D04; +ESIDEBUG3_H = 0x0D05; +ESIDEBUG4 = 0x0D06; +ESIDEBUG4_L = 0x0D06; +ESIDEBUG4_H = 0x0D07; +ESIDEBUG5 = 0x0D08; +ESIDEBUG5_L = 0x0D08; +ESIDEBUG5_H = 0x0D09; +ESICNT0 = 0x0D10; +ESICNT0_L = 0x0D10; +ESICNT0_H = 0x0D11; +ESICNT1 = 0x0D12; +ESICNT1_L = 0x0D12; +ESICNT1_H = 0x0D13; +ESICNT2 = 0x0D14; +ESICNT2_L = 0x0D14; +ESICNT2_H = 0x0D15; +ESICNT3 = 0x0D16; +ESICNT3_L = 0x0D16; +ESICNT3_H = 0x0D17; +ESIIV = 0x0D1A; +ESIIV_L = 0x0D1A; +ESIIV_H = 0x0D1B; +ESIINT1 = 0x0D1C; +ESIINT1_L = 0x0D1C; +ESIINT1_H = 0x0D1D; +ESIINT2 = 0x0D1E; +ESIINT2_L = 0x0D1E; +ESIINT2_H = 0x0D1F; +ESIAFE = 0x0D20; +ESIAFE_L = 0x0D20; +ESIAFE_H = 0x0D21; +ESIPPU = 0x0D22; +ESIPPU_L = 0x0D22; +ESIPPU_H = 0x0D23; +ESITSM = 0x0D24; +ESITSM_L = 0x0D24; +ESITSM_H = 0x0D25; +ESIPSM = 0x0D26; +ESIPSM_L = 0x0D26; +ESIPSM_H = 0x0D27; +ESIOSC = 0x0D28; +ESIOSC_L = 0x0D28; +ESIOSC_H = 0x0D29; +ESICTL = 0x0D2A; +ESICTL_L = 0x0D2A; +ESICTL_H = 0x0D2B; +ESITHR1 = 0x0D2C; +ESITHR1_L = 0x0D2C; +ESITHR1_H = 0x0D2D; +ESITHR2 = 0x0D2E; +ESITHR2_L = 0x0D2E; +ESITHR2_H = 0x0D2F; +ESIDAC1R0 = 0x0D40; +ESIDAC1R0_L = 0x0D40; +ESIDAC1R0_H = 0x0D41; +ESIDAC1R1 = 0x0D42; +ESIDAC1R1_L = 0x0D42; +ESIDAC1R1_H = 0x0D43; +ESIDAC1R2 = 0x0D44; +ESIDAC1R2_L = 0x0D44; +ESIDAC1R2_H = 0x0D45; +ESIDAC1R3 = 0x0D46; +ESIDAC1R3_L = 0x0D46; +ESIDAC1R3_H = 0x0D47; +ESIDAC1R4 = 0x0D48; +ESIDAC1R4_L = 0x0D48; +ESIDAC1R4_H = 0x0D49; +ESIDAC1R5 = 0x0D4A; +ESIDAC1R5_L = 0x0D4A; +ESIDAC1R5_H = 0x0D4B; +ESIDAC1R6 = 0x0D4C; +ESIDAC1R6_L = 0x0D4C; +ESIDAC1R6_H = 0x0D4D; +ESIDAC1R7 = 0x0D4E; +ESIDAC1R7_L = 0x0D4E; +ESIDAC1R7_H = 0x0D4F; +ESIDAC2R0 = 0x0D50; +ESIDAC2R0_L = 0x0D50; +ESIDAC2R0_H = 0x0D51; +ESIDAC2R1 = 0x0D52; +ESIDAC2R1_L = 0x0D52; +ESIDAC2R1_H = 0x0D53; +ESIDAC2R2 = 0x0D54; +ESIDAC2R2_L = 0x0D54; +ESIDAC2R2_H = 0x0D55; +ESIDAC2R3 = 0x0D56; +ESIDAC2R3_L = 0x0D56; +ESIDAC2R3_H = 0x0D57; +ESIDAC2R4 = 0x0D58; +ESIDAC2R4_L = 0x0D58; +ESIDAC2R4_H = 0x0D59; +ESIDAC2R5 = 0x0D5A; +ESIDAC2R5_L = 0x0D5A; +ESIDAC2R5_H = 0x0D5B; +ESIDAC2R6 = 0x0D5C; +ESIDAC2R6_L = 0x0D5C; +ESIDAC2R6_H = 0x0D5D; +ESIDAC2R7 = 0x0D5E; +ESIDAC2R7_L = 0x0D5E; +ESIDAC2R7_H = 0x0D5F; +ESITSM0 = 0x0D60; +ESITSM0_L = 0x0D60; +ESITSM0_H = 0x0D61; +ESITSM1 = 0x0D62; +ESITSM1_L = 0x0D62; +ESITSM1_H = 0x0D63; +ESITSM2 = 0x0D64; +ESITSM2_L = 0x0D64; +ESITSM2_H = 0x0D65; +ESITSM3 = 0x0D66; +ESITSM3_L = 0x0D66; +ESITSM3_H = 0x0D67; +ESITSM4 = 0x0D68; +ESITSM4_L = 0x0D68; +ESITSM4_H = 0x0D69; +ESITSM5 = 0x0D6A; +ESITSM5_L = 0x0D6A; +ESITSM5_H = 0x0D6B; +ESITSM6 = 0x0D6C; +ESITSM6_L = 0x0D6C; +ESITSM6_H = 0x0D6D; +ESITSM7 = 0x0D6E; +ESITSM7_L = 0x0D6E; +ESITSM7_H = 0x0D6F; +ESITSM8 = 0x0D70; +ESITSM8_L = 0x0D70; +ESITSM8_H = 0x0D71; +ESITSM9 = 0x0D72; +ESITSM9_L = 0x0D72; +ESITSM9_H = 0x0D73; +ESITSM10 = 0x0D74; +ESITSM10_L = 0x0D74; +ESITSM10_H = 0x0D75; +ESITSM11 = 0x0D76; +ESITSM11_L = 0x0D76; +ESITSM11_H = 0x0D77; +ESITSM12 = 0x0D78; +ESITSM12_L = 0x0D78; +ESITSM12_H = 0x0D79; +ESITSM13 = 0x0D7A; +ESITSM13_L = 0x0D7A; +ESITSM13_H = 0x0D7B; +ESITSM14 = 0x0D7C; +ESITSM14_L = 0x0D7C; +ESITSM14_H = 0x0D7D; +ESITSM15 = 0x0D7E; +ESITSM15_L = 0x0D7E; +ESITSM15_H = 0x0D7F; +ESITSM16 = 0x0D80; +ESITSM16_L = 0x0D80; +ESITSM16_H = 0x0D81; +ESITSM17 = 0x0D82; +ESITSM17_L = 0x0D82; +ESITSM17_H = 0x0D83; +ESITSM18 = 0x0D84; +ESITSM18_L = 0x0D84; +ESITSM18_H = 0x0D85; +ESITSM19 = 0x0D86; +ESITSM19_L = 0x0D86; +ESITSM19_H = 0x0D87; +ESITSM20 = 0x0D88; +ESITSM20_L = 0x0D88; +ESITSM20_H = 0x0D89; +ESITSM21 = 0x0D8A; +ESITSM21_L = 0x0D8A; +ESITSM21_H = 0x0D8B; +ESITSM22 = 0x0D8C; +ESITSM22_L = 0x0D8C; +ESITSM22_H = 0x0D8D; +ESITSM23 = 0x0D8E; +ESITSM23_L = 0x0D8E; +ESITSM23_H = 0x0D8F; +ESITSM24 = 0x0D90; +ESITSM24_L = 0x0D90; +ESITSM24_H = 0x0D91; +ESITSM25 = 0x0D92; +ESITSM25_L = 0x0D92; +ESITSM25_H = 0x0D93; +ESITSM26 = 0x0D94; +ESITSM26_L = 0x0D94; +ESITSM26_H = 0x0D95; +ESITSM27 = 0x0D96; +ESITSM27_L = 0x0D96; +ESITSM27_H = 0x0D97; +ESITSM28 = 0x0D98; +ESITSM28_L = 0x0D98; +ESITSM28_H = 0x0D99; +ESITSM29 = 0x0D9A; +ESITSM29_L = 0x0D9A; +ESITSM29_H = 0x0D9B; +ESITSM30 = 0x0D9C; +ESITSM30_L = 0x0D9C; +ESITSM30_H = 0x0D9D; +ESITSM31 = 0x0D9E; +ESITSM31_L = 0x0D9E; +ESITSM31_H = 0x0D9F; +/************************************************************ +* EXTENDED SCAN INTERFACE RAM +************************************************************/ +ESIRAM0 = 0x0E00; +ESIRAM1 = 0x0E01; +ESIRAM2 = 0x0E02; +ESIRAM3 = 0x0E03; +ESIRAM4 = 0x0E04; +ESIRAM5 = 0x0E05; +ESIRAM6 = 0x0E06; +ESIRAM7 = 0x0E07; +ESIRAM8 = 0x0E08; +ESIRAM9 = 0x0E09; +ESIRAM10 = 0x0E0A; +ESIRAM11 = 0x0E0B; +ESIRAM12 = 0x0E0C; +ESIRAM13 = 0x0E0D; +ESIRAM14 = 0x0E0E; +ESIRAM15 = 0x0E0F; +ESIRAM16 = 0x0E10; +ESIRAM17 = 0x0E11; +ESIRAM18 = 0x0E12; +ESIRAM19 = 0x0E13; +ESIRAM20 = 0x0E14; +ESIRAM21 = 0x0E15; +ESIRAM22 = 0x0E16; +ESIRAM23 = 0x0E17; +ESIRAM24 = 0x0E18; +ESIRAM25 = 0x0E19; +ESIRAM26 = 0x0E1A; +ESIRAM27 = 0x0E1B; +ESIRAM28 = 0x0E1C; +ESIRAM29 = 0x0E1D; +ESIRAM30 = 0x0E1E; +ESIRAM31 = 0x0E1F; +ESIRAM32 = 0x0E20; +ESIRAM33 = 0x0E21; +ESIRAM34 = 0x0E22; +ESIRAM35 = 0x0E23; +ESIRAM36 = 0x0E24; +ESIRAM37 = 0x0E25; +ESIRAM38 = 0x0E26; +ESIRAM39 = 0x0E27; +ESIRAM40 = 0x0E28; +ESIRAM41 = 0x0E29; +ESIRAM42 = 0x0E2A; +ESIRAM43 = 0x0E2B; +ESIRAM44 = 0x0E2C; +ESIRAM45 = 0x0E2D; +ESIRAM46 = 0x0E2E; +ESIRAM47 = 0x0E2F; +ESIRAM48 = 0x0E30; +ESIRAM49 = 0x0E31; +ESIRAM50 = 0x0E32; +ESIRAM51 = 0x0E33; +ESIRAM52 = 0x0E34; +ESIRAM53 = 0x0E35; +ESIRAM54 = 0x0E36; +ESIRAM55 = 0x0E37; +ESIRAM56 = 0x0E38; +ESIRAM57 = 0x0E39; +ESIRAM58 = 0x0E3A; +ESIRAM59 = 0x0E3B; +ESIRAM60 = 0x0E3C; +ESIRAM61 = 0x0E3D; +ESIRAM62 = 0x0E3E; +ESIRAM63 = 0x0E3F; +ESIRAM64 = 0x0E40; +ESIRAM65 = 0x0E41; +ESIRAM66 = 0x0E42; +ESIRAM67 = 0x0E43; +ESIRAM68 = 0x0E44; +ESIRAM69 = 0x0E45; +ESIRAM70 = 0x0E46; +ESIRAM71 = 0x0E47; +ESIRAM72 = 0x0E48; +ESIRAM73 = 0x0E49; +ESIRAM74 = 0x0E4A; +ESIRAM75 = 0x0E4B; +ESIRAM76 = 0x0E4C; +ESIRAM77 = 0x0E4D; +ESIRAM78 = 0x0E4E; +ESIRAM79 = 0x0E4F; +ESIRAM80 = 0x0E50; +ESIRAM81 = 0x0E51; +ESIRAM82 = 0x0E52; +ESIRAM83 = 0x0E53; +ESIRAM84 = 0x0E54; +ESIRAM85 = 0x0E55; +ESIRAM86 = 0x0E56; +ESIRAM87 = 0x0E57; +ESIRAM88 = 0x0E58; +ESIRAM89 = 0x0E59; +ESIRAM90 = 0x0E5A; +ESIRAM91 = 0x0E5B; +ESIRAM92 = 0x0E5C; +ESIRAM93 = 0x0E5D; +ESIRAM94 = 0x0E5E; +ESIRAM95 = 0x0E5F; +ESIRAM96 = 0x0E60; +ESIRAM97 = 0x0E61; +ESIRAM98 = 0x0E62; +ESIRAM99 = 0x0E63; +ESIRAM100 = 0x0E64; +ESIRAM101 = 0x0E65; +ESIRAM102 = 0x0E66; +ESIRAM103 = 0x0E67; +ESIRAM104 = 0x0E68; +ESIRAM105 = 0x0E69; +ESIRAM106 = 0x0E6A; +ESIRAM107 = 0x0E6B; +ESIRAM108 = 0x0E6C; +ESIRAM109 = 0x0E6D; +ESIRAM110 = 0x0E6E; +ESIRAM111 = 0x0E6F; +ESIRAM112 = 0x0E70; +ESIRAM113 = 0x0E71; +ESIRAM114 = 0x0E72; +ESIRAM115 = 0x0E73; +ESIRAM116 = 0x0E74; +ESIRAM117 = 0x0E75; +ESIRAM118 = 0x0E76; +ESIRAM119 = 0x0E77; +ESIRAM120 = 0x0E78; +ESIRAM121 = 0x0E79; +ESIRAM122 = 0x0E7A; +ESIRAM123 = 0x0E7B; +ESIRAM124 = 0x0E7C; +ESIRAM125 = 0x0E7D; +ESIRAM126 = 0x0E7E; +ESIRAM127 = 0x0E7F; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5989.cmd b/msp430/msp430fr5989.cmd new file mode 100644 index 00000000..a78a2fbf --- /dev/null +++ b/msp430/msp430fr5989.cmd @@ -0,0 +1,1451 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr5989.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************ +* EXTENDED SCAN INTERFACE +************************************************************/ +ESIDEBUG1 = 0x0D00; +ESIDEBUG1_L = 0x0D00; +ESIDEBUG1_H = 0x0D01; +ESIDEBUG2 = 0x0D02; +ESIDEBUG2_L = 0x0D02; +ESIDEBUG2_H = 0x0D03; +ESIDEBUG3 = 0x0D04; +ESIDEBUG3_L = 0x0D04; +ESIDEBUG3_H = 0x0D05; +ESIDEBUG4 = 0x0D06; +ESIDEBUG4_L = 0x0D06; +ESIDEBUG4_H = 0x0D07; +ESIDEBUG5 = 0x0D08; +ESIDEBUG5_L = 0x0D08; +ESIDEBUG5_H = 0x0D09; +ESICNT0 = 0x0D10; +ESICNT0_L = 0x0D10; +ESICNT0_H = 0x0D11; +ESICNT1 = 0x0D12; +ESICNT1_L = 0x0D12; +ESICNT1_H = 0x0D13; +ESICNT2 = 0x0D14; +ESICNT2_L = 0x0D14; +ESICNT2_H = 0x0D15; +ESICNT3 = 0x0D16; +ESICNT3_L = 0x0D16; +ESICNT3_H = 0x0D17; +ESIIV = 0x0D1A; +ESIIV_L = 0x0D1A; +ESIIV_H = 0x0D1B; +ESIINT1 = 0x0D1C; +ESIINT1_L = 0x0D1C; +ESIINT1_H = 0x0D1D; +ESIINT2 = 0x0D1E; +ESIINT2_L = 0x0D1E; +ESIINT2_H = 0x0D1F; +ESIAFE = 0x0D20; +ESIAFE_L = 0x0D20; +ESIAFE_H = 0x0D21; +ESIPPU = 0x0D22; +ESIPPU_L = 0x0D22; +ESIPPU_H = 0x0D23; +ESITSM = 0x0D24; +ESITSM_L = 0x0D24; +ESITSM_H = 0x0D25; +ESIPSM = 0x0D26; +ESIPSM_L = 0x0D26; +ESIPSM_H = 0x0D27; +ESIOSC = 0x0D28; +ESIOSC_L = 0x0D28; +ESIOSC_H = 0x0D29; +ESICTL = 0x0D2A; +ESICTL_L = 0x0D2A; +ESICTL_H = 0x0D2B; +ESITHR1 = 0x0D2C; +ESITHR1_L = 0x0D2C; +ESITHR1_H = 0x0D2D; +ESITHR2 = 0x0D2E; +ESITHR2_L = 0x0D2E; +ESITHR2_H = 0x0D2F; +ESIDAC1R0 = 0x0D40; +ESIDAC1R0_L = 0x0D40; +ESIDAC1R0_H = 0x0D41; +ESIDAC1R1 = 0x0D42; +ESIDAC1R1_L = 0x0D42; +ESIDAC1R1_H = 0x0D43; +ESIDAC1R2 = 0x0D44; +ESIDAC1R2_L = 0x0D44; +ESIDAC1R2_H = 0x0D45; +ESIDAC1R3 = 0x0D46; +ESIDAC1R3_L = 0x0D46; +ESIDAC1R3_H = 0x0D47; +ESIDAC1R4 = 0x0D48; +ESIDAC1R4_L = 0x0D48; +ESIDAC1R4_H = 0x0D49; +ESIDAC1R5 = 0x0D4A; +ESIDAC1R5_L = 0x0D4A; +ESIDAC1R5_H = 0x0D4B; +ESIDAC1R6 = 0x0D4C; +ESIDAC1R6_L = 0x0D4C; +ESIDAC1R6_H = 0x0D4D; +ESIDAC1R7 = 0x0D4E; +ESIDAC1R7_L = 0x0D4E; +ESIDAC1R7_H = 0x0D4F; +ESIDAC2R0 = 0x0D50; +ESIDAC2R0_L = 0x0D50; +ESIDAC2R0_H = 0x0D51; +ESIDAC2R1 = 0x0D52; +ESIDAC2R1_L = 0x0D52; +ESIDAC2R1_H = 0x0D53; +ESIDAC2R2 = 0x0D54; +ESIDAC2R2_L = 0x0D54; +ESIDAC2R2_H = 0x0D55; +ESIDAC2R3 = 0x0D56; +ESIDAC2R3_L = 0x0D56; +ESIDAC2R3_H = 0x0D57; +ESIDAC2R4 = 0x0D58; +ESIDAC2R4_L = 0x0D58; +ESIDAC2R4_H = 0x0D59; +ESIDAC2R5 = 0x0D5A; +ESIDAC2R5_L = 0x0D5A; +ESIDAC2R5_H = 0x0D5B; +ESIDAC2R6 = 0x0D5C; +ESIDAC2R6_L = 0x0D5C; +ESIDAC2R6_H = 0x0D5D; +ESIDAC2R7 = 0x0D5E; +ESIDAC2R7_L = 0x0D5E; +ESIDAC2R7_H = 0x0D5F; +ESITSM0 = 0x0D60; +ESITSM0_L = 0x0D60; +ESITSM0_H = 0x0D61; +ESITSM1 = 0x0D62; +ESITSM1_L = 0x0D62; +ESITSM1_H = 0x0D63; +ESITSM2 = 0x0D64; +ESITSM2_L = 0x0D64; +ESITSM2_H = 0x0D65; +ESITSM3 = 0x0D66; +ESITSM3_L = 0x0D66; +ESITSM3_H = 0x0D67; +ESITSM4 = 0x0D68; +ESITSM4_L = 0x0D68; +ESITSM4_H = 0x0D69; +ESITSM5 = 0x0D6A; +ESITSM5_L = 0x0D6A; +ESITSM5_H = 0x0D6B; +ESITSM6 = 0x0D6C; +ESITSM6_L = 0x0D6C; +ESITSM6_H = 0x0D6D; +ESITSM7 = 0x0D6E; +ESITSM7_L = 0x0D6E; +ESITSM7_H = 0x0D6F; +ESITSM8 = 0x0D70; +ESITSM8_L = 0x0D70; +ESITSM8_H = 0x0D71; +ESITSM9 = 0x0D72; +ESITSM9_L = 0x0D72; +ESITSM9_H = 0x0D73; +ESITSM10 = 0x0D74; +ESITSM10_L = 0x0D74; +ESITSM10_H = 0x0D75; +ESITSM11 = 0x0D76; +ESITSM11_L = 0x0D76; +ESITSM11_H = 0x0D77; +ESITSM12 = 0x0D78; +ESITSM12_L = 0x0D78; +ESITSM12_H = 0x0D79; +ESITSM13 = 0x0D7A; +ESITSM13_L = 0x0D7A; +ESITSM13_H = 0x0D7B; +ESITSM14 = 0x0D7C; +ESITSM14_L = 0x0D7C; +ESITSM14_H = 0x0D7D; +ESITSM15 = 0x0D7E; +ESITSM15_L = 0x0D7E; +ESITSM15_H = 0x0D7F; +ESITSM16 = 0x0D80; +ESITSM16_L = 0x0D80; +ESITSM16_H = 0x0D81; +ESITSM17 = 0x0D82; +ESITSM17_L = 0x0D82; +ESITSM17_H = 0x0D83; +ESITSM18 = 0x0D84; +ESITSM18_L = 0x0D84; +ESITSM18_H = 0x0D85; +ESITSM19 = 0x0D86; +ESITSM19_L = 0x0D86; +ESITSM19_H = 0x0D87; +ESITSM20 = 0x0D88; +ESITSM20_L = 0x0D88; +ESITSM20_H = 0x0D89; +ESITSM21 = 0x0D8A; +ESITSM21_L = 0x0D8A; +ESITSM21_H = 0x0D8B; +ESITSM22 = 0x0D8C; +ESITSM22_L = 0x0D8C; +ESITSM22_H = 0x0D8D; +ESITSM23 = 0x0D8E; +ESITSM23_L = 0x0D8E; +ESITSM23_H = 0x0D8F; +ESITSM24 = 0x0D90; +ESITSM24_L = 0x0D90; +ESITSM24_H = 0x0D91; +ESITSM25 = 0x0D92; +ESITSM25_L = 0x0D92; +ESITSM25_H = 0x0D93; +ESITSM26 = 0x0D94; +ESITSM26_L = 0x0D94; +ESITSM26_H = 0x0D95; +ESITSM27 = 0x0D96; +ESITSM27_L = 0x0D96; +ESITSM27_H = 0x0D97; +ESITSM28 = 0x0D98; +ESITSM28_L = 0x0D98; +ESITSM28_H = 0x0D99; +ESITSM29 = 0x0D9A; +ESITSM29_L = 0x0D9A; +ESITSM29_H = 0x0D9B; +ESITSM30 = 0x0D9C; +ESITSM30_L = 0x0D9C; +ESITSM30_H = 0x0D9D; +ESITSM31 = 0x0D9E; +ESITSM31_L = 0x0D9E; +ESITSM31_H = 0x0D9F; +/************************************************************ +* EXTENDED SCAN INTERFACE RAM +************************************************************/ +ESIRAM0 = 0x0E00; +ESIRAM1 = 0x0E01; +ESIRAM2 = 0x0E02; +ESIRAM3 = 0x0E03; +ESIRAM4 = 0x0E04; +ESIRAM5 = 0x0E05; +ESIRAM6 = 0x0E06; +ESIRAM7 = 0x0E07; +ESIRAM8 = 0x0E08; +ESIRAM9 = 0x0E09; +ESIRAM10 = 0x0E0A; +ESIRAM11 = 0x0E0B; +ESIRAM12 = 0x0E0C; +ESIRAM13 = 0x0E0D; +ESIRAM14 = 0x0E0E; +ESIRAM15 = 0x0E0F; +ESIRAM16 = 0x0E10; +ESIRAM17 = 0x0E11; +ESIRAM18 = 0x0E12; +ESIRAM19 = 0x0E13; +ESIRAM20 = 0x0E14; +ESIRAM21 = 0x0E15; +ESIRAM22 = 0x0E16; +ESIRAM23 = 0x0E17; +ESIRAM24 = 0x0E18; +ESIRAM25 = 0x0E19; +ESIRAM26 = 0x0E1A; +ESIRAM27 = 0x0E1B; +ESIRAM28 = 0x0E1C; +ESIRAM29 = 0x0E1D; +ESIRAM30 = 0x0E1E; +ESIRAM31 = 0x0E1F; +ESIRAM32 = 0x0E20; +ESIRAM33 = 0x0E21; +ESIRAM34 = 0x0E22; +ESIRAM35 = 0x0E23; +ESIRAM36 = 0x0E24; +ESIRAM37 = 0x0E25; +ESIRAM38 = 0x0E26; +ESIRAM39 = 0x0E27; +ESIRAM40 = 0x0E28; +ESIRAM41 = 0x0E29; +ESIRAM42 = 0x0E2A; +ESIRAM43 = 0x0E2B; +ESIRAM44 = 0x0E2C; +ESIRAM45 = 0x0E2D; +ESIRAM46 = 0x0E2E; +ESIRAM47 = 0x0E2F; +ESIRAM48 = 0x0E30; +ESIRAM49 = 0x0E31; +ESIRAM50 = 0x0E32; +ESIRAM51 = 0x0E33; +ESIRAM52 = 0x0E34; +ESIRAM53 = 0x0E35; +ESIRAM54 = 0x0E36; +ESIRAM55 = 0x0E37; +ESIRAM56 = 0x0E38; +ESIRAM57 = 0x0E39; +ESIRAM58 = 0x0E3A; +ESIRAM59 = 0x0E3B; +ESIRAM60 = 0x0E3C; +ESIRAM61 = 0x0E3D; +ESIRAM62 = 0x0E3E; +ESIRAM63 = 0x0E3F; +ESIRAM64 = 0x0E40; +ESIRAM65 = 0x0E41; +ESIRAM66 = 0x0E42; +ESIRAM67 = 0x0E43; +ESIRAM68 = 0x0E44; +ESIRAM69 = 0x0E45; +ESIRAM70 = 0x0E46; +ESIRAM71 = 0x0E47; +ESIRAM72 = 0x0E48; +ESIRAM73 = 0x0E49; +ESIRAM74 = 0x0E4A; +ESIRAM75 = 0x0E4B; +ESIRAM76 = 0x0E4C; +ESIRAM77 = 0x0E4D; +ESIRAM78 = 0x0E4E; +ESIRAM79 = 0x0E4F; +ESIRAM80 = 0x0E50; +ESIRAM81 = 0x0E51; +ESIRAM82 = 0x0E52; +ESIRAM83 = 0x0E53; +ESIRAM84 = 0x0E54; +ESIRAM85 = 0x0E55; +ESIRAM86 = 0x0E56; +ESIRAM87 = 0x0E57; +ESIRAM88 = 0x0E58; +ESIRAM89 = 0x0E59; +ESIRAM90 = 0x0E5A; +ESIRAM91 = 0x0E5B; +ESIRAM92 = 0x0E5C; +ESIRAM93 = 0x0E5D; +ESIRAM94 = 0x0E5E; +ESIRAM95 = 0x0E5F; +ESIRAM96 = 0x0E60; +ESIRAM97 = 0x0E61; +ESIRAM98 = 0x0E62; +ESIRAM99 = 0x0E63; +ESIRAM100 = 0x0E64; +ESIRAM101 = 0x0E65; +ESIRAM102 = 0x0E66; +ESIRAM103 = 0x0E67; +ESIRAM104 = 0x0E68; +ESIRAM105 = 0x0E69; +ESIRAM106 = 0x0E6A; +ESIRAM107 = 0x0E6B; +ESIRAM108 = 0x0E6C; +ESIRAM109 = 0x0E6D; +ESIRAM110 = 0x0E6E; +ESIRAM111 = 0x0E6F; +ESIRAM112 = 0x0E70; +ESIRAM113 = 0x0E71; +ESIRAM114 = 0x0E72; +ESIRAM115 = 0x0E73; +ESIRAM116 = 0x0E74; +ESIRAM117 = 0x0E75; +ESIRAM118 = 0x0E76; +ESIRAM119 = 0x0E77; +ESIRAM120 = 0x0E78; +ESIRAM121 = 0x0E79; +ESIRAM122 = 0x0E7A; +ESIRAM123 = 0x0E7B; +ESIRAM124 = 0x0E7C; +ESIRAM125 = 0x0E7D; +ESIRAM126 = 0x0E7E; +ESIRAM127 = 0x0E7F; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr59891.cmd b/msp430/msp430fr59891.cmd new file mode 100644 index 00000000..4b012462 --- /dev/null +++ b/msp430/msp430fr59891.cmd @@ -0,0 +1,1451 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr59891.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************ +* EXTENDED SCAN INTERFACE +************************************************************/ +ESIDEBUG1 = 0x0D00; +ESIDEBUG1_L = 0x0D00; +ESIDEBUG1_H = 0x0D01; +ESIDEBUG2 = 0x0D02; +ESIDEBUG2_L = 0x0D02; +ESIDEBUG2_H = 0x0D03; +ESIDEBUG3 = 0x0D04; +ESIDEBUG3_L = 0x0D04; +ESIDEBUG3_H = 0x0D05; +ESIDEBUG4 = 0x0D06; +ESIDEBUG4_L = 0x0D06; +ESIDEBUG4_H = 0x0D07; +ESIDEBUG5 = 0x0D08; +ESIDEBUG5_L = 0x0D08; +ESIDEBUG5_H = 0x0D09; +ESICNT0 = 0x0D10; +ESICNT0_L = 0x0D10; +ESICNT0_H = 0x0D11; +ESICNT1 = 0x0D12; +ESICNT1_L = 0x0D12; +ESICNT1_H = 0x0D13; +ESICNT2 = 0x0D14; +ESICNT2_L = 0x0D14; +ESICNT2_H = 0x0D15; +ESICNT3 = 0x0D16; +ESICNT3_L = 0x0D16; +ESICNT3_H = 0x0D17; +ESIIV = 0x0D1A; +ESIIV_L = 0x0D1A; +ESIIV_H = 0x0D1B; +ESIINT1 = 0x0D1C; +ESIINT1_L = 0x0D1C; +ESIINT1_H = 0x0D1D; +ESIINT2 = 0x0D1E; +ESIINT2_L = 0x0D1E; +ESIINT2_H = 0x0D1F; +ESIAFE = 0x0D20; +ESIAFE_L = 0x0D20; +ESIAFE_H = 0x0D21; +ESIPPU = 0x0D22; +ESIPPU_L = 0x0D22; +ESIPPU_H = 0x0D23; +ESITSM = 0x0D24; +ESITSM_L = 0x0D24; +ESITSM_H = 0x0D25; +ESIPSM = 0x0D26; +ESIPSM_L = 0x0D26; +ESIPSM_H = 0x0D27; +ESIOSC = 0x0D28; +ESIOSC_L = 0x0D28; +ESIOSC_H = 0x0D29; +ESICTL = 0x0D2A; +ESICTL_L = 0x0D2A; +ESICTL_H = 0x0D2B; +ESITHR1 = 0x0D2C; +ESITHR1_L = 0x0D2C; +ESITHR1_H = 0x0D2D; +ESITHR2 = 0x0D2E; +ESITHR2_L = 0x0D2E; +ESITHR2_H = 0x0D2F; +ESIDAC1R0 = 0x0D40; +ESIDAC1R0_L = 0x0D40; +ESIDAC1R0_H = 0x0D41; +ESIDAC1R1 = 0x0D42; +ESIDAC1R1_L = 0x0D42; +ESIDAC1R1_H = 0x0D43; +ESIDAC1R2 = 0x0D44; +ESIDAC1R2_L = 0x0D44; +ESIDAC1R2_H = 0x0D45; +ESIDAC1R3 = 0x0D46; +ESIDAC1R3_L = 0x0D46; +ESIDAC1R3_H = 0x0D47; +ESIDAC1R4 = 0x0D48; +ESIDAC1R4_L = 0x0D48; +ESIDAC1R4_H = 0x0D49; +ESIDAC1R5 = 0x0D4A; +ESIDAC1R5_L = 0x0D4A; +ESIDAC1R5_H = 0x0D4B; +ESIDAC1R6 = 0x0D4C; +ESIDAC1R6_L = 0x0D4C; +ESIDAC1R6_H = 0x0D4D; +ESIDAC1R7 = 0x0D4E; +ESIDAC1R7_L = 0x0D4E; +ESIDAC1R7_H = 0x0D4F; +ESIDAC2R0 = 0x0D50; +ESIDAC2R0_L = 0x0D50; +ESIDAC2R0_H = 0x0D51; +ESIDAC2R1 = 0x0D52; +ESIDAC2R1_L = 0x0D52; +ESIDAC2R1_H = 0x0D53; +ESIDAC2R2 = 0x0D54; +ESIDAC2R2_L = 0x0D54; +ESIDAC2R2_H = 0x0D55; +ESIDAC2R3 = 0x0D56; +ESIDAC2R3_L = 0x0D56; +ESIDAC2R3_H = 0x0D57; +ESIDAC2R4 = 0x0D58; +ESIDAC2R4_L = 0x0D58; +ESIDAC2R4_H = 0x0D59; +ESIDAC2R5 = 0x0D5A; +ESIDAC2R5_L = 0x0D5A; +ESIDAC2R5_H = 0x0D5B; +ESIDAC2R6 = 0x0D5C; +ESIDAC2R6_L = 0x0D5C; +ESIDAC2R6_H = 0x0D5D; +ESIDAC2R7 = 0x0D5E; +ESIDAC2R7_L = 0x0D5E; +ESIDAC2R7_H = 0x0D5F; +ESITSM0 = 0x0D60; +ESITSM0_L = 0x0D60; +ESITSM0_H = 0x0D61; +ESITSM1 = 0x0D62; +ESITSM1_L = 0x0D62; +ESITSM1_H = 0x0D63; +ESITSM2 = 0x0D64; +ESITSM2_L = 0x0D64; +ESITSM2_H = 0x0D65; +ESITSM3 = 0x0D66; +ESITSM3_L = 0x0D66; +ESITSM3_H = 0x0D67; +ESITSM4 = 0x0D68; +ESITSM4_L = 0x0D68; +ESITSM4_H = 0x0D69; +ESITSM5 = 0x0D6A; +ESITSM5_L = 0x0D6A; +ESITSM5_H = 0x0D6B; +ESITSM6 = 0x0D6C; +ESITSM6_L = 0x0D6C; +ESITSM6_H = 0x0D6D; +ESITSM7 = 0x0D6E; +ESITSM7_L = 0x0D6E; +ESITSM7_H = 0x0D6F; +ESITSM8 = 0x0D70; +ESITSM8_L = 0x0D70; +ESITSM8_H = 0x0D71; +ESITSM9 = 0x0D72; +ESITSM9_L = 0x0D72; +ESITSM9_H = 0x0D73; +ESITSM10 = 0x0D74; +ESITSM10_L = 0x0D74; +ESITSM10_H = 0x0D75; +ESITSM11 = 0x0D76; +ESITSM11_L = 0x0D76; +ESITSM11_H = 0x0D77; +ESITSM12 = 0x0D78; +ESITSM12_L = 0x0D78; +ESITSM12_H = 0x0D79; +ESITSM13 = 0x0D7A; +ESITSM13_L = 0x0D7A; +ESITSM13_H = 0x0D7B; +ESITSM14 = 0x0D7C; +ESITSM14_L = 0x0D7C; +ESITSM14_H = 0x0D7D; +ESITSM15 = 0x0D7E; +ESITSM15_L = 0x0D7E; +ESITSM15_H = 0x0D7F; +ESITSM16 = 0x0D80; +ESITSM16_L = 0x0D80; +ESITSM16_H = 0x0D81; +ESITSM17 = 0x0D82; +ESITSM17_L = 0x0D82; +ESITSM17_H = 0x0D83; +ESITSM18 = 0x0D84; +ESITSM18_L = 0x0D84; +ESITSM18_H = 0x0D85; +ESITSM19 = 0x0D86; +ESITSM19_L = 0x0D86; +ESITSM19_H = 0x0D87; +ESITSM20 = 0x0D88; +ESITSM20_L = 0x0D88; +ESITSM20_H = 0x0D89; +ESITSM21 = 0x0D8A; +ESITSM21_L = 0x0D8A; +ESITSM21_H = 0x0D8B; +ESITSM22 = 0x0D8C; +ESITSM22_L = 0x0D8C; +ESITSM22_H = 0x0D8D; +ESITSM23 = 0x0D8E; +ESITSM23_L = 0x0D8E; +ESITSM23_H = 0x0D8F; +ESITSM24 = 0x0D90; +ESITSM24_L = 0x0D90; +ESITSM24_H = 0x0D91; +ESITSM25 = 0x0D92; +ESITSM25_L = 0x0D92; +ESITSM25_H = 0x0D93; +ESITSM26 = 0x0D94; +ESITSM26_L = 0x0D94; +ESITSM26_H = 0x0D95; +ESITSM27 = 0x0D96; +ESITSM27_L = 0x0D96; +ESITSM27_H = 0x0D97; +ESITSM28 = 0x0D98; +ESITSM28_L = 0x0D98; +ESITSM28_H = 0x0D99; +ESITSM29 = 0x0D9A; +ESITSM29_L = 0x0D9A; +ESITSM29_H = 0x0D9B; +ESITSM30 = 0x0D9C; +ESITSM30_L = 0x0D9C; +ESITSM30_H = 0x0D9D; +ESITSM31 = 0x0D9E; +ESITSM31_L = 0x0D9E; +ESITSM31_H = 0x0D9F; +/************************************************************ +* EXTENDED SCAN INTERFACE RAM +************************************************************/ +ESIRAM0 = 0x0E00; +ESIRAM1 = 0x0E01; +ESIRAM2 = 0x0E02; +ESIRAM3 = 0x0E03; +ESIRAM4 = 0x0E04; +ESIRAM5 = 0x0E05; +ESIRAM6 = 0x0E06; +ESIRAM7 = 0x0E07; +ESIRAM8 = 0x0E08; +ESIRAM9 = 0x0E09; +ESIRAM10 = 0x0E0A; +ESIRAM11 = 0x0E0B; +ESIRAM12 = 0x0E0C; +ESIRAM13 = 0x0E0D; +ESIRAM14 = 0x0E0E; +ESIRAM15 = 0x0E0F; +ESIRAM16 = 0x0E10; +ESIRAM17 = 0x0E11; +ESIRAM18 = 0x0E12; +ESIRAM19 = 0x0E13; +ESIRAM20 = 0x0E14; +ESIRAM21 = 0x0E15; +ESIRAM22 = 0x0E16; +ESIRAM23 = 0x0E17; +ESIRAM24 = 0x0E18; +ESIRAM25 = 0x0E19; +ESIRAM26 = 0x0E1A; +ESIRAM27 = 0x0E1B; +ESIRAM28 = 0x0E1C; +ESIRAM29 = 0x0E1D; +ESIRAM30 = 0x0E1E; +ESIRAM31 = 0x0E1F; +ESIRAM32 = 0x0E20; +ESIRAM33 = 0x0E21; +ESIRAM34 = 0x0E22; +ESIRAM35 = 0x0E23; +ESIRAM36 = 0x0E24; +ESIRAM37 = 0x0E25; +ESIRAM38 = 0x0E26; +ESIRAM39 = 0x0E27; +ESIRAM40 = 0x0E28; +ESIRAM41 = 0x0E29; +ESIRAM42 = 0x0E2A; +ESIRAM43 = 0x0E2B; +ESIRAM44 = 0x0E2C; +ESIRAM45 = 0x0E2D; +ESIRAM46 = 0x0E2E; +ESIRAM47 = 0x0E2F; +ESIRAM48 = 0x0E30; +ESIRAM49 = 0x0E31; +ESIRAM50 = 0x0E32; +ESIRAM51 = 0x0E33; +ESIRAM52 = 0x0E34; +ESIRAM53 = 0x0E35; +ESIRAM54 = 0x0E36; +ESIRAM55 = 0x0E37; +ESIRAM56 = 0x0E38; +ESIRAM57 = 0x0E39; +ESIRAM58 = 0x0E3A; +ESIRAM59 = 0x0E3B; +ESIRAM60 = 0x0E3C; +ESIRAM61 = 0x0E3D; +ESIRAM62 = 0x0E3E; +ESIRAM63 = 0x0E3F; +ESIRAM64 = 0x0E40; +ESIRAM65 = 0x0E41; +ESIRAM66 = 0x0E42; +ESIRAM67 = 0x0E43; +ESIRAM68 = 0x0E44; +ESIRAM69 = 0x0E45; +ESIRAM70 = 0x0E46; +ESIRAM71 = 0x0E47; +ESIRAM72 = 0x0E48; +ESIRAM73 = 0x0E49; +ESIRAM74 = 0x0E4A; +ESIRAM75 = 0x0E4B; +ESIRAM76 = 0x0E4C; +ESIRAM77 = 0x0E4D; +ESIRAM78 = 0x0E4E; +ESIRAM79 = 0x0E4F; +ESIRAM80 = 0x0E50; +ESIRAM81 = 0x0E51; +ESIRAM82 = 0x0E52; +ESIRAM83 = 0x0E53; +ESIRAM84 = 0x0E54; +ESIRAM85 = 0x0E55; +ESIRAM86 = 0x0E56; +ESIRAM87 = 0x0E57; +ESIRAM88 = 0x0E58; +ESIRAM89 = 0x0E59; +ESIRAM90 = 0x0E5A; +ESIRAM91 = 0x0E5B; +ESIRAM92 = 0x0E5C; +ESIRAM93 = 0x0E5D; +ESIRAM94 = 0x0E5E; +ESIRAM95 = 0x0E5F; +ESIRAM96 = 0x0E60; +ESIRAM97 = 0x0E61; +ESIRAM98 = 0x0E62; +ESIRAM99 = 0x0E63; +ESIRAM100 = 0x0E64; +ESIRAM101 = 0x0E65; +ESIRAM102 = 0x0E66; +ESIRAM103 = 0x0E67; +ESIRAM104 = 0x0E68; +ESIRAM105 = 0x0E69; +ESIRAM106 = 0x0E6A; +ESIRAM107 = 0x0E6B; +ESIRAM108 = 0x0E6C; +ESIRAM109 = 0x0E6D; +ESIRAM110 = 0x0E6E; +ESIRAM111 = 0x0E6F; +ESIRAM112 = 0x0E70; +ESIRAM113 = 0x0E71; +ESIRAM114 = 0x0E72; +ESIRAM115 = 0x0E73; +ESIRAM116 = 0x0E74; +ESIRAM117 = 0x0E75; +ESIRAM118 = 0x0E76; +ESIRAM119 = 0x0E77; +ESIRAM120 = 0x0E78; +ESIRAM121 = 0x0E79; +ESIRAM122 = 0x0E7A; +ESIRAM123 = 0x0E7B; +ESIRAM124 = 0x0E7C; +ESIRAM125 = 0x0E7D; +ESIRAM126 = 0x0E7E; +ESIRAM127 = 0x0E7F; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr5992.cmd b/msp430/msp430fr5992.cmd new file mode 100644 index 00000000..d8e2651d --- /dev/null +++ b/msp430/msp430fr5992.cmd @@ -0,0 +1,1884 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr5992.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC12_B +*****************************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; + + +/***************************************************************************** + AES256 +*****************************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; + + +/***************************************************************************** + CAPTIO0 +*****************************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; + + +/***************************************************************************** + CAPTIO1 +*****************************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; + + +/***************************************************************************** + COMP_E +*****************************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; + + +/***************************************************************************** + CRC32 +*****************************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +P7IV = 0x026E; +P7IV_L = 0x026E; +P7IV_H = 0x026F; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +PDIES = 0x0278; +PDIES_L = 0x0278; +PDIES_H = 0x0279; +PDIE = 0x027A; +PDIE_L = 0x027A; +PDIE_H = 0x027B; +PDIFG = 0x027C; +PDIFG_L = 0x027C; +PDIFG_H = 0x027D; +P8IV = 0x027E; +P8IV_L = 0x027E; +P8IV_H = 0x027F; +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +P9IV = 0x028E; +P9IV_L = 0x028E; +P9IV_H = 0x028F; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +PEIES = 0x0298; +PEIES_L = 0x0298; +PEIES_H = 0x0299; +PEIE = 0x029A; +PEIE_L = 0x029A; +PEIE_H = 0x029B; +PEIFG = 0x029C; +PEIFG_L = 0x029C; +PEIFG_H = 0x029D; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + +P7IN = 0x0260; + +P8IN = 0x0261; + +P7OUT = 0x0262; + +P8OUT = 0x0263; + +P7DIR = 0x0264; + +P8DIR = 0x0265; + +P7REN = 0x0266; + +P8REN = 0x0267; + +P7SEL0 = 0x026A; + +P8SEL0 = 0x026B; + +P7SEL1 = 0x026C; + +P8SEL1 = 0x026D; + +P7SELC = 0x0276; + +P8SELC = 0x0277; + +P7IES = 0x0278; + +P8IES = 0x0279; + +P7IE = 0x027A; + +P8IE = 0x027B; + +P7IFG = 0x027C; + +P8IFG = 0x027D; + +P9IN = 0x0280; + +P9OUT = 0x0282; + +P9DIR = 0x0284; + +P9REN = 0x0286; + +P9SEL0 = 0x028A; + +P9SEL1 = 0x028C; + +P9SELC = 0x0296; + +P9IES = 0x0298; + +P9IE = 0x029A; + +P9IFG = 0x029C; + + + +/***************************************************************************** + DMA +*****************************************************************************/ +DMACTL0 = 0x0500; +DMACTL0_L = 0x0500; +DMACTL0_H = 0x0501; +DMACTL1 = 0x0502; +DMACTL1_L = 0x0502; +DMACTL1_H = 0x0503; +DMACTL2 = 0x0504; +DMACTL2_L = 0x0504; +DMACTL2_H = 0x0505; +DMACTL4 = 0x0508; +DMACTL4_L = 0x0508; +DMACTL4_H = 0x0509; +DMAIV = 0x050E; +DMAIV_L = 0x050E; +DMAIV_H = 0x050F; +DMA0CTL = 0x0510; +DMA0CTL_L = 0x0510; +DMA0CTL_H = 0x0511; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA0SZ_L = 0x051A; +DMA0SZ_H = 0x051B; +DMA1CTL = 0x0520; +DMA1CTL_L = 0x0520; +DMA1CTL_H = 0x0521; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA1SZ_L = 0x052A; +DMA1SZ_H = 0x052B; +DMA2CTL = 0x0530; +DMA2CTL_L = 0x0530; +DMA2CTL_H = 0x0531; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA2SZ_L = 0x053A; +DMA2SZ_H = 0x053B; +DMA3CTL = 0x0540; +DMA3CTL_L = 0x0540; +DMA3CTL_H = 0x0541; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA3SZ_L = 0x054A; +DMA3SZ_H = 0x054B; +DMA4CTL = 0x0550; +DMA4CTL_L = 0x0550; +DMA4CTL_H = 0x0551; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA4SZ_L = 0x055A; +DMA4SZ_H = 0x055B; +DMA5CTL = 0x0560; +DMA5CTL_L = 0x0560; +DMA5CTL_H = 0x0561; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +DMA5SZ_L = 0x056A; +DMA5SZ_H = 0x056B; + + +/***************************************************************************** + FRCTL_A +*****************************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; + + +/***************************************************************************** + LEA +*****************************************************************************/ +LEACAP = 0x0A80; +LEACAPL = 0x0A80; +LEACAPH = 0x0A82; + +LEACNF0 = 0x0A84; +LEACNF0L = 0x0A84; +LEACNF0H = 0x0A86; + +LEACNF1 = 0x0A88; +LEACNF1L = 0x0A88; +LEACNF1H = 0x0A8A; + +LEACNF2 = 0x0A8C; +LEACNF2L = 0x0A8C; +LEACNF2H = 0x0A8E; + +LEAMB = 0x0A90; +LEAMBL = 0x0A90; +LEAMBH = 0x0A92; + +LEAMT = 0x0A94; +LEAMTL = 0x0A94; +LEAMTH = 0x0A96; + +LEACMA = 0x0A98; +LEACMAL = 0x0A98; +LEACMAH = 0x0A9A; + +LEACMCTL = 0x0A9C; +LEACMCTLL = 0x0A9C; +LEACMCTLH = 0x0A9E; + +LEACMDSTAT = 0x0AA8; +LEACMDSTATL = 0x0AA8; +LEACMDSTATH = 0x0AAA; + +LEAS1STAT = 0x0AAC; +LEAS1STATL = 0x0AAC; +LEAS1STATH = 0x0AAE; + +LEAS0STAT = 0x0AB0; +LEAS0STATL = 0x0AB0; +LEAS0STATH = 0x0AB2; + +LEADSTSTAT = 0x0AB4; +LEADSTSTATL = 0x0AB4; +LEADSTSTATH = 0x0AB6; + +LEAPMCTL = 0x0AC0; +LEAPMCTLL = 0x0AC0; +LEAPMCTLH = 0x0AC2; + +LEAPMDST = 0x0AC4; +LEAPMDSTL = 0x0AC4; +LEAPMDSTH = 0x0AC6; + +LEAPMS1 = 0x0AC8; +LEAPMS1L = 0x0AC8; +LEAPMS1H = 0x0ACA; + +LEAPMS0 = 0x0ACC; +LEAPMS0L = 0x0ACC; +LEAPMS0H = 0x0ACE; + +LEAPMCB = 0x0AD0; +LEAPMCBL = 0x0AD0; +LEAPMCBH = 0x0AD2; + +LEAIFGSET = 0x0AF0; +LEAIFGSETL = 0x0AF0; +LEAIFGSETH = 0x0AF2; + +LEAIE = 0x0AF4; +LEAIEL = 0x0AF4; +LEAIEH = 0x0AF6; + +LEAIFG = 0x0AF8; +LEAIFGL = 0x0AF8; +LEAIFGH = 0x0AFA; + +LEAIV = 0x0AFC; +LEAIVL = 0x0AFC; +LEAIVH = 0x0AFE; + + + +/***************************************************************************** + MPU +*****************************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RAMCTL +*****************************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; + + +/***************************************************************************** + REF_A +*****************************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; + + +/***************************************************************************** + RTC_C +*****************************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCIV_L = 0x04AE; +RTCIV_H = 0x04AF; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCCNT12 = 0x04B0; +RTCCNT12_L = 0x04B0; +RTCCNT12_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCCNT34 = 0x04B2; +RTCCNT34_L = 0x04B2; +RTCCNT34_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BIN2BCD_L = 0x04BC; +BIN2BCD_H = 0x04BD; +BCD2BIN = 0x04BE; +BCD2BIN_L = 0x04BE; +BCD2BIN_H = 0x04BF; +RT0PS = 0x04AC; + +RT1PS = 0x04AD; + +RTCCNT1 = 0x04B0; + +RTCCNT2 = 0x04B1; + +RTCCNT3 = 0x04B2; + +RTCCNT4 = 0x04B3; + + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0340; +TA0CTL_L = 0x0340; +TA0CTL_H = 0x0341; +TA0CCTL0 = 0x0342; +TA0CCTL0_L = 0x0342; +TA0CCTL0_H = 0x0343; +TA0CCTL1 = 0x0344; +TA0CCTL1_L = 0x0344; +TA0CCTL1_H = 0x0345; +TA0CCTL2 = 0x0346; +TA0CCTL2_L = 0x0346; +TA0CCTL2_H = 0x0347; +TA0R = 0x0350; +TA0R_L = 0x0350; +TA0R_H = 0x0351; +TA0CCR0 = 0x0352; +TA0CCR0_L = 0x0352; +TA0CCR0_H = 0x0353; +TA0CCR1 = 0x0354; +TA0CCR1_L = 0x0354; +TA0CCR1_H = 0x0355; +TA0CCR2 = 0x0356; +TA0CCR2_L = 0x0356; +TA0CCR2_H = 0x0357; +TA0EX0 = 0x0360; +TA0EX0_L = 0x0360; +TA0EX0_H = 0x0361; +TA0IV = 0x036E; +TA0IV_L = 0x036E; +TA0IV_H = 0x036F; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x0380; +TA1CTL_L = 0x0380; +TA1CTL_H = 0x0381; +TA1CCTL0 = 0x0382; +TA1CCTL0_L = 0x0382; +TA1CCTL0_H = 0x0383; +TA1CCTL1 = 0x0384; +TA1CCTL1_L = 0x0384; +TA1CCTL1_H = 0x0385; +TA1CCTL2 = 0x0386; +TA1CCTL2_L = 0x0386; +TA1CCTL2_H = 0x0387; +TA1R = 0x0390; +TA1R_L = 0x0390; +TA1R_H = 0x0391; +TA1CCR0 = 0x0392; +TA1CCR0_L = 0x0392; +TA1CCR0_H = 0x0393; +TA1CCR1 = 0x0394; +TA1CCR1_L = 0x0394; +TA1CCR1_H = 0x0395; +TA1CCR2 = 0x0396; +TA1CCR2_L = 0x0396; +TA1CCR2_H = 0x0397; +TA1EX0 = 0x03A0; +TA1EX0_L = 0x03A0; +TA1EX0_H = 0x03A1; +TA1IV = 0x03AE; +TA1IV_L = 0x03AE; +TA1IV_H = 0x03AF; + + +/***************************************************************************** + TA2 +*****************************************************************************/ +TA2CTL = 0x0400; +TA2CTL_L = 0x0400; +TA2CTL_H = 0x0401; +TA2CCTL0 = 0x0402; +TA2CCTL0_L = 0x0402; +TA2CCTL0_H = 0x0403; +TA2CCTL1 = 0x0404; +TA2CCTL1_L = 0x0404; +TA2CCTL1_H = 0x0405; +TA2R = 0x0410; +TA2R_L = 0x0410; +TA2R_H = 0x0411; +TA2CCR0 = 0x0412; +TA2CCR0_L = 0x0412; +TA2CCR0_H = 0x0413; +TA2CCR1 = 0x0414; +TA2CCR1_L = 0x0414; +TA2CCR1_H = 0x0415; +TA2EX0 = 0x0420; +TA2EX0_L = 0x0420; +TA2EX0_H = 0x0421; +TA2IV = 0x042E; +TA2IV_L = 0x042E; +TA2IV_H = 0x042F; + + +/***************************************************************************** + TA3 +*****************************************************************************/ +TA3CTL = 0x0440; +TA3CTL_L = 0x0440; +TA3CTL_H = 0x0441; +TA3CCTL0 = 0x0442; +TA3CCTL0_L = 0x0442; +TA3CCTL0_H = 0x0443; +TA3CCTL1 = 0x0444; +TA3CCTL1_L = 0x0444; +TA3CCTL1_H = 0x0445; +TA3R = 0x0450; +TA3R_L = 0x0450; +TA3R_H = 0x0451; +TA3CCR0 = 0x0452; +TA3CCR0_L = 0x0452; +TA3CCR0_H = 0x0453; +TA3CCR1 = 0x0454; +TA3CCR1_L = 0x0454; +TA3CCR1_H = 0x0455; +TA3EX0 = 0x0460; +TA3EX0_L = 0x0460; +TA3EX0_H = 0x0461; +TA3IV = 0x046E; +TA3IV_L = 0x046E; +TA3IV_H = 0x046F; + + +/***************************************************************************** + TA4 +*****************************************************************************/ +TA4CTL = 0x07C0; +TA4CTL_L = 0x07C0; +TA4CTL_H = 0x07C1; +TA4CCTL0 = 0x07C2; +TA4CCTL0_L = 0x07C2; +TA4CCTL0_H = 0x07C3; +TA4CCTL1 = 0x07C4; +TA4CCTL1_L = 0x07C4; +TA4CCTL1_H = 0x07C5; +TA4CCTL2 = 0x07C6; +TA4CCTL2_L = 0x07C6; +TA4CCTL2_H = 0x07C7; +TA4R = 0x07D0; +TA4R_L = 0x07D0; +TA4R_H = 0x07D1; +TA4CCR0 = 0x07D2; +TA4CCR0_L = 0x07D2; +TA4CCR0_H = 0x07D3; +TA4CCR1 = 0x07D4; +TA4CCR1_L = 0x07D4; +TA4CCR1_H = 0x07D5; +TA4CCR2 = 0x07D6; +TA4CCR2_L = 0x07D6; +TA4CCR2_H = 0x07D7; +TA4EX0 = 0x07E0; +TA4EX0_L = 0x07E0; +TA4EX0_H = 0x07E1; +TA4IV = 0x07EE; +TA4IV_L = 0x07EE; +TA4IV_H = 0x07EF; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x03C0; +TB0CTL_L = 0x03C0; +TB0CTL_H = 0x03C1; +TB0CCTL0 = 0x03C2; +TB0CCTL0_L = 0x03C2; +TB0CCTL0_H = 0x03C3; +TB0CCTL1 = 0x03C4; +TB0CCTL1_L = 0x03C4; +TB0CCTL1_H = 0x03C5; +TB0CCTL2 = 0x03C6; +TB0CCTL2_L = 0x03C6; +TB0CCTL2_H = 0x03C7; +TB0CCTL3 = 0x03C8; +TB0CCTL3_L = 0x03C8; +TB0CCTL3_H = 0x03C9; +TB0CCTL4 = 0x03CA; +TB0CCTL4_L = 0x03CA; +TB0CCTL4_H = 0x03CB; +TB0CCTL5 = 0x03CC; +TB0CCTL5_L = 0x03CC; +TB0CCTL5_H = 0x03CD; +TB0CCTL6 = 0x03CE; +TB0CCTL6_L = 0x03CE; +TB0CCTL6_H = 0x03CF; +TB0R = 0x03D0; +TB0R_L = 0x03D0; +TB0R_H = 0x03D1; +TB0CCR0 = 0x03D2; +TB0CCR0_L = 0x03D2; +TB0CCR0_H = 0x03D3; +TB0CCR1 = 0x03D4; +TB0CCR1_L = 0x03D4; +TB0CCR1_H = 0x03D5; +TB0CCR2 = 0x03D6; +TB0CCR2_L = 0x03D6; +TB0CCR2_H = 0x03D7; +TB0CCR3 = 0x03D8; +TB0CCR3_L = 0x03D8; +TB0CCR3_H = 0x03D9; +TB0CCR4 = 0x03DA; +TB0CCR4_L = 0x03DA; +TB0CCR4_H = 0x03DB; +TB0CCR5 = 0x03DC; +TB0CCR5_L = 0x03DC; +TB0CCR5_H = 0x03DD; +TB0CCR6 = 0x03DE; +TB0CCR6_L = 0x03DE; +TB0CCR6_H = 0x03DF; +TB0EX0 = 0x03E0; +TB0EX0_L = 0x03E0; +TB0EX0_H = 0x03E1; +TB0IV = 0x03EE; +TB0IV_L = 0x03EE; +TB0IV_H = 0x03EF; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0STATW_L = 0x05CA; +UCA0STATW_H = 0x05CB; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0ABCTL_L = 0x05D0; +UCA0ABCTL_H = 0x05D1; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +UCA0IV_L = 0x05DE; +UCA0IV_H = 0x05DF; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1STATW_L = 0x05EA; +UCA1STATW_H = 0x05EB; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1ABCTL_L = 0x05F0; +UCA1ABCTL_H = 0x05F1; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +UCA1IV_L = 0x05FE; +UCA1IV_H = 0x05FF; + + +/***************************************************************************** + eUSCI_A2 +*****************************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2STATW_L = 0x060A; +UCA2STATW_H = 0x060B; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2ABCTL_L = 0x0610; +UCA2ABCTL_H = 0x0611; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +UCA2IV_L = 0x061E; +UCA2IV_H = 0x061F; + + +/***************************************************************************** + eUSCI_A3 +*****************************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3STATW_L = 0x062A; +UCA3STATW_H = 0x062B; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3ABCTL_L = 0x0630; +UCA3ABCTL_H = 0x0631; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +UCA3IV_L = 0x063E; +UCA3IV_H = 0x063F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +UCB0IV_L = 0x066E; +UCB0IV_H = 0x066F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +UCB1IV_L = 0x06AE; +UCB1IV_H = 0x06AF; + + +/***************************************************************************** + eUSCI_B2 +*****************************************************************************/ +UCB2CTLW0 = 0x06C0; +UCB2CTLW0_L = 0x06C0; +UCB2CTLW0_H = 0x06C1; +UCB2CTLW1 = 0x06C2; +UCB2CTLW1_L = 0x06C2; +UCB2CTLW1_H = 0x06C3; +UCB2BRW = 0x06C6; +UCB2BRW_L = 0x06C6; +UCB2BRW_H = 0x06C7; +UCB2STATW = 0x06C8; +UCB2STATW_L = 0x06C8; +UCB2STATW_H = 0x06C9; +UCB2TBCNT = 0x06CA; +UCB2TBCNT_L = 0x06CA; +UCB2TBCNT_H = 0x06CB; +UCB2RXBUF = 0x06CC; +UCB2RXBUF_L = 0x06CC; +UCB2RXBUF_H = 0x06CD; +UCB2TXBUF = 0x06CE; +UCB2TXBUF_L = 0x06CE; +UCB2TXBUF_H = 0x06CF; +UCB2I2COA0 = 0x06D4; +UCB2I2COA0_L = 0x06D4; +UCB2I2COA0_H = 0x06D5; +UCB2I2COA1 = 0x06D6; +UCB2I2COA1_L = 0x06D6; +UCB2I2COA1_H = 0x06D7; +UCB2I2COA2 = 0x06D8; +UCB2I2COA2_L = 0x06D8; +UCB2I2COA2_H = 0x06D9; +UCB2I2COA3 = 0x06DA; +UCB2I2COA3_L = 0x06DA; +UCB2I2COA3_H = 0x06DB; +UCB2ADDRX = 0x06DC; +UCB2ADDRX_L = 0x06DC; +UCB2ADDRX_H = 0x06DD; +UCB2ADDMASK = 0x06DE; +UCB2ADDMASK_L = 0x06DE; +UCB2ADDMASK_H = 0x06DF; +UCB2I2CSA = 0x06E0; +UCB2I2CSA_L = 0x06E0; +UCB2I2CSA_H = 0x06E1; +UCB2IE = 0x06EA; +UCB2IE_L = 0x06EA; +UCB2IE_H = 0x06EB; +UCB2IFG = 0x06EC; +UCB2IFG_L = 0x06EC; +UCB2IFG_H = 0x06ED; +UCB2IV = 0x06EE; +UCB2IV_L = 0x06EE; +UCB2IV_H = 0x06EF; + + +/***************************************************************************** + eUSCI_B3 +*****************************************************************************/ +UCB3CTLW0 = 0x0700; +UCB3CTLW0_L = 0x0700; +UCB3CTLW0_H = 0x0701; +UCB3CTLW1 = 0x0702; +UCB3CTLW1_L = 0x0702; +UCB3CTLW1_H = 0x0703; +UCB3BRW = 0x0706; +UCB3BRW_L = 0x0706; +UCB3BRW_H = 0x0707; +UCB3STATW = 0x0708; +UCB3STATW_L = 0x0708; +UCB3STATW_H = 0x0709; +UCB3TBCNT = 0x070A; +UCB3TBCNT_L = 0x070A; +UCB3TBCNT_H = 0x070B; +UCB3RXBUF = 0x070C; +UCB3RXBUF_L = 0x070C; +UCB3RXBUF_H = 0x070D; +UCB3TXBUF = 0x070E; +UCB3TXBUF_L = 0x070E; +UCB3TXBUF_H = 0x070F; +UCB3I2COA0 = 0x0714; +UCB3I2COA0_L = 0x0714; +UCB3I2COA0_H = 0x0715; +UCB3I2COA1 = 0x0716; +UCB3I2COA1_L = 0x0716; +UCB3I2COA1_H = 0x0717; +UCB3I2COA2 = 0x0718; +UCB3I2COA2_L = 0x0718; +UCB3I2COA2_H = 0x0719; +UCB3I2COA3 = 0x071A; +UCB3I2COA3_L = 0x071A; +UCB3I2COA3_H = 0x071B; +UCB3ADDRX = 0x071C; +UCB3ADDRX_L = 0x071C; +UCB3ADDRX_H = 0x071D; +UCB3ADDMASK = 0x071E; +UCB3ADDMASK_L = 0x071E; +UCB3ADDMASK_H = 0x071F; +UCB3I2CSA = 0x0720; +UCB3I2CSA_L = 0x0720; +UCB3I2CSA_H = 0x0721; +UCB3IE = 0x072A; +UCB3IE_L = 0x072A; +UCB3IE_H = 0x072B; +UCB3IFG = 0x072C; +UCB3IFG_L = 0x072C; +UCB3IFG_H = 0x072D; +UCB3IV = 0x072E; +UCB3IV_L = 0x072E; +UCB3IV_H = 0x072F; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr5994.cmd b/msp430/msp430fr5994.cmd new file mode 100644 index 00000000..c3ece149 --- /dev/null +++ b/msp430/msp430fr5994.cmd @@ -0,0 +1,1884 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr5994.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC12_B +*****************************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; + + +/***************************************************************************** + AES256 +*****************************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; + + +/***************************************************************************** + CAPTIO0 +*****************************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; + + +/***************************************************************************** + CAPTIO1 +*****************************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; + + +/***************************************************************************** + COMP_E +*****************************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; + + +/***************************************************************************** + CRC32 +*****************************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +P7IV = 0x026E; +P7IV_L = 0x026E; +P7IV_H = 0x026F; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +PDIES = 0x0278; +PDIES_L = 0x0278; +PDIES_H = 0x0279; +PDIE = 0x027A; +PDIE_L = 0x027A; +PDIE_H = 0x027B; +PDIFG = 0x027C; +PDIFG_L = 0x027C; +PDIFG_H = 0x027D; +P8IV = 0x027E; +P8IV_L = 0x027E; +P8IV_H = 0x027F; +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +P9IV = 0x028E; +P9IV_L = 0x028E; +P9IV_H = 0x028F; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +PEIES = 0x0298; +PEIES_L = 0x0298; +PEIES_H = 0x0299; +PEIE = 0x029A; +PEIE_L = 0x029A; +PEIE_H = 0x029B; +PEIFG = 0x029C; +PEIFG_L = 0x029C; +PEIFG_H = 0x029D; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + +P7IN = 0x0260; + +P8IN = 0x0261; + +P7OUT = 0x0262; + +P8OUT = 0x0263; + +P7DIR = 0x0264; + +P8DIR = 0x0265; + +P7REN = 0x0266; + +P8REN = 0x0267; + +P7SEL0 = 0x026A; + +P8SEL0 = 0x026B; + +P7SEL1 = 0x026C; + +P8SEL1 = 0x026D; + +P7SELC = 0x0276; + +P8SELC = 0x0277; + +P7IES = 0x0278; + +P8IES = 0x0279; + +P7IE = 0x027A; + +P8IE = 0x027B; + +P7IFG = 0x027C; + +P8IFG = 0x027D; + +P9IN = 0x0280; + +P9OUT = 0x0282; + +P9DIR = 0x0284; + +P9REN = 0x0286; + +P9SEL0 = 0x028A; + +P9SEL1 = 0x028C; + +P9SELC = 0x0296; + +P9IES = 0x0298; + +P9IE = 0x029A; + +P9IFG = 0x029C; + + + +/***************************************************************************** + DMA +*****************************************************************************/ +DMACTL0 = 0x0500; +DMACTL0_L = 0x0500; +DMACTL0_H = 0x0501; +DMACTL1 = 0x0502; +DMACTL1_L = 0x0502; +DMACTL1_H = 0x0503; +DMACTL2 = 0x0504; +DMACTL2_L = 0x0504; +DMACTL2_H = 0x0505; +DMACTL4 = 0x0508; +DMACTL4_L = 0x0508; +DMACTL4_H = 0x0509; +DMAIV = 0x050E; +DMAIV_L = 0x050E; +DMAIV_H = 0x050F; +DMA0CTL = 0x0510; +DMA0CTL_L = 0x0510; +DMA0CTL_H = 0x0511; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA0SZ_L = 0x051A; +DMA0SZ_H = 0x051B; +DMA1CTL = 0x0520; +DMA1CTL_L = 0x0520; +DMA1CTL_H = 0x0521; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA1SZ_L = 0x052A; +DMA1SZ_H = 0x052B; +DMA2CTL = 0x0530; +DMA2CTL_L = 0x0530; +DMA2CTL_H = 0x0531; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA2SZ_L = 0x053A; +DMA2SZ_H = 0x053B; +DMA3CTL = 0x0540; +DMA3CTL_L = 0x0540; +DMA3CTL_H = 0x0541; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA3SZ_L = 0x054A; +DMA3SZ_H = 0x054B; +DMA4CTL = 0x0550; +DMA4CTL_L = 0x0550; +DMA4CTL_H = 0x0551; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA4SZ_L = 0x055A; +DMA4SZ_H = 0x055B; +DMA5CTL = 0x0560; +DMA5CTL_L = 0x0560; +DMA5CTL_H = 0x0561; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +DMA5SZ_L = 0x056A; +DMA5SZ_H = 0x056B; + + +/***************************************************************************** + FRCTL_A +*****************************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; + + +/***************************************************************************** + LEA +*****************************************************************************/ +LEACAP = 0x0A80; +LEACAPL = 0x0A80; +LEACAPH = 0x0A82; + +LEACNF0 = 0x0A84; +LEACNF0L = 0x0A84; +LEACNF0H = 0x0A86; + +LEACNF1 = 0x0A88; +LEACNF1L = 0x0A88; +LEACNF1H = 0x0A8A; + +LEACNF2 = 0x0A8C; +LEACNF2L = 0x0A8C; +LEACNF2H = 0x0A8E; + +LEAMB = 0x0A90; +LEAMBL = 0x0A90; +LEAMBH = 0x0A92; + +LEAMT = 0x0A94; +LEAMTL = 0x0A94; +LEAMTH = 0x0A96; + +LEACMA = 0x0A98; +LEACMAL = 0x0A98; +LEACMAH = 0x0A9A; + +LEACMCTL = 0x0A9C; +LEACMCTLL = 0x0A9C; +LEACMCTLH = 0x0A9E; + +LEACMDSTAT = 0x0AA8; +LEACMDSTATL = 0x0AA8; +LEACMDSTATH = 0x0AAA; + +LEAS1STAT = 0x0AAC; +LEAS1STATL = 0x0AAC; +LEAS1STATH = 0x0AAE; + +LEAS0STAT = 0x0AB0; +LEAS0STATL = 0x0AB0; +LEAS0STATH = 0x0AB2; + +LEADSTSTAT = 0x0AB4; +LEADSTSTATL = 0x0AB4; +LEADSTSTATH = 0x0AB6; + +LEAPMCTL = 0x0AC0; +LEAPMCTLL = 0x0AC0; +LEAPMCTLH = 0x0AC2; + +LEAPMDST = 0x0AC4; +LEAPMDSTL = 0x0AC4; +LEAPMDSTH = 0x0AC6; + +LEAPMS1 = 0x0AC8; +LEAPMS1L = 0x0AC8; +LEAPMS1H = 0x0ACA; + +LEAPMS0 = 0x0ACC; +LEAPMS0L = 0x0ACC; +LEAPMS0H = 0x0ACE; + +LEAPMCB = 0x0AD0; +LEAPMCBL = 0x0AD0; +LEAPMCBH = 0x0AD2; + +LEAIFGSET = 0x0AF0; +LEAIFGSETL = 0x0AF0; +LEAIFGSETH = 0x0AF2; + +LEAIE = 0x0AF4; +LEAIEL = 0x0AF4; +LEAIEH = 0x0AF6; + +LEAIFG = 0x0AF8; +LEAIFGL = 0x0AF8; +LEAIFGH = 0x0AFA; + +LEAIV = 0x0AFC; +LEAIVL = 0x0AFC; +LEAIVH = 0x0AFE; + + + +/***************************************************************************** + MPU +*****************************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RAMCTL +*****************************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; + + +/***************************************************************************** + REF_A +*****************************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; + + +/***************************************************************************** + RTC_C +*****************************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCIV_L = 0x04AE; +RTCIV_H = 0x04AF; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCCNT12 = 0x04B0; +RTCCNT12_L = 0x04B0; +RTCCNT12_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCCNT34 = 0x04B2; +RTCCNT34_L = 0x04B2; +RTCCNT34_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BIN2BCD_L = 0x04BC; +BIN2BCD_H = 0x04BD; +BCD2BIN = 0x04BE; +BCD2BIN_L = 0x04BE; +BCD2BIN_H = 0x04BF; +RT0PS = 0x04AC; + +RT1PS = 0x04AD; + +RTCCNT1 = 0x04B0; + +RTCCNT2 = 0x04B1; + +RTCCNT3 = 0x04B2; + +RTCCNT4 = 0x04B3; + + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0340; +TA0CTL_L = 0x0340; +TA0CTL_H = 0x0341; +TA0CCTL0 = 0x0342; +TA0CCTL0_L = 0x0342; +TA0CCTL0_H = 0x0343; +TA0CCTL1 = 0x0344; +TA0CCTL1_L = 0x0344; +TA0CCTL1_H = 0x0345; +TA0CCTL2 = 0x0346; +TA0CCTL2_L = 0x0346; +TA0CCTL2_H = 0x0347; +TA0R = 0x0350; +TA0R_L = 0x0350; +TA0R_H = 0x0351; +TA0CCR0 = 0x0352; +TA0CCR0_L = 0x0352; +TA0CCR0_H = 0x0353; +TA0CCR1 = 0x0354; +TA0CCR1_L = 0x0354; +TA0CCR1_H = 0x0355; +TA0CCR2 = 0x0356; +TA0CCR2_L = 0x0356; +TA0CCR2_H = 0x0357; +TA0EX0 = 0x0360; +TA0EX0_L = 0x0360; +TA0EX0_H = 0x0361; +TA0IV = 0x036E; +TA0IV_L = 0x036E; +TA0IV_H = 0x036F; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x0380; +TA1CTL_L = 0x0380; +TA1CTL_H = 0x0381; +TA1CCTL0 = 0x0382; +TA1CCTL0_L = 0x0382; +TA1CCTL0_H = 0x0383; +TA1CCTL1 = 0x0384; +TA1CCTL1_L = 0x0384; +TA1CCTL1_H = 0x0385; +TA1CCTL2 = 0x0386; +TA1CCTL2_L = 0x0386; +TA1CCTL2_H = 0x0387; +TA1R = 0x0390; +TA1R_L = 0x0390; +TA1R_H = 0x0391; +TA1CCR0 = 0x0392; +TA1CCR0_L = 0x0392; +TA1CCR0_H = 0x0393; +TA1CCR1 = 0x0394; +TA1CCR1_L = 0x0394; +TA1CCR1_H = 0x0395; +TA1CCR2 = 0x0396; +TA1CCR2_L = 0x0396; +TA1CCR2_H = 0x0397; +TA1EX0 = 0x03A0; +TA1EX0_L = 0x03A0; +TA1EX0_H = 0x03A1; +TA1IV = 0x03AE; +TA1IV_L = 0x03AE; +TA1IV_H = 0x03AF; + + +/***************************************************************************** + TA2 +*****************************************************************************/ +TA2CTL = 0x0400; +TA2CTL_L = 0x0400; +TA2CTL_H = 0x0401; +TA2CCTL0 = 0x0402; +TA2CCTL0_L = 0x0402; +TA2CCTL0_H = 0x0403; +TA2CCTL1 = 0x0404; +TA2CCTL1_L = 0x0404; +TA2CCTL1_H = 0x0405; +TA2R = 0x0410; +TA2R_L = 0x0410; +TA2R_H = 0x0411; +TA2CCR0 = 0x0412; +TA2CCR0_L = 0x0412; +TA2CCR0_H = 0x0413; +TA2CCR1 = 0x0414; +TA2CCR1_L = 0x0414; +TA2CCR1_H = 0x0415; +TA2EX0 = 0x0420; +TA2EX0_L = 0x0420; +TA2EX0_H = 0x0421; +TA2IV = 0x042E; +TA2IV_L = 0x042E; +TA2IV_H = 0x042F; + + +/***************************************************************************** + TA3 +*****************************************************************************/ +TA3CTL = 0x0440; +TA3CTL_L = 0x0440; +TA3CTL_H = 0x0441; +TA3CCTL0 = 0x0442; +TA3CCTL0_L = 0x0442; +TA3CCTL0_H = 0x0443; +TA3CCTL1 = 0x0444; +TA3CCTL1_L = 0x0444; +TA3CCTL1_H = 0x0445; +TA3R = 0x0450; +TA3R_L = 0x0450; +TA3R_H = 0x0451; +TA3CCR0 = 0x0452; +TA3CCR0_L = 0x0452; +TA3CCR0_H = 0x0453; +TA3CCR1 = 0x0454; +TA3CCR1_L = 0x0454; +TA3CCR1_H = 0x0455; +TA3EX0 = 0x0460; +TA3EX0_L = 0x0460; +TA3EX0_H = 0x0461; +TA3IV = 0x046E; +TA3IV_L = 0x046E; +TA3IV_H = 0x046F; + + +/***************************************************************************** + TA4 +*****************************************************************************/ +TA4CTL = 0x07C0; +TA4CTL_L = 0x07C0; +TA4CTL_H = 0x07C1; +TA4CCTL0 = 0x07C2; +TA4CCTL0_L = 0x07C2; +TA4CCTL0_H = 0x07C3; +TA4CCTL1 = 0x07C4; +TA4CCTL1_L = 0x07C4; +TA4CCTL1_H = 0x07C5; +TA4CCTL2 = 0x07C6; +TA4CCTL2_L = 0x07C6; +TA4CCTL2_H = 0x07C7; +TA4R = 0x07D0; +TA4R_L = 0x07D0; +TA4R_H = 0x07D1; +TA4CCR0 = 0x07D2; +TA4CCR0_L = 0x07D2; +TA4CCR0_H = 0x07D3; +TA4CCR1 = 0x07D4; +TA4CCR1_L = 0x07D4; +TA4CCR1_H = 0x07D5; +TA4CCR2 = 0x07D6; +TA4CCR2_L = 0x07D6; +TA4CCR2_H = 0x07D7; +TA4EX0 = 0x07E0; +TA4EX0_L = 0x07E0; +TA4EX0_H = 0x07E1; +TA4IV = 0x07EE; +TA4IV_L = 0x07EE; +TA4IV_H = 0x07EF; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x03C0; +TB0CTL_L = 0x03C0; +TB0CTL_H = 0x03C1; +TB0CCTL0 = 0x03C2; +TB0CCTL0_L = 0x03C2; +TB0CCTL0_H = 0x03C3; +TB0CCTL1 = 0x03C4; +TB0CCTL1_L = 0x03C4; +TB0CCTL1_H = 0x03C5; +TB0CCTL2 = 0x03C6; +TB0CCTL2_L = 0x03C6; +TB0CCTL2_H = 0x03C7; +TB0CCTL3 = 0x03C8; +TB0CCTL3_L = 0x03C8; +TB0CCTL3_H = 0x03C9; +TB0CCTL4 = 0x03CA; +TB0CCTL4_L = 0x03CA; +TB0CCTL4_H = 0x03CB; +TB0CCTL5 = 0x03CC; +TB0CCTL5_L = 0x03CC; +TB0CCTL5_H = 0x03CD; +TB0CCTL6 = 0x03CE; +TB0CCTL6_L = 0x03CE; +TB0CCTL6_H = 0x03CF; +TB0R = 0x03D0; +TB0R_L = 0x03D0; +TB0R_H = 0x03D1; +TB0CCR0 = 0x03D2; +TB0CCR0_L = 0x03D2; +TB0CCR0_H = 0x03D3; +TB0CCR1 = 0x03D4; +TB0CCR1_L = 0x03D4; +TB0CCR1_H = 0x03D5; +TB0CCR2 = 0x03D6; +TB0CCR2_L = 0x03D6; +TB0CCR2_H = 0x03D7; +TB0CCR3 = 0x03D8; +TB0CCR3_L = 0x03D8; +TB0CCR3_H = 0x03D9; +TB0CCR4 = 0x03DA; +TB0CCR4_L = 0x03DA; +TB0CCR4_H = 0x03DB; +TB0CCR5 = 0x03DC; +TB0CCR5_L = 0x03DC; +TB0CCR5_H = 0x03DD; +TB0CCR6 = 0x03DE; +TB0CCR6_L = 0x03DE; +TB0CCR6_H = 0x03DF; +TB0EX0 = 0x03E0; +TB0EX0_L = 0x03E0; +TB0EX0_H = 0x03E1; +TB0IV = 0x03EE; +TB0IV_L = 0x03EE; +TB0IV_H = 0x03EF; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0STATW_L = 0x05CA; +UCA0STATW_H = 0x05CB; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0ABCTL_L = 0x05D0; +UCA0ABCTL_H = 0x05D1; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +UCA0IV_L = 0x05DE; +UCA0IV_H = 0x05DF; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1STATW_L = 0x05EA; +UCA1STATW_H = 0x05EB; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1ABCTL_L = 0x05F0; +UCA1ABCTL_H = 0x05F1; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +UCA1IV_L = 0x05FE; +UCA1IV_H = 0x05FF; + + +/***************************************************************************** + eUSCI_A2 +*****************************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2STATW_L = 0x060A; +UCA2STATW_H = 0x060B; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2ABCTL_L = 0x0610; +UCA2ABCTL_H = 0x0611; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +UCA2IV_L = 0x061E; +UCA2IV_H = 0x061F; + + +/***************************************************************************** + eUSCI_A3 +*****************************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3STATW_L = 0x062A; +UCA3STATW_H = 0x062B; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3ABCTL_L = 0x0630; +UCA3ABCTL_H = 0x0631; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +UCA3IV_L = 0x063E; +UCA3IV_H = 0x063F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +UCB0IV_L = 0x066E; +UCB0IV_H = 0x066F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +UCB1IV_L = 0x06AE; +UCB1IV_H = 0x06AF; + + +/***************************************************************************** + eUSCI_B2 +*****************************************************************************/ +UCB2CTLW0 = 0x06C0; +UCB2CTLW0_L = 0x06C0; +UCB2CTLW0_H = 0x06C1; +UCB2CTLW1 = 0x06C2; +UCB2CTLW1_L = 0x06C2; +UCB2CTLW1_H = 0x06C3; +UCB2BRW = 0x06C6; +UCB2BRW_L = 0x06C6; +UCB2BRW_H = 0x06C7; +UCB2STATW = 0x06C8; +UCB2STATW_L = 0x06C8; +UCB2STATW_H = 0x06C9; +UCB2TBCNT = 0x06CA; +UCB2TBCNT_L = 0x06CA; +UCB2TBCNT_H = 0x06CB; +UCB2RXBUF = 0x06CC; +UCB2RXBUF_L = 0x06CC; +UCB2RXBUF_H = 0x06CD; +UCB2TXBUF = 0x06CE; +UCB2TXBUF_L = 0x06CE; +UCB2TXBUF_H = 0x06CF; +UCB2I2COA0 = 0x06D4; +UCB2I2COA0_L = 0x06D4; +UCB2I2COA0_H = 0x06D5; +UCB2I2COA1 = 0x06D6; +UCB2I2COA1_L = 0x06D6; +UCB2I2COA1_H = 0x06D7; +UCB2I2COA2 = 0x06D8; +UCB2I2COA2_L = 0x06D8; +UCB2I2COA2_H = 0x06D9; +UCB2I2COA3 = 0x06DA; +UCB2I2COA3_L = 0x06DA; +UCB2I2COA3_H = 0x06DB; +UCB2ADDRX = 0x06DC; +UCB2ADDRX_L = 0x06DC; +UCB2ADDRX_H = 0x06DD; +UCB2ADDMASK = 0x06DE; +UCB2ADDMASK_L = 0x06DE; +UCB2ADDMASK_H = 0x06DF; +UCB2I2CSA = 0x06E0; +UCB2I2CSA_L = 0x06E0; +UCB2I2CSA_H = 0x06E1; +UCB2IE = 0x06EA; +UCB2IE_L = 0x06EA; +UCB2IE_H = 0x06EB; +UCB2IFG = 0x06EC; +UCB2IFG_L = 0x06EC; +UCB2IFG_H = 0x06ED; +UCB2IV = 0x06EE; +UCB2IV_L = 0x06EE; +UCB2IV_H = 0x06EF; + + +/***************************************************************************** + eUSCI_B3 +*****************************************************************************/ +UCB3CTLW0 = 0x0700; +UCB3CTLW0_L = 0x0700; +UCB3CTLW0_H = 0x0701; +UCB3CTLW1 = 0x0702; +UCB3CTLW1_L = 0x0702; +UCB3CTLW1_H = 0x0703; +UCB3BRW = 0x0706; +UCB3BRW_L = 0x0706; +UCB3BRW_H = 0x0707; +UCB3STATW = 0x0708; +UCB3STATW_L = 0x0708; +UCB3STATW_H = 0x0709; +UCB3TBCNT = 0x070A; +UCB3TBCNT_L = 0x070A; +UCB3TBCNT_H = 0x070B; +UCB3RXBUF = 0x070C; +UCB3RXBUF_L = 0x070C; +UCB3RXBUF_H = 0x070D; +UCB3TXBUF = 0x070E; +UCB3TXBUF_L = 0x070E; +UCB3TXBUF_H = 0x070F; +UCB3I2COA0 = 0x0714; +UCB3I2COA0_L = 0x0714; +UCB3I2COA0_H = 0x0715; +UCB3I2COA1 = 0x0716; +UCB3I2COA1_L = 0x0716; +UCB3I2COA1_H = 0x0717; +UCB3I2COA2 = 0x0718; +UCB3I2COA2_L = 0x0718; +UCB3I2COA2_H = 0x0719; +UCB3I2COA3 = 0x071A; +UCB3I2COA3_L = 0x071A; +UCB3I2COA3_H = 0x071B; +UCB3ADDRX = 0x071C; +UCB3ADDRX_L = 0x071C; +UCB3ADDRX_H = 0x071D; +UCB3ADDMASK = 0x071E; +UCB3ADDMASK_L = 0x071E; +UCB3ADDMASK_H = 0x071F; +UCB3I2CSA = 0x0720; +UCB3I2CSA_L = 0x0720; +UCB3I2CSA_H = 0x0721; +UCB3IE = 0x072A; +UCB3IE_L = 0x072A; +UCB3IE_H = 0x072B; +UCB3IFG = 0x072C; +UCB3IFG_L = 0x072C; +UCB3IFG_H = 0x072D; +UCB3IV = 0x072E; +UCB3IV_L = 0x072E; +UCB3IV_H = 0x072F; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr59941.cmd b/msp430/msp430fr59941.cmd new file mode 100644 index 00000000..9e0663ae --- /dev/null +++ b/msp430/msp430fr59941.cmd @@ -0,0 +1,1884 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr59941.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC12_B +*****************************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; + + +/***************************************************************************** + AES256 +*****************************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; + + +/***************************************************************************** + CAPTIO0 +*****************************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; + + +/***************************************************************************** + CAPTIO1 +*****************************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; + + +/***************************************************************************** + COMP_E +*****************************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; + + +/***************************************************************************** + CRC32 +*****************************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +P7IV = 0x026E; +P7IV_L = 0x026E; +P7IV_H = 0x026F; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +PDIES = 0x0278; +PDIES_L = 0x0278; +PDIES_H = 0x0279; +PDIE = 0x027A; +PDIE_L = 0x027A; +PDIE_H = 0x027B; +PDIFG = 0x027C; +PDIFG_L = 0x027C; +PDIFG_H = 0x027D; +P8IV = 0x027E; +P8IV_L = 0x027E; +P8IV_H = 0x027F; +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +P9IV = 0x028E; +P9IV_L = 0x028E; +P9IV_H = 0x028F; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +PEIES = 0x0298; +PEIES_L = 0x0298; +PEIES_H = 0x0299; +PEIE = 0x029A; +PEIE_L = 0x029A; +PEIE_H = 0x029B; +PEIFG = 0x029C; +PEIFG_L = 0x029C; +PEIFG_H = 0x029D; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + +P7IN = 0x0260; + +P8IN = 0x0261; + +P7OUT = 0x0262; + +P8OUT = 0x0263; + +P7DIR = 0x0264; + +P8DIR = 0x0265; + +P7REN = 0x0266; + +P8REN = 0x0267; + +P7SEL0 = 0x026A; + +P8SEL0 = 0x026B; + +P7SEL1 = 0x026C; + +P8SEL1 = 0x026D; + +P7SELC = 0x0276; + +P8SELC = 0x0277; + +P7IES = 0x0278; + +P8IES = 0x0279; + +P7IE = 0x027A; + +P8IE = 0x027B; + +P7IFG = 0x027C; + +P8IFG = 0x027D; + +P9IN = 0x0280; + +P9OUT = 0x0282; + +P9DIR = 0x0284; + +P9REN = 0x0286; + +P9SEL0 = 0x028A; + +P9SEL1 = 0x028C; + +P9SELC = 0x0296; + +P9IES = 0x0298; + +P9IE = 0x029A; + +P9IFG = 0x029C; + + + +/***************************************************************************** + DMA +*****************************************************************************/ +DMACTL0 = 0x0500; +DMACTL0_L = 0x0500; +DMACTL0_H = 0x0501; +DMACTL1 = 0x0502; +DMACTL1_L = 0x0502; +DMACTL1_H = 0x0503; +DMACTL2 = 0x0504; +DMACTL2_L = 0x0504; +DMACTL2_H = 0x0505; +DMACTL4 = 0x0508; +DMACTL4_L = 0x0508; +DMACTL4_H = 0x0509; +DMAIV = 0x050E; +DMAIV_L = 0x050E; +DMAIV_H = 0x050F; +DMA0CTL = 0x0510; +DMA0CTL_L = 0x0510; +DMA0CTL_H = 0x0511; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA0SZ_L = 0x051A; +DMA0SZ_H = 0x051B; +DMA1CTL = 0x0520; +DMA1CTL_L = 0x0520; +DMA1CTL_H = 0x0521; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA1SZ_L = 0x052A; +DMA1SZ_H = 0x052B; +DMA2CTL = 0x0530; +DMA2CTL_L = 0x0530; +DMA2CTL_H = 0x0531; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA2SZ_L = 0x053A; +DMA2SZ_H = 0x053B; +DMA3CTL = 0x0540; +DMA3CTL_L = 0x0540; +DMA3CTL_H = 0x0541; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA3SZ_L = 0x054A; +DMA3SZ_H = 0x054B; +DMA4CTL = 0x0550; +DMA4CTL_L = 0x0550; +DMA4CTL_H = 0x0551; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA4SZ_L = 0x055A; +DMA4SZ_H = 0x055B; +DMA5CTL = 0x0560; +DMA5CTL_L = 0x0560; +DMA5CTL_H = 0x0561; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +DMA5SZ_L = 0x056A; +DMA5SZ_H = 0x056B; + + +/***************************************************************************** + FRCTL_A +*****************************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; + + +/***************************************************************************** + LEA +*****************************************************************************/ +LEACAP = 0x0A80; +LEACAPL = 0x0A80; +LEACAPH = 0x0A82; + +LEACNF0 = 0x0A84; +LEACNF0L = 0x0A84; +LEACNF0H = 0x0A86; + +LEACNF1 = 0x0A88; +LEACNF1L = 0x0A88; +LEACNF1H = 0x0A8A; + +LEACNF2 = 0x0A8C; +LEACNF2L = 0x0A8C; +LEACNF2H = 0x0A8E; + +LEAMB = 0x0A90; +LEAMBL = 0x0A90; +LEAMBH = 0x0A92; + +LEAMT = 0x0A94; +LEAMTL = 0x0A94; +LEAMTH = 0x0A96; + +LEACMA = 0x0A98; +LEACMAL = 0x0A98; +LEACMAH = 0x0A9A; + +LEACMCTL = 0x0A9C; +LEACMCTLL = 0x0A9C; +LEACMCTLH = 0x0A9E; + +LEACMDSTAT = 0x0AA8; +LEACMDSTATL = 0x0AA8; +LEACMDSTATH = 0x0AAA; + +LEAS1STAT = 0x0AAC; +LEAS1STATL = 0x0AAC; +LEAS1STATH = 0x0AAE; + +LEAS0STAT = 0x0AB0; +LEAS0STATL = 0x0AB0; +LEAS0STATH = 0x0AB2; + +LEADSTSTAT = 0x0AB4; +LEADSTSTATL = 0x0AB4; +LEADSTSTATH = 0x0AB6; + +LEAPMCTL = 0x0AC0; +LEAPMCTLL = 0x0AC0; +LEAPMCTLH = 0x0AC2; + +LEAPMDST = 0x0AC4; +LEAPMDSTL = 0x0AC4; +LEAPMDSTH = 0x0AC6; + +LEAPMS1 = 0x0AC8; +LEAPMS1L = 0x0AC8; +LEAPMS1H = 0x0ACA; + +LEAPMS0 = 0x0ACC; +LEAPMS0L = 0x0ACC; +LEAPMS0H = 0x0ACE; + +LEAPMCB = 0x0AD0; +LEAPMCBL = 0x0AD0; +LEAPMCBH = 0x0AD2; + +LEAIFGSET = 0x0AF0; +LEAIFGSETL = 0x0AF0; +LEAIFGSETH = 0x0AF2; + +LEAIE = 0x0AF4; +LEAIEL = 0x0AF4; +LEAIEH = 0x0AF6; + +LEAIFG = 0x0AF8; +LEAIFGL = 0x0AF8; +LEAIFGH = 0x0AFA; + +LEAIV = 0x0AFC; +LEAIVL = 0x0AFC; +LEAIVH = 0x0AFE; + + + +/***************************************************************************** + MPU +*****************************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RAMCTL +*****************************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; + + +/***************************************************************************** + REF_A +*****************************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; + + +/***************************************************************************** + RTC_C +*****************************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCIV_L = 0x04AE; +RTCIV_H = 0x04AF; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCCNT12 = 0x04B0; +RTCCNT12_L = 0x04B0; +RTCCNT12_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCCNT34 = 0x04B2; +RTCCNT34_L = 0x04B2; +RTCCNT34_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BIN2BCD_L = 0x04BC; +BIN2BCD_H = 0x04BD; +BCD2BIN = 0x04BE; +BCD2BIN_L = 0x04BE; +BCD2BIN_H = 0x04BF; +RT0PS = 0x04AC; + +RT1PS = 0x04AD; + +RTCCNT1 = 0x04B0; + +RTCCNT2 = 0x04B1; + +RTCCNT3 = 0x04B2; + +RTCCNT4 = 0x04B3; + + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0340; +TA0CTL_L = 0x0340; +TA0CTL_H = 0x0341; +TA0CCTL0 = 0x0342; +TA0CCTL0_L = 0x0342; +TA0CCTL0_H = 0x0343; +TA0CCTL1 = 0x0344; +TA0CCTL1_L = 0x0344; +TA0CCTL1_H = 0x0345; +TA0CCTL2 = 0x0346; +TA0CCTL2_L = 0x0346; +TA0CCTL2_H = 0x0347; +TA0R = 0x0350; +TA0R_L = 0x0350; +TA0R_H = 0x0351; +TA0CCR0 = 0x0352; +TA0CCR0_L = 0x0352; +TA0CCR0_H = 0x0353; +TA0CCR1 = 0x0354; +TA0CCR1_L = 0x0354; +TA0CCR1_H = 0x0355; +TA0CCR2 = 0x0356; +TA0CCR2_L = 0x0356; +TA0CCR2_H = 0x0357; +TA0EX0 = 0x0360; +TA0EX0_L = 0x0360; +TA0EX0_H = 0x0361; +TA0IV = 0x036E; +TA0IV_L = 0x036E; +TA0IV_H = 0x036F; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x0380; +TA1CTL_L = 0x0380; +TA1CTL_H = 0x0381; +TA1CCTL0 = 0x0382; +TA1CCTL0_L = 0x0382; +TA1CCTL0_H = 0x0383; +TA1CCTL1 = 0x0384; +TA1CCTL1_L = 0x0384; +TA1CCTL1_H = 0x0385; +TA1CCTL2 = 0x0386; +TA1CCTL2_L = 0x0386; +TA1CCTL2_H = 0x0387; +TA1R = 0x0390; +TA1R_L = 0x0390; +TA1R_H = 0x0391; +TA1CCR0 = 0x0392; +TA1CCR0_L = 0x0392; +TA1CCR0_H = 0x0393; +TA1CCR1 = 0x0394; +TA1CCR1_L = 0x0394; +TA1CCR1_H = 0x0395; +TA1CCR2 = 0x0396; +TA1CCR2_L = 0x0396; +TA1CCR2_H = 0x0397; +TA1EX0 = 0x03A0; +TA1EX0_L = 0x03A0; +TA1EX0_H = 0x03A1; +TA1IV = 0x03AE; +TA1IV_L = 0x03AE; +TA1IV_H = 0x03AF; + + +/***************************************************************************** + TA2 +*****************************************************************************/ +TA2CTL = 0x0400; +TA2CTL_L = 0x0400; +TA2CTL_H = 0x0401; +TA2CCTL0 = 0x0402; +TA2CCTL0_L = 0x0402; +TA2CCTL0_H = 0x0403; +TA2CCTL1 = 0x0404; +TA2CCTL1_L = 0x0404; +TA2CCTL1_H = 0x0405; +TA2R = 0x0410; +TA2R_L = 0x0410; +TA2R_H = 0x0411; +TA2CCR0 = 0x0412; +TA2CCR0_L = 0x0412; +TA2CCR0_H = 0x0413; +TA2CCR1 = 0x0414; +TA2CCR1_L = 0x0414; +TA2CCR1_H = 0x0415; +TA2EX0 = 0x0420; +TA2EX0_L = 0x0420; +TA2EX0_H = 0x0421; +TA2IV = 0x042E; +TA2IV_L = 0x042E; +TA2IV_H = 0x042F; + + +/***************************************************************************** + TA3 +*****************************************************************************/ +TA3CTL = 0x0440; +TA3CTL_L = 0x0440; +TA3CTL_H = 0x0441; +TA3CCTL0 = 0x0442; +TA3CCTL0_L = 0x0442; +TA3CCTL0_H = 0x0443; +TA3CCTL1 = 0x0444; +TA3CCTL1_L = 0x0444; +TA3CCTL1_H = 0x0445; +TA3R = 0x0450; +TA3R_L = 0x0450; +TA3R_H = 0x0451; +TA3CCR0 = 0x0452; +TA3CCR0_L = 0x0452; +TA3CCR0_H = 0x0453; +TA3CCR1 = 0x0454; +TA3CCR1_L = 0x0454; +TA3CCR1_H = 0x0455; +TA3EX0 = 0x0460; +TA3EX0_L = 0x0460; +TA3EX0_H = 0x0461; +TA3IV = 0x046E; +TA3IV_L = 0x046E; +TA3IV_H = 0x046F; + + +/***************************************************************************** + TA4 +*****************************************************************************/ +TA4CTL = 0x07C0; +TA4CTL_L = 0x07C0; +TA4CTL_H = 0x07C1; +TA4CCTL0 = 0x07C2; +TA4CCTL0_L = 0x07C2; +TA4CCTL0_H = 0x07C3; +TA4CCTL1 = 0x07C4; +TA4CCTL1_L = 0x07C4; +TA4CCTL1_H = 0x07C5; +TA4CCTL2 = 0x07C6; +TA4CCTL2_L = 0x07C6; +TA4CCTL2_H = 0x07C7; +TA4R = 0x07D0; +TA4R_L = 0x07D0; +TA4R_H = 0x07D1; +TA4CCR0 = 0x07D2; +TA4CCR0_L = 0x07D2; +TA4CCR0_H = 0x07D3; +TA4CCR1 = 0x07D4; +TA4CCR1_L = 0x07D4; +TA4CCR1_H = 0x07D5; +TA4CCR2 = 0x07D6; +TA4CCR2_L = 0x07D6; +TA4CCR2_H = 0x07D7; +TA4EX0 = 0x07E0; +TA4EX0_L = 0x07E0; +TA4EX0_H = 0x07E1; +TA4IV = 0x07EE; +TA4IV_L = 0x07EE; +TA4IV_H = 0x07EF; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x03C0; +TB0CTL_L = 0x03C0; +TB0CTL_H = 0x03C1; +TB0CCTL0 = 0x03C2; +TB0CCTL0_L = 0x03C2; +TB0CCTL0_H = 0x03C3; +TB0CCTL1 = 0x03C4; +TB0CCTL1_L = 0x03C4; +TB0CCTL1_H = 0x03C5; +TB0CCTL2 = 0x03C6; +TB0CCTL2_L = 0x03C6; +TB0CCTL2_H = 0x03C7; +TB0CCTL3 = 0x03C8; +TB0CCTL3_L = 0x03C8; +TB0CCTL3_H = 0x03C9; +TB0CCTL4 = 0x03CA; +TB0CCTL4_L = 0x03CA; +TB0CCTL4_H = 0x03CB; +TB0CCTL5 = 0x03CC; +TB0CCTL5_L = 0x03CC; +TB0CCTL5_H = 0x03CD; +TB0CCTL6 = 0x03CE; +TB0CCTL6_L = 0x03CE; +TB0CCTL6_H = 0x03CF; +TB0R = 0x03D0; +TB0R_L = 0x03D0; +TB0R_H = 0x03D1; +TB0CCR0 = 0x03D2; +TB0CCR0_L = 0x03D2; +TB0CCR0_H = 0x03D3; +TB0CCR1 = 0x03D4; +TB0CCR1_L = 0x03D4; +TB0CCR1_H = 0x03D5; +TB0CCR2 = 0x03D6; +TB0CCR2_L = 0x03D6; +TB0CCR2_H = 0x03D7; +TB0CCR3 = 0x03D8; +TB0CCR3_L = 0x03D8; +TB0CCR3_H = 0x03D9; +TB0CCR4 = 0x03DA; +TB0CCR4_L = 0x03DA; +TB0CCR4_H = 0x03DB; +TB0CCR5 = 0x03DC; +TB0CCR5_L = 0x03DC; +TB0CCR5_H = 0x03DD; +TB0CCR6 = 0x03DE; +TB0CCR6_L = 0x03DE; +TB0CCR6_H = 0x03DF; +TB0EX0 = 0x03E0; +TB0EX0_L = 0x03E0; +TB0EX0_H = 0x03E1; +TB0IV = 0x03EE; +TB0IV_L = 0x03EE; +TB0IV_H = 0x03EF; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0STATW_L = 0x05CA; +UCA0STATW_H = 0x05CB; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0ABCTL_L = 0x05D0; +UCA0ABCTL_H = 0x05D1; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +UCA0IV_L = 0x05DE; +UCA0IV_H = 0x05DF; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1STATW_L = 0x05EA; +UCA1STATW_H = 0x05EB; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1ABCTL_L = 0x05F0; +UCA1ABCTL_H = 0x05F1; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +UCA1IV_L = 0x05FE; +UCA1IV_H = 0x05FF; + + +/***************************************************************************** + eUSCI_A2 +*****************************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2STATW_L = 0x060A; +UCA2STATW_H = 0x060B; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2ABCTL_L = 0x0610; +UCA2ABCTL_H = 0x0611; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +UCA2IV_L = 0x061E; +UCA2IV_H = 0x061F; + + +/***************************************************************************** + eUSCI_A3 +*****************************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3STATW_L = 0x062A; +UCA3STATW_H = 0x062B; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3ABCTL_L = 0x0630; +UCA3ABCTL_H = 0x0631; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +UCA3IV_L = 0x063E; +UCA3IV_H = 0x063F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +UCB0IV_L = 0x066E; +UCB0IV_H = 0x066F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +UCB1IV_L = 0x06AE; +UCB1IV_H = 0x06AF; + + +/***************************************************************************** + eUSCI_B2 +*****************************************************************************/ +UCB2CTLW0 = 0x06C0; +UCB2CTLW0_L = 0x06C0; +UCB2CTLW0_H = 0x06C1; +UCB2CTLW1 = 0x06C2; +UCB2CTLW1_L = 0x06C2; +UCB2CTLW1_H = 0x06C3; +UCB2BRW = 0x06C6; +UCB2BRW_L = 0x06C6; +UCB2BRW_H = 0x06C7; +UCB2STATW = 0x06C8; +UCB2STATW_L = 0x06C8; +UCB2STATW_H = 0x06C9; +UCB2TBCNT = 0x06CA; +UCB2TBCNT_L = 0x06CA; +UCB2TBCNT_H = 0x06CB; +UCB2RXBUF = 0x06CC; +UCB2RXBUF_L = 0x06CC; +UCB2RXBUF_H = 0x06CD; +UCB2TXBUF = 0x06CE; +UCB2TXBUF_L = 0x06CE; +UCB2TXBUF_H = 0x06CF; +UCB2I2COA0 = 0x06D4; +UCB2I2COA0_L = 0x06D4; +UCB2I2COA0_H = 0x06D5; +UCB2I2COA1 = 0x06D6; +UCB2I2COA1_L = 0x06D6; +UCB2I2COA1_H = 0x06D7; +UCB2I2COA2 = 0x06D8; +UCB2I2COA2_L = 0x06D8; +UCB2I2COA2_H = 0x06D9; +UCB2I2COA3 = 0x06DA; +UCB2I2COA3_L = 0x06DA; +UCB2I2COA3_H = 0x06DB; +UCB2ADDRX = 0x06DC; +UCB2ADDRX_L = 0x06DC; +UCB2ADDRX_H = 0x06DD; +UCB2ADDMASK = 0x06DE; +UCB2ADDMASK_L = 0x06DE; +UCB2ADDMASK_H = 0x06DF; +UCB2I2CSA = 0x06E0; +UCB2I2CSA_L = 0x06E0; +UCB2I2CSA_H = 0x06E1; +UCB2IE = 0x06EA; +UCB2IE_L = 0x06EA; +UCB2IE_H = 0x06EB; +UCB2IFG = 0x06EC; +UCB2IFG_L = 0x06EC; +UCB2IFG_H = 0x06ED; +UCB2IV = 0x06EE; +UCB2IV_L = 0x06EE; +UCB2IV_H = 0x06EF; + + +/***************************************************************************** + eUSCI_B3 +*****************************************************************************/ +UCB3CTLW0 = 0x0700; +UCB3CTLW0_L = 0x0700; +UCB3CTLW0_H = 0x0701; +UCB3CTLW1 = 0x0702; +UCB3CTLW1_L = 0x0702; +UCB3CTLW1_H = 0x0703; +UCB3BRW = 0x0706; +UCB3BRW_L = 0x0706; +UCB3BRW_H = 0x0707; +UCB3STATW = 0x0708; +UCB3STATW_L = 0x0708; +UCB3STATW_H = 0x0709; +UCB3TBCNT = 0x070A; +UCB3TBCNT_L = 0x070A; +UCB3TBCNT_H = 0x070B; +UCB3RXBUF = 0x070C; +UCB3RXBUF_L = 0x070C; +UCB3RXBUF_H = 0x070D; +UCB3TXBUF = 0x070E; +UCB3TXBUF_L = 0x070E; +UCB3TXBUF_H = 0x070F; +UCB3I2COA0 = 0x0714; +UCB3I2COA0_L = 0x0714; +UCB3I2COA0_H = 0x0715; +UCB3I2COA1 = 0x0716; +UCB3I2COA1_L = 0x0716; +UCB3I2COA1_H = 0x0717; +UCB3I2COA2 = 0x0718; +UCB3I2COA2_L = 0x0718; +UCB3I2COA2_H = 0x0719; +UCB3I2COA3 = 0x071A; +UCB3I2COA3_L = 0x071A; +UCB3I2COA3_H = 0x071B; +UCB3ADDRX = 0x071C; +UCB3ADDRX_L = 0x071C; +UCB3ADDRX_H = 0x071D; +UCB3ADDMASK = 0x071E; +UCB3ADDMASK_L = 0x071E; +UCB3ADDMASK_H = 0x071F; +UCB3I2CSA = 0x0720; +UCB3I2CSA_L = 0x0720; +UCB3I2CSA_H = 0x0721; +UCB3IE = 0x072A; +UCB3IE_L = 0x072A; +UCB3IE_H = 0x072B; +UCB3IFG = 0x072C; +UCB3IFG_L = 0x072C; +UCB3IFG_H = 0x072D; +UCB3IV = 0x072E; +UCB3IV_L = 0x072E; +UCB3IV_H = 0x072F; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr6005.cmd b/msp430/msp430fr6005.cmd new file mode 100644 index 00000000..790a4a39 --- /dev/null +++ b/msp430/msp430fr6005.cmd @@ -0,0 +1,2173 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr6005.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC12_B +*****************************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; + + +/***************************************************************************** + AES256 +*****************************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; + + +/***************************************************************************** + CAPTIO0 +*****************************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; + + +/***************************************************************************** + CAPTIO1 +*****************************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; + + +/***************************************************************************** + COMP_E +*****************************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; + + +/***************************************************************************** + CRC32 +*****************************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +P7IV = 0x026E; +P7IV_L = 0x026E; +P7IV_H = 0x026F; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +PDIES = 0x0278; +PDIES_L = 0x0278; +PDIES_H = 0x0279; +PDIE = 0x027A; +PDIE_L = 0x027A; +PDIE_H = 0x027B; +PDIFG = 0x027C; +PDIFG_L = 0x027C; +PDIFG_H = 0x027D; +P8IV = 0x027E; +P8IV_L = 0x027E; +P8IV_H = 0x027F; +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +P9IV = 0x028E; +P9IV_L = 0x028E; +P9IV_H = 0x028F; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +PEIES = 0x0298; +PEIES_L = 0x0298; +PEIES_H = 0x0299; +PEIE = 0x029A; +PEIE_L = 0x029A; +PEIE_H = 0x029B; +PEIFG = 0x029C; +PEIFG_L = 0x029C; +PEIFG_H = 0x029D; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + +P7IN = 0x0260; + +P8IN = 0x0261; + +P7OUT = 0x0262; + +P8OUT = 0x0263; + +P7DIR = 0x0264; + +P8DIR = 0x0265; + +P7REN = 0x0266; + +P8REN = 0x0267; + +P7SEL0 = 0x026A; + +P8SEL0 = 0x026B; + +P7SEL1 = 0x026C; + +P8SEL1 = 0x026D; + +P7SELC = 0x0276; + +P8SELC = 0x0277; + +P7IES = 0x0278; + +P8IES = 0x0279; + +P7IE = 0x027A; + +P8IE = 0x027B; + +P7IFG = 0x027C; + +P8IFG = 0x027D; + +P9IN = 0x0280; + +P9OUT = 0x0282; + +P9DIR = 0x0284; + +P9REN = 0x0286; + +P9SEL0 = 0x028A; + +P9SEL1 = 0x028C; + +P9SELC = 0x0296; + +P9IES = 0x0298; + +P9IE = 0x029A; + +P9IFG = 0x029C; + + + +/***************************************************************************** + DMA +*****************************************************************************/ +DMACTL0 = 0x0500; +DMACTL0_L = 0x0500; +DMACTL0_H = 0x0501; +DMACTL1 = 0x0502; +DMACTL1_L = 0x0502; +DMACTL1_H = 0x0503; +DMACTL2 = 0x0504; +DMACTL2_L = 0x0504; +DMACTL2_H = 0x0505; +DMACTL4 = 0x0508; +DMACTL4_L = 0x0508; +DMACTL4_H = 0x0509; +DMAIV = 0x050E; +DMAIV_L = 0x050E; +DMAIV_H = 0x050F; +DMA0CTL = 0x0510; +DMA0CTL_L = 0x0510; +DMA0CTL_H = 0x0511; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA0SZ_L = 0x051A; +DMA0SZ_H = 0x051B; +DMA1CTL = 0x0520; +DMA1CTL_L = 0x0520; +DMA1CTL_H = 0x0521; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA1SZ_L = 0x052A; +DMA1SZ_H = 0x052B; +DMA2CTL = 0x0530; +DMA2CTL_L = 0x0530; +DMA2CTL_H = 0x0531; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA2SZ_L = 0x053A; +DMA2SZ_H = 0x053B; +DMA3CTL = 0x0540; +DMA3CTL_L = 0x0540; +DMA3CTL_H = 0x0541; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA3SZ_L = 0x054A; +DMA3SZ_H = 0x054B; +DMA4CTL = 0x0550; +DMA4CTL_L = 0x0550; +DMA4CTL_H = 0x0551; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA4SZ_L = 0x055A; +DMA4SZ_H = 0x055B; +DMA5CTL = 0x0560; +DMA5CTL_L = 0x0560; +DMA5CTL_H = 0x0561; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +DMA5SZ_L = 0x056A; +DMA5SZ_H = 0x056B; + + +/***************************************************************************** + FRCTL_A +*****************************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; + + +/***************************************************************************** + HSPLL +*****************************************************************************/ +HSPLLIIDX = 0x0EE0; +HSPLLIIDX_L = 0x0EE0; +HSPLLIIDX_H = 0x0EE1; +HSPLLMIS = 0x0EE2; +HSPLLMIS_L = 0x0EE2; +HSPLLMIS_H = 0x0EE3; +HSPLLRIS = 0x0EE4; +HSPLLRIS_L = 0x0EE4; +HSPLLRIS_H = 0x0EE5; +HSPLLIMSC = 0x0EE6; +HSPLLIMSC_L = 0x0EE6; +HSPLLIMSC_H = 0x0EE7; +HSPLLICR = 0x0EE8; +HSPLLICR_L = 0x0EE8; +HSPLLICR_H = 0x0EE9; +HSPLLISR = 0x0EEA; +HSPLLISR_L = 0x0EEA; +HSPLLISR_H = 0x0EEB; +HSPLLDESCLO = 0x0EEC; +HSPLLDESCLO_L = 0x0EEC; +HSPLLDESCLO_H = 0x0EED; +HSPLLDESCHI = 0x0EEE; +HSPLLDESCHI_L = 0x0EEE; +HSPLLDESCHI_H = 0x0EEF; +HSPLLCTL = 0x0EF0; +HSPLLCTL_L = 0x0EF0; +HSPLLCTL_H = 0x0EF1; +HSPLLUSSXTLCTL = 0x0EF2; +HSPLLUSSXTLCTL_L = 0x0EF2; +HSPLLUSSXTLCTL_H = 0x0EF3; + + +/***************************************************************************** + LCD_C +*****************************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCPCTL3 = 0x0A10; +LCDCPCTL3_L = 0x0A10; +LCDCPCTL3_H = 0x0A11; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDCIV_L = 0x0A1E; +LCDCIV_H = 0x0A1F; +LCDM1 = 0x0A20; + +LCDM2 = 0x0A21; + +LCDM3 = 0x0A22; + +LCDM4 = 0x0A23; + +LCDM5 = 0x0A24; + +LCDM6 = 0x0A25; + +LCDM7 = 0x0A26; + +LCDM8 = 0x0A27; + +LCDM9 = 0x0A28; + +LCDM10 = 0x0A29; + +LCDM11 = 0x0A2A; + +LCDM12 = 0x0A2B; + +LCDM13 = 0x0A2C; + +LCDM14 = 0x0A2D; + +LCDM15 = 0x0A2E; + +LCDM16 = 0x0A2F; + +LCDM17 = 0x0A30; + +LCDM18 = 0x0A31; + +LCDM19 = 0x0A32; + +LCDM20 = 0x0A33; + +LCDM21 = 0x0A34; + +LCDM22 = 0x0A35; + +LCDM23 = 0x0A36; + +LCDM24 = 0x0A37; + +LCDM25 = 0x0A38; + +LCDM26 = 0x0A39; + +LCDM27 = 0x0A3A; + +LCDM28 = 0x0A3B; + +LCDM29 = 0x0A3C; + +LCDM30 = 0x0A3D; + +LCDM31 = 0x0A3E; + +LCDM32 = 0x0A3F; + +LCDM33_LCDBM1 = 0x0A40; + +LCDM34_LCDBM2 = 0x0A41; + +LCDM35_LCDBM3 = 0x0A42; + +LCDM36_LCDBM4 = 0x0A43; + +LCDM37_LCDBM5 = 0x0A44; + +LCDM38_LCDBM6 = 0x0A45; + +LCDM39_LCDBM7 = 0x0A46; + +LCDM40_LCDBM8 = 0x0A47; + +LCDM41_LCDBM9 = 0x0A48; + +LCDM42_LCDBM10 = 0x0A49; + +LCDM43_LCDBM11 = 0x0A4A; + +LCDM44_LCDBM12 = 0x0A4B; + +LCDM45_LCDBM13 = 0x0A4C; + +LCDM46_LCDBM14 = 0x0A4D; + +LCDM47_LCDBM15 = 0x0A4E; + +LCDM48_LCDBM16 = 0x0A4F; + +LCDM49_LCDBM17 = 0x0A50; + +LCDM50_LCDBM18 = 0x0A51; + +LCDM51_LCDBM19 = 0x0A52; + +LCDM52_LCDBM20 = 0x0A53; + + + +/***************************************************************************** + LEA +*****************************************************************************/ +LEACAP = 0x0A80; +LEACAPL = 0x0A80; +LEACAPH = 0x0A82; + +LEACNF0 = 0x0A84; +LEACNF0L = 0x0A84; +LEACNF0H = 0x0A86; + +LEACNF1 = 0x0A88; +LEACNF1L = 0x0A88; +LEACNF1H = 0x0A8A; + +LEACNF2 = 0x0A8C; +LEACNF2L = 0x0A8C; +LEACNF2H = 0x0A8E; + +LEAMB = 0x0A90; +LEAMBL = 0x0A90; +LEAMBH = 0x0A92; + +LEAMT = 0x0A94; +LEAMTL = 0x0A94; +LEAMTH = 0x0A96; + +LEACMA = 0x0A98; +LEACMAL = 0x0A98; +LEACMAH = 0x0A9A; + +LEACMCTL = 0x0A9C; +LEACMCTLL = 0x0A9C; +LEACMCTLH = 0x0A9E; + +LEACMDSTAT = 0x0AA8; +LEACMDSTATL = 0x0AA8; +LEACMDSTATH = 0x0AAA; + +LEAS1STAT = 0x0AAC; +LEAS1STATL = 0x0AAC; +LEAS1STATH = 0x0AAE; + +LEAS0STAT = 0x0AB0; +LEAS0STATL = 0x0AB0; +LEAS0STATH = 0x0AB2; + +LEADSTSTAT = 0x0AB4; +LEADSTSTATL = 0x0AB4; +LEADSTSTATH = 0x0AB6; + +LEAPMCTL = 0x0AC0; +LEAPMCTLL = 0x0AC0; +LEAPMCTLH = 0x0AC2; + +LEAPMDST = 0x0AC4; +LEAPMDSTL = 0x0AC4; +LEAPMDSTH = 0x0AC6; + +LEAPMS1 = 0x0AC8; +LEAPMS1L = 0x0AC8; +LEAPMS1H = 0x0ACA; + +LEAPMS0 = 0x0ACC; +LEAPMS0L = 0x0ACC; +LEAPMS0H = 0x0ACE; + +LEAPMCB = 0x0AD0; +LEAPMCBL = 0x0AD0; +LEAPMCBH = 0x0AD2; + +LEAIFGSET = 0x0AF0; +LEAIFGSETL = 0x0AF0; +LEAIFGSETH = 0x0AF2; + +LEAIE = 0x0AF4; +LEAIEL = 0x0AF4; +LEAIEH = 0x0AF6; + +LEAIFG = 0x0AF8; +LEAIFGL = 0x0AF8; +LEAIFGH = 0x0AFA; + +LEAIV = 0x0AFC; +LEAIVL = 0x0AFC; +LEAIVH = 0x0AFE; + + + +/***************************************************************************** + MPU +*****************************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RAMCTL +*****************************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +RCCTL1 = 0x015A; +RCCTL1_L = 0x015A; +RCCTL1_H = 0x015B; + + +/***************************************************************************** + REF_A +*****************************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; + + +/***************************************************************************** + RTC_C +*****************************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCIV_L = 0x04AE; +RTCIV_H = 0x04AF; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCCNT12 = 0x04B0; +RTCCNT12_L = 0x04B0; +RTCCNT12_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCCNT34 = 0x04B2; +RTCCNT34_L = 0x04B2; +RTCCNT34_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BIN2BCD_L = 0x04BC; +BIN2BCD_H = 0x04BD; +BCD2BIN = 0x04BE; +BCD2BIN_L = 0x04BE; +BCD2BIN_H = 0x04BF; +RT0PS = 0x04AC; + +RT1PS = 0x04AD; + +RTCCNT1 = 0x04B0; + +RTCCNT2 = 0x04B1; + +RTCCNT3 = 0x04B2; + +RTCCNT4 = 0x04B3; + + + +/***************************************************************************** + SAPH +*****************************************************************************/ +SAPHIIDX = 0x0E00; +SAPHIIDX_L = 0x0E00; +SAPHIIDX_H = 0x0E01; +SAPHMIS = 0x0E02; +SAPHMIS_L = 0x0E02; +SAPHMIS_H = 0x0E03; +SAPHRIS = 0x0E04; +SAPHRIS_L = 0x0E04; +SAPHRIS_H = 0x0E05; +SAPHIMSC = 0x0E06; +SAPHIMSC_L = 0x0E06; +SAPHIMSC_H = 0x0E07; +SAPHICR = 0x0E08; +SAPHICR_L = 0x0E08; +SAPHICR_H = 0x0E09; +SAPHISR = 0x0E0A; +SAPHISR_L = 0x0E0A; +SAPHISR_H = 0x0E0B; +SAPHDESCLO = 0x0E0C; +SAPHDESCLO_L = 0x0E0C; +SAPHDESCLO_H = 0x0E0D; +SAPHDESCHI = 0x0E0E; +SAPHDESCHI_L = 0x0E0E; +SAPHDESCHI_H = 0x0E0F; +SAPHKEY = 0x0E10; +SAPHKEY_L = 0x0E10; +SAPHKEY_H = 0x0E11; +SAPHOCTL0 = 0x0E12; +SAPHOCTL0_L = 0x0E12; +SAPHOCTL0_H = 0x0E13; +SAPHOCTL1 = 0x0E14; +SAPHOCTL1_L = 0x0E14; +SAPHOCTL1_H = 0x0E15; +SAPHOSEL = 0x0E16; +SAPHOSEL_L = 0x0E16; +SAPHOSEL_H = 0x0E17; +SAPHCH0PUT = 0x0E20; +SAPHCH0PUT_L = 0x0E20; +SAPHCH0PUT_H = 0x0E21; +SAPHCH0PDT = 0x0E22; +SAPHCH0PDT_L = 0x0E22; +SAPHCH0PDT_H = 0x0E23; +SAPHCH0TT = 0x0E24; +SAPHCH0TT_L = 0x0E24; +SAPHCH0TT_H = 0x0E25; +SAPHCH1PUT = 0x0E26; +SAPHCH1PUT_L = 0x0E26; +SAPHCH1PUT_H = 0x0E27; +SAPHCH1PDT = 0x0E28; +SAPHCH1PDT_L = 0x0E28; +SAPHCH1PDT_H = 0x0E29; +SAPHCH1TT = 0x0E2A; +SAPHCH1TT_L = 0x0E2A; +SAPHCH1TT_H = 0x0E2B; +SAPHMCNF = 0x0E2C; +SAPHMCNF_L = 0x0E2C; +SAPHMCNF_H = 0x0E2D; +SAPHTACTL = 0x0E2E; +SAPHTACTL_L = 0x0E2E; +SAPHTACTL_H = 0x0E2F; +SAPHICTL0 = 0x0E30; +SAPHICTL0_L = 0x0E30; +SAPHICTL0_H = 0x0E31; +SAPHBCTL = 0x0E34; +SAPHBCTL_L = 0x0E34; +SAPHBCTL_H = 0x0E35; +SAPHPGC = 0x0E40; +SAPHPGC_L = 0x0E40; +SAPHPGC_H = 0x0E41; +SAPHPGLPER = 0x0E42; +SAPHPGLPER_L = 0x0E42; +SAPHPGLPER_H = 0x0E43; +SAPHPGHPER = 0x0E44; +SAPHPGHPER_L = 0x0E44; +SAPHPGHPER_H = 0x0E45; +SAPHPGCTL = 0x0E46; +SAPHPGCTL_L = 0x0E46; +SAPHPGCTL_H = 0x0E47; +SAPHPPGTRIG = 0x0E48; +SAPHPPGTRIG_L = 0x0E48; +SAPHPPGTRIG_H = 0x0E49; +SAPHASCTL0 = 0x0E60; +SAPHASCTL0_L = 0x0E60; +SAPHASCTL0_H = 0x0E61; +SAPHASCTL1 = 0x0E62; +SAPHASCTL1_L = 0x0E62; +SAPHASCTL1_H = 0x0E63; +SAPHASQTRIG = 0x0E64; + +SAPHAPOL = 0x0E66; +SAPHAPOL_L = 0x0E66; +SAPHAPOL_H = 0x0E67; +SAPHAPLEV = 0x0E68; +SAPHAPLEV_L = 0x0E68; +SAPHAPLEV_H = 0x0E69; +SAPHAPHIZ = 0x0E6A; +SAPHAPHIZ_L = 0x0E6A; +SAPHAPHIZ_H = 0x0E6B; +SAPHATM_A = 0x0E6E; +SAPHATM_A_L = 0x0E6E; +SAPHATM_A_H = 0x0E6F; +SAPHATM_B = 0x0E70; +SAPHATM_B_L = 0x0E70; +SAPHATM_B_H = 0x0E71; +SAPHATM_C = 0x0E72; +SAPHATM_C_L = 0x0E72; +SAPHATM_C_H = 0x0E73; +SAPHATM_D = 0x0E74; +SAPHATM_D_L = 0x0E74; +SAPHATM_D_H = 0x0E75; +SAPHATM_E = 0x0E76; +SAPHATM_E_L = 0x0E76; +SAPHATM_E_H = 0x0E77; +SAPHATM_F = 0x0E78; +SAPHATM_F_L = 0x0E78; +SAPHATM_F_H = 0x0E79; +SAPHTBCTL = 0x0E7A; +SAPHTBCTL_L = 0x0E7A; +SAPHTBCTL_H = 0x0E7B; +SAPHATIMLO = 0x0E7C; +SAPHATIMLO_L = 0x0E7C; +SAPHATIMLO_H = 0x0E7D; +SAPHATIMHI = 0x0E7E; +SAPHATIMHI_L = 0x0E7E; +SAPHATIMHI_H = 0x0E7F; + + +/***************************************************************************** + SDHS +*****************************************************************************/ +SDHSIIDX = 0x0E80; +SDHSIIDX_L = 0x0E80; +SDHSIIDX_H = 0x0E81; +SDHSMIS = 0x0E82; +SDHSMIS_L = 0x0E82; +SDHSMIS_H = 0x0E83; +SDHSRIS = 0x0E84; +SDHSRIS_L = 0x0E84; +SDHSRIS_H = 0x0E85; +SDHSIMSC = 0x0E86; +SDHSIMSC_L = 0x0E86; +SDHSIMSC_H = 0x0E87; +SDHSICR = 0x0E88; +SDHSICR_L = 0x0E88; +SDHSICR_H = 0x0E89; +SDHSISR = 0x0E8A; +SDHSISR_L = 0x0E8A; +SDHSISR_H = 0x0E8B; +SDHSDESCLO = 0x0E8C; +SDHSDESCLO_L = 0x0E8C; +SDHSDESCLO_H = 0x0E8D; +SDHSDESCHI = 0x0E8E; +SDHSDESCHI_L = 0x0E8E; +SDHSDESCHI_H = 0x0E8F; +SDHSCTL0 = 0x0E90; +SDHSCTL0_L = 0x0E90; +SDHSCTL0_H = 0x0E91; +SDHSCTL1 = 0x0E92; +SDHSCTL1_L = 0x0E92; +SDHSCTL1_H = 0x0E93; +SDHSCTL2 = 0x0E94; +SDHSCTL2_L = 0x0E94; +SDHSCTL2_H = 0x0E95; +SDHSCTL3 = 0x0E96; +SDHSCTL3_L = 0x0E96; +SDHSCTL3_H = 0x0E97; +SDHSCTL4 = 0x0E98; +SDHSCTL4_L = 0x0E98; +SDHSCTL4_H = 0x0E99; +SDHSCTL5 = 0x0E9A; +SDHSCTL5_L = 0x0E9A; +SDHSCTL5_H = 0x0E9B; +SDHSCTL6 = 0x0E9C; +SDHSCTL6_L = 0x0E9C; +SDHSCTL6_H = 0x0E9D; +SDHSCTL7 = 0x0E9E; +SDHSCTL7_L = 0x0E9E; +SDHSCTL7_H = 0x0E9F; +SDHSDT = 0x0EA2; +SDHSDT_L = 0x0EA2; +SDHSDT_H = 0x0EA3; +SDHSWINHITH = 0x0EA4; +SDHSWINHITH_L = 0x0EA4; +SDHSWINHITH_H = 0x0EA5; +SDHSWINLOTH = 0x0EA6; +SDHSWINLOTH_L = 0x0EA6; +SDHSWINLOTH_H = 0x0EA7; +SDHSDTCDA = 0x0EA8; +SDHSDTCDA_L = 0x0EA8; +SDHSDTCDA_H = 0x0EA9; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0340; +TA0CTL_L = 0x0340; +TA0CTL_H = 0x0341; +TA0CCTL0 = 0x0342; +TA0CCTL0_L = 0x0342; +TA0CCTL0_H = 0x0343; +TA0CCTL1 = 0x0344; +TA0CCTL1_L = 0x0344; +TA0CCTL1_H = 0x0345; +TA0CCTL2 = 0x0346; +TA0CCTL2_L = 0x0346; +TA0CCTL2_H = 0x0347; +TA0R = 0x0350; +TA0R_L = 0x0350; +TA0R_H = 0x0351; +TA0CCR0 = 0x0352; +TA0CCR0_L = 0x0352; +TA0CCR0_H = 0x0353; +TA0CCR1 = 0x0354; +TA0CCR1_L = 0x0354; +TA0CCR1_H = 0x0355; +TA0CCR2 = 0x0356; +TA0CCR2_L = 0x0356; +TA0CCR2_H = 0x0357; +TA0EX0 = 0x0360; +TA0EX0_L = 0x0360; +TA0EX0_H = 0x0361; +TA0IV = 0x036E; +TA0IV_L = 0x036E; +TA0IV_H = 0x036F; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x0380; +TA1CTL_L = 0x0380; +TA1CTL_H = 0x0381; +TA1CCTL0 = 0x0382; +TA1CCTL0_L = 0x0382; +TA1CCTL0_H = 0x0383; +TA1CCTL1 = 0x0384; +TA1CCTL1_L = 0x0384; +TA1CCTL1_H = 0x0385; +TA1CCTL2 = 0x0386; +TA1CCTL2_L = 0x0386; +TA1CCTL2_H = 0x0387; +TA1R = 0x0390; +TA1R_L = 0x0390; +TA1R_H = 0x0391; +TA1CCR0 = 0x0392; +TA1CCR0_L = 0x0392; +TA1CCR0_H = 0x0393; +TA1CCR1 = 0x0394; +TA1CCR1_L = 0x0394; +TA1CCR1_H = 0x0395; +TA1CCR2 = 0x0396; +TA1CCR2_L = 0x0396; +TA1CCR2_H = 0x0397; +TA1EX0 = 0x03A0; +TA1EX0_L = 0x03A0; +TA1EX0_H = 0x03A1; +TA1IV = 0x03AE; +TA1IV_L = 0x03AE; +TA1IV_H = 0x03AF; + + +/***************************************************************************** + TA2 +*****************************************************************************/ +TA2CTL = 0x0400; +TA2CTL_L = 0x0400; +TA2CTL_H = 0x0401; +TA2CCTL0 = 0x0402; +TA2CCTL0_L = 0x0402; +TA2CCTL0_H = 0x0403; +TA2CCTL1 = 0x0404; +TA2CCTL1_L = 0x0404; +TA2CCTL1_H = 0x0405; +TA2R = 0x0410; +TA2R_L = 0x0410; +TA2R_H = 0x0411; +TA2CCR0 = 0x0412; +TA2CCR0_L = 0x0412; +TA2CCR0_H = 0x0413; +TA2CCR1 = 0x0414; +TA2CCR1_L = 0x0414; +TA2CCR1_H = 0x0415; +TA2EX0 = 0x0420; +TA2EX0_L = 0x0420; +TA2EX0_H = 0x0421; +TA2IV = 0x042E; +TA2IV_L = 0x042E; +TA2IV_H = 0x042F; + + +/***************************************************************************** + TA3 +*****************************************************************************/ +TA3CTL = 0x0440; +TA3CTL_L = 0x0440; +TA3CTL_H = 0x0441; +TA3CCTL0 = 0x0442; +TA3CCTL0_L = 0x0442; +TA3CCTL0_H = 0x0443; +TA3CCTL1 = 0x0444; +TA3CCTL1_L = 0x0444; +TA3CCTL1_H = 0x0445; +TA3R = 0x0450; +TA3R_L = 0x0450; +TA3R_H = 0x0451; +TA3CCR0 = 0x0452; +TA3CCR0_L = 0x0452; +TA3CCR0_H = 0x0453; +TA3CCR1 = 0x0454; +TA3CCR1_L = 0x0454; +TA3CCR1_H = 0x0455; +TA3EX0 = 0x0460; +TA3EX0_L = 0x0460; +TA3EX0_H = 0x0461; +TA3IV = 0x046E; +TA3IV_L = 0x046E; +TA3IV_H = 0x046F; + + +/***************************************************************************** + TA4 +*****************************************************************************/ +TA4CTL = 0x07C0; +TA4CTL_L = 0x07C0; +TA4CTL_H = 0x07C1; +TA4CCTL0 = 0x07C2; +TA4CCTL0_L = 0x07C2; +TA4CCTL0_H = 0x07C3; +TA4CCTL1 = 0x07C4; +TA4CCTL1_L = 0x07C4; +TA4CCTL1_H = 0x07C5; +TA4R = 0x07D0; +TA4R_L = 0x07D0; +TA4R_H = 0x07D1; +TA4CCR0 = 0x07D2; +TA4CCR0_L = 0x07D2; +TA4CCR0_H = 0x07D3; +TA4CCR1 = 0x07D4; +TA4CCR1_L = 0x07D4; +TA4CCR1_H = 0x07D5; +TA4EX0 = 0x07E0; +TA4EX0_L = 0x07E0; +TA4EX0_H = 0x07E1; +TA4IV = 0x07EE; +TA4IV_L = 0x07EE; +TA4IV_H = 0x07EF; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x03C0; +TB0CTL_L = 0x03C0; +TB0CTL_H = 0x03C1; +TB0CCTL0 = 0x03C2; +TB0CCTL0_L = 0x03C2; +TB0CCTL0_H = 0x03C3; +TB0CCTL1 = 0x03C4; +TB0CCTL1_L = 0x03C4; +TB0CCTL1_H = 0x03C5; +TB0CCTL2 = 0x03C6; +TB0CCTL2_L = 0x03C6; +TB0CCTL2_H = 0x03C7; +TB0CCTL3 = 0x03C8; +TB0CCTL3_L = 0x03C8; +TB0CCTL3_H = 0x03C9; +TB0CCTL4 = 0x03CA; +TB0CCTL4_L = 0x03CA; +TB0CCTL4_H = 0x03CB; +TB0CCTL5 = 0x03CC; +TB0CCTL5_L = 0x03CC; +TB0CCTL5_H = 0x03CD; +TB0CCTL6 = 0x03CE; +TB0CCTL6_L = 0x03CE; +TB0CCTL6_H = 0x03CF; +TB0R = 0x03D0; +TB0R_L = 0x03D0; +TB0R_H = 0x03D1; +TB0CCR0 = 0x03D2; +TB0CCR0_L = 0x03D2; +TB0CCR0_H = 0x03D3; +TB0CCR1 = 0x03D4; +TB0CCR1_L = 0x03D4; +TB0CCR1_H = 0x03D5; +TB0CCR2 = 0x03D6; +TB0CCR2_L = 0x03D6; +TB0CCR2_H = 0x03D7; +TB0CCR3 = 0x03D8; +TB0CCR3_L = 0x03D8; +TB0CCR3_H = 0x03D9; +TB0CCR4 = 0x03DA; +TB0CCR4_L = 0x03DA; +TB0CCR4_H = 0x03DB; +TB0CCR5 = 0x03DC; +TB0CCR5_L = 0x03DC; +TB0CCR5_H = 0x03DD; +TB0CCR6 = 0x03DE; +TB0CCR6_L = 0x03DE; +TB0CCR6_H = 0x03DF; +TB0EX0 = 0x03E0; +TB0EX0_L = 0x03E0; +TB0EX0_H = 0x03E1; +TB0IV = 0x03EE; +TB0IV_L = 0x03EE; +TB0IV_H = 0x03EF; + + +/***************************************************************************** + UUPS +*****************************************************************************/ +UUPSIIDX = 0x0EC0; +UUPSIIDX_L = 0x0EC0; +UUPSIIDX_H = 0x0EC1; +UUPSMIS = 0x0EC2; +UUPSMIS_L = 0x0EC2; +UUPSMIS_H = 0x0EC3; +UUPSRIS = 0x0EC4; +UUPSRIS_L = 0x0EC4; +UUPSRIS_H = 0x0EC5; +UUPSIMSC = 0x0EC6; +UUPSIMSC_L = 0x0EC6; +UUPSIMSC_H = 0x0EC7; +UUPSICR = 0x0EC8; +UUPSICR_L = 0x0EC8; +UUPSICR_H = 0x0EC9; +UUPSISR = 0x0ECA; +UUPSISR_L = 0x0ECA; +UUPSISR_H = 0x0ECB; +UUPSDESCLO = 0x0ECC; +UUPSDESCLO_L = 0x0ECC; +UUPSDESCLO_H = 0x0ECD; +UUPSDESCHI = 0x0ECE; +UUPSDESCHI_L = 0x0ECE; +UUPSDESCHI_H = 0x0ECF; +UUPSCTL = 0x0ED0; +UUPSCTL_L = 0x0ED0; +UUPSCTL_H = 0x0ED1; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0STATW_L = 0x05CA; +UCA0STATW_H = 0x05CB; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0ABCTL_L = 0x05D0; +UCA0ABCTL_H = 0x05D1; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +UCA0IV_L = 0x05DE; +UCA0IV_H = 0x05DF; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1STATW_L = 0x05EA; +UCA1STATW_H = 0x05EB; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1ABCTL_L = 0x05F0; +UCA1ABCTL_H = 0x05F1; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +UCA1IV_L = 0x05FE; +UCA1IV_H = 0x05FF; + + +/***************************************************************************** + eUSCI_A2 +*****************************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2STATW_L = 0x060A; +UCA2STATW_H = 0x060B; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2ABCTL_L = 0x0610; +UCA2ABCTL_H = 0x0611; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +UCA2IV_L = 0x061E; +UCA2IV_H = 0x061F; + + +/***************************************************************************** + eUSCI_A3 +*****************************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3STATW_L = 0x062A; +UCA3STATW_H = 0x062B; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3ABCTL_L = 0x0630; +UCA3ABCTL_H = 0x0631; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +UCA3IV_L = 0x063E; +UCA3IV_H = 0x063F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +UCB0IV_L = 0x066E; +UCB0IV_H = 0x066F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +UCB1IV_L = 0x06AE; +UCB1IV_H = 0x06AF; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr6007.cmd b/msp430/msp430fr6007.cmd new file mode 100644 index 00000000..37ad44b5 --- /dev/null +++ b/msp430/msp430fr6007.cmd @@ -0,0 +1,2173 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr6007.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC12_B +*****************************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; + + +/***************************************************************************** + AES256 +*****************************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; + + +/***************************************************************************** + CAPTIO0 +*****************************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; + + +/***************************************************************************** + CAPTIO1 +*****************************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; + + +/***************************************************************************** + COMP_E +*****************************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; + + +/***************************************************************************** + CRC32 +*****************************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +P7IV = 0x026E; +P7IV_L = 0x026E; +P7IV_H = 0x026F; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +PDIES = 0x0278; +PDIES_L = 0x0278; +PDIES_H = 0x0279; +PDIE = 0x027A; +PDIE_L = 0x027A; +PDIE_H = 0x027B; +PDIFG = 0x027C; +PDIFG_L = 0x027C; +PDIFG_H = 0x027D; +P8IV = 0x027E; +P8IV_L = 0x027E; +P8IV_H = 0x027F; +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +P9IV = 0x028E; +P9IV_L = 0x028E; +P9IV_H = 0x028F; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +PEIES = 0x0298; +PEIES_L = 0x0298; +PEIES_H = 0x0299; +PEIE = 0x029A; +PEIE_L = 0x029A; +PEIE_H = 0x029B; +PEIFG = 0x029C; +PEIFG_L = 0x029C; +PEIFG_H = 0x029D; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + +P7IN = 0x0260; + +P8IN = 0x0261; + +P7OUT = 0x0262; + +P8OUT = 0x0263; + +P7DIR = 0x0264; + +P8DIR = 0x0265; + +P7REN = 0x0266; + +P8REN = 0x0267; + +P7SEL0 = 0x026A; + +P8SEL0 = 0x026B; + +P7SEL1 = 0x026C; + +P8SEL1 = 0x026D; + +P7SELC = 0x0276; + +P8SELC = 0x0277; + +P7IES = 0x0278; + +P8IES = 0x0279; + +P7IE = 0x027A; + +P8IE = 0x027B; + +P7IFG = 0x027C; + +P8IFG = 0x027D; + +P9IN = 0x0280; + +P9OUT = 0x0282; + +P9DIR = 0x0284; + +P9REN = 0x0286; + +P9SEL0 = 0x028A; + +P9SEL1 = 0x028C; + +P9SELC = 0x0296; + +P9IES = 0x0298; + +P9IE = 0x029A; + +P9IFG = 0x029C; + + + +/***************************************************************************** + DMA +*****************************************************************************/ +DMACTL0 = 0x0500; +DMACTL0_L = 0x0500; +DMACTL0_H = 0x0501; +DMACTL1 = 0x0502; +DMACTL1_L = 0x0502; +DMACTL1_H = 0x0503; +DMACTL2 = 0x0504; +DMACTL2_L = 0x0504; +DMACTL2_H = 0x0505; +DMACTL4 = 0x0508; +DMACTL4_L = 0x0508; +DMACTL4_H = 0x0509; +DMAIV = 0x050E; +DMAIV_L = 0x050E; +DMAIV_H = 0x050F; +DMA0CTL = 0x0510; +DMA0CTL_L = 0x0510; +DMA0CTL_H = 0x0511; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA0SZ_L = 0x051A; +DMA0SZ_H = 0x051B; +DMA1CTL = 0x0520; +DMA1CTL_L = 0x0520; +DMA1CTL_H = 0x0521; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA1SZ_L = 0x052A; +DMA1SZ_H = 0x052B; +DMA2CTL = 0x0530; +DMA2CTL_L = 0x0530; +DMA2CTL_H = 0x0531; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA2SZ_L = 0x053A; +DMA2SZ_H = 0x053B; +DMA3CTL = 0x0540; +DMA3CTL_L = 0x0540; +DMA3CTL_H = 0x0541; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA3SZ_L = 0x054A; +DMA3SZ_H = 0x054B; +DMA4CTL = 0x0550; +DMA4CTL_L = 0x0550; +DMA4CTL_H = 0x0551; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA4SZ_L = 0x055A; +DMA4SZ_H = 0x055B; +DMA5CTL = 0x0560; +DMA5CTL_L = 0x0560; +DMA5CTL_H = 0x0561; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +DMA5SZ_L = 0x056A; +DMA5SZ_H = 0x056B; + + +/***************************************************************************** + FRCTL_A +*****************************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; + + +/***************************************************************************** + HSPLL +*****************************************************************************/ +HSPLLIIDX = 0x0EE0; +HSPLLIIDX_L = 0x0EE0; +HSPLLIIDX_H = 0x0EE1; +HSPLLMIS = 0x0EE2; +HSPLLMIS_L = 0x0EE2; +HSPLLMIS_H = 0x0EE3; +HSPLLRIS = 0x0EE4; +HSPLLRIS_L = 0x0EE4; +HSPLLRIS_H = 0x0EE5; +HSPLLIMSC = 0x0EE6; +HSPLLIMSC_L = 0x0EE6; +HSPLLIMSC_H = 0x0EE7; +HSPLLICR = 0x0EE8; +HSPLLICR_L = 0x0EE8; +HSPLLICR_H = 0x0EE9; +HSPLLISR = 0x0EEA; +HSPLLISR_L = 0x0EEA; +HSPLLISR_H = 0x0EEB; +HSPLLDESCLO = 0x0EEC; +HSPLLDESCLO_L = 0x0EEC; +HSPLLDESCLO_H = 0x0EED; +HSPLLDESCHI = 0x0EEE; +HSPLLDESCHI_L = 0x0EEE; +HSPLLDESCHI_H = 0x0EEF; +HSPLLCTL = 0x0EF0; +HSPLLCTL_L = 0x0EF0; +HSPLLCTL_H = 0x0EF1; +HSPLLUSSXTLCTL = 0x0EF2; +HSPLLUSSXTLCTL_L = 0x0EF2; +HSPLLUSSXTLCTL_H = 0x0EF3; + + +/***************************************************************************** + LCD_C +*****************************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCPCTL3 = 0x0A10; +LCDCPCTL3_L = 0x0A10; +LCDCPCTL3_H = 0x0A11; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDCIV_L = 0x0A1E; +LCDCIV_H = 0x0A1F; +LCDM1 = 0x0A20; + +LCDM2 = 0x0A21; + +LCDM3 = 0x0A22; + +LCDM4 = 0x0A23; + +LCDM5 = 0x0A24; + +LCDM6 = 0x0A25; + +LCDM7 = 0x0A26; + +LCDM8 = 0x0A27; + +LCDM9 = 0x0A28; + +LCDM10 = 0x0A29; + +LCDM11 = 0x0A2A; + +LCDM12 = 0x0A2B; + +LCDM13 = 0x0A2C; + +LCDM14 = 0x0A2D; + +LCDM15 = 0x0A2E; + +LCDM16 = 0x0A2F; + +LCDM17 = 0x0A30; + +LCDM18 = 0x0A31; + +LCDM19 = 0x0A32; + +LCDM20 = 0x0A33; + +LCDM21 = 0x0A34; + +LCDM22 = 0x0A35; + +LCDM23 = 0x0A36; + +LCDM24 = 0x0A37; + +LCDM25 = 0x0A38; + +LCDM26 = 0x0A39; + +LCDM27 = 0x0A3A; + +LCDM28 = 0x0A3B; + +LCDM29 = 0x0A3C; + +LCDM30 = 0x0A3D; + +LCDM31 = 0x0A3E; + +LCDM32 = 0x0A3F; + +LCDM33_LCDBM1 = 0x0A40; + +LCDM34_LCDBM2 = 0x0A41; + +LCDM35_LCDBM3 = 0x0A42; + +LCDM36_LCDBM4 = 0x0A43; + +LCDM37_LCDBM5 = 0x0A44; + +LCDM38_LCDBM6 = 0x0A45; + +LCDM39_LCDBM7 = 0x0A46; + +LCDM40_LCDBM8 = 0x0A47; + +LCDM41_LCDBM9 = 0x0A48; + +LCDM42_LCDBM10 = 0x0A49; + +LCDM43_LCDBM11 = 0x0A4A; + +LCDM44_LCDBM12 = 0x0A4B; + +LCDM45_LCDBM13 = 0x0A4C; + +LCDM46_LCDBM14 = 0x0A4D; + +LCDM47_LCDBM15 = 0x0A4E; + +LCDM48_LCDBM16 = 0x0A4F; + +LCDM49_LCDBM17 = 0x0A50; + +LCDM50_LCDBM18 = 0x0A51; + +LCDM51_LCDBM19 = 0x0A52; + +LCDM52_LCDBM20 = 0x0A53; + + + +/***************************************************************************** + LEA +*****************************************************************************/ +LEACAP = 0x0A80; +LEACAPL = 0x0A80; +LEACAPH = 0x0A82; + +LEACNF0 = 0x0A84; +LEACNF0L = 0x0A84; +LEACNF0H = 0x0A86; + +LEACNF1 = 0x0A88; +LEACNF1L = 0x0A88; +LEACNF1H = 0x0A8A; + +LEACNF2 = 0x0A8C; +LEACNF2L = 0x0A8C; +LEACNF2H = 0x0A8E; + +LEAMB = 0x0A90; +LEAMBL = 0x0A90; +LEAMBH = 0x0A92; + +LEAMT = 0x0A94; +LEAMTL = 0x0A94; +LEAMTH = 0x0A96; + +LEACMA = 0x0A98; +LEACMAL = 0x0A98; +LEACMAH = 0x0A9A; + +LEACMCTL = 0x0A9C; +LEACMCTLL = 0x0A9C; +LEACMCTLH = 0x0A9E; + +LEACMDSTAT = 0x0AA8; +LEACMDSTATL = 0x0AA8; +LEACMDSTATH = 0x0AAA; + +LEAS1STAT = 0x0AAC; +LEAS1STATL = 0x0AAC; +LEAS1STATH = 0x0AAE; + +LEAS0STAT = 0x0AB0; +LEAS0STATL = 0x0AB0; +LEAS0STATH = 0x0AB2; + +LEADSTSTAT = 0x0AB4; +LEADSTSTATL = 0x0AB4; +LEADSTSTATH = 0x0AB6; + +LEAPMCTL = 0x0AC0; +LEAPMCTLL = 0x0AC0; +LEAPMCTLH = 0x0AC2; + +LEAPMDST = 0x0AC4; +LEAPMDSTL = 0x0AC4; +LEAPMDSTH = 0x0AC6; + +LEAPMS1 = 0x0AC8; +LEAPMS1L = 0x0AC8; +LEAPMS1H = 0x0ACA; + +LEAPMS0 = 0x0ACC; +LEAPMS0L = 0x0ACC; +LEAPMS0H = 0x0ACE; + +LEAPMCB = 0x0AD0; +LEAPMCBL = 0x0AD0; +LEAPMCBH = 0x0AD2; + +LEAIFGSET = 0x0AF0; +LEAIFGSETL = 0x0AF0; +LEAIFGSETH = 0x0AF2; + +LEAIE = 0x0AF4; +LEAIEL = 0x0AF4; +LEAIEH = 0x0AF6; + +LEAIFG = 0x0AF8; +LEAIFGL = 0x0AF8; +LEAIFGH = 0x0AFA; + +LEAIV = 0x0AFC; +LEAIVL = 0x0AFC; +LEAIVH = 0x0AFE; + + + +/***************************************************************************** + MPU +*****************************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RAMCTL +*****************************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +RCCTL1 = 0x015A; +RCCTL1_L = 0x015A; +RCCTL1_H = 0x015B; + + +/***************************************************************************** + REF_A +*****************************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; + + +/***************************************************************************** + RTC_C +*****************************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCIV_L = 0x04AE; +RTCIV_H = 0x04AF; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCCNT12 = 0x04B0; +RTCCNT12_L = 0x04B0; +RTCCNT12_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCCNT34 = 0x04B2; +RTCCNT34_L = 0x04B2; +RTCCNT34_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BIN2BCD_L = 0x04BC; +BIN2BCD_H = 0x04BD; +BCD2BIN = 0x04BE; +BCD2BIN_L = 0x04BE; +BCD2BIN_H = 0x04BF; +RT0PS = 0x04AC; + +RT1PS = 0x04AD; + +RTCCNT1 = 0x04B0; + +RTCCNT2 = 0x04B1; + +RTCCNT3 = 0x04B2; + +RTCCNT4 = 0x04B3; + + + +/***************************************************************************** + SAPH +*****************************************************************************/ +SAPHIIDX = 0x0E00; +SAPHIIDX_L = 0x0E00; +SAPHIIDX_H = 0x0E01; +SAPHMIS = 0x0E02; +SAPHMIS_L = 0x0E02; +SAPHMIS_H = 0x0E03; +SAPHRIS = 0x0E04; +SAPHRIS_L = 0x0E04; +SAPHRIS_H = 0x0E05; +SAPHIMSC = 0x0E06; +SAPHIMSC_L = 0x0E06; +SAPHIMSC_H = 0x0E07; +SAPHICR = 0x0E08; +SAPHICR_L = 0x0E08; +SAPHICR_H = 0x0E09; +SAPHISR = 0x0E0A; +SAPHISR_L = 0x0E0A; +SAPHISR_H = 0x0E0B; +SAPHDESCLO = 0x0E0C; +SAPHDESCLO_L = 0x0E0C; +SAPHDESCLO_H = 0x0E0D; +SAPHDESCHI = 0x0E0E; +SAPHDESCHI_L = 0x0E0E; +SAPHDESCHI_H = 0x0E0F; +SAPHKEY = 0x0E10; +SAPHKEY_L = 0x0E10; +SAPHKEY_H = 0x0E11; +SAPHOCTL0 = 0x0E12; +SAPHOCTL0_L = 0x0E12; +SAPHOCTL0_H = 0x0E13; +SAPHOCTL1 = 0x0E14; +SAPHOCTL1_L = 0x0E14; +SAPHOCTL1_H = 0x0E15; +SAPHOSEL = 0x0E16; +SAPHOSEL_L = 0x0E16; +SAPHOSEL_H = 0x0E17; +SAPHCH0PUT = 0x0E20; +SAPHCH0PUT_L = 0x0E20; +SAPHCH0PUT_H = 0x0E21; +SAPHCH0PDT = 0x0E22; +SAPHCH0PDT_L = 0x0E22; +SAPHCH0PDT_H = 0x0E23; +SAPHCH0TT = 0x0E24; +SAPHCH0TT_L = 0x0E24; +SAPHCH0TT_H = 0x0E25; +SAPHCH1PUT = 0x0E26; +SAPHCH1PUT_L = 0x0E26; +SAPHCH1PUT_H = 0x0E27; +SAPHCH1PDT = 0x0E28; +SAPHCH1PDT_L = 0x0E28; +SAPHCH1PDT_H = 0x0E29; +SAPHCH1TT = 0x0E2A; +SAPHCH1TT_L = 0x0E2A; +SAPHCH1TT_H = 0x0E2B; +SAPHMCNF = 0x0E2C; +SAPHMCNF_L = 0x0E2C; +SAPHMCNF_H = 0x0E2D; +SAPHTACTL = 0x0E2E; +SAPHTACTL_L = 0x0E2E; +SAPHTACTL_H = 0x0E2F; +SAPHICTL0 = 0x0E30; +SAPHICTL0_L = 0x0E30; +SAPHICTL0_H = 0x0E31; +SAPHBCTL = 0x0E34; +SAPHBCTL_L = 0x0E34; +SAPHBCTL_H = 0x0E35; +SAPHPGC = 0x0E40; +SAPHPGC_L = 0x0E40; +SAPHPGC_H = 0x0E41; +SAPHPGLPER = 0x0E42; +SAPHPGLPER_L = 0x0E42; +SAPHPGLPER_H = 0x0E43; +SAPHPGHPER = 0x0E44; +SAPHPGHPER_L = 0x0E44; +SAPHPGHPER_H = 0x0E45; +SAPHPGCTL = 0x0E46; +SAPHPGCTL_L = 0x0E46; +SAPHPGCTL_H = 0x0E47; +SAPHPPGTRIG = 0x0E48; +SAPHPPGTRIG_L = 0x0E48; +SAPHPPGTRIG_H = 0x0E49; +SAPHASCTL0 = 0x0E60; +SAPHASCTL0_L = 0x0E60; +SAPHASCTL0_H = 0x0E61; +SAPHASCTL1 = 0x0E62; +SAPHASCTL1_L = 0x0E62; +SAPHASCTL1_H = 0x0E63; +SAPHASQTRIG = 0x0E64; + +SAPHAPOL = 0x0E66; +SAPHAPOL_L = 0x0E66; +SAPHAPOL_H = 0x0E67; +SAPHAPLEV = 0x0E68; +SAPHAPLEV_L = 0x0E68; +SAPHAPLEV_H = 0x0E69; +SAPHAPHIZ = 0x0E6A; +SAPHAPHIZ_L = 0x0E6A; +SAPHAPHIZ_H = 0x0E6B; +SAPHATM_A = 0x0E6E; +SAPHATM_A_L = 0x0E6E; +SAPHATM_A_H = 0x0E6F; +SAPHATM_B = 0x0E70; +SAPHATM_B_L = 0x0E70; +SAPHATM_B_H = 0x0E71; +SAPHATM_C = 0x0E72; +SAPHATM_C_L = 0x0E72; +SAPHATM_C_H = 0x0E73; +SAPHATM_D = 0x0E74; +SAPHATM_D_L = 0x0E74; +SAPHATM_D_H = 0x0E75; +SAPHATM_E = 0x0E76; +SAPHATM_E_L = 0x0E76; +SAPHATM_E_H = 0x0E77; +SAPHATM_F = 0x0E78; +SAPHATM_F_L = 0x0E78; +SAPHATM_F_H = 0x0E79; +SAPHTBCTL = 0x0E7A; +SAPHTBCTL_L = 0x0E7A; +SAPHTBCTL_H = 0x0E7B; +SAPHATIMLO = 0x0E7C; +SAPHATIMLO_L = 0x0E7C; +SAPHATIMLO_H = 0x0E7D; +SAPHATIMHI = 0x0E7E; +SAPHATIMHI_L = 0x0E7E; +SAPHATIMHI_H = 0x0E7F; + + +/***************************************************************************** + SDHS +*****************************************************************************/ +SDHSIIDX = 0x0E80; +SDHSIIDX_L = 0x0E80; +SDHSIIDX_H = 0x0E81; +SDHSMIS = 0x0E82; +SDHSMIS_L = 0x0E82; +SDHSMIS_H = 0x0E83; +SDHSRIS = 0x0E84; +SDHSRIS_L = 0x0E84; +SDHSRIS_H = 0x0E85; +SDHSIMSC = 0x0E86; +SDHSIMSC_L = 0x0E86; +SDHSIMSC_H = 0x0E87; +SDHSICR = 0x0E88; +SDHSICR_L = 0x0E88; +SDHSICR_H = 0x0E89; +SDHSISR = 0x0E8A; +SDHSISR_L = 0x0E8A; +SDHSISR_H = 0x0E8B; +SDHSDESCLO = 0x0E8C; +SDHSDESCLO_L = 0x0E8C; +SDHSDESCLO_H = 0x0E8D; +SDHSDESCHI = 0x0E8E; +SDHSDESCHI_L = 0x0E8E; +SDHSDESCHI_H = 0x0E8F; +SDHSCTL0 = 0x0E90; +SDHSCTL0_L = 0x0E90; +SDHSCTL0_H = 0x0E91; +SDHSCTL1 = 0x0E92; +SDHSCTL1_L = 0x0E92; +SDHSCTL1_H = 0x0E93; +SDHSCTL2 = 0x0E94; +SDHSCTL2_L = 0x0E94; +SDHSCTL2_H = 0x0E95; +SDHSCTL3 = 0x0E96; +SDHSCTL3_L = 0x0E96; +SDHSCTL3_H = 0x0E97; +SDHSCTL4 = 0x0E98; +SDHSCTL4_L = 0x0E98; +SDHSCTL4_H = 0x0E99; +SDHSCTL5 = 0x0E9A; +SDHSCTL5_L = 0x0E9A; +SDHSCTL5_H = 0x0E9B; +SDHSCTL6 = 0x0E9C; +SDHSCTL6_L = 0x0E9C; +SDHSCTL6_H = 0x0E9D; +SDHSCTL7 = 0x0E9E; +SDHSCTL7_L = 0x0E9E; +SDHSCTL7_H = 0x0E9F; +SDHSDT = 0x0EA2; +SDHSDT_L = 0x0EA2; +SDHSDT_H = 0x0EA3; +SDHSWINHITH = 0x0EA4; +SDHSWINHITH_L = 0x0EA4; +SDHSWINHITH_H = 0x0EA5; +SDHSWINLOTH = 0x0EA6; +SDHSWINLOTH_L = 0x0EA6; +SDHSWINLOTH_H = 0x0EA7; +SDHSDTCDA = 0x0EA8; +SDHSDTCDA_L = 0x0EA8; +SDHSDTCDA_H = 0x0EA9; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0340; +TA0CTL_L = 0x0340; +TA0CTL_H = 0x0341; +TA0CCTL0 = 0x0342; +TA0CCTL0_L = 0x0342; +TA0CCTL0_H = 0x0343; +TA0CCTL1 = 0x0344; +TA0CCTL1_L = 0x0344; +TA0CCTL1_H = 0x0345; +TA0CCTL2 = 0x0346; +TA0CCTL2_L = 0x0346; +TA0CCTL2_H = 0x0347; +TA0R = 0x0350; +TA0R_L = 0x0350; +TA0R_H = 0x0351; +TA0CCR0 = 0x0352; +TA0CCR0_L = 0x0352; +TA0CCR0_H = 0x0353; +TA0CCR1 = 0x0354; +TA0CCR1_L = 0x0354; +TA0CCR1_H = 0x0355; +TA0CCR2 = 0x0356; +TA0CCR2_L = 0x0356; +TA0CCR2_H = 0x0357; +TA0EX0 = 0x0360; +TA0EX0_L = 0x0360; +TA0EX0_H = 0x0361; +TA0IV = 0x036E; +TA0IV_L = 0x036E; +TA0IV_H = 0x036F; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x0380; +TA1CTL_L = 0x0380; +TA1CTL_H = 0x0381; +TA1CCTL0 = 0x0382; +TA1CCTL0_L = 0x0382; +TA1CCTL0_H = 0x0383; +TA1CCTL1 = 0x0384; +TA1CCTL1_L = 0x0384; +TA1CCTL1_H = 0x0385; +TA1CCTL2 = 0x0386; +TA1CCTL2_L = 0x0386; +TA1CCTL2_H = 0x0387; +TA1R = 0x0390; +TA1R_L = 0x0390; +TA1R_H = 0x0391; +TA1CCR0 = 0x0392; +TA1CCR0_L = 0x0392; +TA1CCR0_H = 0x0393; +TA1CCR1 = 0x0394; +TA1CCR1_L = 0x0394; +TA1CCR1_H = 0x0395; +TA1CCR2 = 0x0396; +TA1CCR2_L = 0x0396; +TA1CCR2_H = 0x0397; +TA1EX0 = 0x03A0; +TA1EX0_L = 0x03A0; +TA1EX0_H = 0x03A1; +TA1IV = 0x03AE; +TA1IV_L = 0x03AE; +TA1IV_H = 0x03AF; + + +/***************************************************************************** + TA2 +*****************************************************************************/ +TA2CTL = 0x0400; +TA2CTL_L = 0x0400; +TA2CTL_H = 0x0401; +TA2CCTL0 = 0x0402; +TA2CCTL0_L = 0x0402; +TA2CCTL0_H = 0x0403; +TA2CCTL1 = 0x0404; +TA2CCTL1_L = 0x0404; +TA2CCTL1_H = 0x0405; +TA2R = 0x0410; +TA2R_L = 0x0410; +TA2R_H = 0x0411; +TA2CCR0 = 0x0412; +TA2CCR0_L = 0x0412; +TA2CCR0_H = 0x0413; +TA2CCR1 = 0x0414; +TA2CCR1_L = 0x0414; +TA2CCR1_H = 0x0415; +TA2EX0 = 0x0420; +TA2EX0_L = 0x0420; +TA2EX0_H = 0x0421; +TA2IV = 0x042E; +TA2IV_L = 0x042E; +TA2IV_H = 0x042F; + + +/***************************************************************************** + TA3 +*****************************************************************************/ +TA3CTL = 0x0440; +TA3CTL_L = 0x0440; +TA3CTL_H = 0x0441; +TA3CCTL0 = 0x0442; +TA3CCTL0_L = 0x0442; +TA3CCTL0_H = 0x0443; +TA3CCTL1 = 0x0444; +TA3CCTL1_L = 0x0444; +TA3CCTL1_H = 0x0445; +TA3R = 0x0450; +TA3R_L = 0x0450; +TA3R_H = 0x0451; +TA3CCR0 = 0x0452; +TA3CCR0_L = 0x0452; +TA3CCR0_H = 0x0453; +TA3CCR1 = 0x0454; +TA3CCR1_L = 0x0454; +TA3CCR1_H = 0x0455; +TA3EX0 = 0x0460; +TA3EX0_L = 0x0460; +TA3EX0_H = 0x0461; +TA3IV = 0x046E; +TA3IV_L = 0x046E; +TA3IV_H = 0x046F; + + +/***************************************************************************** + TA4 +*****************************************************************************/ +TA4CTL = 0x07C0; +TA4CTL_L = 0x07C0; +TA4CTL_H = 0x07C1; +TA4CCTL0 = 0x07C2; +TA4CCTL0_L = 0x07C2; +TA4CCTL0_H = 0x07C3; +TA4CCTL1 = 0x07C4; +TA4CCTL1_L = 0x07C4; +TA4CCTL1_H = 0x07C5; +TA4R = 0x07D0; +TA4R_L = 0x07D0; +TA4R_H = 0x07D1; +TA4CCR0 = 0x07D2; +TA4CCR0_L = 0x07D2; +TA4CCR0_H = 0x07D3; +TA4CCR1 = 0x07D4; +TA4CCR1_L = 0x07D4; +TA4CCR1_H = 0x07D5; +TA4EX0 = 0x07E0; +TA4EX0_L = 0x07E0; +TA4EX0_H = 0x07E1; +TA4IV = 0x07EE; +TA4IV_L = 0x07EE; +TA4IV_H = 0x07EF; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x03C0; +TB0CTL_L = 0x03C0; +TB0CTL_H = 0x03C1; +TB0CCTL0 = 0x03C2; +TB0CCTL0_L = 0x03C2; +TB0CCTL0_H = 0x03C3; +TB0CCTL1 = 0x03C4; +TB0CCTL1_L = 0x03C4; +TB0CCTL1_H = 0x03C5; +TB0CCTL2 = 0x03C6; +TB0CCTL2_L = 0x03C6; +TB0CCTL2_H = 0x03C7; +TB0CCTL3 = 0x03C8; +TB0CCTL3_L = 0x03C8; +TB0CCTL3_H = 0x03C9; +TB0CCTL4 = 0x03CA; +TB0CCTL4_L = 0x03CA; +TB0CCTL4_H = 0x03CB; +TB0CCTL5 = 0x03CC; +TB0CCTL5_L = 0x03CC; +TB0CCTL5_H = 0x03CD; +TB0CCTL6 = 0x03CE; +TB0CCTL6_L = 0x03CE; +TB0CCTL6_H = 0x03CF; +TB0R = 0x03D0; +TB0R_L = 0x03D0; +TB0R_H = 0x03D1; +TB0CCR0 = 0x03D2; +TB0CCR0_L = 0x03D2; +TB0CCR0_H = 0x03D3; +TB0CCR1 = 0x03D4; +TB0CCR1_L = 0x03D4; +TB0CCR1_H = 0x03D5; +TB0CCR2 = 0x03D6; +TB0CCR2_L = 0x03D6; +TB0CCR2_H = 0x03D7; +TB0CCR3 = 0x03D8; +TB0CCR3_L = 0x03D8; +TB0CCR3_H = 0x03D9; +TB0CCR4 = 0x03DA; +TB0CCR4_L = 0x03DA; +TB0CCR4_H = 0x03DB; +TB0CCR5 = 0x03DC; +TB0CCR5_L = 0x03DC; +TB0CCR5_H = 0x03DD; +TB0CCR6 = 0x03DE; +TB0CCR6_L = 0x03DE; +TB0CCR6_H = 0x03DF; +TB0EX0 = 0x03E0; +TB0EX0_L = 0x03E0; +TB0EX0_H = 0x03E1; +TB0IV = 0x03EE; +TB0IV_L = 0x03EE; +TB0IV_H = 0x03EF; + + +/***************************************************************************** + UUPS +*****************************************************************************/ +UUPSIIDX = 0x0EC0; +UUPSIIDX_L = 0x0EC0; +UUPSIIDX_H = 0x0EC1; +UUPSMIS = 0x0EC2; +UUPSMIS_L = 0x0EC2; +UUPSMIS_H = 0x0EC3; +UUPSRIS = 0x0EC4; +UUPSRIS_L = 0x0EC4; +UUPSRIS_H = 0x0EC5; +UUPSIMSC = 0x0EC6; +UUPSIMSC_L = 0x0EC6; +UUPSIMSC_H = 0x0EC7; +UUPSICR = 0x0EC8; +UUPSICR_L = 0x0EC8; +UUPSICR_H = 0x0EC9; +UUPSISR = 0x0ECA; +UUPSISR_L = 0x0ECA; +UUPSISR_H = 0x0ECB; +UUPSDESCLO = 0x0ECC; +UUPSDESCLO_L = 0x0ECC; +UUPSDESCLO_H = 0x0ECD; +UUPSDESCHI = 0x0ECE; +UUPSDESCHI_L = 0x0ECE; +UUPSDESCHI_H = 0x0ECF; +UUPSCTL = 0x0ED0; +UUPSCTL_L = 0x0ED0; +UUPSCTL_H = 0x0ED1; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0STATW_L = 0x05CA; +UCA0STATW_H = 0x05CB; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0ABCTL_L = 0x05D0; +UCA0ABCTL_H = 0x05D1; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +UCA0IV_L = 0x05DE; +UCA0IV_H = 0x05DF; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1STATW_L = 0x05EA; +UCA1STATW_H = 0x05EB; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1ABCTL_L = 0x05F0; +UCA1ABCTL_H = 0x05F1; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +UCA1IV_L = 0x05FE; +UCA1IV_H = 0x05FF; + + +/***************************************************************************** + eUSCI_A2 +*****************************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2STATW_L = 0x060A; +UCA2STATW_H = 0x060B; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2ABCTL_L = 0x0610; +UCA2ABCTL_H = 0x0611; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +UCA2IV_L = 0x061E; +UCA2IV_H = 0x061F; + + +/***************************************************************************** + eUSCI_A3 +*****************************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3STATW_L = 0x062A; +UCA3STATW_H = 0x062B; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3ABCTL_L = 0x0630; +UCA3ABCTL_H = 0x0631; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +UCA3IV_L = 0x063E; +UCA3IV_H = 0x063F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +UCB0IV_L = 0x066E; +UCB0IV_H = 0x066F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +UCB1IV_L = 0x06AE; +UCB1IV_H = 0x06AF; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr6035.cmd b/msp430/msp430fr6035.cmd new file mode 100644 index 00000000..7cbb5175 --- /dev/null +++ b/msp430/msp430fr6035.cmd @@ -0,0 +1,1943 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr6035.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC12_B +*****************************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; + + +/***************************************************************************** + AES256 +*****************************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; + + +/***************************************************************************** + CAPTIO0 +*****************************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; + + +/***************************************************************************** + CAPTIO1 +*****************************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; + + +/***************************************************************************** + COMP_E +*****************************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; + + +/***************************************************************************** + CRC32 +*****************************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +P7IV = 0x026E; +P7IV_L = 0x026E; +P7IV_H = 0x026F; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +PDIES = 0x0278; +PDIES_L = 0x0278; +PDIES_H = 0x0279; +PDIE = 0x027A; +PDIE_L = 0x027A; +PDIE_H = 0x027B; +PDIFG = 0x027C; +PDIFG_L = 0x027C; +PDIFG_H = 0x027D; +P8IV = 0x027E; +P8IV_L = 0x027E; +P8IV_H = 0x027F; +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +P9IV = 0x028E; +P9IV_L = 0x028E; +P9IV_H = 0x028F; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +PEIES = 0x0298; +PEIES_L = 0x0298; +PEIES_H = 0x0299; +PEIE = 0x029A; +PEIE_L = 0x029A; +PEIE_H = 0x029B; +PEIFG = 0x029C; +PEIFG_L = 0x029C; +PEIFG_H = 0x029D; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + +P7IN = 0x0260; + +P8IN = 0x0261; + +P7OUT = 0x0262; + +P8OUT = 0x0263; + +P7DIR = 0x0264; + +P8DIR = 0x0265; + +P7REN = 0x0266; + +P8REN = 0x0267; + +P7SEL0 = 0x026A; + +P8SEL0 = 0x026B; + +P7SEL1 = 0x026C; + +P8SEL1 = 0x026D; + +P7SELC = 0x0276; + +P8SELC = 0x0277; + +P7IES = 0x0278; + +P8IES = 0x0279; + +P7IE = 0x027A; + +P8IE = 0x027B; + +P7IFG = 0x027C; + +P8IFG = 0x027D; + +P9IN = 0x0280; + +P9OUT = 0x0282; + +P9DIR = 0x0284; + +P9REN = 0x0286; + +P9SEL0 = 0x028A; + +P9SEL1 = 0x028C; + +P9SELC = 0x0296; + +P9IES = 0x0298; + +P9IE = 0x029A; + +P9IFG = 0x029C; + + + +/***************************************************************************** + DMA +*****************************************************************************/ +DMACTL0 = 0x0500; +DMACTL0_L = 0x0500; +DMACTL0_H = 0x0501; +DMACTL1 = 0x0502; +DMACTL1_L = 0x0502; +DMACTL1_H = 0x0503; +DMACTL2 = 0x0504; +DMACTL2_L = 0x0504; +DMACTL2_H = 0x0505; +DMACTL4 = 0x0508; +DMACTL4_L = 0x0508; +DMACTL4_H = 0x0509; +DMAIV = 0x050E; +DMAIV_L = 0x050E; +DMAIV_H = 0x050F; +DMA0CTL = 0x0510; +DMA0CTL_L = 0x0510; +DMA0CTL_H = 0x0511; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA0SZ_L = 0x051A; +DMA0SZ_H = 0x051B; +DMA1CTL = 0x0520; +DMA1CTL_L = 0x0520; +DMA1CTL_H = 0x0521; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA1SZ_L = 0x052A; +DMA1SZ_H = 0x052B; +DMA2CTL = 0x0530; +DMA2CTL_L = 0x0530; +DMA2CTL_H = 0x0531; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA2SZ_L = 0x053A; +DMA2SZ_H = 0x053B; +DMA3CTL = 0x0540; +DMA3CTL_L = 0x0540; +DMA3CTL_H = 0x0541; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA3SZ_L = 0x054A; +DMA3SZ_H = 0x054B; +DMA4CTL = 0x0550; +DMA4CTL_L = 0x0550; +DMA4CTL_H = 0x0551; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA4SZ_L = 0x055A; +DMA4SZ_H = 0x055B; +DMA5CTL = 0x0560; +DMA5CTL_L = 0x0560; +DMA5CTL_H = 0x0561; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +DMA5SZ_L = 0x056A; +DMA5SZ_H = 0x056B; + + +/***************************************************************************** + FRCTL_A +*****************************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; + + +/***************************************************************************** + LCD_C +*****************************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCPCTL3 = 0x0A10; +LCDCPCTL3_L = 0x0A10; +LCDCPCTL3_H = 0x0A11; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDCIV_L = 0x0A1E; +LCDCIV_H = 0x0A1F; +LCDM1 = 0x0A20; + +LCDM2 = 0x0A21; + +LCDM3 = 0x0A22; + +LCDM4 = 0x0A23; + +LCDM5 = 0x0A24; + +LCDM6 = 0x0A25; + +LCDM7 = 0x0A26; + +LCDM8 = 0x0A27; + +LCDM9 = 0x0A28; + +LCDM10 = 0x0A29; + +LCDM11 = 0x0A2A; + +LCDM12 = 0x0A2B; + +LCDM13 = 0x0A2C; + +LCDM14 = 0x0A2D; + +LCDM15 = 0x0A2E; + +LCDM16 = 0x0A2F; + +LCDM17 = 0x0A30; + +LCDM18 = 0x0A31; + +LCDM19 = 0x0A32; + +LCDM20 = 0x0A33; + +LCDM21 = 0x0A34; + +LCDM22 = 0x0A35; + +LCDM23 = 0x0A36; + +LCDM24 = 0x0A37; + +LCDM25 = 0x0A38; + +LCDM26 = 0x0A39; + +LCDM27 = 0x0A3A; + +LCDM28 = 0x0A3B; + +LCDM29 = 0x0A3C; + +LCDM30 = 0x0A3D; + +LCDM31 = 0x0A3E; + +LCDM32 = 0x0A3F; + +LCDM33_LCDBM1 = 0x0A40; + +LCDM34_LCDBM2 = 0x0A41; + +LCDM35_LCDBM3 = 0x0A42; + +LCDM36_LCDBM4 = 0x0A43; + +LCDM37_LCDBM5 = 0x0A44; + +LCDM38_LCDBM6 = 0x0A45; + +LCDM39_LCDBM7 = 0x0A46; + +LCDM40_LCDBM8 = 0x0A47; + +LCDM41_LCDBM9 = 0x0A48; + +LCDM42_LCDBM10 = 0x0A49; + +LCDM43_LCDBM11 = 0x0A4A; + +LCDM44_LCDBM12 = 0x0A4B; + +LCDM45_LCDBM13 = 0x0A4C; + +LCDM46_LCDBM14 = 0x0A4D; + +LCDM47_LCDBM15 = 0x0A4E; + +LCDM48_LCDBM16 = 0x0A4F; + +LCDM49_LCDBM17 = 0x0A50; + +LCDM50_LCDBM18 = 0x0A51; + +LCDM51_LCDBM19 = 0x0A52; + +LCDM52_LCDBM20 = 0x0A53; + + + +/***************************************************************************** + LEA +*****************************************************************************/ +LEACAP = 0x0A80; +LEACAPL = 0x0A80; +LEACAPH = 0x0A82; + +LEACNF0 = 0x0A84; +LEACNF0L = 0x0A84; +LEACNF0H = 0x0A86; + +LEACNF1 = 0x0A88; +LEACNF1L = 0x0A88; +LEACNF1H = 0x0A8A; + +LEACNF2 = 0x0A8C; +LEACNF2L = 0x0A8C; +LEACNF2H = 0x0A8E; + +LEAMB = 0x0A90; +LEAMBL = 0x0A90; +LEAMBH = 0x0A92; + +LEAMT = 0x0A94; +LEAMTL = 0x0A94; +LEAMTH = 0x0A96; + +LEACMA = 0x0A98; +LEACMAL = 0x0A98; +LEACMAH = 0x0A9A; + +LEACMCTL = 0x0A9C; +LEACMCTLL = 0x0A9C; +LEACMCTLH = 0x0A9E; + +LEACMDSTAT = 0x0AA8; +LEACMDSTATL = 0x0AA8; +LEACMDSTATH = 0x0AAA; + +LEAS1STAT = 0x0AAC; +LEAS1STATL = 0x0AAC; +LEAS1STATH = 0x0AAE; + +LEAS0STAT = 0x0AB0; +LEAS0STATL = 0x0AB0; +LEAS0STATH = 0x0AB2; + +LEADSTSTAT = 0x0AB4; +LEADSTSTATL = 0x0AB4; +LEADSTSTATH = 0x0AB6; + +LEAPMCTL = 0x0AC0; +LEAPMCTLL = 0x0AC0; +LEAPMCTLH = 0x0AC2; + +LEAPMDST = 0x0AC4; +LEAPMDSTL = 0x0AC4; +LEAPMDSTH = 0x0AC6; + +LEAPMS1 = 0x0AC8; +LEAPMS1L = 0x0AC8; +LEAPMS1H = 0x0ACA; + +LEAPMS0 = 0x0ACC; +LEAPMS0L = 0x0ACC; +LEAPMS0H = 0x0ACE; + +LEAPMCB = 0x0AD0; +LEAPMCBL = 0x0AD0; +LEAPMCBH = 0x0AD2; + +LEAIFGSET = 0x0AF0; +LEAIFGSETL = 0x0AF0; +LEAIFGSETH = 0x0AF2; + +LEAIE = 0x0AF4; +LEAIEL = 0x0AF4; +LEAIEH = 0x0AF6; + +LEAIFG = 0x0AF8; +LEAIFGL = 0x0AF8; +LEAIFGH = 0x0AFA; + +LEAIV = 0x0AFC; +LEAIVL = 0x0AFC; +LEAIVH = 0x0AFE; + + + +/***************************************************************************** + MPU +*****************************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + MTIF +*****************************************************************************/ +MTIFPGCNF = 0x0F00; +MTIFPGCNF_L = 0x0F00; +MTIFPGCNF_H = 0x0F01; +MTIFPGKVAL = 0x0F02; +MTIFPGKVAL_L = 0x0F02; +MTIFPGKVAL_H = 0x0F03; +MTIFPGCTL = 0x0F04; +MTIFPGCTL_L = 0x0F04; +MTIFPGCTL_H = 0x0F05; +MTIFPGSR = 0x0F06; +MTIFPGSR_L = 0x0F06; +MTIFPGSR_H = 0x0F07; +MTIFPCCNF = 0x0F08; +MTIFPCCNF_L = 0x0F08; +MTIFPCCNF_H = 0x0F09; +MTIFPCR = 0x0F0A; +MTIFPCR_L = 0x0F0A; +MTIFPCR_H = 0x0F0B; +MTIFPCCTL = 0x0F0C; +MTIFPCCTL_L = 0x0F0C; +MTIFPCCTL_H = 0x0F0D; +MTIFPCSR = 0x0F0E; +MTIFPCSR_L = 0x0F0E; +MTIFPCSR_H = 0x0F0F; +MTIFTPCTL = 0x0F10; +MTIFTPCTL_L = 0x0F10; +MTIFTPCTL_H = 0x0F11; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RAMCTL +*****************************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +RCCTL1 = 0x015A; +RCCTL1_L = 0x015A; +RCCTL1_H = 0x015B; + + +/***************************************************************************** + REF_A +*****************************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; + + +/***************************************************************************** + RTC_C +*****************************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCIV_L = 0x04AE; +RTCIV_H = 0x04AF; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCCNT12 = 0x04B0; +RTCCNT12_L = 0x04B0; +RTCCNT12_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCCNT34 = 0x04B2; +RTCCNT34_L = 0x04B2; +RTCCNT34_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BIN2BCD_L = 0x04BC; +BIN2BCD_H = 0x04BD; +BCD2BIN = 0x04BE; +BCD2BIN_L = 0x04BE; +BCD2BIN_H = 0x04BF; +RT0PS = 0x04AC; + +RT1PS = 0x04AD; + +RTCCNT1 = 0x04B0; + +RTCCNT2 = 0x04B1; + +RTCCNT3 = 0x04B2; + +RTCCNT4 = 0x04B3; + + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0340; +TA0CTL_L = 0x0340; +TA0CTL_H = 0x0341; +TA0CCTL0 = 0x0342; +TA0CCTL0_L = 0x0342; +TA0CCTL0_H = 0x0343; +TA0CCTL1 = 0x0344; +TA0CCTL1_L = 0x0344; +TA0CCTL1_H = 0x0345; +TA0CCTL2 = 0x0346; +TA0CCTL2_L = 0x0346; +TA0CCTL2_H = 0x0347; +TA0R = 0x0350; +TA0R_L = 0x0350; +TA0R_H = 0x0351; +TA0CCR0 = 0x0352; +TA0CCR0_L = 0x0352; +TA0CCR0_H = 0x0353; +TA0CCR1 = 0x0354; +TA0CCR1_L = 0x0354; +TA0CCR1_H = 0x0355; +TA0CCR2 = 0x0356; +TA0CCR2_L = 0x0356; +TA0CCR2_H = 0x0357; +TA0EX0 = 0x0360; +TA0EX0_L = 0x0360; +TA0EX0_H = 0x0361; +TA0IV = 0x036E; +TA0IV_L = 0x036E; +TA0IV_H = 0x036F; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x0380; +TA1CTL_L = 0x0380; +TA1CTL_H = 0x0381; +TA1CCTL0 = 0x0382; +TA1CCTL0_L = 0x0382; +TA1CCTL0_H = 0x0383; +TA1CCTL1 = 0x0384; +TA1CCTL1_L = 0x0384; +TA1CCTL1_H = 0x0385; +TA1CCTL2 = 0x0386; +TA1CCTL2_L = 0x0386; +TA1CCTL2_H = 0x0387; +TA1R = 0x0390; +TA1R_L = 0x0390; +TA1R_H = 0x0391; +TA1CCR0 = 0x0392; +TA1CCR0_L = 0x0392; +TA1CCR0_H = 0x0393; +TA1CCR1 = 0x0394; +TA1CCR1_L = 0x0394; +TA1CCR1_H = 0x0395; +TA1CCR2 = 0x0396; +TA1CCR2_L = 0x0396; +TA1CCR2_H = 0x0397; +TA1EX0 = 0x03A0; +TA1EX0_L = 0x03A0; +TA1EX0_H = 0x03A1; +TA1IV = 0x03AE; +TA1IV_L = 0x03AE; +TA1IV_H = 0x03AF; + + +/***************************************************************************** + TA2 +*****************************************************************************/ +TA2CTL = 0x0400; +TA2CTL_L = 0x0400; +TA2CTL_H = 0x0401; +TA2CCTL0 = 0x0402; +TA2CCTL0_L = 0x0402; +TA2CCTL0_H = 0x0403; +TA2CCTL1 = 0x0404; +TA2CCTL1_L = 0x0404; +TA2CCTL1_H = 0x0405; +TA2R = 0x0410; +TA2R_L = 0x0410; +TA2R_H = 0x0411; +TA2CCR0 = 0x0412; +TA2CCR0_L = 0x0412; +TA2CCR0_H = 0x0413; +TA2CCR1 = 0x0414; +TA2CCR1_L = 0x0414; +TA2CCR1_H = 0x0415; +TA2EX0 = 0x0420; +TA2EX0_L = 0x0420; +TA2EX0_H = 0x0421; +TA2IV = 0x042E; +TA2IV_L = 0x042E; +TA2IV_H = 0x042F; + + +/***************************************************************************** + TA3 +*****************************************************************************/ +TA3CTL = 0x0440; +TA3CTL_L = 0x0440; +TA3CTL_H = 0x0441; +TA3CCTL0 = 0x0442; +TA3CCTL0_L = 0x0442; +TA3CCTL0_H = 0x0443; +TA3CCTL1 = 0x0444; +TA3CCTL1_L = 0x0444; +TA3CCTL1_H = 0x0445; +TA3R = 0x0450; +TA3R_L = 0x0450; +TA3R_H = 0x0451; +TA3CCR0 = 0x0452; +TA3CCR0_L = 0x0452; +TA3CCR0_H = 0x0453; +TA3CCR1 = 0x0454; +TA3CCR1_L = 0x0454; +TA3CCR1_H = 0x0455; +TA3EX0 = 0x0460; +TA3EX0_L = 0x0460; +TA3EX0_H = 0x0461; +TA3IV = 0x046E; +TA3IV_L = 0x046E; +TA3IV_H = 0x046F; + + +/***************************************************************************** + TA4 +*****************************************************************************/ +TA4CTL = 0x07C0; +TA4CTL_L = 0x07C0; +TA4CTL_H = 0x07C1; +TA4CCTL0 = 0x07C2; +TA4CCTL0_L = 0x07C2; +TA4CCTL0_H = 0x07C3; +TA4CCTL1 = 0x07C4; +TA4CCTL1_L = 0x07C4; +TA4CCTL1_H = 0x07C5; +TA4R = 0x07D0; +TA4R_L = 0x07D0; +TA4R_H = 0x07D1; +TA4CCR0 = 0x07D2; +TA4CCR0_L = 0x07D2; +TA4CCR0_H = 0x07D3; +TA4CCR1 = 0x07D4; +TA4CCR1_L = 0x07D4; +TA4CCR1_H = 0x07D5; +TA4EX0 = 0x07E0; +TA4EX0_L = 0x07E0; +TA4EX0_H = 0x07E1; +TA4IV = 0x07EE; +TA4IV_L = 0x07EE; +TA4IV_H = 0x07EF; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x03C0; +TB0CTL_L = 0x03C0; +TB0CTL_H = 0x03C1; +TB0CCTL0 = 0x03C2; +TB0CCTL0_L = 0x03C2; +TB0CCTL0_H = 0x03C3; +TB0CCTL1 = 0x03C4; +TB0CCTL1_L = 0x03C4; +TB0CCTL1_H = 0x03C5; +TB0CCTL2 = 0x03C6; +TB0CCTL2_L = 0x03C6; +TB0CCTL2_H = 0x03C7; +TB0CCTL3 = 0x03C8; +TB0CCTL3_L = 0x03C8; +TB0CCTL3_H = 0x03C9; +TB0CCTL4 = 0x03CA; +TB0CCTL4_L = 0x03CA; +TB0CCTL4_H = 0x03CB; +TB0CCTL5 = 0x03CC; +TB0CCTL5_L = 0x03CC; +TB0CCTL5_H = 0x03CD; +TB0CCTL6 = 0x03CE; +TB0CCTL6_L = 0x03CE; +TB0CCTL6_H = 0x03CF; +TB0R = 0x03D0; +TB0R_L = 0x03D0; +TB0R_H = 0x03D1; +TB0CCR0 = 0x03D2; +TB0CCR0_L = 0x03D2; +TB0CCR0_H = 0x03D3; +TB0CCR1 = 0x03D4; +TB0CCR1_L = 0x03D4; +TB0CCR1_H = 0x03D5; +TB0CCR2 = 0x03D6; +TB0CCR2_L = 0x03D6; +TB0CCR2_H = 0x03D7; +TB0CCR3 = 0x03D8; +TB0CCR3_L = 0x03D8; +TB0CCR3_H = 0x03D9; +TB0CCR4 = 0x03DA; +TB0CCR4_L = 0x03DA; +TB0CCR4_H = 0x03DB; +TB0CCR5 = 0x03DC; +TB0CCR5_L = 0x03DC; +TB0CCR5_H = 0x03DD; +TB0CCR6 = 0x03DE; +TB0CCR6_L = 0x03DE; +TB0CCR6_H = 0x03DF; +TB0EX0 = 0x03E0; +TB0EX0_L = 0x03E0; +TB0EX0_H = 0x03E1; +TB0IV = 0x03EE; +TB0IV_L = 0x03EE; +TB0IV_H = 0x03EF; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0STATW_L = 0x05CA; +UCA0STATW_H = 0x05CB; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0ABCTL_L = 0x05D0; +UCA0ABCTL_H = 0x05D1; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +UCA0IV_L = 0x05DE; +UCA0IV_H = 0x05DF; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1STATW_L = 0x05EA; +UCA1STATW_H = 0x05EB; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1ABCTL_L = 0x05F0; +UCA1ABCTL_H = 0x05F1; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +UCA1IV_L = 0x05FE; +UCA1IV_H = 0x05FF; + + +/***************************************************************************** + eUSCI_A2 +*****************************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2STATW_L = 0x060A; +UCA2STATW_H = 0x060B; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2ABCTL_L = 0x0610; +UCA2ABCTL_H = 0x0611; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +UCA2IV_L = 0x061E; +UCA2IV_H = 0x061F; + + +/***************************************************************************** + eUSCI_A3 +*****************************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3STATW_L = 0x062A; +UCA3STATW_H = 0x062B; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3ABCTL_L = 0x0630; +UCA3ABCTL_H = 0x0631; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +UCA3IV_L = 0x063E; +UCA3IV_H = 0x063F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +UCB0IV_L = 0x066E; +UCB0IV_H = 0x066F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +UCB1IV_L = 0x06AE; +UCB1IV_H = 0x06AF; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr6037.cmd b/msp430/msp430fr6037.cmd new file mode 100644 index 00000000..2c197f74 --- /dev/null +++ b/msp430/msp430fr6037.cmd @@ -0,0 +1,1943 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr6037.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC12_B +*****************************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; + + +/***************************************************************************** + AES256 +*****************************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; + + +/***************************************************************************** + CAPTIO0 +*****************************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; + + +/***************************************************************************** + CAPTIO1 +*****************************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; + + +/***************************************************************************** + COMP_E +*****************************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; + + +/***************************************************************************** + CRC32 +*****************************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +P7IV = 0x026E; +P7IV_L = 0x026E; +P7IV_H = 0x026F; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +PDIES = 0x0278; +PDIES_L = 0x0278; +PDIES_H = 0x0279; +PDIE = 0x027A; +PDIE_L = 0x027A; +PDIE_H = 0x027B; +PDIFG = 0x027C; +PDIFG_L = 0x027C; +PDIFG_H = 0x027D; +P8IV = 0x027E; +P8IV_L = 0x027E; +P8IV_H = 0x027F; +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +P9IV = 0x028E; +P9IV_L = 0x028E; +P9IV_H = 0x028F; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +PEIES = 0x0298; +PEIES_L = 0x0298; +PEIES_H = 0x0299; +PEIE = 0x029A; +PEIE_L = 0x029A; +PEIE_H = 0x029B; +PEIFG = 0x029C; +PEIFG_L = 0x029C; +PEIFG_H = 0x029D; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + +P7IN = 0x0260; + +P8IN = 0x0261; + +P7OUT = 0x0262; + +P8OUT = 0x0263; + +P7DIR = 0x0264; + +P8DIR = 0x0265; + +P7REN = 0x0266; + +P8REN = 0x0267; + +P7SEL0 = 0x026A; + +P8SEL0 = 0x026B; + +P7SEL1 = 0x026C; + +P8SEL1 = 0x026D; + +P7SELC = 0x0276; + +P8SELC = 0x0277; + +P7IES = 0x0278; + +P8IES = 0x0279; + +P7IE = 0x027A; + +P8IE = 0x027B; + +P7IFG = 0x027C; + +P8IFG = 0x027D; + +P9IN = 0x0280; + +P9OUT = 0x0282; + +P9DIR = 0x0284; + +P9REN = 0x0286; + +P9SEL0 = 0x028A; + +P9SEL1 = 0x028C; + +P9SELC = 0x0296; + +P9IES = 0x0298; + +P9IE = 0x029A; + +P9IFG = 0x029C; + + + +/***************************************************************************** + DMA +*****************************************************************************/ +DMACTL0 = 0x0500; +DMACTL0_L = 0x0500; +DMACTL0_H = 0x0501; +DMACTL1 = 0x0502; +DMACTL1_L = 0x0502; +DMACTL1_H = 0x0503; +DMACTL2 = 0x0504; +DMACTL2_L = 0x0504; +DMACTL2_H = 0x0505; +DMACTL4 = 0x0508; +DMACTL4_L = 0x0508; +DMACTL4_H = 0x0509; +DMAIV = 0x050E; +DMAIV_L = 0x050E; +DMAIV_H = 0x050F; +DMA0CTL = 0x0510; +DMA0CTL_L = 0x0510; +DMA0CTL_H = 0x0511; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA0SZ_L = 0x051A; +DMA0SZ_H = 0x051B; +DMA1CTL = 0x0520; +DMA1CTL_L = 0x0520; +DMA1CTL_H = 0x0521; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA1SZ_L = 0x052A; +DMA1SZ_H = 0x052B; +DMA2CTL = 0x0530; +DMA2CTL_L = 0x0530; +DMA2CTL_H = 0x0531; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA2SZ_L = 0x053A; +DMA2SZ_H = 0x053B; +DMA3CTL = 0x0540; +DMA3CTL_L = 0x0540; +DMA3CTL_H = 0x0541; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA3SZ_L = 0x054A; +DMA3SZ_H = 0x054B; +DMA4CTL = 0x0550; +DMA4CTL_L = 0x0550; +DMA4CTL_H = 0x0551; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA4SZ_L = 0x055A; +DMA4SZ_H = 0x055B; +DMA5CTL = 0x0560; +DMA5CTL_L = 0x0560; +DMA5CTL_H = 0x0561; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +DMA5SZ_L = 0x056A; +DMA5SZ_H = 0x056B; + + +/***************************************************************************** + FRCTL_A +*****************************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; + + +/***************************************************************************** + LCD_C +*****************************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCPCTL3 = 0x0A10; +LCDCPCTL3_L = 0x0A10; +LCDCPCTL3_H = 0x0A11; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDCIV_L = 0x0A1E; +LCDCIV_H = 0x0A1F; +LCDM1 = 0x0A20; + +LCDM2 = 0x0A21; + +LCDM3 = 0x0A22; + +LCDM4 = 0x0A23; + +LCDM5 = 0x0A24; + +LCDM6 = 0x0A25; + +LCDM7 = 0x0A26; + +LCDM8 = 0x0A27; + +LCDM9 = 0x0A28; + +LCDM10 = 0x0A29; + +LCDM11 = 0x0A2A; + +LCDM12 = 0x0A2B; + +LCDM13 = 0x0A2C; + +LCDM14 = 0x0A2D; + +LCDM15 = 0x0A2E; + +LCDM16 = 0x0A2F; + +LCDM17 = 0x0A30; + +LCDM18 = 0x0A31; + +LCDM19 = 0x0A32; + +LCDM20 = 0x0A33; + +LCDM21 = 0x0A34; + +LCDM22 = 0x0A35; + +LCDM23 = 0x0A36; + +LCDM24 = 0x0A37; + +LCDM25 = 0x0A38; + +LCDM26 = 0x0A39; + +LCDM27 = 0x0A3A; + +LCDM28 = 0x0A3B; + +LCDM29 = 0x0A3C; + +LCDM30 = 0x0A3D; + +LCDM31 = 0x0A3E; + +LCDM32 = 0x0A3F; + +LCDM33_LCDBM1 = 0x0A40; + +LCDM34_LCDBM2 = 0x0A41; + +LCDM35_LCDBM3 = 0x0A42; + +LCDM36_LCDBM4 = 0x0A43; + +LCDM37_LCDBM5 = 0x0A44; + +LCDM38_LCDBM6 = 0x0A45; + +LCDM39_LCDBM7 = 0x0A46; + +LCDM40_LCDBM8 = 0x0A47; + +LCDM41_LCDBM9 = 0x0A48; + +LCDM42_LCDBM10 = 0x0A49; + +LCDM43_LCDBM11 = 0x0A4A; + +LCDM44_LCDBM12 = 0x0A4B; + +LCDM45_LCDBM13 = 0x0A4C; + +LCDM46_LCDBM14 = 0x0A4D; + +LCDM47_LCDBM15 = 0x0A4E; + +LCDM48_LCDBM16 = 0x0A4F; + +LCDM49_LCDBM17 = 0x0A50; + +LCDM50_LCDBM18 = 0x0A51; + +LCDM51_LCDBM19 = 0x0A52; + +LCDM52_LCDBM20 = 0x0A53; + + + +/***************************************************************************** + LEA +*****************************************************************************/ +LEACAP = 0x0A80; +LEACAPL = 0x0A80; +LEACAPH = 0x0A82; + +LEACNF0 = 0x0A84; +LEACNF0L = 0x0A84; +LEACNF0H = 0x0A86; + +LEACNF1 = 0x0A88; +LEACNF1L = 0x0A88; +LEACNF1H = 0x0A8A; + +LEACNF2 = 0x0A8C; +LEACNF2L = 0x0A8C; +LEACNF2H = 0x0A8E; + +LEAMB = 0x0A90; +LEAMBL = 0x0A90; +LEAMBH = 0x0A92; + +LEAMT = 0x0A94; +LEAMTL = 0x0A94; +LEAMTH = 0x0A96; + +LEACMA = 0x0A98; +LEACMAL = 0x0A98; +LEACMAH = 0x0A9A; + +LEACMCTL = 0x0A9C; +LEACMCTLL = 0x0A9C; +LEACMCTLH = 0x0A9E; + +LEACMDSTAT = 0x0AA8; +LEACMDSTATL = 0x0AA8; +LEACMDSTATH = 0x0AAA; + +LEAS1STAT = 0x0AAC; +LEAS1STATL = 0x0AAC; +LEAS1STATH = 0x0AAE; + +LEAS0STAT = 0x0AB0; +LEAS0STATL = 0x0AB0; +LEAS0STATH = 0x0AB2; + +LEADSTSTAT = 0x0AB4; +LEADSTSTATL = 0x0AB4; +LEADSTSTATH = 0x0AB6; + +LEAPMCTL = 0x0AC0; +LEAPMCTLL = 0x0AC0; +LEAPMCTLH = 0x0AC2; + +LEAPMDST = 0x0AC4; +LEAPMDSTL = 0x0AC4; +LEAPMDSTH = 0x0AC6; + +LEAPMS1 = 0x0AC8; +LEAPMS1L = 0x0AC8; +LEAPMS1H = 0x0ACA; + +LEAPMS0 = 0x0ACC; +LEAPMS0L = 0x0ACC; +LEAPMS0H = 0x0ACE; + +LEAPMCB = 0x0AD0; +LEAPMCBL = 0x0AD0; +LEAPMCBH = 0x0AD2; + +LEAIFGSET = 0x0AF0; +LEAIFGSETL = 0x0AF0; +LEAIFGSETH = 0x0AF2; + +LEAIE = 0x0AF4; +LEAIEL = 0x0AF4; +LEAIEH = 0x0AF6; + +LEAIFG = 0x0AF8; +LEAIFGL = 0x0AF8; +LEAIFGH = 0x0AFA; + +LEAIV = 0x0AFC; +LEAIVL = 0x0AFC; +LEAIVH = 0x0AFE; + + + +/***************************************************************************** + MPU +*****************************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + MTIF +*****************************************************************************/ +MTIFPGCNF = 0x0F00; +MTIFPGCNF_L = 0x0F00; +MTIFPGCNF_H = 0x0F01; +MTIFPGKVAL = 0x0F02; +MTIFPGKVAL_L = 0x0F02; +MTIFPGKVAL_H = 0x0F03; +MTIFPGCTL = 0x0F04; +MTIFPGCTL_L = 0x0F04; +MTIFPGCTL_H = 0x0F05; +MTIFPGSR = 0x0F06; +MTIFPGSR_L = 0x0F06; +MTIFPGSR_H = 0x0F07; +MTIFPCCNF = 0x0F08; +MTIFPCCNF_L = 0x0F08; +MTIFPCCNF_H = 0x0F09; +MTIFPCR = 0x0F0A; +MTIFPCR_L = 0x0F0A; +MTIFPCR_H = 0x0F0B; +MTIFPCCTL = 0x0F0C; +MTIFPCCTL_L = 0x0F0C; +MTIFPCCTL_H = 0x0F0D; +MTIFPCSR = 0x0F0E; +MTIFPCSR_L = 0x0F0E; +MTIFPCSR_H = 0x0F0F; +MTIFTPCTL = 0x0F10; +MTIFTPCTL_L = 0x0F10; +MTIFTPCTL_H = 0x0F11; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RAMCTL +*****************************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +RCCTL1 = 0x015A; +RCCTL1_L = 0x015A; +RCCTL1_H = 0x015B; + + +/***************************************************************************** + REF_A +*****************************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; + + +/***************************************************************************** + RTC_C +*****************************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCIV_L = 0x04AE; +RTCIV_H = 0x04AF; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCCNT12 = 0x04B0; +RTCCNT12_L = 0x04B0; +RTCCNT12_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCCNT34 = 0x04B2; +RTCCNT34_L = 0x04B2; +RTCCNT34_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BIN2BCD_L = 0x04BC; +BIN2BCD_H = 0x04BD; +BCD2BIN = 0x04BE; +BCD2BIN_L = 0x04BE; +BCD2BIN_H = 0x04BF; +RT0PS = 0x04AC; + +RT1PS = 0x04AD; + +RTCCNT1 = 0x04B0; + +RTCCNT2 = 0x04B1; + +RTCCNT3 = 0x04B2; + +RTCCNT4 = 0x04B3; + + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0340; +TA0CTL_L = 0x0340; +TA0CTL_H = 0x0341; +TA0CCTL0 = 0x0342; +TA0CCTL0_L = 0x0342; +TA0CCTL0_H = 0x0343; +TA0CCTL1 = 0x0344; +TA0CCTL1_L = 0x0344; +TA0CCTL1_H = 0x0345; +TA0CCTL2 = 0x0346; +TA0CCTL2_L = 0x0346; +TA0CCTL2_H = 0x0347; +TA0R = 0x0350; +TA0R_L = 0x0350; +TA0R_H = 0x0351; +TA0CCR0 = 0x0352; +TA0CCR0_L = 0x0352; +TA0CCR0_H = 0x0353; +TA0CCR1 = 0x0354; +TA0CCR1_L = 0x0354; +TA0CCR1_H = 0x0355; +TA0CCR2 = 0x0356; +TA0CCR2_L = 0x0356; +TA0CCR2_H = 0x0357; +TA0EX0 = 0x0360; +TA0EX0_L = 0x0360; +TA0EX0_H = 0x0361; +TA0IV = 0x036E; +TA0IV_L = 0x036E; +TA0IV_H = 0x036F; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x0380; +TA1CTL_L = 0x0380; +TA1CTL_H = 0x0381; +TA1CCTL0 = 0x0382; +TA1CCTL0_L = 0x0382; +TA1CCTL0_H = 0x0383; +TA1CCTL1 = 0x0384; +TA1CCTL1_L = 0x0384; +TA1CCTL1_H = 0x0385; +TA1CCTL2 = 0x0386; +TA1CCTL2_L = 0x0386; +TA1CCTL2_H = 0x0387; +TA1R = 0x0390; +TA1R_L = 0x0390; +TA1R_H = 0x0391; +TA1CCR0 = 0x0392; +TA1CCR0_L = 0x0392; +TA1CCR0_H = 0x0393; +TA1CCR1 = 0x0394; +TA1CCR1_L = 0x0394; +TA1CCR1_H = 0x0395; +TA1CCR2 = 0x0396; +TA1CCR2_L = 0x0396; +TA1CCR2_H = 0x0397; +TA1EX0 = 0x03A0; +TA1EX0_L = 0x03A0; +TA1EX0_H = 0x03A1; +TA1IV = 0x03AE; +TA1IV_L = 0x03AE; +TA1IV_H = 0x03AF; + + +/***************************************************************************** + TA2 +*****************************************************************************/ +TA2CTL = 0x0400; +TA2CTL_L = 0x0400; +TA2CTL_H = 0x0401; +TA2CCTL0 = 0x0402; +TA2CCTL0_L = 0x0402; +TA2CCTL0_H = 0x0403; +TA2CCTL1 = 0x0404; +TA2CCTL1_L = 0x0404; +TA2CCTL1_H = 0x0405; +TA2R = 0x0410; +TA2R_L = 0x0410; +TA2R_H = 0x0411; +TA2CCR0 = 0x0412; +TA2CCR0_L = 0x0412; +TA2CCR0_H = 0x0413; +TA2CCR1 = 0x0414; +TA2CCR1_L = 0x0414; +TA2CCR1_H = 0x0415; +TA2EX0 = 0x0420; +TA2EX0_L = 0x0420; +TA2EX0_H = 0x0421; +TA2IV = 0x042E; +TA2IV_L = 0x042E; +TA2IV_H = 0x042F; + + +/***************************************************************************** + TA3 +*****************************************************************************/ +TA3CTL = 0x0440; +TA3CTL_L = 0x0440; +TA3CTL_H = 0x0441; +TA3CCTL0 = 0x0442; +TA3CCTL0_L = 0x0442; +TA3CCTL0_H = 0x0443; +TA3CCTL1 = 0x0444; +TA3CCTL1_L = 0x0444; +TA3CCTL1_H = 0x0445; +TA3R = 0x0450; +TA3R_L = 0x0450; +TA3R_H = 0x0451; +TA3CCR0 = 0x0452; +TA3CCR0_L = 0x0452; +TA3CCR0_H = 0x0453; +TA3CCR1 = 0x0454; +TA3CCR1_L = 0x0454; +TA3CCR1_H = 0x0455; +TA3EX0 = 0x0460; +TA3EX0_L = 0x0460; +TA3EX0_H = 0x0461; +TA3IV = 0x046E; +TA3IV_L = 0x046E; +TA3IV_H = 0x046F; + + +/***************************************************************************** + TA4 +*****************************************************************************/ +TA4CTL = 0x07C0; +TA4CTL_L = 0x07C0; +TA4CTL_H = 0x07C1; +TA4CCTL0 = 0x07C2; +TA4CCTL0_L = 0x07C2; +TA4CCTL0_H = 0x07C3; +TA4CCTL1 = 0x07C4; +TA4CCTL1_L = 0x07C4; +TA4CCTL1_H = 0x07C5; +TA4R = 0x07D0; +TA4R_L = 0x07D0; +TA4R_H = 0x07D1; +TA4CCR0 = 0x07D2; +TA4CCR0_L = 0x07D2; +TA4CCR0_H = 0x07D3; +TA4CCR1 = 0x07D4; +TA4CCR1_L = 0x07D4; +TA4CCR1_H = 0x07D5; +TA4EX0 = 0x07E0; +TA4EX0_L = 0x07E0; +TA4EX0_H = 0x07E1; +TA4IV = 0x07EE; +TA4IV_L = 0x07EE; +TA4IV_H = 0x07EF; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x03C0; +TB0CTL_L = 0x03C0; +TB0CTL_H = 0x03C1; +TB0CCTL0 = 0x03C2; +TB0CCTL0_L = 0x03C2; +TB0CCTL0_H = 0x03C3; +TB0CCTL1 = 0x03C4; +TB0CCTL1_L = 0x03C4; +TB0CCTL1_H = 0x03C5; +TB0CCTL2 = 0x03C6; +TB0CCTL2_L = 0x03C6; +TB0CCTL2_H = 0x03C7; +TB0CCTL3 = 0x03C8; +TB0CCTL3_L = 0x03C8; +TB0CCTL3_H = 0x03C9; +TB0CCTL4 = 0x03CA; +TB0CCTL4_L = 0x03CA; +TB0CCTL4_H = 0x03CB; +TB0CCTL5 = 0x03CC; +TB0CCTL5_L = 0x03CC; +TB0CCTL5_H = 0x03CD; +TB0CCTL6 = 0x03CE; +TB0CCTL6_L = 0x03CE; +TB0CCTL6_H = 0x03CF; +TB0R = 0x03D0; +TB0R_L = 0x03D0; +TB0R_H = 0x03D1; +TB0CCR0 = 0x03D2; +TB0CCR0_L = 0x03D2; +TB0CCR0_H = 0x03D3; +TB0CCR1 = 0x03D4; +TB0CCR1_L = 0x03D4; +TB0CCR1_H = 0x03D5; +TB0CCR2 = 0x03D6; +TB0CCR2_L = 0x03D6; +TB0CCR2_H = 0x03D7; +TB0CCR3 = 0x03D8; +TB0CCR3_L = 0x03D8; +TB0CCR3_H = 0x03D9; +TB0CCR4 = 0x03DA; +TB0CCR4_L = 0x03DA; +TB0CCR4_H = 0x03DB; +TB0CCR5 = 0x03DC; +TB0CCR5_L = 0x03DC; +TB0CCR5_H = 0x03DD; +TB0CCR6 = 0x03DE; +TB0CCR6_L = 0x03DE; +TB0CCR6_H = 0x03DF; +TB0EX0 = 0x03E0; +TB0EX0_L = 0x03E0; +TB0EX0_H = 0x03E1; +TB0IV = 0x03EE; +TB0IV_L = 0x03EE; +TB0IV_H = 0x03EF; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0STATW_L = 0x05CA; +UCA0STATW_H = 0x05CB; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0ABCTL_L = 0x05D0; +UCA0ABCTL_H = 0x05D1; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +UCA0IV_L = 0x05DE; +UCA0IV_H = 0x05DF; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1STATW_L = 0x05EA; +UCA1STATW_H = 0x05EB; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1ABCTL_L = 0x05F0; +UCA1ABCTL_H = 0x05F1; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +UCA1IV_L = 0x05FE; +UCA1IV_H = 0x05FF; + + +/***************************************************************************** + eUSCI_A2 +*****************************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2STATW_L = 0x060A; +UCA2STATW_H = 0x060B; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2ABCTL_L = 0x0610; +UCA2ABCTL_H = 0x0611; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +UCA2IV_L = 0x061E; +UCA2IV_H = 0x061F; + + +/***************************************************************************** + eUSCI_A3 +*****************************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3STATW_L = 0x062A; +UCA3STATW_H = 0x062B; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3ABCTL_L = 0x0630; +UCA3ABCTL_H = 0x0631; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +UCA3IV_L = 0x063E; +UCA3IV_H = 0x063F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +UCB0IV_L = 0x066E; +UCB0IV_H = 0x066F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +UCB1IV_L = 0x06AE; +UCB1IV_H = 0x06AF; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr60371.cmd b/msp430/msp430fr60371.cmd new file mode 100644 index 00000000..c03132c1 --- /dev/null +++ b/msp430/msp430fr60371.cmd @@ -0,0 +1,1943 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr60371.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC12_B +*****************************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; + + +/***************************************************************************** + AES256 +*****************************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; + + +/***************************************************************************** + CAPTIO0 +*****************************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; + + +/***************************************************************************** + CAPTIO1 +*****************************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; + + +/***************************************************************************** + COMP_E +*****************************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; + + +/***************************************************************************** + CRC32 +*****************************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +P7IV = 0x026E; +P7IV_L = 0x026E; +P7IV_H = 0x026F; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +PDIES = 0x0278; +PDIES_L = 0x0278; +PDIES_H = 0x0279; +PDIE = 0x027A; +PDIE_L = 0x027A; +PDIE_H = 0x027B; +PDIFG = 0x027C; +PDIFG_L = 0x027C; +PDIFG_H = 0x027D; +P8IV = 0x027E; +P8IV_L = 0x027E; +P8IV_H = 0x027F; +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +P9IV = 0x028E; +P9IV_L = 0x028E; +P9IV_H = 0x028F; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +PEIES = 0x0298; +PEIES_L = 0x0298; +PEIES_H = 0x0299; +PEIE = 0x029A; +PEIE_L = 0x029A; +PEIE_H = 0x029B; +PEIFG = 0x029C; +PEIFG_L = 0x029C; +PEIFG_H = 0x029D; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + +P7IN = 0x0260; + +P8IN = 0x0261; + +P7OUT = 0x0262; + +P8OUT = 0x0263; + +P7DIR = 0x0264; + +P8DIR = 0x0265; + +P7REN = 0x0266; + +P8REN = 0x0267; + +P7SEL0 = 0x026A; + +P8SEL0 = 0x026B; + +P7SEL1 = 0x026C; + +P8SEL1 = 0x026D; + +P7SELC = 0x0276; + +P8SELC = 0x0277; + +P7IES = 0x0278; + +P8IES = 0x0279; + +P7IE = 0x027A; + +P8IE = 0x027B; + +P7IFG = 0x027C; + +P8IFG = 0x027D; + +P9IN = 0x0280; + +P9OUT = 0x0282; + +P9DIR = 0x0284; + +P9REN = 0x0286; + +P9SEL0 = 0x028A; + +P9SEL1 = 0x028C; + +P9SELC = 0x0296; + +P9IES = 0x0298; + +P9IE = 0x029A; + +P9IFG = 0x029C; + + + +/***************************************************************************** + DMA +*****************************************************************************/ +DMACTL0 = 0x0500; +DMACTL0_L = 0x0500; +DMACTL0_H = 0x0501; +DMACTL1 = 0x0502; +DMACTL1_L = 0x0502; +DMACTL1_H = 0x0503; +DMACTL2 = 0x0504; +DMACTL2_L = 0x0504; +DMACTL2_H = 0x0505; +DMACTL4 = 0x0508; +DMACTL4_L = 0x0508; +DMACTL4_H = 0x0509; +DMAIV = 0x050E; +DMAIV_L = 0x050E; +DMAIV_H = 0x050F; +DMA0CTL = 0x0510; +DMA0CTL_L = 0x0510; +DMA0CTL_H = 0x0511; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA0SZ_L = 0x051A; +DMA0SZ_H = 0x051B; +DMA1CTL = 0x0520; +DMA1CTL_L = 0x0520; +DMA1CTL_H = 0x0521; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA1SZ_L = 0x052A; +DMA1SZ_H = 0x052B; +DMA2CTL = 0x0530; +DMA2CTL_L = 0x0530; +DMA2CTL_H = 0x0531; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA2SZ_L = 0x053A; +DMA2SZ_H = 0x053B; +DMA3CTL = 0x0540; +DMA3CTL_L = 0x0540; +DMA3CTL_H = 0x0541; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA3SZ_L = 0x054A; +DMA3SZ_H = 0x054B; +DMA4CTL = 0x0550; +DMA4CTL_L = 0x0550; +DMA4CTL_H = 0x0551; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA4SZ_L = 0x055A; +DMA4SZ_H = 0x055B; +DMA5CTL = 0x0560; +DMA5CTL_L = 0x0560; +DMA5CTL_H = 0x0561; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +DMA5SZ_L = 0x056A; +DMA5SZ_H = 0x056B; + + +/***************************************************************************** + FRCTL_A +*****************************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; + + +/***************************************************************************** + LCD_C +*****************************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCPCTL3 = 0x0A10; +LCDCPCTL3_L = 0x0A10; +LCDCPCTL3_H = 0x0A11; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDCIV_L = 0x0A1E; +LCDCIV_H = 0x0A1F; +LCDM1 = 0x0A20; + +LCDM2 = 0x0A21; + +LCDM3 = 0x0A22; + +LCDM4 = 0x0A23; + +LCDM5 = 0x0A24; + +LCDM6 = 0x0A25; + +LCDM7 = 0x0A26; + +LCDM8 = 0x0A27; + +LCDM9 = 0x0A28; + +LCDM10 = 0x0A29; + +LCDM11 = 0x0A2A; + +LCDM12 = 0x0A2B; + +LCDM13 = 0x0A2C; + +LCDM14 = 0x0A2D; + +LCDM15 = 0x0A2E; + +LCDM16 = 0x0A2F; + +LCDM17 = 0x0A30; + +LCDM18 = 0x0A31; + +LCDM19 = 0x0A32; + +LCDM20 = 0x0A33; + +LCDM21 = 0x0A34; + +LCDM22 = 0x0A35; + +LCDM23 = 0x0A36; + +LCDM24 = 0x0A37; + +LCDM25 = 0x0A38; + +LCDM26 = 0x0A39; + +LCDM27 = 0x0A3A; + +LCDM28 = 0x0A3B; + +LCDM29 = 0x0A3C; + +LCDM30 = 0x0A3D; + +LCDM31 = 0x0A3E; + +LCDM32 = 0x0A3F; + +LCDM33_LCDBM1 = 0x0A40; + +LCDM34_LCDBM2 = 0x0A41; + +LCDM35_LCDBM3 = 0x0A42; + +LCDM36_LCDBM4 = 0x0A43; + +LCDM37_LCDBM5 = 0x0A44; + +LCDM38_LCDBM6 = 0x0A45; + +LCDM39_LCDBM7 = 0x0A46; + +LCDM40_LCDBM8 = 0x0A47; + +LCDM41_LCDBM9 = 0x0A48; + +LCDM42_LCDBM10 = 0x0A49; + +LCDM43_LCDBM11 = 0x0A4A; + +LCDM44_LCDBM12 = 0x0A4B; + +LCDM45_LCDBM13 = 0x0A4C; + +LCDM46_LCDBM14 = 0x0A4D; + +LCDM47_LCDBM15 = 0x0A4E; + +LCDM48_LCDBM16 = 0x0A4F; + +LCDM49_LCDBM17 = 0x0A50; + +LCDM50_LCDBM18 = 0x0A51; + +LCDM51_LCDBM19 = 0x0A52; + +LCDM52_LCDBM20 = 0x0A53; + + + +/***************************************************************************** + LEA +*****************************************************************************/ +LEACAP = 0x0A80; +LEACAPL = 0x0A80; +LEACAPH = 0x0A82; + +LEACNF0 = 0x0A84; +LEACNF0L = 0x0A84; +LEACNF0H = 0x0A86; + +LEACNF1 = 0x0A88; +LEACNF1L = 0x0A88; +LEACNF1H = 0x0A8A; + +LEACNF2 = 0x0A8C; +LEACNF2L = 0x0A8C; +LEACNF2H = 0x0A8E; + +LEAMB = 0x0A90; +LEAMBL = 0x0A90; +LEAMBH = 0x0A92; + +LEAMT = 0x0A94; +LEAMTL = 0x0A94; +LEAMTH = 0x0A96; + +LEACMA = 0x0A98; +LEACMAL = 0x0A98; +LEACMAH = 0x0A9A; + +LEACMCTL = 0x0A9C; +LEACMCTLL = 0x0A9C; +LEACMCTLH = 0x0A9E; + +LEACMDSTAT = 0x0AA8; +LEACMDSTATL = 0x0AA8; +LEACMDSTATH = 0x0AAA; + +LEAS1STAT = 0x0AAC; +LEAS1STATL = 0x0AAC; +LEAS1STATH = 0x0AAE; + +LEAS0STAT = 0x0AB0; +LEAS0STATL = 0x0AB0; +LEAS0STATH = 0x0AB2; + +LEADSTSTAT = 0x0AB4; +LEADSTSTATL = 0x0AB4; +LEADSTSTATH = 0x0AB6; + +LEAPMCTL = 0x0AC0; +LEAPMCTLL = 0x0AC0; +LEAPMCTLH = 0x0AC2; + +LEAPMDST = 0x0AC4; +LEAPMDSTL = 0x0AC4; +LEAPMDSTH = 0x0AC6; + +LEAPMS1 = 0x0AC8; +LEAPMS1L = 0x0AC8; +LEAPMS1H = 0x0ACA; + +LEAPMS0 = 0x0ACC; +LEAPMS0L = 0x0ACC; +LEAPMS0H = 0x0ACE; + +LEAPMCB = 0x0AD0; +LEAPMCBL = 0x0AD0; +LEAPMCBH = 0x0AD2; + +LEAIFGSET = 0x0AF0; +LEAIFGSETL = 0x0AF0; +LEAIFGSETH = 0x0AF2; + +LEAIE = 0x0AF4; +LEAIEL = 0x0AF4; +LEAIEH = 0x0AF6; + +LEAIFG = 0x0AF8; +LEAIFGL = 0x0AF8; +LEAIFGH = 0x0AFA; + +LEAIV = 0x0AFC; +LEAIVL = 0x0AFC; +LEAIVH = 0x0AFE; + + + +/***************************************************************************** + MPU +*****************************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + MTIF +*****************************************************************************/ +MTIFPGCNF = 0x0F00; +MTIFPGCNF_L = 0x0F00; +MTIFPGCNF_H = 0x0F01; +MTIFPGKVAL = 0x0F02; +MTIFPGKVAL_L = 0x0F02; +MTIFPGKVAL_H = 0x0F03; +MTIFPGCTL = 0x0F04; +MTIFPGCTL_L = 0x0F04; +MTIFPGCTL_H = 0x0F05; +MTIFPGSR = 0x0F06; +MTIFPGSR_L = 0x0F06; +MTIFPGSR_H = 0x0F07; +MTIFPCCNF = 0x0F08; +MTIFPCCNF_L = 0x0F08; +MTIFPCCNF_H = 0x0F09; +MTIFPCR = 0x0F0A; +MTIFPCR_L = 0x0F0A; +MTIFPCR_H = 0x0F0B; +MTIFPCCTL = 0x0F0C; +MTIFPCCTL_L = 0x0F0C; +MTIFPCCTL_H = 0x0F0D; +MTIFPCSR = 0x0F0E; +MTIFPCSR_L = 0x0F0E; +MTIFPCSR_H = 0x0F0F; +MTIFTPCTL = 0x0F10; +MTIFTPCTL_L = 0x0F10; +MTIFTPCTL_H = 0x0F11; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RAMCTL +*****************************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +RCCTL1 = 0x015A; +RCCTL1_L = 0x015A; +RCCTL1_H = 0x015B; + + +/***************************************************************************** + REF_A +*****************************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; + + +/***************************************************************************** + RTC_C +*****************************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCIV_L = 0x04AE; +RTCIV_H = 0x04AF; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCCNT12 = 0x04B0; +RTCCNT12_L = 0x04B0; +RTCCNT12_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCCNT34 = 0x04B2; +RTCCNT34_L = 0x04B2; +RTCCNT34_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BIN2BCD_L = 0x04BC; +BIN2BCD_H = 0x04BD; +BCD2BIN = 0x04BE; +BCD2BIN_L = 0x04BE; +BCD2BIN_H = 0x04BF; +RT0PS = 0x04AC; + +RT1PS = 0x04AD; + +RTCCNT1 = 0x04B0; + +RTCCNT2 = 0x04B1; + +RTCCNT3 = 0x04B2; + +RTCCNT4 = 0x04B3; + + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0340; +TA0CTL_L = 0x0340; +TA0CTL_H = 0x0341; +TA0CCTL0 = 0x0342; +TA0CCTL0_L = 0x0342; +TA0CCTL0_H = 0x0343; +TA0CCTL1 = 0x0344; +TA0CCTL1_L = 0x0344; +TA0CCTL1_H = 0x0345; +TA0CCTL2 = 0x0346; +TA0CCTL2_L = 0x0346; +TA0CCTL2_H = 0x0347; +TA0R = 0x0350; +TA0R_L = 0x0350; +TA0R_H = 0x0351; +TA0CCR0 = 0x0352; +TA0CCR0_L = 0x0352; +TA0CCR0_H = 0x0353; +TA0CCR1 = 0x0354; +TA0CCR1_L = 0x0354; +TA0CCR1_H = 0x0355; +TA0CCR2 = 0x0356; +TA0CCR2_L = 0x0356; +TA0CCR2_H = 0x0357; +TA0EX0 = 0x0360; +TA0EX0_L = 0x0360; +TA0EX0_H = 0x0361; +TA0IV = 0x036E; +TA0IV_L = 0x036E; +TA0IV_H = 0x036F; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x0380; +TA1CTL_L = 0x0380; +TA1CTL_H = 0x0381; +TA1CCTL0 = 0x0382; +TA1CCTL0_L = 0x0382; +TA1CCTL0_H = 0x0383; +TA1CCTL1 = 0x0384; +TA1CCTL1_L = 0x0384; +TA1CCTL1_H = 0x0385; +TA1CCTL2 = 0x0386; +TA1CCTL2_L = 0x0386; +TA1CCTL2_H = 0x0387; +TA1R = 0x0390; +TA1R_L = 0x0390; +TA1R_H = 0x0391; +TA1CCR0 = 0x0392; +TA1CCR0_L = 0x0392; +TA1CCR0_H = 0x0393; +TA1CCR1 = 0x0394; +TA1CCR1_L = 0x0394; +TA1CCR1_H = 0x0395; +TA1CCR2 = 0x0396; +TA1CCR2_L = 0x0396; +TA1CCR2_H = 0x0397; +TA1EX0 = 0x03A0; +TA1EX0_L = 0x03A0; +TA1EX0_H = 0x03A1; +TA1IV = 0x03AE; +TA1IV_L = 0x03AE; +TA1IV_H = 0x03AF; + + +/***************************************************************************** + TA2 +*****************************************************************************/ +TA2CTL = 0x0400; +TA2CTL_L = 0x0400; +TA2CTL_H = 0x0401; +TA2CCTL0 = 0x0402; +TA2CCTL0_L = 0x0402; +TA2CCTL0_H = 0x0403; +TA2CCTL1 = 0x0404; +TA2CCTL1_L = 0x0404; +TA2CCTL1_H = 0x0405; +TA2R = 0x0410; +TA2R_L = 0x0410; +TA2R_H = 0x0411; +TA2CCR0 = 0x0412; +TA2CCR0_L = 0x0412; +TA2CCR0_H = 0x0413; +TA2CCR1 = 0x0414; +TA2CCR1_L = 0x0414; +TA2CCR1_H = 0x0415; +TA2EX0 = 0x0420; +TA2EX0_L = 0x0420; +TA2EX0_H = 0x0421; +TA2IV = 0x042E; +TA2IV_L = 0x042E; +TA2IV_H = 0x042F; + + +/***************************************************************************** + TA3 +*****************************************************************************/ +TA3CTL = 0x0440; +TA3CTL_L = 0x0440; +TA3CTL_H = 0x0441; +TA3CCTL0 = 0x0442; +TA3CCTL0_L = 0x0442; +TA3CCTL0_H = 0x0443; +TA3CCTL1 = 0x0444; +TA3CCTL1_L = 0x0444; +TA3CCTL1_H = 0x0445; +TA3R = 0x0450; +TA3R_L = 0x0450; +TA3R_H = 0x0451; +TA3CCR0 = 0x0452; +TA3CCR0_L = 0x0452; +TA3CCR0_H = 0x0453; +TA3CCR1 = 0x0454; +TA3CCR1_L = 0x0454; +TA3CCR1_H = 0x0455; +TA3EX0 = 0x0460; +TA3EX0_L = 0x0460; +TA3EX0_H = 0x0461; +TA3IV = 0x046E; +TA3IV_L = 0x046E; +TA3IV_H = 0x046F; + + +/***************************************************************************** + TA4 +*****************************************************************************/ +TA4CTL = 0x07C0; +TA4CTL_L = 0x07C0; +TA4CTL_H = 0x07C1; +TA4CCTL0 = 0x07C2; +TA4CCTL0_L = 0x07C2; +TA4CCTL0_H = 0x07C3; +TA4CCTL1 = 0x07C4; +TA4CCTL1_L = 0x07C4; +TA4CCTL1_H = 0x07C5; +TA4R = 0x07D0; +TA4R_L = 0x07D0; +TA4R_H = 0x07D1; +TA4CCR0 = 0x07D2; +TA4CCR0_L = 0x07D2; +TA4CCR0_H = 0x07D3; +TA4CCR1 = 0x07D4; +TA4CCR1_L = 0x07D4; +TA4CCR1_H = 0x07D5; +TA4EX0 = 0x07E0; +TA4EX0_L = 0x07E0; +TA4EX0_H = 0x07E1; +TA4IV = 0x07EE; +TA4IV_L = 0x07EE; +TA4IV_H = 0x07EF; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x03C0; +TB0CTL_L = 0x03C0; +TB0CTL_H = 0x03C1; +TB0CCTL0 = 0x03C2; +TB0CCTL0_L = 0x03C2; +TB0CCTL0_H = 0x03C3; +TB0CCTL1 = 0x03C4; +TB0CCTL1_L = 0x03C4; +TB0CCTL1_H = 0x03C5; +TB0CCTL2 = 0x03C6; +TB0CCTL2_L = 0x03C6; +TB0CCTL2_H = 0x03C7; +TB0CCTL3 = 0x03C8; +TB0CCTL3_L = 0x03C8; +TB0CCTL3_H = 0x03C9; +TB0CCTL4 = 0x03CA; +TB0CCTL4_L = 0x03CA; +TB0CCTL4_H = 0x03CB; +TB0CCTL5 = 0x03CC; +TB0CCTL5_L = 0x03CC; +TB0CCTL5_H = 0x03CD; +TB0CCTL6 = 0x03CE; +TB0CCTL6_L = 0x03CE; +TB0CCTL6_H = 0x03CF; +TB0R = 0x03D0; +TB0R_L = 0x03D0; +TB0R_H = 0x03D1; +TB0CCR0 = 0x03D2; +TB0CCR0_L = 0x03D2; +TB0CCR0_H = 0x03D3; +TB0CCR1 = 0x03D4; +TB0CCR1_L = 0x03D4; +TB0CCR1_H = 0x03D5; +TB0CCR2 = 0x03D6; +TB0CCR2_L = 0x03D6; +TB0CCR2_H = 0x03D7; +TB0CCR3 = 0x03D8; +TB0CCR3_L = 0x03D8; +TB0CCR3_H = 0x03D9; +TB0CCR4 = 0x03DA; +TB0CCR4_L = 0x03DA; +TB0CCR4_H = 0x03DB; +TB0CCR5 = 0x03DC; +TB0CCR5_L = 0x03DC; +TB0CCR5_H = 0x03DD; +TB0CCR6 = 0x03DE; +TB0CCR6_L = 0x03DE; +TB0CCR6_H = 0x03DF; +TB0EX0 = 0x03E0; +TB0EX0_L = 0x03E0; +TB0EX0_H = 0x03E1; +TB0IV = 0x03EE; +TB0IV_L = 0x03EE; +TB0IV_H = 0x03EF; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0STATW_L = 0x05CA; +UCA0STATW_H = 0x05CB; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0ABCTL_L = 0x05D0; +UCA0ABCTL_H = 0x05D1; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +UCA0IV_L = 0x05DE; +UCA0IV_H = 0x05DF; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1STATW_L = 0x05EA; +UCA1STATW_H = 0x05EB; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1ABCTL_L = 0x05F0; +UCA1ABCTL_H = 0x05F1; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +UCA1IV_L = 0x05FE; +UCA1IV_H = 0x05FF; + + +/***************************************************************************** + eUSCI_A2 +*****************************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2STATW_L = 0x060A; +UCA2STATW_H = 0x060B; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2ABCTL_L = 0x0610; +UCA2ABCTL_H = 0x0611; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +UCA2IV_L = 0x061E; +UCA2IV_H = 0x061F; + + +/***************************************************************************** + eUSCI_A3 +*****************************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3STATW_L = 0x062A; +UCA3STATW_H = 0x062B; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3ABCTL_L = 0x0630; +UCA3ABCTL_H = 0x0631; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +UCA3IV_L = 0x063E; +UCA3IV_H = 0x063F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +UCB0IV_L = 0x066E; +UCB0IV_H = 0x066F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +UCB1IV_L = 0x06AE; +UCB1IV_H = 0x06AF; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr6041.cmd b/msp430/msp430fr6041.cmd new file mode 100644 index 00000000..cec9a59f --- /dev/null +++ b/msp430/msp430fr6041.cmd @@ -0,0 +1,2214 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr6041.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC12_B +*****************************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; + + +/***************************************************************************** + AES256 +*****************************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; + + +/***************************************************************************** + CAPTIO0 +*****************************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; + + +/***************************************************************************** + CAPTIO1 +*****************************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; + + +/***************************************************************************** + COMP_E +*****************************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; + + +/***************************************************************************** + CRC32 +*****************************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +P7IV = 0x026E; +P7IV_L = 0x026E; +P7IV_H = 0x026F; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +PDIES = 0x0278; +PDIES_L = 0x0278; +PDIES_H = 0x0279; +PDIE = 0x027A; +PDIE_L = 0x027A; +PDIE_H = 0x027B; +PDIFG = 0x027C; +PDIFG_L = 0x027C; +PDIFG_H = 0x027D; +P8IV = 0x027E; +P8IV_L = 0x027E; +P8IV_H = 0x027F; +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +P9IV = 0x028E; +P9IV_L = 0x028E; +P9IV_H = 0x028F; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +PEIES = 0x0298; +PEIES_L = 0x0298; +PEIES_H = 0x0299; +PEIE = 0x029A; +PEIE_L = 0x029A; +PEIE_H = 0x029B; +PEIFG = 0x029C; +PEIFG_L = 0x029C; +PEIFG_H = 0x029D; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + +P7IN = 0x0260; + +P8IN = 0x0261; + +P7OUT = 0x0262; + +P8OUT = 0x0263; + +P7DIR = 0x0264; + +P8DIR = 0x0265; + +P7REN = 0x0266; + +P8REN = 0x0267; + +P7SEL0 = 0x026A; + +P8SEL0 = 0x026B; + +P7SEL1 = 0x026C; + +P8SEL1 = 0x026D; + +P7SELC = 0x0276; + +P8SELC = 0x0277; + +P7IES = 0x0278; + +P8IES = 0x0279; + +P7IE = 0x027A; + +P8IE = 0x027B; + +P7IFG = 0x027C; + +P8IFG = 0x027D; + +P9IN = 0x0280; + +P9OUT = 0x0282; + +P9DIR = 0x0284; + +P9REN = 0x0286; + +P9SEL0 = 0x028A; + +P9SEL1 = 0x028C; + +P9SELC = 0x0296; + +P9IES = 0x0298; + +P9IE = 0x029A; + +P9IFG = 0x029C; + + + +/***************************************************************************** + DMA +*****************************************************************************/ +DMACTL0 = 0x0500; +DMACTL0_L = 0x0500; +DMACTL0_H = 0x0501; +DMACTL1 = 0x0502; +DMACTL1_L = 0x0502; +DMACTL1_H = 0x0503; +DMACTL2 = 0x0504; +DMACTL2_L = 0x0504; +DMACTL2_H = 0x0505; +DMACTL4 = 0x0508; +DMACTL4_L = 0x0508; +DMACTL4_H = 0x0509; +DMAIV = 0x050E; +DMAIV_L = 0x050E; +DMAIV_H = 0x050F; +DMA0CTL = 0x0510; +DMA0CTL_L = 0x0510; +DMA0CTL_H = 0x0511; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA0SZ_L = 0x051A; +DMA0SZ_H = 0x051B; +DMA1CTL = 0x0520; +DMA1CTL_L = 0x0520; +DMA1CTL_H = 0x0521; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA1SZ_L = 0x052A; +DMA1SZ_H = 0x052B; +DMA2CTL = 0x0530; +DMA2CTL_L = 0x0530; +DMA2CTL_H = 0x0531; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA2SZ_L = 0x053A; +DMA2SZ_H = 0x053B; +DMA3CTL = 0x0540; +DMA3CTL_L = 0x0540; +DMA3CTL_H = 0x0541; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA3SZ_L = 0x054A; +DMA3SZ_H = 0x054B; +DMA4CTL = 0x0550; +DMA4CTL_L = 0x0550; +DMA4CTL_H = 0x0551; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA4SZ_L = 0x055A; +DMA4SZ_H = 0x055B; +DMA5CTL = 0x0560; +DMA5CTL_L = 0x0560; +DMA5CTL_H = 0x0561; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +DMA5SZ_L = 0x056A; +DMA5SZ_H = 0x056B; + + +/***************************************************************************** + FRCTL_A +*****************************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; + + +/***************************************************************************** + HSPLL +*****************************************************************************/ +HSPLLIIDX = 0x0EE0; +HSPLLIIDX_L = 0x0EE0; +HSPLLIIDX_H = 0x0EE1; +HSPLLMIS = 0x0EE2; +HSPLLMIS_L = 0x0EE2; +HSPLLMIS_H = 0x0EE3; +HSPLLRIS = 0x0EE4; +HSPLLRIS_L = 0x0EE4; +HSPLLRIS_H = 0x0EE5; +HSPLLIMSC = 0x0EE6; +HSPLLIMSC_L = 0x0EE6; +HSPLLIMSC_H = 0x0EE7; +HSPLLICR = 0x0EE8; +HSPLLICR_L = 0x0EE8; +HSPLLICR_H = 0x0EE9; +HSPLLISR = 0x0EEA; +HSPLLISR_L = 0x0EEA; +HSPLLISR_H = 0x0EEB; +HSPLLDESCLO = 0x0EEC; +HSPLLDESCLO_L = 0x0EEC; +HSPLLDESCLO_H = 0x0EED; +HSPLLDESCHI = 0x0EEE; +HSPLLDESCHI_L = 0x0EEE; +HSPLLDESCHI_H = 0x0EEF; +HSPLLCTL = 0x0EF0; +HSPLLCTL_L = 0x0EF0; +HSPLLCTL_H = 0x0EF1; +HSPLLUSSXTLCTL = 0x0EF2; +HSPLLUSSXTLCTL_L = 0x0EF2; +HSPLLUSSXTLCTL_H = 0x0EF3; + + +/***************************************************************************** + LCD_C +*****************************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCPCTL3 = 0x0A10; +LCDCPCTL3_L = 0x0A10; +LCDCPCTL3_H = 0x0A11; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDCIV_L = 0x0A1E; +LCDCIV_H = 0x0A1F; +LCDM1 = 0x0A20; + +LCDM2 = 0x0A21; + +LCDM3 = 0x0A22; + +LCDM4 = 0x0A23; + +LCDM5 = 0x0A24; + +LCDM6 = 0x0A25; + +LCDM7 = 0x0A26; + +LCDM8 = 0x0A27; + +LCDM9 = 0x0A28; + +LCDM10 = 0x0A29; + +LCDM11 = 0x0A2A; + +LCDM12 = 0x0A2B; + +LCDM13 = 0x0A2C; + +LCDM14 = 0x0A2D; + +LCDM15 = 0x0A2E; + +LCDM16 = 0x0A2F; + +LCDM17 = 0x0A30; + +LCDM18 = 0x0A31; + +LCDM19 = 0x0A32; + +LCDM20 = 0x0A33; + +LCDM21 = 0x0A34; + +LCDM22 = 0x0A35; + +LCDM23 = 0x0A36; + +LCDM24 = 0x0A37; + +LCDM25 = 0x0A38; + +LCDM26 = 0x0A39; + +LCDM27 = 0x0A3A; + +LCDM28 = 0x0A3B; + +LCDM29 = 0x0A3C; + +LCDM30 = 0x0A3D; + +LCDM31 = 0x0A3E; + +LCDM32 = 0x0A3F; + +LCDM33_LCDBM1 = 0x0A40; + +LCDM34_LCDBM2 = 0x0A41; + +LCDM35_LCDBM3 = 0x0A42; + +LCDM36_LCDBM4 = 0x0A43; + +LCDM37_LCDBM5 = 0x0A44; + +LCDM38_LCDBM6 = 0x0A45; + +LCDM39_LCDBM7 = 0x0A46; + +LCDM40_LCDBM8 = 0x0A47; + +LCDM41_LCDBM9 = 0x0A48; + +LCDM42_LCDBM10 = 0x0A49; + +LCDM43_LCDBM11 = 0x0A4A; + +LCDM44_LCDBM12 = 0x0A4B; + +LCDM45_LCDBM13 = 0x0A4C; + +LCDM46_LCDBM14 = 0x0A4D; + +LCDM47_LCDBM15 = 0x0A4E; + +LCDM48_LCDBM16 = 0x0A4F; + +LCDM49_LCDBM17 = 0x0A50; + +LCDM50_LCDBM18 = 0x0A51; + +LCDM51_LCDBM19 = 0x0A52; + +LCDM52_LCDBM20 = 0x0A53; + + + +/***************************************************************************** + LEA +*****************************************************************************/ +LEACAP = 0x0A80; +LEACAPL = 0x0A80; +LEACAPH = 0x0A82; + +LEACNF0 = 0x0A84; +LEACNF0L = 0x0A84; +LEACNF0H = 0x0A86; + +LEACNF1 = 0x0A88; +LEACNF1L = 0x0A88; +LEACNF1H = 0x0A8A; + +LEACNF2 = 0x0A8C; +LEACNF2L = 0x0A8C; +LEACNF2H = 0x0A8E; + +LEAMB = 0x0A90; +LEAMBL = 0x0A90; +LEAMBH = 0x0A92; + +LEAMT = 0x0A94; +LEAMTL = 0x0A94; +LEAMTH = 0x0A96; + +LEACMA = 0x0A98; +LEACMAL = 0x0A98; +LEACMAH = 0x0A9A; + +LEACMCTL = 0x0A9C; +LEACMCTLL = 0x0A9C; +LEACMCTLH = 0x0A9E; + +LEACMDSTAT = 0x0AA8; +LEACMDSTATL = 0x0AA8; +LEACMDSTATH = 0x0AAA; + +LEAS1STAT = 0x0AAC; +LEAS1STATL = 0x0AAC; +LEAS1STATH = 0x0AAE; + +LEAS0STAT = 0x0AB0; +LEAS0STATL = 0x0AB0; +LEAS0STATH = 0x0AB2; + +LEADSTSTAT = 0x0AB4; +LEADSTSTATL = 0x0AB4; +LEADSTSTATH = 0x0AB6; + +LEAPMCTL = 0x0AC0; +LEAPMCTLL = 0x0AC0; +LEAPMCTLH = 0x0AC2; + +LEAPMDST = 0x0AC4; +LEAPMDSTL = 0x0AC4; +LEAPMDSTH = 0x0AC6; + +LEAPMS1 = 0x0AC8; +LEAPMS1L = 0x0AC8; +LEAPMS1H = 0x0ACA; + +LEAPMS0 = 0x0ACC; +LEAPMS0L = 0x0ACC; +LEAPMS0H = 0x0ACE; + +LEAPMCB = 0x0AD0; +LEAPMCBL = 0x0AD0; +LEAPMCBH = 0x0AD2; + +LEAIFGSET = 0x0AF0; +LEAIFGSETL = 0x0AF0; +LEAIFGSETH = 0x0AF2; + +LEAIE = 0x0AF4; +LEAIEL = 0x0AF4; +LEAIEH = 0x0AF6; + +LEAIFG = 0x0AF8; +LEAIFGL = 0x0AF8; +LEAIFGH = 0x0AFA; + +LEAIV = 0x0AFC; +LEAIVL = 0x0AFC; +LEAIVH = 0x0AFE; + + + +/***************************************************************************** + MPU +*****************************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + MTIF +*****************************************************************************/ +MTIFPGCNF = 0x0F00; +MTIFPGCNF_L = 0x0F00; +MTIFPGCNF_H = 0x0F01; +MTIFPGKVAL = 0x0F02; +MTIFPGKVAL_L = 0x0F02; +MTIFPGKVAL_H = 0x0F03; +MTIFPGCTL = 0x0F04; +MTIFPGCTL_L = 0x0F04; +MTIFPGCTL_H = 0x0F05; +MTIFPGSR = 0x0F06; +MTIFPGSR_L = 0x0F06; +MTIFPGSR_H = 0x0F07; +MTIFPCCNF = 0x0F08; +MTIFPCCNF_L = 0x0F08; +MTIFPCCNF_H = 0x0F09; +MTIFPCR = 0x0F0A; +MTIFPCR_L = 0x0F0A; +MTIFPCR_H = 0x0F0B; +MTIFPCCTL = 0x0F0C; +MTIFPCCTL_L = 0x0F0C; +MTIFPCCTL_H = 0x0F0D; +MTIFPCSR = 0x0F0E; +MTIFPCSR_L = 0x0F0E; +MTIFPCSR_H = 0x0F0F; +MTIFTPCTL = 0x0F10; +MTIFTPCTL_L = 0x0F10; +MTIFTPCTL_H = 0x0F11; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RAMCTL +*****************************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +RCCTL1 = 0x015A; +RCCTL1_L = 0x015A; +RCCTL1_H = 0x015B; + + +/***************************************************************************** + REF_A +*****************************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; + + +/***************************************************************************** + RTC_C +*****************************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCIV_L = 0x04AE; +RTCIV_H = 0x04AF; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCCNT12 = 0x04B0; +RTCCNT12_L = 0x04B0; +RTCCNT12_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCCNT34 = 0x04B2; +RTCCNT34_L = 0x04B2; +RTCCNT34_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BIN2BCD_L = 0x04BC; +BIN2BCD_H = 0x04BD; +BCD2BIN = 0x04BE; +BCD2BIN_L = 0x04BE; +BCD2BIN_H = 0x04BF; +RT0PS = 0x04AC; + +RT1PS = 0x04AD; + +RTCCNT1 = 0x04B0; + +RTCCNT2 = 0x04B1; + +RTCCNT3 = 0x04B2; + +RTCCNT4 = 0x04B3; + + + +/***************************************************************************** + SAPH_A +*****************************************************************************/ +SAPH_AIIDX = 0x0E00; +SAPH_AIIDX_L = 0x0E00; +SAPH_AIIDX_H = 0x0E01; +SAPH_AMIS = 0x0E02; +SAPH_AMIS_L = 0x0E02; +SAPH_AMIS_H = 0x0E03; +SAPH_ARIS = 0x0E04; +SAPH_ARIS_L = 0x0E04; +SAPH_ARIS_H = 0x0E05; +SAPH_AIMSC = 0x0E06; +SAPH_AIMSC_L = 0x0E06; +SAPH_AIMSC_H = 0x0E07; +SAPH_AICR = 0x0E08; +SAPH_AICR_L = 0x0E08; +SAPH_AICR_H = 0x0E09; +SAPH_AISR = 0x0E0A; +SAPH_AISR_L = 0x0E0A; +SAPH_AISR_H = 0x0E0B; +SAPH_ADESCLO = 0x0E0C; +SAPH_ADESCLO_L = 0x0E0C; +SAPH_ADESCLO_H = 0x0E0D; +SAPH_ADESCHI = 0x0E0E; +SAPH_ADESCHI_L = 0x0E0E; +SAPH_ADESCHI_H = 0x0E0F; +SAPH_AKEY = 0x0E10; +SAPH_AKEY_L = 0x0E10; +SAPH_AKEY_H = 0x0E11; +SAPH_AOCTL0 = 0x0E12; +SAPH_AOCTL0_L = 0x0E12; +SAPH_AOCTL0_H = 0x0E13; +SAPH_AOCTL1 = 0x0E14; +SAPH_AOCTL1_L = 0x0E14; +SAPH_AOCTL1_H = 0x0E15; +SAPH_AOSEL = 0x0E16; +SAPH_AOSEL_L = 0x0E16; +SAPH_AOSEL_H = 0x0E17; +SAPH_ACH0PUT = 0x0E20; +SAPH_ACH0PUT_L = 0x0E20; +SAPH_ACH0PUT_H = 0x0E21; +SAPH_ACH0PDT = 0x0E22; +SAPH_ACH0PDT_L = 0x0E22; +SAPH_ACH0PDT_H = 0x0E23; +SAPH_ACH0TT = 0x0E24; +SAPH_ACH0TT_L = 0x0E24; +SAPH_ACH0TT_H = 0x0E25; +SAPH_ACH1PUT = 0x0E26; +SAPH_ACH1PUT_L = 0x0E26; +SAPH_ACH1PUT_H = 0x0E27; +SAPH_ACH1PDT = 0x0E28; +SAPH_ACH1PDT_L = 0x0E28; +SAPH_ACH1PDT_H = 0x0E29; +SAPH_ACH1TT = 0x0E2A; +SAPH_ACH1TT_L = 0x0E2A; +SAPH_ACH1TT_H = 0x0E2B; +SAPH_AMCNF = 0x0E2C; +SAPH_AMCNF_L = 0x0E2C; +SAPH_AMCNF_H = 0x0E2D; +SAPH_ATACTL = 0x0E2E; +SAPH_ATACTL_L = 0x0E2E; +SAPH_ATACTL_H = 0x0E2F; +SAPH_AICTL0 = 0x0E30; +SAPH_AICTL0_L = 0x0E30; +SAPH_AICTL0_H = 0x0E31; +SAPH_ABCTL = 0x0E34; +SAPH_ABCTL_L = 0x0E34; +SAPH_ABCTL_H = 0x0E35; +SAPH_APGC = 0x0E40; +SAPH_APGC_L = 0x0E40; +SAPH_APGC_H = 0x0E41; +SAPH_APGLPER = 0x0E42; +SAPH_APGLPER_L = 0x0E42; +SAPH_APGLPER_H = 0x0E43; +SAPH_APGHPER = 0x0E44; +SAPH_APGHPER_L = 0x0E44; +SAPH_APGHPER_H = 0x0E45; +SAPH_APGCTL = 0x0E46; +SAPH_APGCTL_L = 0x0E46; +SAPH_APGCTL_H = 0x0E47; +SAPH_APPGTRIG = 0x0E48; +SAPH_APPGTRIG_L = 0x0E48; +SAPH_APPGTRIG_H = 0x0E49; +SAPH_AXPGCTL = 0x0E4A; +SAPH_AXPGCTL_L = 0x0E4A; +SAPH_AXPGCTL_H = 0x0E4B; +SAPH_AXPGLPER = 0x0E4C; +SAPH_AXPGLPER_L = 0x0E4C; +SAPH_AXPGLPER_H = 0x0E4D; +SAPH_AXPGHPER = 0x0E4E; +SAPH_AXPGHPER_L = 0x0E4E; +SAPH_AXPGHPER_H = 0x0E4F; +SAPH_AASCTL0 = 0x0E60; +SAPH_AASCTL0_L = 0x0E60; +SAPH_AASCTL0_H = 0x0E61; +SAPH_AASCTL1 = 0x0E62; +SAPH_AASCTL1_L = 0x0E62; +SAPH_AASCTL1_H = 0x0E63; +SAPH_AASQTRIG = 0x0E64; + +SAPH_AAPOL = 0x0E66; +SAPH_AAPOL_L = 0x0E66; +SAPH_AAPOL_H = 0x0E67; +SAPH_AAPLEV = 0x0E68; +SAPH_AAPLEV_L = 0x0E68; +SAPH_AAPLEV_H = 0x0E69; +SAPH_AAPHIZ = 0x0E6A; +SAPH_AAPHIZ_L = 0x0E6A; +SAPH_AAPHIZ_H = 0x0E6B; +SAPH_AATM_A = 0x0E6E; +SAPH_AATM_A_L = 0x0E6E; +SAPH_AATM_A_H = 0x0E6F; +SAPH_AATM_B = 0x0E70; +SAPH_AATM_B_L = 0x0E70; +SAPH_AATM_B_H = 0x0E71; +SAPH_AATM_C = 0x0E72; +SAPH_AATM_C_L = 0x0E72; +SAPH_AATM_C_H = 0x0E73; +SAPH_AATM_D = 0x0E74; +SAPH_AATM_D_L = 0x0E74; +SAPH_AATM_D_H = 0x0E75; +SAPH_AATM_E = 0x0E76; +SAPH_AATM_E_L = 0x0E76; +SAPH_AATM_E_H = 0x0E77; +SAPH_AATM_F = 0x0E78; +SAPH_AATM_F_L = 0x0E78; +SAPH_AATM_F_H = 0x0E79; +SAPH_ATBCTL = 0x0E7A; +SAPH_ATBCTL_L = 0x0E7A; +SAPH_ATBCTL_H = 0x0E7B; +SAPH_AATIMLO = 0x0E7C; +SAPH_AATIMLO_L = 0x0E7C; +SAPH_AATIMLO_H = 0x0E7D; +SAPH_AATIMHI = 0x0E7E; +SAPH_AATIMHI_L = 0x0E7E; +SAPH_AATIMHI_H = 0x0E7F; + + +/***************************************************************************** + SDHS +*****************************************************************************/ +SDHSIIDX = 0x0E80; +SDHSIIDX_L = 0x0E80; +SDHSIIDX_H = 0x0E81; +SDHSMIS = 0x0E82; +SDHSMIS_L = 0x0E82; +SDHSMIS_H = 0x0E83; +SDHSRIS = 0x0E84; +SDHSRIS_L = 0x0E84; +SDHSRIS_H = 0x0E85; +SDHSIMSC = 0x0E86; +SDHSIMSC_L = 0x0E86; +SDHSIMSC_H = 0x0E87; +SDHSICR = 0x0E88; +SDHSICR_L = 0x0E88; +SDHSICR_H = 0x0E89; +SDHSISR = 0x0E8A; +SDHSISR_L = 0x0E8A; +SDHSISR_H = 0x0E8B; +SDHSDESCLO = 0x0E8C; +SDHSDESCLO_L = 0x0E8C; +SDHSDESCLO_H = 0x0E8D; +SDHSDESCHI = 0x0E8E; +SDHSDESCHI_L = 0x0E8E; +SDHSDESCHI_H = 0x0E8F; +SDHSCTL0 = 0x0E90; +SDHSCTL0_L = 0x0E90; +SDHSCTL0_H = 0x0E91; +SDHSCTL1 = 0x0E92; +SDHSCTL1_L = 0x0E92; +SDHSCTL1_H = 0x0E93; +SDHSCTL2 = 0x0E94; +SDHSCTL2_L = 0x0E94; +SDHSCTL2_H = 0x0E95; +SDHSCTL3 = 0x0E96; +SDHSCTL3_L = 0x0E96; +SDHSCTL3_H = 0x0E97; +SDHSCTL4 = 0x0E98; +SDHSCTL4_L = 0x0E98; +SDHSCTL4_H = 0x0E99; +SDHSCTL5 = 0x0E9A; +SDHSCTL5_L = 0x0E9A; +SDHSCTL5_H = 0x0E9B; +SDHSCTL6 = 0x0E9C; +SDHSCTL6_L = 0x0E9C; +SDHSCTL6_H = 0x0E9D; +SDHSCTL7 = 0x0E9E; +SDHSCTL7_L = 0x0E9E; +SDHSCTL7_H = 0x0E9F; +SDHSDT = 0x0EA2; +SDHSDT_L = 0x0EA2; +SDHSDT_H = 0x0EA3; +SDHSWINHITH = 0x0EA4; +SDHSWINHITH_L = 0x0EA4; +SDHSWINHITH_H = 0x0EA5; +SDHSWINLOTH = 0x0EA6; +SDHSWINLOTH_L = 0x0EA6; +SDHSWINLOTH_H = 0x0EA7; +SDHSDTCDA = 0x0EA8; +SDHSDTCDA_L = 0x0EA8; +SDHSDTCDA_H = 0x0EA9; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0340; +TA0CTL_L = 0x0340; +TA0CTL_H = 0x0341; +TA0CCTL0 = 0x0342; +TA0CCTL0_L = 0x0342; +TA0CCTL0_H = 0x0343; +TA0CCTL1 = 0x0344; +TA0CCTL1_L = 0x0344; +TA0CCTL1_H = 0x0345; +TA0CCTL2 = 0x0346; +TA0CCTL2_L = 0x0346; +TA0CCTL2_H = 0x0347; +TA0R = 0x0350; +TA0R_L = 0x0350; +TA0R_H = 0x0351; +TA0CCR0 = 0x0352; +TA0CCR0_L = 0x0352; +TA0CCR0_H = 0x0353; +TA0CCR1 = 0x0354; +TA0CCR1_L = 0x0354; +TA0CCR1_H = 0x0355; +TA0CCR2 = 0x0356; +TA0CCR2_L = 0x0356; +TA0CCR2_H = 0x0357; +TA0EX0 = 0x0360; +TA0EX0_L = 0x0360; +TA0EX0_H = 0x0361; +TA0IV = 0x036E; +TA0IV_L = 0x036E; +TA0IV_H = 0x036F; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x0380; +TA1CTL_L = 0x0380; +TA1CTL_H = 0x0381; +TA1CCTL0 = 0x0382; +TA1CCTL0_L = 0x0382; +TA1CCTL0_H = 0x0383; +TA1CCTL1 = 0x0384; +TA1CCTL1_L = 0x0384; +TA1CCTL1_H = 0x0385; +TA1CCTL2 = 0x0386; +TA1CCTL2_L = 0x0386; +TA1CCTL2_H = 0x0387; +TA1R = 0x0390; +TA1R_L = 0x0390; +TA1R_H = 0x0391; +TA1CCR0 = 0x0392; +TA1CCR0_L = 0x0392; +TA1CCR0_H = 0x0393; +TA1CCR1 = 0x0394; +TA1CCR1_L = 0x0394; +TA1CCR1_H = 0x0395; +TA1CCR2 = 0x0396; +TA1CCR2_L = 0x0396; +TA1CCR2_H = 0x0397; +TA1EX0 = 0x03A0; +TA1EX0_L = 0x03A0; +TA1EX0_H = 0x03A1; +TA1IV = 0x03AE; +TA1IV_L = 0x03AE; +TA1IV_H = 0x03AF; + + +/***************************************************************************** + TA2 +*****************************************************************************/ +TA2CTL = 0x0400; +TA2CTL_L = 0x0400; +TA2CTL_H = 0x0401; +TA2CCTL0 = 0x0402; +TA2CCTL0_L = 0x0402; +TA2CCTL0_H = 0x0403; +TA2CCTL1 = 0x0404; +TA2CCTL1_L = 0x0404; +TA2CCTL1_H = 0x0405; +TA2R = 0x0410; +TA2R_L = 0x0410; +TA2R_H = 0x0411; +TA2CCR0 = 0x0412; +TA2CCR0_L = 0x0412; +TA2CCR0_H = 0x0413; +TA2CCR1 = 0x0414; +TA2CCR1_L = 0x0414; +TA2CCR1_H = 0x0415; +TA2EX0 = 0x0420; +TA2EX0_L = 0x0420; +TA2EX0_H = 0x0421; +TA2IV = 0x042E; +TA2IV_L = 0x042E; +TA2IV_H = 0x042F; + + +/***************************************************************************** + TA3 +*****************************************************************************/ +TA3CTL = 0x0440; +TA3CTL_L = 0x0440; +TA3CTL_H = 0x0441; +TA3CCTL0 = 0x0442; +TA3CCTL0_L = 0x0442; +TA3CCTL0_H = 0x0443; +TA3CCTL1 = 0x0444; +TA3CCTL1_L = 0x0444; +TA3CCTL1_H = 0x0445; +TA3R = 0x0450; +TA3R_L = 0x0450; +TA3R_H = 0x0451; +TA3CCR0 = 0x0452; +TA3CCR0_L = 0x0452; +TA3CCR0_H = 0x0453; +TA3CCR1 = 0x0454; +TA3CCR1_L = 0x0454; +TA3CCR1_H = 0x0455; +TA3EX0 = 0x0460; +TA3EX0_L = 0x0460; +TA3EX0_H = 0x0461; +TA3IV = 0x046E; +TA3IV_L = 0x046E; +TA3IV_H = 0x046F; + + +/***************************************************************************** + TA4 +*****************************************************************************/ +TA4CTL = 0x07C0; +TA4CTL_L = 0x07C0; +TA4CTL_H = 0x07C1; +TA4CCTL0 = 0x07C2; +TA4CCTL0_L = 0x07C2; +TA4CCTL0_H = 0x07C3; +TA4CCTL1 = 0x07C4; +TA4CCTL1_L = 0x07C4; +TA4CCTL1_H = 0x07C5; +TA4R = 0x07D0; +TA4R_L = 0x07D0; +TA4R_H = 0x07D1; +TA4CCR0 = 0x07D2; +TA4CCR0_L = 0x07D2; +TA4CCR0_H = 0x07D3; +TA4CCR1 = 0x07D4; +TA4CCR1_L = 0x07D4; +TA4CCR1_H = 0x07D5; +TA4EX0 = 0x07E0; +TA4EX0_L = 0x07E0; +TA4EX0_H = 0x07E1; +TA4IV = 0x07EE; +TA4IV_L = 0x07EE; +TA4IV_H = 0x07EF; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x03C0; +TB0CTL_L = 0x03C0; +TB0CTL_H = 0x03C1; +TB0CCTL0 = 0x03C2; +TB0CCTL0_L = 0x03C2; +TB0CCTL0_H = 0x03C3; +TB0CCTL1 = 0x03C4; +TB0CCTL1_L = 0x03C4; +TB0CCTL1_H = 0x03C5; +TB0CCTL2 = 0x03C6; +TB0CCTL2_L = 0x03C6; +TB0CCTL2_H = 0x03C7; +TB0CCTL3 = 0x03C8; +TB0CCTL3_L = 0x03C8; +TB0CCTL3_H = 0x03C9; +TB0CCTL4 = 0x03CA; +TB0CCTL4_L = 0x03CA; +TB0CCTL4_H = 0x03CB; +TB0CCTL5 = 0x03CC; +TB0CCTL5_L = 0x03CC; +TB0CCTL5_H = 0x03CD; +TB0CCTL6 = 0x03CE; +TB0CCTL6_L = 0x03CE; +TB0CCTL6_H = 0x03CF; +TB0R = 0x03D0; +TB0R_L = 0x03D0; +TB0R_H = 0x03D1; +TB0CCR0 = 0x03D2; +TB0CCR0_L = 0x03D2; +TB0CCR0_H = 0x03D3; +TB0CCR1 = 0x03D4; +TB0CCR1_L = 0x03D4; +TB0CCR1_H = 0x03D5; +TB0CCR2 = 0x03D6; +TB0CCR2_L = 0x03D6; +TB0CCR2_H = 0x03D7; +TB0CCR3 = 0x03D8; +TB0CCR3_L = 0x03D8; +TB0CCR3_H = 0x03D9; +TB0CCR4 = 0x03DA; +TB0CCR4_L = 0x03DA; +TB0CCR4_H = 0x03DB; +TB0CCR5 = 0x03DC; +TB0CCR5_L = 0x03DC; +TB0CCR5_H = 0x03DD; +TB0CCR6 = 0x03DE; +TB0CCR6_L = 0x03DE; +TB0CCR6_H = 0x03DF; +TB0EX0 = 0x03E0; +TB0EX0_L = 0x03E0; +TB0EX0_H = 0x03E1; +TB0IV = 0x03EE; +TB0IV_L = 0x03EE; +TB0IV_H = 0x03EF; + + +/***************************************************************************** + UUPS +*****************************************************************************/ +UUPSIIDX = 0x0EC0; +UUPSIIDX_L = 0x0EC0; +UUPSIIDX_H = 0x0EC1; +UUPSMIS = 0x0EC2; +UUPSMIS_L = 0x0EC2; +UUPSMIS_H = 0x0EC3; +UUPSRIS = 0x0EC4; +UUPSRIS_L = 0x0EC4; +UUPSRIS_H = 0x0EC5; +UUPSIMSC = 0x0EC6; +UUPSIMSC_L = 0x0EC6; +UUPSIMSC_H = 0x0EC7; +UUPSICR = 0x0EC8; +UUPSICR_L = 0x0EC8; +UUPSICR_H = 0x0EC9; +UUPSISR = 0x0ECA; +UUPSISR_L = 0x0ECA; +UUPSISR_H = 0x0ECB; +UUPSDESCLO = 0x0ECC; +UUPSDESCLO_L = 0x0ECC; +UUPSDESCLO_H = 0x0ECD; +UUPSDESCHI = 0x0ECE; +UUPSDESCHI_L = 0x0ECE; +UUPSDESCHI_H = 0x0ECF; +UUPSCTL = 0x0ED0; +UUPSCTL_L = 0x0ED0; +UUPSCTL_H = 0x0ED1; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0STATW_L = 0x05CA; +UCA0STATW_H = 0x05CB; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0ABCTL_L = 0x05D0; +UCA0ABCTL_H = 0x05D1; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +UCA0IV_L = 0x05DE; +UCA0IV_H = 0x05DF; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1STATW_L = 0x05EA; +UCA1STATW_H = 0x05EB; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1ABCTL_L = 0x05F0; +UCA1ABCTL_H = 0x05F1; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +UCA1IV_L = 0x05FE; +UCA1IV_H = 0x05FF; + + +/***************************************************************************** + eUSCI_A2 +*****************************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2STATW_L = 0x060A; +UCA2STATW_H = 0x060B; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2ABCTL_L = 0x0610; +UCA2ABCTL_H = 0x0611; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +UCA2IV_L = 0x061E; +UCA2IV_H = 0x061F; + + +/***************************************************************************** + eUSCI_A3 +*****************************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3STATW_L = 0x062A; +UCA3STATW_H = 0x062B; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3ABCTL_L = 0x0630; +UCA3ABCTL_H = 0x0631; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +UCA3IV_L = 0x063E; +UCA3IV_H = 0x063F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +UCB0IV_L = 0x066E; +UCB0IV_H = 0x066F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +UCB1IV_L = 0x06AE; +UCB1IV_H = 0x06AF; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr6043.cmd b/msp430/msp430fr6043.cmd new file mode 100644 index 00000000..c3f43632 --- /dev/null +++ b/msp430/msp430fr6043.cmd @@ -0,0 +1,2214 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr6043.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC12_B +*****************************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; + + +/***************************************************************************** + AES256 +*****************************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; + + +/***************************************************************************** + CAPTIO0 +*****************************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; + + +/***************************************************************************** + CAPTIO1 +*****************************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; + + +/***************************************************************************** + COMP_E +*****************************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; + + +/***************************************************************************** + CRC32 +*****************************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +P7IV = 0x026E; +P7IV_L = 0x026E; +P7IV_H = 0x026F; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +PDIES = 0x0278; +PDIES_L = 0x0278; +PDIES_H = 0x0279; +PDIE = 0x027A; +PDIE_L = 0x027A; +PDIE_H = 0x027B; +PDIFG = 0x027C; +PDIFG_L = 0x027C; +PDIFG_H = 0x027D; +P8IV = 0x027E; +P8IV_L = 0x027E; +P8IV_H = 0x027F; +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +P9IV = 0x028E; +P9IV_L = 0x028E; +P9IV_H = 0x028F; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +PEIES = 0x0298; +PEIES_L = 0x0298; +PEIES_H = 0x0299; +PEIE = 0x029A; +PEIE_L = 0x029A; +PEIE_H = 0x029B; +PEIFG = 0x029C; +PEIFG_L = 0x029C; +PEIFG_H = 0x029D; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + +P7IN = 0x0260; + +P8IN = 0x0261; + +P7OUT = 0x0262; + +P8OUT = 0x0263; + +P7DIR = 0x0264; + +P8DIR = 0x0265; + +P7REN = 0x0266; + +P8REN = 0x0267; + +P7SEL0 = 0x026A; + +P8SEL0 = 0x026B; + +P7SEL1 = 0x026C; + +P8SEL1 = 0x026D; + +P7SELC = 0x0276; + +P8SELC = 0x0277; + +P7IES = 0x0278; + +P8IES = 0x0279; + +P7IE = 0x027A; + +P8IE = 0x027B; + +P7IFG = 0x027C; + +P8IFG = 0x027D; + +P9IN = 0x0280; + +P9OUT = 0x0282; + +P9DIR = 0x0284; + +P9REN = 0x0286; + +P9SEL0 = 0x028A; + +P9SEL1 = 0x028C; + +P9SELC = 0x0296; + +P9IES = 0x0298; + +P9IE = 0x029A; + +P9IFG = 0x029C; + + + +/***************************************************************************** + DMA +*****************************************************************************/ +DMACTL0 = 0x0500; +DMACTL0_L = 0x0500; +DMACTL0_H = 0x0501; +DMACTL1 = 0x0502; +DMACTL1_L = 0x0502; +DMACTL1_H = 0x0503; +DMACTL2 = 0x0504; +DMACTL2_L = 0x0504; +DMACTL2_H = 0x0505; +DMACTL4 = 0x0508; +DMACTL4_L = 0x0508; +DMACTL4_H = 0x0509; +DMAIV = 0x050E; +DMAIV_L = 0x050E; +DMAIV_H = 0x050F; +DMA0CTL = 0x0510; +DMA0CTL_L = 0x0510; +DMA0CTL_H = 0x0511; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA0SZ_L = 0x051A; +DMA0SZ_H = 0x051B; +DMA1CTL = 0x0520; +DMA1CTL_L = 0x0520; +DMA1CTL_H = 0x0521; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA1SZ_L = 0x052A; +DMA1SZ_H = 0x052B; +DMA2CTL = 0x0530; +DMA2CTL_L = 0x0530; +DMA2CTL_H = 0x0531; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA2SZ_L = 0x053A; +DMA2SZ_H = 0x053B; +DMA3CTL = 0x0540; +DMA3CTL_L = 0x0540; +DMA3CTL_H = 0x0541; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA3SZ_L = 0x054A; +DMA3SZ_H = 0x054B; +DMA4CTL = 0x0550; +DMA4CTL_L = 0x0550; +DMA4CTL_H = 0x0551; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA4SZ_L = 0x055A; +DMA4SZ_H = 0x055B; +DMA5CTL = 0x0560; +DMA5CTL_L = 0x0560; +DMA5CTL_H = 0x0561; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +DMA5SZ_L = 0x056A; +DMA5SZ_H = 0x056B; + + +/***************************************************************************** + FRCTL_A +*****************************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; + + +/***************************************************************************** + HSPLL +*****************************************************************************/ +HSPLLIIDX = 0x0EE0; +HSPLLIIDX_L = 0x0EE0; +HSPLLIIDX_H = 0x0EE1; +HSPLLMIS = 0x0EE2; +HSPLLMIS_L = 0x0EE2; +HSPLLMIS_H = 0x0EE3; +HSPLLRIS = 0x0EE4; +HSPLLRIS_L = 0x0EE4; +HSPLLRIS_H = 0x0EE5; +HSPLLIMSC = 0x0EE6; +HSPLLIMSC_L = 0x0EE6; +HSPLLIMSC_H = 0x0EE7; +HSPLLICR = 0x0EE8; +HSPLLICR_L = 0x0EE8; +HSPLLICR_H = 0x0EE9; +HSPLLISR = 0x0EEA; +HSPLLISR_L = 0x0EEA; +HSPLLISR_H = 0x0EEB; +HSPLLDESCLO = 0x0EEC; +HSPLLDESCLO_L = 0x0EEC; +HSPLLDESCLO_H = 0x0EED; +HSPLLDESCHI = 0x0EEE; +HSPLLDESCHI_L = 0x0EEE; +HSPLLDESCHI_H = 0x0EEF; +HSPLLCTL = 0x0EF0; +HSPLLCTL_L = 0x0EF0; +HSPLLCTL_H = 0x0EF1; +HSPLLUSSXTLCTL = 0x0EF2; +HSPLLUSSXTLCTL_L = 0x0EF2; +HSPLLUSSXTLCTL_H = 0x0EF3; + + +/***************************************************************************** + LCD_C +*****************************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCPCTL3 = 0x0A10; +LCDCPCTL3_L = 0x0A10; +LCDCPCTL3_H = 0x0A11; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDCIV_L = 0x0A1E; +LCDCIV_H = 0x0A1F; +LCDM1 = 0x0A20; + +LCDM2 = 0x0A21; + +LCDM3 = 0x0A22; + +LCDM4 = 0x0A23; + +LCDM5 = 0x0A24; + +LCDM6 = 0x0A25; + +LCDM7 = 0x0A26; + +LCDM8 = 0x0A27; + +LCDM9 = 0x0A28; + +LCDM10 = 0x0A29; + +LCDM11 = 0x0A2A; + +LCDM12 = 0x0A2B; + +LCDM13 = 0x0A2C; + +LCDM14 = 0x0A2D; + +LCDM15 = 0x0A2E; + +LCDM16 = 0x0A2F; + +LCDM17 = 0x0A30; + +LCDM18 = 0x0A31; + +LCDM19 = 0x0A32; + +LCDM20 = 0x0A33; + +LCDM21 = 0x0A34; + +LCDM22 = 0x0A35; + +LCDM23 = 0x0A36; + +LCDM24 = 0x0A37; + +LCDM25 = 0x0A38; + +LCDM26 = 0x0A39; + +LCDM27 = 0x0A3A; + +LCDM28 = 0x0A3B; + +LCDM29 = 0x0A3C; + +LCDM30 = 0x0A3D; + +LCDM31 = 0x0A3E; + +LCDM32 = 0x0A3F; + +LCDM33_LCDBM1 = 0x0A40; + +LCDM34_LCDBM2 = 0x0A41; + +LCDM35_LCDBM3 = 0x0A42; + +LCDM36_LCDBM4 = 0x0A43; + +LCDM37_LCDBM5 = 0x0A44; + +LCDM38_LCDBM6 = 0x0A45; + +LCDM39_LCDBM7 = 0x0A46; + +LCDM40_LCDBM8 = 0x0A47; + +LCDM41_LCDBM9 = 0x0A48; + +LCDM42_LCDBM10 = 0x0A49; + +LCDM43_LCDBM11 = 0x0A4A; + +LCDM44_LCDBM12 = 0x0A4B; + +LCDM45_LCDBM13 = 0x0A4C; + +LCDM46_LCDBM14 = 0x0A4D; + +LCDM47_LCDBM15 = 0x0A4E; + +LCDM48_LCDBM16 = 0x0A4F; + +LCDM49_LCDBM17 = 0x0A50; + +LCDM50_LCDBM18 = 0x0A51; + +LCDM51_LCDBM19 = 0x0A52; + +LCDM52_LCDBM20 = 0x0A53; + + + +/***************************************************************************** + LEA +*****************************************************************************/ +LEACAP = 0x0A80; +LEACAPL = 0x0A80; +LEACAPH = 0x0A82; + +LEACNF0 = 0x0A84; +LEACNF0L = 0x0A84; +LEACNF0H = 0x0A86; + +LEACNF1 = 0x0A88; +LEACNF1L = 0x0A88; +LEACNF1H = 0x0A8A; + +LEACNF2 = 0x0A8C; +LEACNF2L = 0x0A8C; +LEACNF2H = 0x0A8E; + +LEAMB = 0x0A90; +LEAMBL = 0x0A90; +LEAMBH = 0x0A92; + +LEAMT = 0x0A94; +LEAMTL = 0x0A94; +LEAMTH = 0x0A96; + +LEACMA = 0x0A98; +LEACMAL = 0x0A98; +LEACMAH = 0x0A9A; + +LEACMCTL = 0x0A9C; +LEACMCTLL = 0x0A9C; +LEACMCTLH = 0x0A9E; + +LEACMDSTAT = 0x0AA8; +LEACMDSTATL = 0x0AA8; +LEACMDSTATH = 0x0AAA; + +LEAS1STAT = 0x0AAC; +LEAS1STATL = 0x0AAC; +LEAS1STATH = 0x0AAE; + +LEAS0STAT = 0x0AB0; +LEAS0STATL = 0x0AB0; +LEAS0STATH = 0x0AB2; + +LEADSTSTAT = 0x0AB4; +LEADSTSTATL = 0x0AB4; +LEADSTSTATH = 0x0AB6; + +LEAPMCTL = 0x0AC0; +LEAPMCTLL = 0x0AC0; +LEAPMCTLH = 0x0AC2; + +LEAPMDST = 0x0AC4; +LEAPMDSTL = 0x0AC4; +LEAPMDSTH = 0x0AC6; + +LEAPMS1 = 0x0AC8; +LEAPMS1L = 0x0AC8; +LEAPMS1H = 0x0ACA; + +LEAPMS0 = 0x0ACC; +LEAPMS0L = 0x0ACC; +LEAPMS0H = 0x0ACE; + +LEAPMCB = 0x0AD0; +LEAPMCBL = 0x0AD0; +LEAPMCBH = 0x0AD2; + +LEAIFGSET = 0x0AF0; +LEAIFGSETL = 0x0AF0; +LEAIFGSETH = 0x0AF2; + +LEAIE = 0x0AF4; +LEAIEL = 0x0AF4; +LEAIEH = 0x0AF6; + +LEAIFG = 0x0AF8; +LEAIFGL = 0x0AF8; +LEAIFGH = 0x0AFA; + +LEAIV = 0x0AFC; +LEAIVL = 0x0AFC; +LEAIVH = 0x0AFE; + + + +/***************************************************************************** + MPU +*****************************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + MTIF +*****************************************************************************/ +MTIFPGCNF = 0x0F00; +MTIFPGCNF_L = 0x0F00; +MTIFPGCNF_H = 0x0F01; +MTIFPGKVAL = 0x0F02; +MTIFPGKVAL_L = 0x0F02; +MTIFPGKVAL_H = 0x0F03; +MTIFPGCTL = 0x0F04; +MTIFPGCTL_L = 0x0F04; +MTIFPGCTL_H = 0x0F05; +MTIFPGSR = 0x0F06; +MTIFPGSR_L = 0x0F06; +MTIFPGSR_H = 0x0F07; +MTIFPCCNF = 0x0F08; +MTIFPCCNF_L = 0x0F08; +MTIFPCCNF_H = 0x0F09; +MTIFPCR = 0x0F0A; +MTIFPCR_L = 0x0F0A; +MTIFPCR_H = 0x0F0B; +MTIFPCCTL = 0x0F0C; +MTIFPCCTL_L = 0x0F0C; +MTIFPCCTL_H = 0x0F0D; +MTIFPCSR = 0x0F0E; +MTIFPCSR_L = 0x0F0E; +MTIFPCSR_H = 0x0F0F; +MTIFTPCTL = 0x0F10; +MTIFTPCTL_L = 0x0F10; +MTIFTPCTL_H = 0x0F11; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RAMCTL +*****************************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +RCCTL1 = 0x015A; +RCCTL1_L = 0x015A; +RCCTL1_H = 0x015B; + + +/***************************************************************************** + REF_A +*****************************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; + + +/***************************************************************************** + RTC_C +*****************************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCIV_L = 0x04AE; +RTCIV_H = 0x04AF; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCCNT12 = 0x04B0; +RTCCNT12_L = 0x04B0; +RTCCNT12_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCCNT34 = 0x04B2; +RTCCNT34_L = 0x04B2; +RTCCNT34_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BIN2BCD_L = 0x04BC; +BIN2BCD_H = 0x04BD; +BCD2BIN = 0x04BE; +BCD2BIN_L = 0x04BE; +BCD2BIN_H = 0x04BF; +RT0PS = 0x04AC; + +RT1PS = 0x04AD; + +RTCCNT1 = 0x04B0; + +RTCCNT2 = 0x04B1; + +RTCCNT3 = 0x04B2; + +RTCCNT4 = 0x04B3; + + + +/***************************************************************************** + SAPH_A +*****************************************************************************/ +SAPH_AIIDX = 0x0E00; +SAPH_AIIDX_L = 0x0E00; +SAPH_AIIDX_H = 0x0E01; +SAPH_AMIS = 0x0E02; +SAPH_AMIS_L = 0x0E02; +SAPH_AMIS_H = 0x0E03; +SAPH_ARIS = 0x0E04; +SAPH_ARIS_L = 0x0E04; +SAPH_ARIS_H = 0x0E05; +SAPH_AIMSC = 0x0E06; +SAPH_AIMSC_L = 0x0E06; +SAPH_AIMSC_H = 0x0E07; +SAPH_AICR = 0x0E08; +SAPH_AICR_L = 0x0E08; +SAPH_AICR_H = 0x0E09; +SAPH_AISR = 0x0E0A; +SAPH_AISR_L = 0x0E0A; +SAPH_AISR_H = 0x0E0B; +SAPH_ADESCLO = 0x0E0C; +SAPH_ADESCLO_L = 0x0E0C; +SAPH_ADESCLO_H = 0x0E0D; +SAPH_ADESCHI = 0x0E0E; +SAPH_ADESCHI_L = 0x0E0E; +SAPH_ADESCHI_H = 0x0E0F; +SAPH_AKEY = 0x0E10; +SAPH_AKEY_L = 0x0E10; +SAPH_AKEY_H = 0x0E11; +SAPH_AOCTL0 = 0x0E12; +SAPH_AOCTL0_L = 0x0E12; +SAPH_AOCTL0_H = 0x0E13; +SAPH_AOCTL1 = 0x0E14; +SAPH_AOCTL1_L = 0x0E14; +SAPH_AOCTL1_H = 0x0E15; +SAPH_AOSEL = 0x0E16; +SAPH_AOSEL_L = 0x0E16; +SAPH_AOSEL_H = 0x0E17; +SAPH_ACH0PUT = 0x0E20; +SAPH_ACH0PUT_L = 0x0E20; +SAPH_ACH0PUT_H = 0x0E21; +SAPH_ACH0PDT = 0x0E22; +SAPH_ACH0PDT_L = 0x0E22; +SAPH_ACH0PDT_H = 0x0E23; +SAPH_ACH0TT = 0x0E24; +SAPH_ACH0TT_L = 0x0E24; +SAPH_ACH0TT_H = 0x0E25; +SAPH_ACH1PUT = 0x0E26; +SAPH_ACH1PUT_L = 0x0E26; +SAPH_ACH1PUT_H = 0x0E27; +SAPH_ACH1PDT = 0x0E28; +SAPH_ACH1PDT_L = 0x0E28; +SAPH_ACH1PDT_H = 0x0E29; +SAPH_ACH1TT = 0x0E2A; +SAPH_ACH1TT_L = 0x0E2A; +SAPH_ACH1TT_H = 0x0E2B; +SAPH_AMCNF = 0x0E2C; +SAPH_AMCNF_L = 0x0E2C; +SAPH_AMCNF_H = 0x0E2D; +SAPH_ATACTL = 0x0E2E; +SAPH_ATACTL_L = 0x0E2E; +SAPH_ATACTL_H = 0x0E2F; +SAPH_AICTL0 = 0x0E30; +SAPH_AICTL0_L = 0x0E30; +SAPH_AICTL0_H = 0x0E31; +SAPH_ABCTL = 0x0E34; +SAPH_ABCTL_L = 0x0E34; +SAPH_ABCTL_H = 0x0E35; +SAPH_APGC = 0x0E40; +SAPH_APGC_L = 0x0E40; +SAPH_APGC_H = 0x0E41; +SAPH_APGLPER = 0x0E42; +SAPH_APGLPER_L = 0x0E42; +SAPH_APGLPER_H = 0x0E43; +SAPH_APGHPER = 0x0E44; +SAPH_APGHPER_L = 0x0E44; +SAPH_APGHPER_H = 0x0E45; +SAPH_APGCTL = 0x0E46; +SAPH_APGCTL_L = 0x0E46; +SAPH_APGCTL_H = 0x0E47; +SAPH_APPGTRIG = 0x0E48; +SAPH_APPGTRIG_L = 0x0E48; +SAPH_APPGTRIG_H = 0x0E49; +SAPH_AXPGCTL = 0x0E4A; +SAPH_AXPGCTL_L = 0x0E4A; +SAPH_AXPGCTL_H = 0x0E4B; +SAPH_AXPGLPER = 0x0E4C; +SAPH_AXPGLPER_L = 0x0E4C; +SAPH_AXPGLPER_H = 0x0E4D; +SAPH_AXPGHPER = 0x0E4E; +SAPH_AXPGHPER_L = 0x0E4E; +SAPH_AXPGHPER_H = 0x0E4F; +SAPH_AASCTL0 = 0x0E60; +SAPH_AASCTL0_L = 0x0E60; +SAPH_AASCTL0_H = 0x0E61; +SAPH_AASCTL1 = 0x0E62; +SAPH_AASCTL1_L = 0x0E62; +SAPH_AASCTL1_H = 0x0E63; +SAPH_AASQTRIG = 0x0E64; + +SAPH_AAPOL = 0x0E66; +SAPH_AAPOL_L = 0x0E66; +SAPH_AAPOL_H = 0x0E67; +SAPH_AAPLEV = 0x0E68; +SAPH_AAPLEV_L = 0x0E68; +SAPH_AAPLEV_H = 0x0E69; +SAPH_AAPHIZ = 0x0E6A; +SAPH_AAPHIZ_L = 0x0E6A; +SAPH_AAPHIZ_H = 0x0E6B; +SAPH_AATM_A = 0x0E6E; +SAPH_AATM_A_L = 0x0E6E; +SAPH_AATM_A_H = 0x0E6F; +SAPH_AATM_B = 0x0E70; +SAPH_AATM_B_L = 0x0E70; +SAPH_AATM_B_H = 0x0E71; +SAPH_AATM_C = 0x0E72; +SAPH_AATM_C_L = 0x0E72; +SAPH_AATM_C_H = 0x0E73; +SAPH_AATM_D = 0x0E74; +SAPH_AATM_D_L = 0x0E74; +SAPH_AATM_D_H = 0x0E75; +SAPH_AATM_E = 0x0E76; +SAPH_AATM_E_L = 0x0E76; +SAPH_AATM_E_H = 0x0E77; +SAPH_AATM_F = 0x0E78; +SAPH_AATM_F_L = 0x0E78; +SAPH_AATM_F_H = 0x0E79; +SAPH_ATBCTL = 0x0E7A; +SAPH_ATBCTL_L = 0x0E7A; +SAPH_ATBCTL_H = 0x0E7B; +SAPH_AATIMLO = 0x0E7C; +SAPH_AATIMLO_L = 0x0E7C; +SAPH_AATIMLO_H = 0x0E7D; +SAPH_AATIMHI = 0x0E7E; +SAPH_AATIMHI_L = 0x0E7E; +SAPH_AATIMHI_H = 0x0E7F; + + +/***************************************************************************** + SDHS +*****************************************************************************/ +SDHSIIDX = 0x0E80; +SDHSIIDX_L = 0x0E80; +SDHSIIDX_H = 0x0E81; +SDHSMIS = 0x0E82; +SDHSMIS_L = 0x0E82; +SDHSMIS_H = 0x0E83; +SDHSRIS = 0x0E84; +SDHSRIS_L = 0x0E84; +SDHSRIS_H = 0x0E85; +SDHSIMSC = 0x0E86; +SDHSIMSC_L = 0x0E86; +SDHSIMSC_H = 0x0E87; +SDHSICR = 0x0E88; +SDHSICR_L = 0x0E88; +SDHSICR_H = 0x0E89; +SDHSISR = 0x0E8A; +SDHSISR_L = 0x0E8A; +SDHSISR_H = 0x0E8B; +SDHSDESCLO = 0x0E8C; +SDHSDESCLO_L = 0x0E8C; +SDHSDESCLO_H = 0x0E8D; +SDHSDESCHI = 0x0E8E; +SDHSDESCHI_L = 0x0E8E; +SDHSDESCHI_H = 0x0E8F; +SDHSCTL0 = 0x0E90; +SDHSCTL0_L = 0x0E90; +SDHSCTL0_H = 0x0E91; +SDHSCTL1 = 0x0E92; +SDHSCTL1_L = 0x0E92; +SDHSCTL1_H = 0x0E93; +SDHSCTL2 = 0x0E94; +SDHSCTL2_L = 0x0E94; +SDHSCTL2_H = 0x0E95; +SDHSCTL3 = 0x0E96; +SDHSCTL3_L = 0x0E96; +SDHSCTL3_H = 0x0E97; +SDHSCTL4 = 0x0E98; +SDHSCTL4_L = 0x0E98; +SDHSCTL4_H = 0x0E99; +SDHSCTL5 = 0x0E9A; +SDHSCTL5_L = 0x0E9A; +SDHSCTL5_H = 0x0E9B; +SDHSCTL6 = 0x0E9C; +SDHSCTL6_L = 0x0E9C; +SDHSCTL6_H = 0x0E9D; +SDHSCTL7 = 0x0E9E; +SDHSCTL7_L = 0x0E9E; +SDHSCTL7_H = 0x0E9F; +SDHSDT = 0x0EA2; +SDHSDT_L = 0x0EA2; +SDHSDT_H = 0x0EA3; +SDHSWINHITH = 0x0EA4; +SDHSWINHITH_L = 0x0EA4; +SDHSWINHITH_H = 0x0EA5; +SDHSWINLOTH = 0x0EA6; +SDHSWINLOTH_L = 0x0EA6; +SDHSWINLOTH_H = 0x0EA7; +SDHSDTCDA = 0x0EA8; +SDHSDTCDA_L = 0x0EA8; +SDHSDTCDA_H = 0x0EA9; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0340; +TA0CTL_L = 0x0340; +TA0CTL_H = 0x0341; +TA0CCTL0 = 0x0342; +TA0CCTL0_L = 0x0342; +TA0CCTL0_H = 0x0343; +TA0CCTL1 = 0x0344; +TA0CCTL1_L = 0x0344; +TA0CCTL1_H = 0x0345; +TA0CCTL2 = 0x0346; +TA0CCTL2_L = 0x0346; +TA0CCTL2_H = 0x0347; +TA0R = 0x0350; +TA0R_L = 0x0350; +TA0R_H = 0x0351; +TA0CCR0 = 0x0352; +TA0CCR0_L = 0x0352; +TA0CCR0_H = 0x0353; +TA0CCR1 = 0x0354; +TA0CCR1_L = 0x0354; +TA0CCR1_H = 0x0355; +TA0CCR2 = 0x0356; +TA0CCR2_L = 0x0356; +TA0CCR2_H = 0x0357; +TA0EX0 = 0x0360; +TA0EX0_L = 0x0360; +TA0EX0_H = 0x0361; +TA0IV = 0x036E; +TA0IV_L = 0x036E; +TA0IV_H = 0x036F; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x0380; +TA1CTL_L = 0x0380; +TA1CTL_H = 0x0381; +TA1CCTL0 = 0x0382; +TA1CCTL0_L = 0x0382; +TA1CCTL0_H = 0x0383; +TA1CCTL1 = 0x0384; +TA1CCTL1_L = 0x0384; +TA1CCTL1_H = 0x0385; +TA1CCTL2 = 0x0386; +TA1CCTL2_L = 0x0386; +TA1CCTL2_H = 0x0387; +TA1R = 0x0390; +TA1R_L = 0x0390; +TA1R_H = 0x0391; +TA1CCR0 = 0x0392; +TA1CCR0_L = 0x0392; +TA1CCR0_H = 0x0393; +TA1CCR1 = 0x0394; +TA1CCR1_L = 0x0394; +TA1CCR1_H = 0x0395; +TA1CCR2 = 0x0396; +TA1CCR2_L = 0x0396; +TA1CCR2_H = 0x0397; +TA1EX0 = 0x03A0; +TA1EX0_L = 0x03A0; +TA1EX0_H = 0x03A1; +TA1IV = 0x03AE; +TA1IV_L = 0x03AE; +TA1IV_H = 0x03AF; + + +/***************************************************************************** + TA2 +*****************************************************************************/ +TA2CTL = 0x0400; +TA2CTL_L = 0x0400; +TA2CTL_H = 0x0401; +TA2CCTL0 = 0x0402; +TA2CCTL0_L = 0x0402; +TA2CCTL0_H = 0x0403; +TA2CCTL1 = 0x0404; +TA2CCTL1_L = 0x0404; +TA2CCTL1_H = 0x0405; +TA2R = 0x0410; +TA2R_L = 0x0410; +TA2R_H = 0x0411; +TA2CCR0 = 0x0412; +TA2CCR0_L = 0x0412; +TA2CCR0_H = 0x0413; +TA2CCR1 = 0x0414; +TA2CCR1_L = 0x0414; +TA2CCR1_H = 0x0415; +TA2EX0 = 0x0420; +TA2EX0_L = 0x0420; +TA2EX0_H = 0x0421; +TA2IV = 0x042E; +TA2IV_L = 0x042E; +TA2IV_H = 0x042F; + + +/***************************************************************************** + TA3 +*****************************************************************************/ +TA3CTL = 0x0440; +TA3CTL_L = 0x0440; +TA3CTL_H = 0x0441; +TA3CCTL0 = 0x0442; +TA3CCTL0_L = 0x0442; +TA3CCTL0_H = 0x0443; +TA3CCTL1 = 0x0444; +TA3CCTL1_L = 0x0444; +TA3CCTL1_H = 0x0445; +TA3R = 0x0450; +TA3R_L = 0x0450; +TA3R_H = 0x0451; +TA3CCR0 = 0x0452; +TA3CCR0_L = 0x0452; +TA3CCR0_H = 0x0453; +TA3CCR1 = 0x0454; +TA3CCR1_L = 0x0454; +TA3CCR1_H = 0x0455; +TA3EX0 = 0x0460; +TA3EX0_L = 0x0460; +TA3EX0_H = 0x0461; +TA3IV = 0x046E; +TA3IV_L = 0x046E; +TA3IV_H = 0x046F; + + +/***************************************************************************** + TA4 +*****************************************************************************/ +TA4CTL = 0x07C0; +TA4CTL_L = 0x07C0; +TA4CTL_H = 0x07C1; +TA4CCTL0 = 0x07C2; +TA4CCTL0_L = 0x07C2; +TA4CCTL0_H = 0x07C3; +TA4CCTL1 = 0x07C4; +TA4CCTL1_L = 0x07C4; +TA4CCTL1_H = 0x07C5; +TA4R = 0x07D0; +TA4R_L = 0x07D0; +TA4R_H = 0x07D1; +TA4CCR0 = 0x07D2; +TA4CCR0_L = 0x07D2; +TA4CCR0_H = 0x07D3; +TA4CCR1 = 0x07D4; +TA4CCR1_L = 0x07D4; +TA4CCR1_H = 0x07D5; +TA4EX0 = 0x07E0; +TA4EX0_L = 0x07E0; +TA4EX0_H = 0x07E1; +TA4IV = 0x07EE; +TA4IV_L = 0x07EE; +TA4IV_H = 0x07EF; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x03C0; +TB0CTL_L = 0x03C0; +TB0CTL_H = 0x03C1; +TB0CCTL0 = 0x03C2; +TB0CCTL0_L = 0x03C2; +TB0CCTL0_H = 0x03C3; +TB0CCTL1 = 0x03C4; +TB0CCTL1_L = 0x03C4; +TB0CCTL1_H = 0x03C5; +TB0CCTL2 = 0x03C6; +TB0CCTL2_L = 0x03C6; +TB0CCTL2_H = 0x03C7; +TB0CCTL3 = 0x03C8; +TB0CCTL3_L = 0x03C8; +TB0CCTL3_H = 0x03C9; +TB0CCTL4 = 0x03CA; +TB0CCTL4_L = 0x03CA; +TB0CCTL4_H = 0x03CB; +TB0CCTL5 = 0x03CC; +TB0CCTL5_L = 0x03CC; +TB0CCTL5_H = 0x03CD; +TB0CCTL6 = 0x03CE; +TB0CCTL6_L = 0x03CE; +TB0CCTL6_H = 0x03CF; +TB0R = 0x03D0; +TB0R_L = 0x03D0; +TB0R_H = 0x03D1; +TB0CCR0 = 0x03D2; +TB0CCR0_L = 0x03D2; +TB0CCR0_H = 0x03D3; +TB0CCR1 = 0x03D4; +TB0CCR1_L = 0x03D4; +TB0CCR1_H = 0x03D5; +TB0CCR2 = 0x03D6; +TB0CCR2_L = 0x03D6; +TB0CCR2_H = 0x03D7; +TB0CCR3 = 0x03D8; +TB0CCR3_L = 0x03D8; +TB0CCR3_H = 0x03D9; +TB0CCR4 = 0x03DA; +TB0CCR4_L = 0x03DA; +TB0CCR4_H = 0x03DB; +TB0CCR5 = 0x03DC; +TB0CCR5_L = 0x03DC; +TB0CCR5_H = 0x03DD; +TB0CCR6 = 0x03DE; +TB0CCR6_L = 0x03DE; +TB0CCR6_H = 0x03DF; +TB0EX0 = 0x03E0; +TB0EX0_L = 0x03E0; +TB0EX0_H = 0x03E1; +TB0IV = 0x03EE; +TB0IV_L = 0x03EE; +TB0IV_H = 0x03EF; + + +/***************************************************************************** + UUPS +*****************************************************************************/ +UUPSIIDX = 0x0EC0; +UUPSIIDX_L = 0x0EC0; +UUPSIIDX_H = 0x0EC1; +UUPSMIS = 0x0EC2; +UUPSMIS_L = 0x0EC2; +UUPSMIS_H = 0x0EC3; +UUPSRIS = 0x0EC4; +UUPSRIS_L = 0x0EC4; +UUPSRIS_H = 0x0EC5; +UUPSIMSC = 0x0EC6; +UUPSIMSC_L = 0x0EC6; +UUPSIMSC_H = 0x0EC7; +UUPSICR = 0x0EC8; +UUPSICR_L = 0x0EC8; +UUPSICR_H = 0x0EC9; +UUPSISR = 0x0ECA; +UUPSISR_L = 0x0ECA; +UUPSISR_H = 0x0ECB; +UUPSDESCLO = 0x0ECC; +UUPSDESCLO_L = 0x0ECC; +UUPSDESCLO_H = 0x0ECD; +UUPSDESCHI = 0x0ECE; +UUPSDESCHI_L = 0x0ECE; +UUPSDESCHI_H = 0x0ECF; +UUPSCTL = 0x0ED0; +UUPSCTL_L = 0x0ED0; +UUPSCTL_H = 0x0ED1; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0STATW_L = 0x05CA; +UCA0STATW_H = 0x05CB; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0ABCTL_L = 0x05D0; +UCA0ABCTL_H = 0x05D1; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +UCA0IV_L = 0x05DE; +UCA0IV_H = 0x05DF; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1STATW_L = 0x05EA; +UCA1STATW_H = 0x05EB; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1ABCTL_L = 0x05F0; +UCA1ABCTL_H = 0x05F1; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +UCA1IV_L = 0x05FE; +UCA1IV_H = 0x05FF; + + +/***************************************************************************** + eUSCI_A2 +*****************************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2STATW_L = 0x060A; +UCA2STATW_H = 0x060B; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2ABCTL_L = 0x0610; +UCA2ABCTL_H = 0x0611; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +UCA2IV_L = 0x061E; +UCA2IV_H = 0x061F; + + +/***************************************************************************** + eUSCI_A3 +*****************************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3STATW_L = 0x062A; +UCA3STATW_H = 0x062B; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3ABCTL_L = 0x0630; +UCA3ABCTL_H = 0x0631; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +UCA3IV_L = 0x063E; +UCA3IV_H = 0x063F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +UCB0IV_L = 0x066E; +UCB0IV_H = 0x066F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +UCB1IV_L = 0x06AE; +UCB1IV_H = 0x06AF; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr60431.cmd b/msp430/msp430fr60431.cmd new file mode 100644 index 00000000..84b94b08 --- /dev/null +++ b/msp430/msp430fr60431.cmd @@ -0,0 +1,2214 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr60431.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC12_B +*****************************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; + + +/***************************************************************************** + AES256 +*****************************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; + + +/***************************************************************************** + CAPTIO0 +*****************************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; + + +/***************************************************************************** + CAPTIO1 +*****************************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; + + +/***************************************************************************** + COMP_E +*****************************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; + + +/***************************************************************************** + CRC32 +*****************************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +P7IV = 0x026E; +P7IV_L = 0x026E; +P7IV_H = 0x026F; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +PDIES = 0x0278; +PDIES_L = 0x0278; +PDIES_H = 0x0279; +PDIE = 0x027A; +PDIE_L = 0x027A; +PDIE_H = 0x027B; +PDIFG = 0x027C; +PDIFG_L = 0x027C; +PDIFG_H = 0x027D; +P8IV = 0x027E; +P8IV_L = 0x027E; +P8IV_H = 0x027F; +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +P9IV = 0x028E; +P9IV_L = 0x028E; +P9IV_H = 0x028F; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +PEIES = 0x0298; +PEIES_L = 0x0298; +PEIES_H = 0x0299; +PEIE = 0x029A; +PEIE_L = 0x029A; +PEIE_H = 0x029B; +PEIFG = 0x029C; +PEIFG_L = 0x029C; +PEIFG_H = 0x029D; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + +P7IN = 0x0260; + +P8IN = 0x0261; + +P7OUT = 0x0262; + +P8OUT = 0x0263; + +P7DIR = 0x0264; + +P8DIR = 0x0265; + +P7REN = 0x0266; + +P8REN = 0x0267; + +P7SEL0 = 0x026A; + +P8SEL0 = 0x026B; + +P7SEL1 = 0x026C; + +P8SEL1 = 0x026D; + +P7SELC = 0x0276; + +P8SELC = 0x0277; + +P7IES = 0x0278; + +P8IES = 0x0279; + +P7IE = 0x027A; + +P8IE = 0x027B; + +P7IFG = 0x027C; + +P8IFG = 0x027D; + +P9IN = 0x0280; + +P9OUT = 0x0282; + +P9DIR = 0x0284; + +P9REN = 0x0286; + +P9SEL0 = 0x028A; + +P9SEL1 = 0x028C; + +P9SELC = 0x0296; + +P9IES = 0x0298; + +P9IE = 0x029A; + +P9IFG = 0x029C; + + + +/***************************************************************************** + DMA +*****************************************************************************/ +DMACTL0 = 0x0500; +DMACTL0_L = 0x0500; +DMACTL0_H = 0x0501; +DMACTL1 = 0x0502; +DMACTL1_L = 0x0502; +DMACTL1_H = 0x0503; +DMACTL2 = 0x0504; +DMACTL2_L = 0x0504; +DMACTL2_H = 0x0505; +DMACTL4 = 0x0508; +DMACTL4_L = 0x0508; +DMACTL4_H = 0x0509; +DMAIV = 0x050E; +DMAIV_L = 0x050E; +DMAIV_H = 0x050F; +DMA0CTL = 0x0510; +DMA0CTL_L = 0x0510; +DMA0CTL_H = 0x0511; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA0SZ_L = 0x051A; +DMA0SZ_H = 0x051B; +DMA1CTL = 0x0520; +DMA1CTL_L = 0x0520; +DMA1CTL_H = 0x0521; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA1SZ_L = 0x052A; +DMA1SZ_H = 0x052B; +DMA2CTL = 0x0530; +DMA2CTL_L = 0x0530; +DMA2CTL_H = 0x0531; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA2SZ_L = 0x053A; +DMA2SZ_H = 0x053B; +DMA3CTL = 0x0540; +DMA3CTL_L = 0x0540; +DMA3CTL_H = 0x0541; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA3SZ_L = 0x054A; +DMA3SZ_H = 0x054B; +DMA4CTL = 0x0550; +DMA4CTL_L = 0x0550; +DMA4CTL_H = 0x0551; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA4SZ_L = 0x055A; +DMA4SZ_H = 0x055B; +DMA5CTL = 0x0560; +DMA5CTL_L = 0x0560; +DMA5CTL_H = 0x0561; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +DMA5SZ_L = 0x056A; +DMA5SZ_H = 0x056B; + + +/***************************************************************************** + FRCTL_A +*****************************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; + + +/***************************************************************************** + HSPLL +*****************************************************************************/ +HSPLLIIDX = 0x0EE0; +HSPLLIIDX_L = 0x0EE0; +HSPLLIIDX_H = 0x0EE1; +HSPLLMIS = 0x0EE2; +HSPLLMIS_L = 0x0EE2; +HSPLLMIS_H = 0x0EE3; +HSPLLRIS = 0x0EE4; +HSPLLRIS_L = 0x0EE4; +HSPLLRIS_H = 0x0EE5; +HSPLLIMSC = 0x0EE6; +HSPLLIMSC_L = 0x0EE6; +HSPLLIMSC_H = 0x0EE7; +HSPLLICR = 0x0EE8; +HSPLLICR_L = 0x0EE8; +HSPLLICR_H = 0x0EE9; +HSPLLISR = 0x0EEA; +HSPLLISR_L = 0x0EEA; +HSPLLISR_H = 0x0EEB; +HSPLLDESCLO = 0x0EEC; +HSPLLDESCLO_L = 0x0EEC; +HSPLLDESCLO_H = 0x0EED; +HSPLLDESCHI = 0x0EEE; +HSPLLDESCHI_L = 0x0EEE; +HSPLLDESCHI_H = 0x0EEF; +HSPLLCTL = 0x0EF0; +HSPLLCTL_L = 0x0EF0; +HSPLLCTL_H = 0x0EF1; +HSPLLUSSXTLCTL = 0x0EF2; +HSPLLUSSXTLCTL_L = 0x0EF2; +HSPLLUSSXTLCTL_H = 0x0EF3; + + +/***************************************************************************** + LCD_C +*****************************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCPCTL3 = 0x0A10; +LCDCPCTL3_L = 0x0A10; +LCDCPCTL3_H = 0x0A11; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDCIV_L = 0x0A1E; +LCDCIV_H = 0x0A1F; +LCDM1 = 0x0A20; + +LCDM2 = 0x0A21; + +LCDM3 = 0x0A22; + +LCDM4 = 0x0A23; + +LCDM5 = 0x0A24; + +LCDM6 = 0x0A25; + +LCDM7 = 0x0A26; + +LCDM8 = 0x0A27; + +LCDM9 = 0x0A28; + +LCDM10 = 0x0A29; + +LCDM11 = 0x0A2A; + +LCDM12 = 0x0A2B; + +LCDM13 = 0x0A2C; + +LCDM14 = 0x0A2D; + +LCDM15 = 0x0A2E; + +LCDM16 = 0x0A2F; + +LCDM17 = 0x0A30; + +LCDM18 = 0x0A31; + +LCDM19 = 0x0A32; + +LCDM20 = 0x0A33; + +LCDM21 = 0x0A34; + +LCDM22 = 0x0A35; + +LCDM23 = 0x0A36; + +LCDM24 = 0x0A37; + +LCDM25 = 0x0A38; + +LCDM26 = 0x0A39; + +LCDM27 = 0x0A3A; + +LCDM28 = 0x0A3B; + +LCDM29 = 0x0A3C; + +LCDM30 = 0x0A3D; + +LCDM31 = 0x0A3E; + +LCDM32 = 0x0A3F; + +LCDM33_LCDBM1 = 0x0A40; + +LCDM34_LCDBM2 = 0x0A41; + +LCDM35_LCDBM3 = 0x0A42; + +LCDM36_LCDBM4 = 0x0A43; + +LCDM37_LCDBM5 = 0x0A44; + +LCDM38_LCDBM6 = 0x0A45; + +LCDM39_LCDBM7 = 0x0A46; + +LCDM40_LCDBM8 = 0x0A47; + +LCDM41_LCDBM9 = 0x0A48; + +LCDM42_LCDBM10 = 0x0A49; + +LCDM43_LCDBM11 = 0x0A4A; + +LCDM44_LCDBM12 = 0x0A4B; + +LCDM45_LCDBM13 = 0x0A4C; + +LCDM46_LCDBM14 = 0x0A4D; + +LCDM47_LCDBM15 = 0x0A4E; + +LCDM48_LCDBM16 = 0x0A4F; + +LCDM49_LCDBM17 = 0x0A50; + +LCDM50_LCDBM18 = 0x0A51; + +LCDM51_LCDBM19 = 0x0A52; + +LCDM52_LCDBM20 = 0x0A53; + + + +/***************************************************************************** + LEA +*****************************************************************************/ +LEACAP = 0x0A80; +LEACAPL = 0x0A80; +LEACAPH = 0x0A82; + +LEACNF0 = 0x0A84; +LEACNF0L = 0x0A84; +LEACNF0H = 0x0A86; + +LEACNF1 = 0x0A88; +LEACNF1L = 0x0A88; +LEACNF1H = 0x0A8A; + +LEACNF2 = 0x0A8C; +LEACNF2L = 0x0A8C; +LEACNF2H = 0x0A8E; + +LEAMB = 0x0A90; +LEAMBL = 0x0A90; +LEAMBH = 0x0A92; + +LEAMT = 0x0A94; +LEAMTL = 0x0A94; +LEAMTH = 0x0A96; + +LEACMA = 0x0A98; +LEACMAL = 0x0A98; +LEACMAH = 0x0A9A; + +LEACMCTL = 0x0A9C; +LEACMCTLL = 0x0A9C; +LEACMCTLH = 0x0A9E; + +LEACMDSTAT = 0x0AA8; +LEACMDSTATL = 0x0AA8; +LEACMDSTATH = 0x0AAA; + +LEAS1STAT = 0x0AAC; +LEAS1STATL = 0x0AAC; +LEAS1STATH = 0x0AAE; + +LEAS0STAT = 0x0AB0; +LEAS0STATL = 0x0AB0; +LEAS0STATH = 0x0AB2; + +LEADSTSTAT = 0x0AB4; +LEADSTSTATL = 0x0AB4; +LEADSTSTATH = 0x0AB6; + +LEAPMCTL = 0x0AC0; +LEAPMCTLL = 0x0AC0; +LEAPMCTLH = 0x0AC2; + +LEAPMDST = 0x0AC4; +LEAPMDSTL = 0x0AC4; +LEAPMDSTH = 0x0AC6; + +LEAPMS1 = 0x0AC8; +LEAPMS1L = 0x0AC8; +LEAPMS1H = 0x0ACA; + +LEAPMS0 = 0x0ACC; +LEAPMS0L = 0x0ACC; +LEAPMS0H = 0x0ACE; + +LEAPMCB = 0x0AD0; +LEAPMCBL = 0x0AD0; +LEAPMCBH = 0x0AD2; + +LEAIFGSET = 0x0AF0; +LEAIFGSETL = 0x0AF0; +LEAIFGSETH = 0x0AF2; + +LEAIE = 0x0AF4; +LEAIEL = 0x0AF4; +LEAIEH = 0x0AF6; + +LEAIFG = 0x0AF8; +LEAIFGL = 0x0AF8; +LEAIFGH = 0x0AFA; + +LEAIV = 0x0AFC; +LEAIVL = 0x0AFC; +LEAIVH = 0x0AFE; + + + +/***************************************************************************** + MPU +*****************************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + MTIF +*****************************************************************************/ +MTIFPGCNF = 0x0F00; +MTIFPGCNF_L = 0x0F00; +MTIFPGCNF_H = 0x0F01; +MTIFPGKVAL = 0x0F02; +MTIFPGKVAL_L = 0x0F02; +MTIFPGKVAL_H = 0x0F03; +MTIFPGCTL = 0x0F04; +MTIFPGCTL_L = 0x0F04; +MTIFPGCTL_H = 0x0F05; +MTIFPGSR = 0x0F06; +MTIFPGSR_L = 0x0F06; +MTIFPGSR_H = 0x0F07; +MTIFPCCNF = 0x0F08; +MTIFPCCNF_L = 0x0F08; +MTIFPCCNF_H = 0x0F09; +MTIFPCR = 0x0F0A; +MTIFPCR_L = 0x0F0A; +MTIFPCR_H = 0x0F0B; +MTIFPCCTL = 0x0F0C; +MTIFPCCTL_L = 0x0F0C; +MTIFPCCTL_H = 0x0F0D; +MTIFPCSR = 0x0F0E; +MTIFPCSR_L = 0x0F0E; +MTIFPCSR_H = 0x0F0F; +MTIFTPCTL = 0x0F10; +MTIFTPCTL_L = 0x0F10; +MTIFTPCTL_H = 0x0F11; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RAMCTL +*****************************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +RCCTL1 = 0x015A; +RCCTL1_L = 0x015A; +RCCTL1_H = 0x015B; + + +/***************************************************************************** + REF_A +*****************************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; + + +/***************************************************************************** + RTC_C +*****************************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCIV_L = 0x04AE; +RTCIV_H = 0x04AF; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCCNT12 = 0x04B0; +RTCCNT12_L = 0x04B0; +RTCCNT12_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCCNT34 = 0x04B2; +RTCCNT34_L = 0x04B2; +RTCCNT34_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BIN2BCD_L = 0x04BC; +BIN2BCD_H = 0x04BD; +BCD2BIN = 0x04BE; +BCD2BIN_L = 0x04BE; +BCD2BIN_H = 0x04BF; +RT0PS = 0x04AC; + +RT1PS = 0x04AD; + +RTCCNT1 = 0x04B0; + +RTCCNT2 = 0x04B1; + +RTCCNT3 = 0x04B2; + +RTCCNT4 = 0x04B3; + + + +/***************************************************************************** + SAPH_A +*****************************************************************************/ +SAPH_AIIDX = 0x0E00; +SAPH_AIIDX_L = 0x0E00; +SAPH_AIIDX_H = 0x0E01; +SAPH_AMIS = 0x0E02; +SAPH_AMIS_L = 0x0E02; +SAPH_AMIS_H = 0x0E03; +SAPH_ARIS = 0x0E04; +SAPH_ARIS_L = 0x0E04; +SAPH_ARIS_H = 0x0E05; +SAPH_AIMSC = 0x0E06; +SAPH_AIMSC_L = 0x0E06; +SAPH_AIMSC_H = 0x0E07; +SAPH_AICR = 0x0E08; +SAPH_AICR_L = 0x0E08; +SAPH_AICR_H = 0x0E09; +SAPH_AISR = 0x0E0A; +SAPH_AISR_L = 0x0E0A; +SAPH_AISR_H = 0x0E0B; +SAPH_ADESCLO = 0x0E0C; +SAPH_ADESCLO_L = 0x0E0C; +SAPH_ADESCLO_H = 0x0E0D; +SAPH_ADESCHI = 0x0E0E; +SAPH_ADESCHI_L = 0x0E0E; +SAPH_ADESCHI_H = 0x0E0F; +SAPH_AKEY = 0x0E10; +SAPH_AKEY_L = 0x0E10; +SAPH_AKEY_H = 0x0E11; +SAPH_AOCTL0 = 0x0E12; +SAPH_AOCTL0_L = 0x0E12; +SAPH_AOCTL0_H = 0x0E13; +SAPH_AOCTL1 = 0x0E14; +SAPH_AOCTL1_L = 0x0E14; +SAPH_AOCTL1_H = 0x0E15; +SAPH_AOSEL = 0x0E16; +SAPH_AOSEL_L = 0x0E16; +SAPH_AOSEL_H = 0x0E17; +SAPH_ACH0PUT = 0x0E20; +SAPH_ACH0PUT_L = 0x0E20; +SAPH_ACH0PUT_H = 0x0E21; +SAPH_ACH0PDT = 0x0E22; +SAPH_ACH0PDT_L = 0x0E22; +SAPH_ACH0PDT_H = 0x0E23; +SAPH_ACH0TT = 0x0E24; +SAPH_ACH0TT_L = 0x0E24; +SAPH_ACH0TT_H = 0x0E25; +SAPH_ACH1PUT = 0x0E26; +SAPH_ACH1PUT_L = 0x0E26; +SAPH_ACH1PUT_H = 0x0E27; +SAPH_ACH1PDT = 0x0E28; +SAPH_ACH1PDT_L = 0x0E28; +SAPH_ACH1PDT_H = 0x0E29; +SAPH_ACH1TT = 0x0E2A; +SAPH_ACH1TT_L = 0x0E2A; +SAPH_ACH1TT_H = 0x0E2B; +SAPH_AMCNF = 0x0E2C; +SAPH_AMCNF_L = 0x0E2C; +SAPH_AMCNF_H = 0x0E2D; +SAPH_ATACTL = 0x0E2E; +SAPH_ATACTL_L = 0x0E2E; +SAPH_ATACTL_H = 0x0E2F; +SAPH_AICTL0 = 0x0E30; +SAPH_AICTL0_L = 0x0E30; +SAPH_AICTL0_H = 0x0E31; +SAPH_ABCTL = 0x0E34; +SAPH_ABCTL_L = 0x0E34; +SAPH_ABCTL_H = 0x0E35; +SAPH_APGC = 0x0E40; +SAPH_APGC_L = 0x0E40; +SAPH_APGC_H = 0x0E41; +SAPH_APGLPER = 0x0E42; +SAPH_APGLPER_L = 0x0E42; +SAPH_APGLPER_H = 0x0E43; +SAPH_APGHPER = 0x0E44; +SAPH_APGHPER_L = 0x0E44; +SAPH_APGHPER_H = 0x0E45; +SAPH_APGCTL = 0x0E46; +SAPH_APGCTL_L = 0x0E46; +SAPH_APGCTL_H = 0x0E47; +SAPH_APPGTRIG = 0x0E48; +SAPH_APPGTRIG_L = 0x0E48; +SAPH_APPGTRIG_H = 0x0E49; +SAPH_AXPGCTL = 0x0E4A; +SAPH_AXPGCTL_L = 0x0E4A; +SAPH_AXPGCTL_H = 0x0E4B; +SAPH_AXPGLPER = 0x0E4C; +SAPH_AXPGLPER_L = 0x0E4C; +SAPH_AXPGLPER_H = 0x0E4D; +SAPH_AXPGHPER = 0x0E4E; +SAPH_AXPGHPER_L = 0x0E4E; +SAPH_AXPGHPER_H = 0x0E4F; +SAPH_AASCTL0 = 0x0E60; +SAPH_AASCTL0_L = 0x0E60; +SAPH_AASCTL0_H = 0x0E61; +SAPH_AASCTL1 = 0x0E62; +SAPH_AASCTL1_L = 0x0E62; +SAPH_AASCTL1_H = 0x0E63; +SAPH_AASQTRIG = 0x0E64; + +SAPH_AAPOL = 0x0E66; +SAPH_AAPOL_L = 0x0E66; +SAPH_AAPOL_H = 0x0E67; +SAPH_AAPLEV = 0x0E68; +SAPH_AAPLEV_L = 0x0E68; +SAPH_AAPLEV_H = 0x0E69; +SAPH_AAPHIZ = 0x0E6A; +SAPH_AAPHIZ_L = 0x0E6A; +SAPH_AAPHIZ_H = 0x0E6B; +SAPH_AATM_A = 0x0E6E; +SAPH_AATM_A_L = 0x0E6E; +SAPH_AATM_A_H = 0x0E6F; +SAPH_AATM_B = 0x0E70; +SAPH_AATM_B_L = 0x0E70; +SAPH_AATM_B_H = 0x0E71; +SAPH_AATM_C = 0x0E72; +SAPH_AATM_C_L = 0x0E72; +SAPH_AATM_C_H = 0x0E73; +SAPH_AATM_D = 0x0E74; +SAPH_AATM_D_L = 0x0E74; +SAPH_AATM_D_H = 0x0E75; +SAPH_AATM_E = 0x0E76; +SAPH_AATM_E_L = 0x0E76; +SAPH_AATM_E_H = 0x0E77; +SAPH_AATM_F = 0x0E78; +SAPH_AATM_F_L = 0x0E78; +SAPH_AATM_F_H = 0x0E79; +SAPH_ATBCTL = 0x0E7A; +SAPH_ATBCTL_L = 0x0E7A; +SAPH_ATBCTL_H = 0x0E7B; +SAPH_AATIMLO = 0x0E7C; +SAPH_AATIMLO_L = 0x0E7C; +SAPH_AATIMLO_H = 0x0E7D; +SAPH_AATIMHI = 0x0E7E; +SAPH_AATIMHI_L = 0x0E7E; +SAPH_AATIMHI_H = 0x0E7F; + + +/***************************************************************************** + SDHS +*****************************************************************************/ +SDHSIIDX = 0x0E80; +SDHSIIDX_L = 0x0E80; +SDHSIIDX_H = 0x0E81; +SDHSMIS = 0x0E82; +SDHSMIS_L = 0x0E82; +SDHSMIS_H = 0x0E83; +SDHSRIS = 0x0E84; +SDHSRIS_L = 0x0E84; +SDHSRIS_H = 0x0E85; +SDHSIMSC = 0x0E86; +SDHSIMSC_L = 0x0E86; +SDHSIMSC_H = 0x0E87; +SDHSICR = 0x0E88; +SDHSICR_L = 0x0E88; +SDHSICR_H = 0x0E89; +SDHSISR = 0x0E8A; +SDHSISR_L = 0x0E8A; +SDHSISR_H = 0x0E8B; +SDHSDESCLO = 0x0E8C; +SDHSDESCLO_L = 0x0E8C; +SDHSDESCLO_H = 0x0E8D; +SDHSDESCHI = 0x0E8E; +SDHSDESCHI_L = 0x0E8E; +SDHSDESCHI_H = 0x0E8F; +SDHSCTL0 = 0x0E90; +SDHSCTL0_L = 0x0E90; +SDHSCTL0_H = 0x0E91; +SDHSCTL1 = 0x0E92; +SDHSCTL1_L = 0x0E92; +SDHSCTL1_H = 0x0E93; +SDHSCTL2 = 0x0E94; +SDHSCTL2_L = 0x0E94; +SDHSCTL2_H = 0x0E95; +SDHSCTL3 = 0x0E96; +SDHSCTL3_L = 0x0E96; +SDHSCTL3_H = 0x0E97; +SDHSCTL4 = 0x0E98; +SDHSCTL4_L = 0x0E98; +SDHSCTL4_H = 0x0E99; +SDHSCTL5 = 0x0E9A; +SDHSCTL5_L = 0x0E9A; +SDHSCTL5_H = 0x0E9B; +SDHSCTL6 = 0x0E9C; +SDHSCTL6_L = 0x0E9C; +SDHSCTL6_H = 0x0E9D; +SDHSCTL7 = 0x0E9E; +SDHSCTL7_L = 0x0E9E; +SDHSCTL7_H = 0x0E9F; +SDHSDT = 0x0EA2; +SDHSDT_L = 0x0EA2; +SDHSDT_H = 0x0EA3; +SDHSWINHITH = 0x0EA4; +SDHSWINHITH_L = 0x0EA4; +SDHSWINHITH_H = 0x0EA5; +SDHSWINLOTH = 0x0EA6; +SDHSWINLOTH_L = 0x0EA6; +SDHSWINLOTH_H = 0x0EA7; +SDHSDTCDA = 0x0EA8; +SDHSDTCDA_L = 0x0EA8; +SDHSDTCDA_H = 0x0EA9; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0340; +TA0CTL_L = 0x0340; +TA0CTL_H = 0x0341; +TA0CCTL0 = 0x0342; +TA0CCTL0_L = 0x0342; +TA0CCTL0_H = 0x0343; +TA0CCTL1 = 0x0344; +TA0CCTL1_L = 0x0344; +TA0CCTL1_H = 0x0345; +TA0CCTL2 = 0x0346; +TA0CCTL2_L = 0x0346; +TA0CCTL2_H = 0x0347; +TA0R = 0x0350; +TA0R_L = 0x0350; +TA0R_H = 0x0351; +TA0CCR0 = 0x0352; +TA0CCR0_L = 0x0352; +TA0CCR0_H = 0x0353; +TA0CCR1 = 0x0354; +TA0CCR1_L = 0x0354; +TA0CCR1_H = 0x0355; +TA0CCR2 = 0x0356; +TA0CCR2_L = 0x0356; +TA0CCR2_H = 0x0357; +TA0EX0 = 0x0360; +TA0EX0_L = 0x0360; +TA0EX0_H = 0x0361; +TA0IV = 0x036E; +TA0IV_L = 0x036E; +TA0IV_H = 0x036F; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x0380; +TA1CTL_L = 0x0380; +TA1CTL_H = 0x0381; +TA1CCTL0 = 0x0382; +TA1CCTL0_L = 0x0382; +TA1CCTL0_H = 0x0383; +TA1CCTL1 = 0x0384; +TA1CCTL1_L = 0x0384; +TA1CCTL1_H = 0x0385; +TA1CCTL2 = 0x0386; +TA1CCTL2_L = 0x0386; +TA1CCTL2_H = 0x0387; +TA1R = 0x0390; +TA1R_L = 0x0390; +TA1R_H = 0x0391; +TA1CCR0 = 0x0392; +TA1CCR0_L = 0x0392; +TA1CCR0_H = 0x0393; +TA1CCR1 = 0x0394; +TA1CCR1_L = 0x0394; +TA1CCR1_H = 0x0395; +TA1CCR2 = 0x0396; +TA1CCR2_L = 0x0396; +TA1CCR2_H = 0x0397; +TA1EX0 = 0x03A0; +TA1EX0_L = 0x03A0; +TA1EX0_H = 0x03A1; +TA1IV = 0x03AE; +TA1IV_L = 0x03AE; +TA1IV_H = 0x03AF; + + +/***************************************************************************** + TA2 +*****************************************************************************/ +TA2CTL = 0x0400; +TA2CTL_L = 0x0400; +TA2CTL_H = 0x0401; +TA2CCTL0 = 0x0402; +TA2CCTL0_L = 0x0402; +TA2CCTL0_H = 0x0403; +TA2CCTL1 = 0x0404; +TA2CCTL1_L = 0x0404; +TA2CCTL1_H = 0x0405; +TA2R = 0x0410; +TA2R_L = 0x0410; +TA2R_H = 0x0411; +TA2CCR0 = 0x0412; +TA2CCR0_L = 0x0412; +TA2CCR0_H = 0x0413; +TA2CCR1 = 0x0414; +TA2CCR1_L = 0x0414; +TA2CCR1_H = 0x0415; +TA2EX0 = 0x0420; +TA2EX0_L = 0x0420; +TA2EX0_H = 0x0421; +TA2IV = 0x042E; +TA2IV_L = 0x042E; +TA2IV_H = 0x042F; + + +/***************************************************************************** + TA3 +*****************************************************************************/ +TA3CTL = 0x0440; +TA3CTL_L = 0x0440; +TA3CTL_H = 0x0441; +TA3CCTL0 = 0x0442; +TA3CCTL0_L = 0x0442; +TA3CCTL0_H = 0x0443; +TA3CCTL1 = 0x0444; +TA3CCTL1_L = 0x0444; +TA3CCTL1_H = 0x0445; +TA3R = 0x0450; +TA3R_L = 0x0450; +TA3R_H = 0x0451; +TA3CCR0 = 0x0452; +TA3CCR0_L = 0x0452; +TA3CCR0_H = 0x0453; +TA3CCR1 = 0x0454; +TA3CCR1_L = 0x0454; +TA3CCR1_H = 0x0455; +TA3EX0 = 0x0460; +TA3EX0_L = 0x0460; +TA3EX0_H = 0x0461; +TA3IV = 0x046E; +TA3IV_L = 0x046E; +TA3IV_H = 0x046F; + + +/***************************************************************************** + TA4 +*****************************************************************************/ +TA4CTL = 0x07C0; +TA4CTL_L = 0x07C0; +TA4CTL_H = 0x07C1; +TA4CCTL0 = 0x07C2; +TA4CCTL0_L = 0x07C2; +TA4CCTL0_H = 0x07C3; +TA4CCTL1 = 0x07C4; +TA4CCTL1_L = 0x07C4; +TA4CCTL1_H = 0x07C5; +TA4R = 0x07D0; +TA4R_L = 0x07D0; +TA4R_H = 0x07D1; +TA4CCR0 = 0x07D2; +TA4CCR0_L = 0x07D2; +TA4CCR0_H = 0x07D3; +TA4CCR1 = 0x07D4; +TA4CCR1_L = 0x07D4; +TA4CCR1_H = 0x07D5; +TA4EX0 = 0x07E0; +TA4EX0_L = 0x07E0; +TA4EX0_H = 0x07E1; +TA4IV = 0x07EE; +TA4IV_L = 0x07EE; +TA4IV_H = 0x07EF; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x03C0; +TB0CTL_L = 0x03C0; +TB0CTL_H = 0x03C1; +TB0CCTL0 = 0x03C2; +TB0CCTL0_L = 0x03C2; +TB0CCTL0_H = 0x03C3; +TB0CCTL1 = 0x03C4; +TB0CCTL1_L = 0x03C4; +TB0CCTL1_H = 0x03C5; +TB0CCTL2 = 0x03C6; +TB0CCTL2_L = 0x03C6; +TB0CCTL2_H = 0x03C7; +TB0CCTL3 = 0x03C8; +TB0CCTL3_L = 0x03C8; +TB0CCTL3_H = 0x03C9; +TB0CCTL4 = 0x03CA; +TB0CCTL4_L = 0x03CA; +TB0CCTL4_H = 0x03CB; +TB0CCTL5 = 0x03CC; +TB0CCTL5_L = 0x03CC; +TB0CCTL5_H = 0x03CD; +TB0CCTL6 = 0x03CE; +TB0CCTL6_L = 0x03CE; +TB0CCTL6_H = 0x03CF; +TB0R = 0x03D0; +TB0R_L = 0x03D0; +TB0R_H = 0x03D1; +TB0CCR0 = 0x03D2; +TB0CCR0_L = 0x03D2; +TB0CCR0_H = 0x03D3; +TB0CCR1 = 0x03D4; +TB0CCR1_L = 0x03D4; +TB0CCR1_H = 0x03D5; +TB0CCR2 = 0x03D6; +TB0CCR2_L = 0x03D6; +TB0CCR2_H = 0x03D7; +TB0CCR3 = 0x03D8; +TB0CCR3_L = 0x03D8; +TB0CCR3_H = 0x03D9; +TB0CCR4 = 0x03DA; +TB0CCR4_L = 0x03DA; +TB0CCR4_H = 0x03DB; +TB0CCR5 = 0x03DC; +TB0CCR5_L = 0x03DC; +TB0CCR5_H = 0x03DD; +TB0CCR6 = 0x03DE; +TB0CCR6_L = 0x03DE; +TB0CCR6_H = 0x03DF; +TB0EX0 = 0x03E0; +TB0EX0_L = 0x03E0; +TB0EX0_H = 0x03E1; +TB0IV = 0x03EE; +TB0IV_L = 0x03EE; +TB0IV_H = 0x03EF; + + +/***************************************************************************** + UUPS +*****************************************************************************/ +UUPSIIDX = 0x0EC0; +UUPSIIDX_L = 0x0EC0; +UUPSIIDX_H = 0x0EC1; +UUPSMIS = 0x0EC2; +UUPSMIS_L = 0x0EC2; +UUPSMIS_H = 0x0EC3; +UUPSRIS = 0x0EC4; +UUPSRIS_L = 0x0EC4; +UUPSRIS_H = 0x0EC5; +UUPSIMSC = 0x0EC6; +UUPSIMSC_L = 0x0EC6; +UUPSIMSC_H = 0x0EC7; +UUPSICR = 0x0EC8; +UUPSICR_L = 0x0EC8; +UUPSICR_H = 0x0EC9; +UUPSISR = 0x0ECA; +UUPSISR_L = 0x0ECA; +UUPSISR_H = 0x0ECB; +UUPSDESCLO = 0x0ECC; +UUPSDESCLO_L = 0x0ECC; +UUPSDESCLO_H = 0x0ECD; +UUPSDESCHI = 0x0ECE; +UUPSDESCHI_L = 0x0ECE; +UUPSDESCHI_H = 0x0ECF; +UUPSCTL = 0x0ED0; +UUPSCTL_L = 0x0ED0; +UUPSCTL_H = 0x0ED1; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0STATW_L = 0x05CA; +UCA0STATW_H = 0x05CB; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0ABCTL_L = 0x05D0; +UCA0ABCTL_H = 0x05D1; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +UCA0IV_L = 0x05DE; +UCA0IV_H = 0x05DF; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1STATW_L = 0x05EA; +UCA1STATW_H = 0x05EB; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1ABCTL_L = 0x05F0; +UCA1ABCTL_H = 0x05F1; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +UCA1IV_L = 0x05FE; +UCA1IV_H = 0x05FF; + + +/***************************************************************************** + eUSCI_A2 +*****************************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2STATW_L = 0x060A; +UCA2STATW_H = 0x060B; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2ABCTL_L = 0x0610; +UCA2ABCTL_H = 0x0611; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +UCA2IV_L = 0x061E; +UCA2IV_H = 0x061F; + + +/***************************************************************************** + eUSCI_A3 +*****************************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3STATW_L = 0x062A; +UCA3STATW_H = 0x062B; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3ABCTL_L = 0x0630; +UCA3ABCTL_H = 0x0631; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +UCA3IV_L = 0x063E; +UCA3IV_H = 0x063F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +UCB0IV_L = 0x066E; +UCB0IV_H = 0x066F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +UCB1IV_L = 0x06AE; +UCB1IV_H = 0x06AF; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr6045.cmd b/msp430/msp430fr6045.cmd new file mode 100644 index 00000000..0d00cff1 --- /dev/null +++ b/msp430/msp430fr6045.cmd @@ -0,0 +1,2205 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr6045.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC12_B +*****************************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; + + +/***************************************************************************** + AES256 +*****************************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; + + +/***************************************************************************** + CAPTIO0 +*****************************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; + + +/***************************************************************************** + CAPTIO1 +*****************************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; + + +/***************************************************************************** + COMP_E +*****************************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; + + +/***************************************************************************** + CRC32 +*****************************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +P7IV = 0x026E; +P7IV_L = 0x026E; +P7IV_H = 0x026F; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +PDIES = 0x0278; +PDIES_L = 0x0278; +PDIES_H = 0x0279; +PDIE = 0x027A; +PDIE_L = 0x027A; +PDIE_H = 0x027B; +PDIFG = 0x027C; +PDIFG_L = 0x027C; +PDIFG_H = 0x027D; +P8IV = 0x027E; +P8IV_L = 0x027E; +P8IV_H = 0x027F; +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +P9IV = 0x028E; +P9IV_L = 0x028E; +P9IV_H = 0x028F; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +PEIES = 0x0298; +PEIES_L = 0x0298; +PEIES_H = 0x0299; +PEIE = 0x029A; +PEIE_L = 0x029A; +PEIE_H = 0x029B; +PEIFG = 0x029C; +PEIFG_L = 0x029C; +PEIFG_H = 0x029D; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + +P7IN = 0x0260; + +P8IN = 0x0261; + +P7OUT = 0x0262; + +P8OUT = 0x0263; + +P7DIR = 0x0264; + +P8DIR = 0x0265; + +P7REN = 0x0266; + +P8REN = 0x0267; + +P7SEL0 = 0x026A; + +P8SEL0 = 0x026B; + +P7SEL1 = 0x026C; + +P8SEL1 = 0x026D; + +P7SELC = 0x0276; + +P8SELC = 0x0277; + +P7IES = 0x0278; + +P8IES = 0x0279; + +P7IE = 0x027A; + +P8IE = 0x027B; + +P7IFG = 0x027C; + +P8IFG = 0x027D; + +P9IN = 0x0280; + +P9OUT = 0x0282; + +P9DIR = 0x0284; + +P9REN = 0x0286; + +P9SEL0 = 0x028A; + +P9SEL1 = 0x028C; + +P9SELC = 0x0296; + +P9IES = 0x0298; + +P9IE = 0x029A; + +P9IFG = 0x029C; + + + +/***************************************************************************** + DMA +*****************************************************************************/ +DMACTL0 = 0x0500; +DMACTL0_L = 0x0500; +DMACTL0_H = 0x0501; +DMACTL1 = 0x0502; +DMACTL1_L = 0x0502; +DMACTL1_H = 0x0503; +DMACTL2 = 0x0504; +DMACTL2_L = 0x0504; +DMACTL2_H = 0x0505; +DMACTL4 = 0x0508; +DMACTL4_L = 0x0508; +DMACTL4_H = 0x0509; +DMAIV = 0x050E; +DMAIV_L = 0x050E; +DMAIV_H = 0x050F; +DMA0CTL = 0x0510; +DMA0CTL_L = 0x0510; +DMA0CTL_H = 0x0511; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA0SZ_L = 0x051A; +DMA0SZ_H = 0x051B; +DMA1CTL = 0x0520; +DMA1CTL_L = 0x0520; +DMA1CTL_H = 0x0521; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA1SZ_L = 0x052A; +DMA1SZ_H = 0x052B; +DMA2CTL = 0x0530; +DMA2CTL_L = 0x0530; +DMA2CTL_H = 0x0531; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA2SZ_L = 0x053A; +DMA2SZ_H = 0x053B; +DMA3CTL = 0x0540; +DMA3CTL_L = 0x0540; +DMA3CTL_H = 0x0541; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA3SZ_L = 0x054A; +DMA3SZ_H = 0x054B; +DMA4CTL = 0x0550; +DMA4CTL_L = 0x0550; +DMA4CTL_H = 0x0551; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA4SZ_L = 0x055A; +DMA4SZ_H = 0x055B; +DMA5CTL = 0x0560; +DMA5CTL_L = 0x0560; +DMA5CTL_H = 0x0561; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +DMA5SZ_L = 0x056A; +DMA5SZ_H = 0x056B; + + +/***************************************************************************** + FRCTL_A +*****************************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; + + +/***************************************************************************** + HSPLL +*****************************************************************************/ +HSPLLIIDX = 0x0EE0; +HSPLLIIDX_L = 0x0EE0; +HSPLLIIDX_H = 0x0EE1; +HSPLLMIS = 0x0EE2; +HSPLLMIS_L = 0x0EE2; +HSPLLMIS_H = 0x0EE3; +HSPLLRIS = 0x0EE4; +HSPLLRIS_L = 0x0EE4; +HSPLLRIS_H = 0x0EE5; +HSPLLIMSC = 0x0EE6; +HSPLLIMSC_L = 0x0EE6; +HSPLLIMSC_H = 0x0EE7; +HSPLLICR = 0x0EE8; +HSPLLICR_L = 0x0EE8; +HSPLLICR_H = 0x0EE9; +HSPLLISR = 0x0EEA; +HSPLLISR_L = 0x0EEA; +HSPLLISR_H = 0x0EEB; +HSPLLDESCLO = 0x0EEC; +HSPLLDESCLO_L = 0x0EEC; +HSPLLDESCLO_H = 0x0EED; +HSPLLDESCHI = 0x0EEE; +HSPLLDESCHI_L = 0x0EEE; +HSPLLDESCHI_H = 0x0EEF; +HSPLLCTL = 0x0EF0; +HSPLLCTL_L = 0x0EF0; +HSPLLCTL_H = 0x0EF1; +HSPLLUSSXTLCTL = 0x0EF2; +HSPLLUSSXTLCTL_L = 0x0EF2; +HSPLLUSSXTLCTL_H = 0x0EF3; + + +/***************************************************************************** + LCD_C +*****************************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCPCTL3 = 0x0A10; +LCDCPCTL3_L = 0x0A10; +LCDCPCTL3_H = 0x0A11; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDCIV_L = 0x0A1E; +LCDCIV_H = 0x0A1F; +LCDM1 = 0x0A20; + +LCDM2 = 0x0A21; + +LCDM3 = 0x0A22; + +LCDM4 = 0x0A23; + +LCDM5 = 0x0A24; + +LCDM6 = 0x0A25; + +LCDM7 = 0x0A26; + +LCDM8 = 0x0A27; + +LCDM9 = 0x0A28; + +LCDM10 = 0x0A29; + +LCDM11 = 0x0A2A; + +LCDM12 = 0x0A2B; + +LCDM13 = 0x0A2C; + +LCDM14 = 0x0A2D; + +LCDM15 = 0x0A2E; + +LCDM16 = 0x0A2F; + +LCDM17 = 0x0A30; + +LCDM18 = 0x0A31; + +LCDM19 = 0x0A32; + +LCDM20 = 0x0A33; + +LCDM21 = 0x0A34; + +LCDM22 = 0x0A35; + +LCDM23 = 0x0A36; + +LCDM24 = 0x0A37; + +LCDM25 = 0x0A38; + +LCDM26 = 0x0A39; + +LCDM27 = 0x0A3A; + +LCDM28 = 0x0A3B; + +LCDM29 = 0x0A3C; + +LCDM30 = 0x0A3D; + +LCDM31 = 0x0A3E; + +LCDM32 = 0x0A3F; + +LCDM33_LCDBM1 = 0x0A40; + +LCDM34_LCDBM2 = 0x0A41; + +LCDM35_LCDBM3 = 0x0A42; + +LCDM36_LCDBM4 = 0x0A43; + +LCDM37_LCDBM5 = 0x0A44; + +LCDM38_LCDBM6 = 0x0A45; + +LCDM39_LCDBM7 = 0x0A46; + +LCDM40_LCDBM8 = 0x0A47; + +LCDM41_LCDBM9 = 0x0A48; + +LCDM42_LCDBM10 = 0x0A49; + +LCDM43_LCDBM11 = 0x0A4A; + +LCDM44_LCDBM12 = 0x0A4B; + +LCDM45_LCDBM13 = 0x0A4C; + +LCDM46_LCDBM14 = 0x0A4D; + +LCDM47_LCDBM15 = 0x0A4E; + +LCDM48_LCDBM16 = 0x0A4F; + +LCDM49_LCDBM17 = 0x0A50; + +LCDM50_LCDBM18 = 0x0A51; + +LCDM51_LCDBM19 = 0x0A52; + +LCDM52_LCDBM20 = 0x0A53; + + + +/***************************************************************************** + LEA +*****************************************************************************/ +LEACAP = 0x0A80; +LEACAPL = 0x0A80; +LEACAPH = 0x0A82; + +LEACNF0 = 0x0A84; +LEACNF0L = 0x0A84; +LEACNF0H = 0x0A86; + +LEACNF1 = 0x0A88; +LEACNF1L = 0x0A88; +LEACNF1H = 0x0A8A; + +LEACNF2 = 0x0A8C; +LEACNF2L = 0x0A8C; +LEACNF2H = 0x0A8E; + +LEAMB = 0x0A90; +LEAMBL = 0x0A90; +LEAMBH = 0x0A92; + +LEAMT = 0x0A94; +LEAMTL = 0x0A94; +LEAMTH = 0x0A96; + +LEACMA = 0x0A98; +LEACMAL = 0x0A98; +LEACMAH = 0x0A9A; + +LEACMCTL = 0x0A9C; +LEACMCTLL = 0x0A9C; +LEACMCTLH = 0x0A9E; + +LEACMDSTAT = 0x0AA8; +LEACMDSTATL = 0x0AA8; +LEACMDSTATH = 0x0AAA; + +LEAS1STAT = 0x0AAC; +LEAS1STATL = 0x0AAC; +LEAS1STATH = 0x0AAE; + +LEAS0STAT = 0x0AB0; +LEAS0STATL = 0x0AB0; +LEAS0STATH = 0x0AB2; + +LEADSTSTAT = 0x0AB4; +LEADSTSTATL = 0x0AB4; +LEADSTSTATH = 0x0AB6; + +LEAPMCTL = 0x0AC0; +LEAPMCTLL = 0x0AC0; +LEAPMCTLH = 0x0AC2; + +LEAPMDST = 0x0AC4; +LEAPMDSTL = 0x0AC4; +LEAPMDSTH = 0x0AC6; + +LEAPMS1 = 0x0AC8; +LEAPMS1L = 0x0AC8; +LEAPMS1H = 0x0ACA; + +LEAPMS0 = 0x0ACC; +LEAPMS0L = 0x0ACC; +LEAPMS0H = 0x0ACE; + +LEAPMCB = 0x0AD0; +LEAPMCBL = 0x0AD0; +LEAPMCBH = 0x0AD2; + +LEAIFGSET = 0x0AF0; +LEAIFGSETL = 0x0AF0; +LEAIFGSETH = 0x0AF2; + +LEAIE = 0x0AF4; +LEAIEL = 0x0AF4; +LEAIEH = 0x0AF6; + +LEAIFG = 0x0AF8; +LEAIFGL = 0x0AF8; +LEAIFGH = 0x0AFA; + +LEAIV = 0x0AFC; +LEAIVL = 0x0AFC; +LEAIVH = 0x0AFE; + + + +/***************************************************************************** + MPU +*****************************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + MTIF +*****************************************************************************/ +MTIFPGCNF = 0x0F00; +MTIFPGCNF_L = 0x0F00; +MTIFPGCNF_H = 0x0F01; +MTIFPGKVAL = 0x0F02; +MTIFPGKVAL_L = 0x0F02; +MTIFPGKVAL_H = 0x0F03; +MTIFPGCTL = 0x0F04; +MTIFPGCTL_L = 0x0F04; +MTIFPGCTL_H = 0x0F05; +MTIFPGSR = 0x0F06; +MTIFPGSR_L = 0x0F06; +MTIFPGSR_H = 0x0F07; +MTIFPCCNF = 0x0F08; +MTIFPCCNF_L = 0x0F08; +MTIFPCCNF_H = 0x0F09; +MTIFPCR = 0x0F0A; +MTIFPCR_L = 0x0F0A; +MTIFPCR_H = 0x0F0B; +MTIFPCCTL = 0x0F0C; +MTIFPCCTL_L = 0x0F0C; +MTIFPCCTL_H = 0x0F0D; +MTIFPCSR = 0x0F0E; +MTIFPCSR_L = 0x0F0E; +MTIFPCSR_H = 0x0F0F; +MTIFTPCTL = 0x0F10; +MTIFTPCTL_L = 0x0F10; +MTIFTPCTL_H = 0x0F11; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RAMCTL +*****************************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +RCCTL1 = 0x015A; +RCCTL1_L = 0x015A; +RCCTL1_H = 0x015B; + + +/***************************************************************************** + REF_A +*****************************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; + + +/***************************************************************************** + RTC_C +*****************************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCIV_L = 0x04AE; +RTCIV_H = 0x04AF; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCCNT12 = 0x04B0; +RTCCNT12_L = 0x04B0; +RTCCNT12_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCCNT34 = 0x04B2; +RTCCNT34_L = 0x04B2; +RTCCNT34_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BIN2BCD_L = 0x04BC; +BIN2BCD_H = 0x04BD; +BCD2BIN = 0x04BE; +BCD2BIN_L = 0x04BE; +BCD2BIN_H = 0x04BF; +RT0PS = 0x04AC; + +RT1PS = 0x04AD; + +RTCCNT1 = 0x04B0; + +RTCCNT2 = 0x04B1; + +RTCCNT3 = 0x04B2; + +RTCCNT4 = 0x04B3; + + + +/***************************************************************************** + SAPH +*****************************************************************************/ +SAPHIIDX = 0x0E00; +SAPHIIDX_L = 0x0E00; +SAPHIIDX_H = 0x0E01; +SAPHMIS = 0x0E02; +SAPHMIS_L = 0x0E02; +SAPHMIS_H = 0x0E03; +SAPHRIS = 0x0E04; +SAPHRIS_L = 0x0E04; +SAPHRIS_H = 0x0E05; +SAPHIMSC = 0x0E06; +SAPHIMSC_L = 0x0E06; +SAPHIMSC_H = 0x0E07; +SAPHICR = 0x0E08; +SAPHICR_L = 0x0E08; +SAPHICR_H = 0x0E09; +SAPHISR = 0x0E0A; +SAPHISR_L = 0x0E0A; +SAPHISR_H = 0x0E0B; +SAPHDESCLO = 0x0E0C; +SAPHDESCLO_L = 0x0E0C; +SAPHDESCLO_H = 0x0E0D; +SAPHDESCHI = 0x0E0E; +SAPHDESCHI_L = 0x0E0E; +SAPHDESCHI_H = 0x0E0F; +SAPHKEY = 0x0E10; +SAPHKEY_L = 0x0E10; +SAPHKEY_H = 0x0E11; +SAPHOCTL0 = 0x0E12; +SAPHOCTL0_L = 0x0E12; +SAPHOCTL0_H = 0x0E13; +SAPHOCTL1 = 0x0E14; +SAPHOCTL1_L = 0x0E14; +SAPHOCTL1_H = 0x0E15; +SAPHOSEL = 0x0E16; +SAPHOSEL_L = 0x0E16; +SAPHOSEL_H = 0x0E17; +SAPHCH0PUT = 0x0E20; +SAPHCH0PUT_L = 0x0E20; +SAPHCH0PUT_H = 0x0E21; +SAPHCH0PDT = 0x0E22; +SAPHCH0PDT_L = 0x0E22; +SAPHCH0PDT_H = 0x0E23; +SAPHCH0TT = 0x0E24; +SAPHCH0TT_L = 0x0E24; +SAPHCH0TT_H = 0x0E25; +SAPHCH1PUT = 0x0E26; +SAPHCH1PUT_L = 0x0E26; +SAPHCH1PUT_H = 0x0E27; +SAPHCH1PDT = 0x0E28; +SAPHCH1PDT_L = 0x0E28; +SAPHCH1PDT_H = 0x0E29; +SAPHCH1TT = 0x0E2A; +SAPHCH1TT_L = 0x0E2A; +SAPHCH1TT_H = 0x0E2B; +SAPHMCNF = 0x0E2C; +SAPHMCNF_L = 0x0E2C; +SAPHMCNF_H = 0x0E2D; +SAPHTACTL = 0x0E2E; +SAPHTACTL_L = 0x0E2E; +SAPHTACTL_H = 0x0E2F; +SAPHICTL0 = 0x0E30; +SAPHICTL0_L = 0x0E30; +SAPHICTL0_H = 0x0E31; +SAPHBCTL = 0x0E34; +SAPHBCTL_L = 0x0E34; +SAPHBCTL_H = 0x0E35; +SAPHPGC = 0x0E40; +SAPHPGC_L = 0x0E40; +SAPHPGC_H = 0x0E41; +SAPHPGLPER = 0x0E42; +SAPHPGLPER_L = 0x0E42; +SAPHPGLPER_H = 0x0E43; +SAPHPGHPER = 0x0E44; +SAPHPGHPER_L = 0x0E44; +SAPHPGHPER_H = 0x0E45; +SAPHPGCTL = 0x0E46; +SAPHPGCTL_L = 0x0E46; +SAPHPGCTL_H = 0x0E47; +SAPHPPGTRIG = 0x0E48; +SAPHPPGTRIG_L = 0x0E48; +SAPHPPGTRIG_H = 0x0E49; +SAPHASCTL0 = 0x0E60; +SAPHASCTL0_L = 0x0E60; +SAPHASCTL0_H = 0x0E61; +SAPHASCTL1 = 0x0E62; +SAPHASCTL1_L = 0x0E62; +SAPHASCTL1_H = 0x0E63; +SAPHASQTRIG = 0x0E64; + +SAPHAPOL = 0x0E66; +SAPHAPOL_L = 0x0E66; +SAPHAPOL_H = 0x0E67; +SAPHAPLEV = 0x0E68; +SAPHAPLEV_L = 0x0E68; +SAPHAPLEV_H = 0x0E69; +SAPHAPHIZ = 0x0E6A; +SAPHAPHIZ_L = 0x0E6A; +SAPHAPHIZ_H = 0x0E6B; +SAPHATM_A = 0x0E6E; +SAPHATM_A_L = 0x0E6E; +SAPHATM_A_H = 0x0E6F; +SAPHATM_B = 0x0E70; +SAPHATM_B_L = 0x0E70; +SAPHATM_B_H = 0x0E71; +SAPHATM_C = 0x0E72; +SAPHATM_C_L = 0x0E72; +SAPHATM_C_H = 0x0E73; +SAPHATM_D = 0x0E74; +SAPHATM_D_L = 0x0E74; +SAPHATM_D_H = 0x0E75; +SAPHATM_E = 0x0E76; +SAPHATM_E_L = 0x0E76; +SAPHATM_E_H = 0x0E77; +SAPHATM_F = 0x0E78; +SAPHATM_F_L = 0x0E78; +SAPHATM_F_H = 0x0E79; +SAPHTBCTL = 0x0E7A; +SAPHTBCTL_L = 0x0E7A; +SAPHTBCTL_H = 0x0E7B; +SAPHATIMLO = 0x0E7C; +SAPHATIMLO_L = 0x0E7C; +SAPHATIMLO_H = 0x0E7D; +SAPHATIMHI = 0x0E7E; +SAPHATIMHI_L = 0x0E7E; +SAPHATIMHI_H = 0x0E7F; + + +/***************************************************************************** + SDHS +*****************************************************************************/ +SDHSIIDX = 0x0E80; +SDHSIIDX_L = 0x0E80; +SDHSIIDX_H = 0x0E81; +SDHSMIS = 0x0E82; +SDHSMIS_L = 0x0E82; +SDHSMIS_H = 0x0E83; +SDHSRIS = 0x0E84; +SDHSRIS_L = 0x0E84; +SDHSRIS_H = 0x0E85; +SDHSIMSC = 0x0E86; +SDHSIMSC_L = 0x0E86; +SDHSIMSC_H = 0x0E87; +SDHSICR = 0x0E88; +SDHSICR_L = 0x0E88; +SDHSICR_H = 0x0E89; +SDHSISR = 0x0E8A; +SDHSISR_L = 0x0E8A; +SDHSISR_H = 0x0E8B; +SDHSDESCLO = 0x0E8C; +SDHSDESCLO_L = 0x0E8C; +SDHSDESCLO_H = 0x0E8D; +SDHSDESCHI = 0x0E8E; +SDHSDESCHI_L = 0x0E8E; +SDHSDESCHI_H = 0x0E8F; +SDHSCTL0 = 0x0E90; +SDHSCTL0_L = 0x0E90; +SDHSCTL0_H = 0x0E91; +SDHSCTL1 = 0x0E92; +SDHSCTL1_L = 0x0E92; +SDHSCTL1_H = 0x0E93; +SDHSCTL2 = 0x0E94; +SDHSCTL2_L = 0x0E94; +SDHSCTL2_H = 0x0E95; +SDHSCTL3 = 0x0E96; +SDHSCTL3_L = 0x0E96; +SDHSCTL3_H = 0x0E97; +SDHSCTL4 = 0x0E98; +SDHSCTL4_L = 0x0E98; +SDHSCTL4_H = 0x0E99; +SDHSCTL5 = 0x0E9A; +SDHSCTL5_L = 0x0E9A; +SDHSCTL5_H = 0x0E9B; +SDHSCTL6 = 0x0E9C; +SDHSCTL6_L = 0x0E9C; +SDHSCTL6_H = 0x0E9D; +SDHSCTL7 = 0x0E9E; +SDHSCTL7_L = 0x0E9E; +SDHSCTL7_H = 0x0E9F; +SDHSDT = 0x0EA2; +SDHSDT_L = 0x0EA2; +SDHSDT_H = 0x0EA3; +SDHSWINHITH = 0x0EA4; +SDHSWINHITH_L = 0x0EA4; +SDHSWINHITH_H = 0x0EA5; +SDHSWINLOTH = 0x0EA6; +SDHSWINLOTH_L = 0x0EA6; +SDHSWINLOTH_H = 0x0EA7; +SDHSDTCDA = 0x0EA8; +SDHSDTCDA_L = 0x0EA8; +SDHSDTCDA_H = 0x0EA9; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0340; +TA0CTL_L = 0x0340; +TA0CTL_H = 0x0341; +TA0CCTL0 = 0x0342; +TA0CCTL0_L = 0x0342; +TA0CCTL0_H = 0x0343; +TA0CCTL1 = 0x0344; +TA0CCTL1_L = 0x0344; +TA0CCTL1_H = 0x0345; +TA0CCTL2 = 0x0346; +TA0CCTL2_L = 0x0346; +TA0CCTL2_H = 0x0347; +TA0R = 0x0350; +TA0R_L = 0x0350; +TA0R_H = 0x0351; +TA0CCR0 = 0x0352; +TA0CCR0_L = 0x0352; +TA0CCR0_H = 0x0353; +TA0CCR1 = 0x0354; +TA0CCR1_L = 0x0354; +TA0CCR1_H = 0x0355; +TA0CCR2 = 0x0356; +TA0CCR2_L = 0x0356; +TA0CCR2_H = 0x0357; +TA0EX0 = 0x0360; +TA0EX0_L = 0x0360; +TA0EX0_H = 0x0361; +TA0IV = 0x036E; +TA0IV_L = 0x036E; +TA0IV_H = 0x036F; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x0380; +TA1CTL_L = 0x0380; +TA1CTL_H = 0x0381; +TA1CCTL0 = 0x0382; +TA1CCTL0_L = 0x0382; +TA1CCTL0_H = 0x0383; +TA1CCTL1 = 0x0384; +TA1CCTL1_L = 0x0384; +TA1CCTL1_H = 0x0385; +TA1CCTL2 = 0x0386; +TA1CCTL2_L = 0x0386; +TA1CCTL2_H = 0x0387; +TA1R = 0x0390; +TA1R_L = 0x0390; +TA1R_H = 0x0391; +TA1CCR0 = 0x0392; +TA1CCR0_L = 0x0392; +TA1CCR0_H = 0x0393; +TA1CCR1 = 0x0394; +TA1CCR1_L = 0x0394; +TA1CCR1_H = 0x0395; +TA1CCR2 = 0x0396; +TA1CCR2_L = 0x0396; +TA1CCR2_H = 0x0397; +TA1EX0 = 0x03A0; +TA1EX0_L = 0x03A0; +TA1EX0_H = 0x03A1; +TA1IV = 0x03AE; +TA1IV_L = 0x03AE; +TA1IV_H = 0x03AF; + + +/***************************************************************************** + TA2 +*****************************************************************************/ +TA2CTL = 0x0400; +TA2CTL_L = 0x0400; +TA2CTL_H = 0x0401; +TA2CCTL0 = 0x0402; +TA2CCTL0_L = 0x0402; +TA2CCTL0_H = 0x0403; +TA2CCTL1 = 0x0404; +TA2CCTL1_L = 0x0404; +TA2CCTL1_H = 0x0405; +TA2R = 0x0410; +TA2R_L = 0x0410; +TA2R_H = 0x0411; +TA2CCR0 = 0x0412; +TA2CCR0_L = 0x0412; +TA2CCR0_H = 0x0413; +TA2CCR1 = 0x0414; +TA2CCR1_L = 0x0414; +TA2CCR1_H = 0x0415; +TA2EX0 = 0x0420; +TA2EX0_L = 0x0420; +TA2EX0_H = 0x0421; +TA2IV = 0x042E; +TA2IV_L = 0x042E; +TA2IV_H = 0x042F; + + +/***************************************************************************** + TA3 +*****************************************************************************/ +TA3CTL = 0x0440; +TA3CTL_L = 0x0440; +TA3CTL_H = 0x0441; +TA3CCTL0 = 0x0442; +TA3CCTL0_L = 0x0442; +TA3CCTL0_H = 0x0443; +TA3CCTL1 = 0x0444; +TA3CCTL1_L = 0x0444; +TA3CCTL1_H = 0x0445; +TA3R = 0x0450; +TA3R_L = 0x0450; +TA3R_H = 0x0451; +TA3CCR0 = 0x0452; +TA3CCR0_L = 0x0452; +TA3CCR0_H = 0x0453; +TA3CCR1 = 0x0454; +TA3CCR1_L = 0x0454; +TA3CCR1_H = 0x0455; +TA3EX0 = 0x0460; +TA3EX0_L = 0x0460; +TA3EX0_H = 0x0461; +TA3IV = 0x046E; +TA3IV_L = 0x046E; +TA3IV_H = 0x046F; + + +/***************************************************************************** + TA4 +*****************************************************************************/ +TA4CTL = 0x07C0; +TA4CTL_L = 0x07C0; +TA4CTL_H = 0x07C1; +TA4CCTL0 = 0x07C2; +TA4CCTL0_L = 0x07C2; +TA4CCTL0_H = 0x07C3; +TA4CCTL1 = 0x07C4; +TA4CCTL1_L = 0x07C4; +TA4CCTL1_H = 0x07C5; +TA4R = 0x07D0; +TA4R_L = 0x07D0; +TA4R_H = 0x07D1; +TA4CCR0 = 0x07D2; +TA4CCR0_L = 0x07D2; +TA4CCR0_H = 0x07D3; +TA4CCR1 = 0x07D4; +TA4CCR1_L = 0x07D4; +TA4CCR1_H = 0x07D5; +TA4EX0 = 0x07E0; +TA4EX0_L = 0x07E0; +TA4EX0_H = 0x07E1; +TA4IV = 0x07EE; +TA4IV_L = 0x07EE; +TA4IV_H = 0x07EF; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x03C0; +TB0CTL_L = 0x03C0; +TB0CTL_H = 0x03C1; +TB0CCTL0 = 0x03C2; +TB0CCTL0_L = 0x03C2; +TB0CCTL0_H = 0x03C3; +TB0CCTL1 = 0x03C4; +TB0CCTL1_L = 0x03C4; +TB0CCTL1_H = 0x03C5; +TB0CCTL2 = 0x03C6; +TB0CCTL2_L = 0x03C6; +TB0CCTL2_H = 0x03C7; +TB0CCTL3 = 0x03C8; +TB0CCTL3_L = 0x03C8; +TB0CCTL3_H = 0x03C9; +TB0CCTL4 = 0x03CA; +TB0CCTL4_L = 0x03CA; +TB0CCTL4_H = 0x03CB; +TB0CCTL5 = 0x03CC; +TB0CCTL5_L = 0x03CC; +TB0CCTL5_H = 0x03CD; +TB0CCTL6 = 0x03CE; +TB0CCTL6_L = 0x03CE; +TB0CCTL6_H = 0x03CF; +TB0R = 0x03D0; +TB0R_L = 0x03D0; +TB0R_H = 0x03D1; +TB0CCR0 = 0x03D2; +TB0CCR0_L = 0x03D2; +TB0CCR0_H = 0x03D3; +TB0CCR1 = 0x03D4; +TB0CCR1_L = 0x03D4; +TB0CCR1_H = 0x03D5; +TB0CCR2 = 0x03D6; +TB0CCR2_L = 0x03D6; +TB0CCR2_H = 0x03D7; +TB0CCR3 = 0x03D8; +TB0CCR3_L = 0x03D8; +TB0CCR3_H = 0x03D9; +TB0CCR4 = 0x03DA; +TB0CCR4_L = 0x03DA; +TB0CCR4_H = 0x03DB; +TB0CCR5 = 0x03DC; +TB0CCR5_L = 0x03DC; +TB0CCR5_H = 0x03DD; +TB0CCR6 = 0x03DE; +TB0CCR6_L = 0x03DE; +TB0CCR6_H = 0x03DF; +TB0EX0 = 0x03E0; +TB0EX0_L = 0x03E0; +TB0EX0_H = 0x03E1; +TB0IV = 0x03EE; +TB0IV_L = 0x03EE; +TB0IV_H = 0x03EF; + + +/***************************************************************************** + UUPS +*****************************************************************************/ +UUPSIIDX = 0x0EC0; +UUPSIIDX_L = 0x0EC0; +UUPSIIDX_H = 0x0EC1; +UUPSMIS = 0x0EC2; +UUPSMIS_L = 0x0EC2; +UUPSMIS_H = 0x0EC3; +UUPSRIS = 0x0EC4; +UUPSRIS_L = 0x0EC4; +UUPSRIS_H = 0x0EC5; +UUPSIMSC = 0x0EC6; +UUPSIMSC_L = 0x0EC6; +UUPSIMSC_H = 0x0EC7; +UUPSICR = 0x0EC8; +UUPSICR_L = 0x0EC8; +UUPSICR_H = 0x0EC9; +UUPSISR = 0x0ECA; +UUPSISR_L = 0x0ECA; +UUPSISR_H = 0x0ECB; +UUPSDESCLO = 0x0ECC; +UUPSDESCLO_L = 0x0ECC; +UUPSDESCLO_H = 0x0ECD; +UUPSDESCHI = 0x0ECE; +UUPSDESCHI_L = 0x0ECE; +UUPSDESCHI_H = 0x0ECF; +UUPSCTL = 0x0ED0; +UUPSCTL_L = 0x0ED0; +UUPSCTL_H = 0x0ED1; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0STATW_L = 0x05CA; +UCA0STATW_H = 0x05CB; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0ABCTL_L = 0x05D0; +UCA0ABCTL_H = 0x05D1; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +UCA0IV_L = 0x05DE; +UCA0IV_H = 0x05DF; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1STATW_L = 0x05EA; +UCA1STATW_H = 0x05EB; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1ABCTL_L = 0x05F0; +UCA1ABCTL_H = 0x05F1; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +UCA1IV_L = 0x05FE; +UCA1IV_H = 0x05FF; + + +/***************************************************************************** + eUSCI_A2 +*****************************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2STATW_L = 0x060A; +UCA2STATW_H = 0x060B; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2ABCTL_L = 0x0610; +UCA2ABCTL_H = 0x0611; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +UCA2IV_L = 0x061E; +UCA2IV_H = 0x061F; + + +/***************************************************************************** + eUSCI_A3 +*****************************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3STATW_L = 0x062A; +UCA3STATW_H = 0x062B; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3ABCTL_L = 0x0630; +UCA3ABCTL_H = 0x0631; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +UCA3IV_L = 0x063E; +UCA3IV_H = 0x063F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +UCB0IV_L = 0x066E; +UCB0IV_H = 0x066F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +UCB1IV_L = 0x06AE; +UCB1IV_H = 0x06AF; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr6047.cmd b/msp430/msp430fr6047.cmd new file mode 100644 index 00000000..82889f52 --- /dev/null +++ b/msp430/msp430fr6047.cmd @@ -0,0 +1,2205 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr6047.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC12_B +*****************************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; + + +/***************************************************************************** + AES256 +*****************************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; + + +/***************************************************************************** + CAPTIO0 +*****************************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; + + +/***************************************************************************** + CAPTIO1 +*****************************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; + + +/***************************************************************************** + COMP_E +*****************************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; + + +/***************************************************************************** + CRC32 +*****************************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +P7IV = 0x026E; +P7IV_L = 0x026E; +P7IV_H = 0x026F; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +PDIES = 0x0278; +PDIES_L = 0x0278; +PDIES_H = 0x0279; +PDIE = 0x027A; +PDIE_L = 0x027A; +PDIE_H = 0x027B; +PDIFG = 0x027C; +PDIFG_L = 0x027C; +PDIFG_H = 0x027D; +P8IV = 0x027E; +P8IV_L = 0x027E; +P8IV_H = 0x027F; +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +P9IV = 0x028E; +P9IV_L = 0x028E; +P9IV_H = 0x028F; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +PEIES = 0x0298; +PEIES_L = 0x0298; +PEIES_H = 0x0299; +PEIE = 0x029A; +PEIE_L = 0x029A; +PEIE_H = 0x029B; +PEIFG = 0x029C; +PEIFG_L = 0x029C; +PEIFG_H = 0x029D; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + +P7IN = 0x0260; + +P8IN = 0x0261; + +P7OUT = 0x0262; + +P8OUT = 0x0263; + +P7DIR = 0x0264; + +P8DIR = 0x0265; + +P7REN = 0x0266; + +P8REN = 0x0267; + +P7SEL0 = 0x026A; + +P8SEL0 = 0x026B; + +P7SEL1 = 0x026C; + +P8SEL1 = 0x026D; + +P7SELC = 0x0276; + +P8SELC = 0x0277; + +P7IES = 0x0278; + +P8IES = 0x0279; + +P7IE = 0x027A; + +P8IE = 0x027B; + +P7IFG = 0x027C; + +P8IFG = 0x027D; + +P9IN = 0x0280; + +P9OUT = 0x0282; + +P9DIR = 0x0284; + +P9REN = 0x0286; + +P9SEL0 = 0x028A; + +P9SEL1 = 0x028C; + +P9SELC = 0x0296; + +P9IES = 0x0298; + +P9IE = 0x029A; + +P9IFG = 0x029C; + + + +/***************************************************************************** + DMA +*****************************************************************************/ +DMACTL0 = 0x0500; +DMACTL0_L = 0x0500; +DMACTL0_H = 0x0501; +DMACTL1 = 0x0502; +DMACTL1_L = 0x0502; +DMACTL1_H = 0x0503; +DMACTL2 = 0x0504; +DMACTL2_L = 0x0504; +DMACTL2_H = 0x0505; +DMACTL4 = 0x0508; +DMACTL4_L = 0x0508; +DMACTL4_H = 0x0509; +DMAIV = 0x050E; +DMAIV_L = 0x050E; +DMAIV_H = 0x050F; +DMA0CTL = 0x0510; +DMA0CTL_L = 0x0510; +DMA0CTL_H = 0x0511; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA0SZ_L = 0x051A; +DMA0SZ_H = 0x051B; +DMA1CTL = 0x0520; +DMA1CTL_L = 0x0520; +DMA1CTL_H = 0x0521; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA1SZ_L = 0x052A; +DMA1SZ_H = 0x052B; +DMA2CTL = 0x0530; +DMA2CTL_L = 0x0530; +DMA2CTL_H = 0x0531; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA2SZ_L = 0x053A; +DMA2SZ_H = 0x053B; +DMA3CTL = 0x0540; +DMA3CTL_L = 0x0540; +DMA3CTL_H = 0x0541; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA3SZ_L = 0x054A; +DMA3SZ_H = 0x054B; +DMA4CTL = 0x0550; +DMA4CTL_L = 0x0550; +DMA4CTL_H = 0x0551; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA4SZ_L = 0x055A; +DMA4SZ_H = 0x055B; +DMA5CTL = 0x0560; +DMA5CTL_L = 0x0560; +DMA5CTL_H = 0x0561; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +DMA5SZ_L = 0x056A; +DMA5SZ_H = 0x056B; + + +/***************************************************************************** + FRCTL_A +*****************************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; + + +/***************************************************************************** + HSPLL +*****************************************************************************/ +HSPLLIIDX = 0x0EE0; +HSPLLIIDX_L = 0x0EE0; +HSPLLIIDX_H = 0x0EE1; +HSPLLMIS = 0x0EE2; +HSPLLMIS_L = 0x0EE2; +HSPLLMIS_H = 0x0EE3; +HSPLLRIS = 0x0EE4; +HSPLLRIS_L = 0x0EE4; +HSPLLRIS_H = 0x0EE5; +HSPLLIMSC = 0x0EE6; +HSPLLIMSC_L = 0x0EE6; +HSPLLIMSC_H = 0x0EE7; +HSPLLICR = 0x0EE8; +HSPLLICR_L = 0x0EE8; +HSPLLICR_H = 0x0EE9; +HSPLLISR = 0x0EEA; +HSPLLISR_L = 0x0EEA; +HSPLLISR_H = 0x0EEB; +HSPLLDESCLO = 0x0EEC; +HSPLLDESCLO_L = 0x0EEC; +HSPLLDESCLO_H = 0x0EED; +HSPLLDESCHI = 0x0EEE; +HSPLLDESCHI_L = 0x0EEE; +HSPLLDESCHI_H = 0x0EEF; +HSPLLCTL = 0x0EF0; +HSPLLCTL_L = 0x0EF0; +HSPLLCTL_H = 0x0EF1; +HSPLLUSSXTLCTL = 0x0EF2; +HSPLLUSSXTLCTL_L = 0x0EF2; +HSPLLUSSXTLCTL_H = 0x0EF3; + + +/***************************************************************************** + LCD_C +*****************************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCPCTL3 = 0x0A10; +LCDCPCTL3_L = 0x0A10; +LCDCPCTL3_H = 0x0A11; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDCIV_L = 0x0A1E; +LCDCIV_H = 0x0A1F; +LCDM1 = 0x0A20; + +LCDM2 = 0x0A21; + +LCDM3 = 0x0A22; + +LCDM4 = 0x0A23; + +LCDM5 = 0x0A24; + +LCDM6 = 0x0A25; + +LCDM7 = 0x0A26; + +LCDM8 = 0x0A27; + +LCDM9 = 0x0A28; + +LCDM10 = 0x0A29; + +LCDM11 = 0x0A2A; + +LCDM12 = 0x0A2B; + +LCDM13 = 0x0A2C; + +LCDM14 = 0x0A2D; + +LCDM15 = 0x0A2E; + +LCDM16 = 0x0A2F; + +LCDM17 = 0x0A30; + +LCDM18 = 0x0A31; + +LCDM19 = 0x0A32; + +LCDM20 = 0x0A33; + +LCDM21 = 0x0A34; + +LCDM22 = 0x0A35; + +LCDM23 = 0x0A36; + +LCDM24 = 0x0A37; + +LCDM25 = 0x0A38; + +LCDM26 = 0x0A39; + +LCDM27 = 0x0A3A; + +LCDM28 = 0x0A3B; + +LCDM29 = 0x0A3C; + +LCDM30 = 0x0A3D; + +LCDM31 = 0x0A3E; + +LCDM32 = 0x0A3F; + +LCDM33_LCDBM1 = 0x0A40; + +LCDM34_LCDBM2 = 0x0A41; + +LCDM35_LCDBM3 = 0x0A42; + +LCDM36_LCDBM4 = 0x0A43; + +LCDM37_LCDBM5 = 0x0A44; + +LCDM38_LCDBM6 = 0x0A45; + +LCDM39_LCDBM7 = 0x0A46; + +LCDM40_LCDBM8 = 0x0A47; + +LCDM41_LCDBM9 = 0x0A48; + +LCDM42_LCDBM10 = 0x0A49; + +LCDM43_LCDBM11 = 0x0A4A; + +LCDM44_LCDBM12 = 0x0A4B; + +LCDM45_LCDBM13 = 0x0A4C; + +LCDM46_LCDBM14 = 0x0A4D; + +LCDM47_LCDBM15 = 0x0A4E; + +LCDM48_LCDBM16 = 0x0A4F; + +LCDM49_LCDBM17 = 0x0A50; + +LCDM50_LCDBM18 = 0x0A51; + +LCDM51_LCDBM19 = 0x0A52; + +LCDM52_LCDBM20 = 0x0A53; + + + +/***************************************************************************** + LEA +*****************************************************************************/ +LEACAP = 0x0A80; +LEACAPL = 0x0A80; +LEACAPH = 0x0A82; + +LEACNF0 = 0x0A84; +LEACNF0L = 0x0A84; +LEACNF0H = 0x0A86; + +LEACNF1 = 0x0A88; +LEACNF1L = 0x0A88; +LEACNF1H = 0x0A8A; + +LEACNF2 = 0x0A8C; +LEACNF2L = 0x0A8C; +LEACNF2H = 0x0A8E; + +LEAMB = 0x0A90; +LEAMBL = 0x0A90; +LEAMBH = 0x0A92; + +LEAMT = 0x0A94; +LEAMTL = 0x0A94; +LEAMTH = 0x0A96; + +LEACMA = 0x0A98; +LEACMAL = 0x0A98; +LEACMAH = 0x0A9A; + +LEACMCTL = 0x0A9C; +LEACMCTLL = 0x0A9C; +LEACMCTLH = 0x0A9E; + +LEACMDSTAT = 0x0AA8; +LEACMDSTATL = 0x0AA8; +LEACMDSTATH = 0x0AAA; + +LEAS1STAT = 0x0AAC; +LEAS1STATL = 0x0AAC; +LEAS1STATH = 0x0AAE; + +LEAS0STAT = 0x0AB0; +LEAS0STATL = 0x0AB0; +LEAS0STATH = 0x0AB2; + +LEADSTSTAT = 0x0AB4; +LEADSTSTATL = 0x0AB4; +LEADSTSTATH = 0x0AB6; + +LEAPMCTL = 0x0AC0; +LEAPMCTLL = 0x0AC0; +LEAPMCTLH = 0x0AC2; + +LEAPMDST = 0x0AC4; +LEAPMDSTL = 0x0AC4; +LEAPMDSTH = 0x0AC6; + +LEAPMS1 = 0x0AC8; +LEAPMS1L = 0x0AC8; +LEAPMS1H = 0x0ACA; + +LEAPMS0 = 0x0ACC; +LEAPMS0L = 0x0ACC; +LEAPMS0H = 0x0ACE; + +LEAPMCB = 0x0AD0; +LEAPMCBL = 0x0AD0; +LEAPMCBH = 0x0AD2; + +LEAIFGSET = 0x0AF0; +LEAIFGSETL = 0x0AF0; +LEAIFGSETH = 0x0AF2; + +LEAIE = 0x0AF4; +LEAIEL = 0x0AF4; +LEAIEH = 0x0AF6; + +LEAIFG = 0x0AF8; +LEAIFGL = 0x0AF8; +LEAIFGH = 0x0AFA; + +LEAIV = 0x0AFC; +LEAIVL = 0x0AFC; +LEAIVH = 0x0AFE; + + + +/***************************************************************************** + MPU +*****************************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + MTIF +*****************************************************************************/ +MTIFPGCNF = 0x0F00; +MTIFPGCNF_L = 0x0F00; +MTIFPGCNF_H = 0x0F01; +MTIFPGKVAL = 0x0F02; +MTIFPGKVAL_L = 0x0F02; +MTIFPGKVAL_H = 0x0F03; +MTIFPGCTL = 0x0F04; +MTIFPGCTL_L = 0x0F04; +MTIFPGCTL_H = 0x0F05; +MTIFPGSR = 0x0F06; +MTIFPGSR_L = 0x0F06; +MTIFPGSR_H = 0x0F07; +MTIFPCCNF = 0x0F08; +MTIFPCCNF_L = 0x0F08; +MTIFPCCNF_H = 0x0F09; +MTIFPCR = 0x0F0A; +MTIFPCR_L = 0x0F0A; +MTIFPCR_H = 0x0F0B; +MTIFPCCTL = 0x0F0C; +MTIFPCCTL_L = 0x0F0C; +MTIFPCCTL_H = 0x0F0D; +MTIFPCSR = 0x0F0E; +MTIFPCSR_L = 0x0F0E; +MTIFPCSR_H = 0x0F0F; +MTIFTPCTL = 0x0F10; +MTIFTPCTL_L = 0x0F10; +MTIFTPCTL_H = 0x0F11; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RAMCTL +*****************************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +RCCTL1 = 0x015A; +RCCTL1_L = 0x015A; +RCCTL1_H = 0x015B; + + +/***************************************************************************** + REF_A +*****************************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; + + +/***************************************************************************** + RTC_C +*****************************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCIV_L = 0x04AE; +RTCIV_H = 0x04AF; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCCNT12 = 0x04B0; +RTCCNT12_L = 0x04B0; +RTCCNT12_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCCNT34 = 0x04B2; +RTCCNT34_L = 0x04B2; +RTCCNT34_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BIN2BCD_L = 0x04BC; +BIN2BCD_H = 0x04BD; +BCD2BIN = 0x04BE; +BCD2BIN_L = 0x04BE; +BCD2BIN_H = 0x04BF; +RT0PS = 0x04AC; + +RT1PS = 0x04AD; + +RTCCNT1 = 0x04B0; + +RTCCNT2 = 0x04B1; + +RTCCNT3 = 0x04B2; + +RTCCNT4 = 0x04B3; + + + +/***************************************************************************** + SAPH +*****************************************************************************/ +SAPHIIDX = 0x0E00; +SAPHIIDX_L = 0x0E00; +SAPHIIDX_H = 0x0E01; +SAPHMIS = 0x0E02; +SAPHMIS_L = 0x0E02; +SAPHMIS_H = 0x0E03; +SAPHRIS = 0x0E04; +SAPHRIS_L = 0x0E04; +SAPHRIS_H = 0x0E05; +SAPHIMSC = 0x0E06; +SAPHIMSC_L = 0x0E06; +SAPHIMSC_H = 0x0E07; +SAPHICR = 0x0E08; +SAPHICR_L = 0x0E08; +SAPHICR_H = 0x0E09; +SAPHISR = 0x0E0A; +SAPHISR_L = 0x0E0A; +SAPHISR_H = 0x0E0B; +SAPHDESCLO = 0x0E0C; +SAPHDESCLO_L = 0x0E0C; +SAPHDESCLO_H = 0x0E0D; +SAPHDESCHI = 0x0E0E; +SAPHDESCHI_L = 0x0E0E; +SAPHDESCHI_H = 0x0E0F; +SAPHKEY = 0x0E10; +SAPHKEY_L = 0x0E10; +SAPHKEY_H = 0x0E11; +SAPHOCTL0 = 0x0E12; +SAPHOCTL0_L = 0x0E12; +SAPHOCTL0_H = 0x0E13; +SAPHOCTL1 = 0x0E14; +SAPHOCTL1_L = 0x0E14; +SAPHOCTL1_H = 0x0E15; +SAPHOSEL = 0x0E16; +SAPHOSEL_L = 0x0E16; +SAPHOSEL_H = 0x0E17; +SAPHCH0PUT = 0x0E20; +SAPHCH0PUT_L = 0x0E20; +SAPHCH0PUT_H = 0x0E21; +SAPHCH0PDT = 0x0E22; +SAPHCH0PDT_L = 0x0E22; +SAPHCH0PDT_H = 0x0E23; +SAPHCH0TT = 0x0E24; +SAPHCH0TT_L = 0x0E24; +SAPHCH0TT_H = 0x0E25; +SAPHCH1PUT = 0x0E26; +SAPHCH1PUT_L = 0x0E26; +SAPHCH1PUT_H = 0x0E27; +SAPHCH1PDT = 0x0E28; +SAPHCH1PDT_L = 0x0E28; +SAPHCH1PDT_H = 0x0E29; +SAPHCH1TT = 0x0E2A; +SAPHCH1TT_L = 0x0E2A; +SAPHCH1TT_H = 0x0E2B; +SAPHMCNF = 0x0E2C; +SAPHMCNF_L = 0x0E2C; +SAPHMCNF_H = 0x0E2D; +SAPHTACTL = 0x0E2E; +SAPHTACTL_L = 0x0E2E; +SAPHTACTL_H = 0x0E2F; +SAPHICTL0 = 0x0E30; +SAPHICTL0_L = 0x0E30; +SAPHICTL0_H = 0x0E31; +SAPHBCTL = 0x0E34; +SAPHBCTL_L = 0x0E34; +SAPHBCTL_H = 0x0E35; +SAPHPGC = 0x0E40; +SAPHPGC_L = 0x0E40; +SAPHPGC_H = 0x0E41; +SAPHPGLPER = 0x0E42; +SAPHPGLPER_L = 0x0E42; +SAPHPGLPER_H = 0x0E43; +SAPHPGHPER = 0x0E44; +SAPHPGHPER_L = 0x0E44; +SAPHPGHPER_H = 0x0E45; +SAPHPGCTL = 0x0E46; +SAPHPGCTL_L = 0x0E46; +SAPHPGCTL_H = 0x0E47; +SAPHPPGTRIG = 0x0E48; +SAPHPPGTRIG_L = 0x0E48; +SAPHPPGTRIG_H = 0x0E49; +SAPHASCTL0 = 0x0E60; +SAPHASCTL0_L = 0x0E60; +SAPHASCTL0_H = 0x0E61; +SAPHASCTL1 = 0x0E62; +SAPHASCTL1_L = 0x0E62; +SAPHASCTL1_H = 0x0E63; +SAPHASQTRIG = 0x0E64; + +SAPHAPOL = 0x0E66; +SAPHAPOL_L = 0x0E66; +SAPHAPOL_H = 0x0E67; +SAPHAPLEV = 0x0E68; +SAPHAPLEV_L = 0x0E68; +SAPHAPLEV_H = 0x0E69; +SAPHAPHIZ = 0x0E6A; +SAPHAPHIZ_L = 0x0E6A; +SAPHAPHIZ_H = 0x0E6B; +SAPHATM_A = 0x0E6E; +SAPHATM_A_L = 0x0E6E; +SAPHATM_A_H = 0x0E6F; +SAPHATM_B = 0x0E70; +SAPHATM_B_L = 0x0E70; +SAPHATM_B_H = 0x0E71; +SAPHATM_C = 0x0E72; +SAPHATM_C_L = 0x0E72; +SAPHATM_C_H = 0x0E73; +SAPHATM_D = 0x0E74; +SAPHATM_D_L = 0x0E74; +SAPHATM_D_H = 0x0E75; +SAPHATM_E = 0x0E76; +SAPHATM_E_L = 0x0E76; +SAPHATM_E_H = 0x0E77; +SAPHATM_F = 0x0E78; +SAPHATM_F_L = 0x0E78; +SAPHATM_F_H = 0x0E79; +SAPHTBCTL = 0x0E7A; +SAPHTBCTL_L = 0x0E7A; +SAPHTBCTL_H = 0x0E7B; +SAPHATIMLO = 0x0E7C; +SAPHATIMLO_L = 0x0E7C; +SAPHATIMLO_H = 0x0E7D; +SAPHATIMHI = 0x0E7E; +SAPHATIMHI_L = 0x0E7E; +SAPHATIMHI_H = 0x0E7F; + + +/***************************************************************************** + SDHS +*****************************************************************************/ +SDHSIIDX = 0x0E80; +SDHSIIDX_L = 0x0E80; +SDHSIIDX_H = 0x0E81; +SDHSMIS = 0x0E82; +SDHSMIS_L = 0x0E82; +SDHSMIS_H = 0x0E83; +SDHSRIS = 0x0E84; +SDHSRIS_L = 0x0E84; +SDHSRIS_H = 0x0E85; +SDHSIMSC = 0x0E86; +SDHSIMSC_L = 0x0E86; +SDHSIMSC_H = 0x0E87; +SDHSICR = 0x0E88; +SDHSICR_L = 0x0E88; +SDHSICR_H = 0x0E89; +SDHSISR = 0x0E8A; +SDHSISR_L = 0x0E8A; +SDHSISR_H = 0x0E8B; +SDHSDESCLO = 0x0E8C; +SDHSDESCLO_L = 0x0E8C; +SDHSDESCLO_H = 0x0E8D; +SDHSDESCHI = 0x0E8E; +SDHSDESCHI_L = 0x0E8E; +SDHSDESCHI_H = 0x0E8F; +SDHSCTL0 = 0x0E90; +SDHSCTL0_L = 0x0E90; +SDHSCTL0_H = 0x0E91; +SDHSCTL1 = 0x0E92; +SDHSCTL1_L = 0x0E92; +SDHSCTL1_H = 0x0E93; +SDHSCTL2 = 0x0E94; +SDHSCTL2_L = 0x0E94; +SDHSCTL2_H = 0x0E95; +SDHSCTL3 = 0x0E96; +SDHSCTL3_L = 0x0E96; +SDHSCTL3_H = 0x0E97; +SDHSCTL4 = 0x0E98; +SDHSCTL4_L = 0x0E98; +SDHSCTL4_H = 0x0E99; +SDHSCTL5 = 0x0E9A; +SDHSCTL5_L = 0x0E9A; +SDHSCTL5_H = 0x0E9B; +SDHSCTL6 = 0x0E9C; +SDHSCTL6_L = 0x0E9C; +SDHSCTL6_H = 0x0E9D; +SDHSCTL7 = 0x0E9E; +SDHSCTL7_L = 0x0E9E; +SDHSCTL7_H = 0x0E9F; +SDHSDT = 0x0EA2; +SDHSDT_L = 0x0EA2; +SDHSDT_H = 0x0EA3; +SDHSWINHITH = 0x0EA4; +SDHSWINHITH_L = 0x0EA4; +SDHSWINHITH_H = 0x0EA5; +SDHSWINLOTH = 0x0EA6; +SDHSWINLOTH_L = 0x0EA6; +SDHSWINLOTH_H = 0x0EA7; +SDHSDTCDA = 0x0EA8; +SDHSDTCDA_L = 0x0EA8; +SDHSDTCDA_H = 0x0EA9; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0340; +TA0CTL_L = 0x0340; +TA0CTL_H = 0x0341; +TA0CCTL0 = 0x0342; +TA0CCTL0_L = 0x0342; +TA0CCTL0_H = 0x0343; +TA0CCTL1 = 0x0344; +TA0CCTL1_L = 0x0344; +TA0CCTL1_H = 0x0345; +TA0CCTL2 = 0x0346; +TA0CCTL2_L = 0x0346; +TA0CCTL2_H = 0x0347; +TA0R = 0x0350; +TA0R_L = 0x0350; +TA0R_H = 0x0351; +TA0CCR0 = 0x0352; +TA0CCR0_L = 0x0352; +TA0CCR0_H = 0x0353; +TA0CCR1 = 0x0354; +TA0CCR1_L = 0x0354; +TA0CCR1_H = 0x0355; +TA0CCR2 = 0x0356; +TA0CCR2_L = 0x0356; +TA0CCR2_H = 0x0357; +TA0EX0 = 0x0360; +TA0EX0_L = 0x0360; +TA0EX0_H = 0x0361; +TA0IV = 0x036E; +TA0IV_L = 0x036E; +TA0IV_H = 0x036F; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x0380; +TA1CTL_L = 0x0380; +TA1CTL_H = 0x0381; +TA1CCTL0 = 0x0382; +TA1CCTL0_L = 0x0382; +TA1CCTL0_H = 0x0383; +TA1CCTL1 = 0x0384; +TA1CCTL1_L = 0x0384; +TA1CCTL1_H = 0x0385; +TA1CCTL2 = 0x0386; +TA1CCTL2_L = 0x0386; +TA1CCTL2_H = 0x0387; +TA1R = 0x0390; +TA1R_L = 0x0390; +TA1R_H = 0x0391; +TA1CCR0 = 0x0392; +TA1CCR0_L = 0x0392; +TA1CCR0_H = 0x0393; +TA1CCR1 = 0x0394; +TA1CCR1_L = 0x0394; +TA1CCR1_H = 0x0395; +TA1CCR2 = 0x0396; +TA1CCR2_L = 0x0396; +TA1CCR2_H = 0x0397; +TA1EX0 = 0x03A0; +TA1EX0_L = 0x03A0; +TA1EX0_H = 0x03A1; +TA1IV = 0x03AE; +TA1IV_L = 0x03AE; +TA1IV_H = 0x03AF; + + +/***************************************************************************** + TA2 +*****************************************************************************/ +TA2CTL = 0x0400; +TA2CTL_L = 0x0400; +TA2CTL_H = 0x0401; +TA2CCTL0 = 0x0402; +TA2CCTL0_L = 0x0402; +TA2CCTL0_H = 0x0403; +TA2CCTL1 = 0x0404; +TA2CCTL1_L = 0x0404; +TA2CCTL1_H = 0x0405; +TA2R = 0x0410; +TA2R_L = 0x0410; +TA2R_H = 0x0411; +TA2CCR0 = 0x0412; +TA2CCR0_L = 0x0412; +TA2CCR0_H = 0x0413; +TA2CCR1 = 0x0414; +TA2CCR1_L = 0x0414; +TA2CCR1_H = 0x0415; +TA2EX0 = 0x0420; +TA2EX0_L = 0x0420; +TA2EX0_H = 0x0421; +TA2IV = 0x042E; +TA2IV_L = 0x042E; +TA2IV_H = 0x042F; + + +/***************************************************************************** + TA3 +*****************************************************************************/ +TA3CTL = 0x0440; +TA3CTL_L = 0x0440; +TA3CTL_H = 0x0441; +TA3CCTL0 = 0x0442; +TA3CCTL0_L = 0x0442; +TA3CCTL0_H = 0x0443; +TA3CCTL1 = 0x0444; +TA3CCTL1_L = 0x0444; +TA3CCTL1_H = 0x0445; +TA3R = 0x0450; +TA3R_L = 0x0450; +TA3R_H = 0x0451; +TA3CCR0 = 0x0452; +TA3CCR0_L = 0x0452; +TA3CCR0_H = 0x0453; +TA3CCR1 = 0x0454; +TA3CCR1_L = 0x0454; +TA3CCR1_H = 0x0455; +TA3EX0 = 0x0460; +TA3EX0_L = 0x0460; +TA3EX0_H = 0x0461; +TA3IV = 0x046E; +TA3IV_L = 0x046E; +TA3IV_H = 0x046F; + + +/***************************************************************************** + TA4 +*****************************************************************************/ +TA4CTL = 0x07C0; +TA4CTL_L = 0x07C0; +TA4CTL_H = 0x07C1; +TA4CCTL0 = 0x07C2; +TA4CCTL0_L = 0x07C2; +TA4CCTL0_H = 0x07C3; +TA4CCTL1 = 0x07C4; +TA4CCTL1_L = 0x07C4; +TA4CCTL1_H = 0x07C5; +TA4R = 0x07D0; +TA4R_L = 0x07D0; +TA4R_H = 0x07D1; +TA4CCR0 = 0x07D2; +TA4CCR0_L = 0x07D2; +TA4CCR0_H = 0x07D3; +TA4CCR1 = 0x07D4; +TA4CCR1_L = 0x07D4; +TA4CCR1_H = 0x07D5; +TA4EX0 = 0x07E0; +TA4EX0_L = 0x07E0; +TA4EX0_H = 0x07E1; +TA4IV = 0x07EE; +TA4IV_L = 0x07EE; +TA4IV_H = 0x07EF; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x03C0; +TB0CTL_L = 0x03C0; +TB0CTL_H = 0x03C1; +TB0CCTL0 = 0x03C2; +TB0CCTL0_L = 0x03C2; +TB0CCTL0_H = 0x03C3; +TB0CCTL1 = 0x03C4; +TB0CCTL1_L = 0x03C4; +TB0CCTL1_H = 0x03C5; +TB0CCTL2 = 0x03C6; +TB0CCTL2_L = 0x03C6; +TB0CCTL2_H = 0x03C7; +TB0CCTL3 = 0x03C8; +TB0CCTL3_L = 0x03C8; +TB0CCTL3_H = 0x03C9; +TB0CCTL4 = 0x03CA; +TB0CCTL4_L = 0x03CA; +TB0CCTL4_H = 0x03CB; +TB0CCTL5 = 0x03CC; +TB0CCTL5_L = 0x03CC; +TB0CCTL5_H = 0x03CD; +TB0CCTL6 = 0x03CE; +TB0CCTL6_L = 0x03CE; +TB0CCTL6_H = 0x03CF; +TB0R = 0x03D0; +TB0R_L = 0x03D0; +TB0R_H = 0x03D1; +TB0CCR0 = 0x03D2; +TB0CCR0_L = 0x03D2; +TB0CCR0_H = 0x03D3; +TB0CCR1 = 0x03D4; +TB0CCR1_L = 0x03D4; +TB0CCR1_H = 0x03D5; +TB0CCR2 = 0x03D6; +TB0CCR2_L = 0x03D6; +TB0CCR2_H = 0x03D7; +TB0CCR3 = 0x03D8; +TB0CCR3_L = 0x03D8; +TB0CCR3_H = 0x03D9; +TB0CCR4 = 0x03DA; +TB0CCR4_L = 0x03DA; +TB0CCR4_H = 0x03DB; +TB0CCR5 = 0x03DC; +TB0CCR5_L = 0x03DC; +TB0CCR5_H = 0x03DD; +TB0CCR6 = 0x03DE; +TB0CCR6_L = 0x03DE; +TB0CCR6_H = 0x03DF; +TB0EX0 = 0x03E0; +TB0EX0_L = 0x03E0; +TB0EX0_H = 0x03E1; +TB0IV = 0x03EE; +TB0IV_L = 0x03EE; +TB0IV_H = 0x03EF; + + +/***************************************************************************** + UUPS +*****************************************************************************/ +UUPSIIDX = 0x0EC0; +UUPSIIDX_L = 0x0EC0; +UUPSIIDX_H = 0x0EC1; +UUPSMIS = 0x0EC2; +UUPSMIS_L = 0x0EC2; +UUPSMIS_H = 0x0EC3; +UUPSRIS = 0x0EC4; +UUPSRIS_L = 0x0EC4; +UUPSRIS_H = 0x0EC5; +UUPSIMSC = 0x0EC6; +UUPSIMSC_L = 0x0EC6; +UUPSIMSC_H = 0x0EC7; +UUPSICR = 0x0EC8; +UUPSICR_L = 0x0EC8; +UUPSICR_H = 0x0EC9; +UUPSISR = 0x0ECA; +UUPSISR_L = 0x0ECA; +UUPSISR_H = 0x0ECB; +UUPSDESCLO = 0x0ECC; +UUPSDESCLO_L = 0x0ECC; +UUPSDESCLO_H = 0x0ECD; +UUPSDESCHI = 0x0ECE; +UUPSDESCHI_L = 0x0ECE; +UUPSDESCHI_H = 0x0ECF; +UUPSCTL = 0x0ED0; +UUPSCTL_L = 0x0ED0; +UUPSCTL_H = 0x0ED1; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0STATW_L = 0x05CA; +UCA0STATW_H = 0x05CB; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0ABCTL_L = 0x05D0; +UCA0ABCTL_H = 0x05D1; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +UCA0IV_L = 0x05DE; +UCA0IV_H = 0x05DF; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1STATW_L = 0x05EA; +UCA1STATW_H = 0x05EB; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1ABCTL_L = 0x05F0; +UCA1ABCTL_H = 0x05F1; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +UCA1IV_L = 0x05FE; +UCA1IV_H = 0x05FF; + + +/***************************************************************************** + eUSCI_A2 +*****************************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2STATW_L = 0x060A; +UCA2STATW_H = 0x060B; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2ABCTL_L = 0x0610; +UCA2ABCTL_H = 0x0611; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +UCA2IV_L = 0x061E; +UCA2IV_H = 0x061F; + + +/***************************************************************************** + eUSCI_A3 +*****************************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3STATW_L = 0x062A; +UCA3STATW_H = 0x062B; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3ABCTL_L = 0x0630; +UCA3ABCTL_H = 0x0631; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +UCA3IV_L = 0x063E; +UCA3IV_H = 0x063F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +UCB0IV_L = 0x066E; +UCB0IV_H = 0x066F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +UCB1IV_L = 0x06AE; +UCB1IV_H = 0x06AF; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr60471.cmd b/msp430/msp430fr60471.cmd new file mode 100644 index 00000000..8d414ec5 --- /dev/null +++ b/msp430/msp430fr60471.cmd @@ -0,0 +1,2205 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +/***************************************************************/ +/* msp430fr60471.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/***************************************************************/ +/* 1.213 */ +/***************************************************************/ + +/**************************************************************** +* PERIPHERAL FILE MAP +****************************************************************/ + + +/***************************************************************************** + ADC12_B +*****************************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; + + +/***************************************************************************** + AES256 +*****************************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; + + +/***************************************************************************** + CAPTIO0 +*****************************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; + + +/***************************************************************************** + CAPTIO1 +*****************************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; + + +/***************************************************************************** + COMP_E +*****************************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; + + +/***************************************************************************** + CRC +*****************************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; + + +/***************************************************************************** + CRC32 +*****************************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; + + +/***************************************************************************** + CS +*****************************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; + + +/***************************************************************************** + DIO +*****************************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +P1IV = 0x020E; +P1IV_L = 0x020E; +P1IV_H = 0x020F; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P2IV = 0x021E; +P2IV_L = 0x021E; +P2IV_H = 0x021F; +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +P3IV = 0x022E; +P3IV_L = 0x022E; +P3IV_H = 0x022F; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P4IV = 0x023E; +P4IV_L = 0x023E; +P4IV_H = 0x023F; +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +P5IV = 0x024E; +P5IV_L = 0x024E; +P5IV_H = 0x024F; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +PCIES = 0x0258; +PCIES_L = 0x0258; +PCIES_H = 0x0259; +PCIE = 0x025A; +PCIE_L = 0x025A; +PCIE_H = 0x025B; +PCIFG = 0x025C; +PCIFG_L = 0x025C; +PCIFG_H = 0x025D; +P6IV = 0x025E; +P6IV_L = 0x025E; +P6IV_H = 0x025F; +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +P7IV = 0x026E; +P7IV_L = 0x026E; +P7IV_H = 0x026F; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +PDIES = 0x0278; +PDIES_L = 0x0278; +PDIES_H = 0x0279; +PDIE = 0x027A; +PDIE_L = 0x027A; +PDIE_H = 0x027B; +PDIFG = 0x027C; +PDIFG_L = 0x027C; +PDIFG_H = 0x027D; +P8IV = 0x027E; +P8IV_L = 0x027E; +P8IV_H = 0x027F; +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +P9IV = 0x028E; +P9IV_L = 0x028E; +P9IV_H = 0x028F; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +PEIES = 0x0298; +PEIES_L = 0x0298; +PEIES_H = 0x0299; +PEIE = 0x029A; +PEIE_L = 0x029A; +PEIE_H = 0x029B; +PEIFG = 0x029C; +PEIFG_L = 0x029C; +PEIFG_H = 0x029D; +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +P1IN = 0x0200; + +P2IN = 0x0201; + +P2OUT = 0x0203; + +P1OUT = 0x0202; + +P1DIR = 0x0204; + +P2DIR = 0x0205; + +P1REN = 0x0206; + +P2REN = 0x0207; + +P1SEL0 = 0x020A; + +P2SEL0 = 0x020B; + +P1SEL1 = 0x020C; + +P2SEL1 = 0x020D; + +P1SELC = 0x0216; + +P2SELC = 0x0217; + +P1IES = 0x0218; + +P2IES = 0x0219; + +P1IE = 0x021A; + +P2IE = 0x021B; + +P1IFG = 0x021C; + +P2IFG = 0x021D; + +P3IN = 0x0220; + +P4IN = 0x0221; + +P3OUT = 0x0222; + +P4OUT = 0x0223; + +P3DIR = 0x0224; + +P4DIR = 0x0225; + +P3REN = 0x0226; + +P4REN = 0x0227; + +P4SEL0 = 0x022B; + +P3SEL0 = 0x022A; + +P3SEL1 = 0x022C; + +P4SEL1 = 0x022D; + +P3SELC = 0x0236; + +P4SELC = 0x0237; + +P3IES = 0x0238; + +P4IES = 0x0239; + +P3IE = 0x023A; + +P4IE = 0x023B; + +P3IFG = 0x023C; + +P4IFG = 0x023D; + +P5IN = 0x0240; + +P6IN = 0x0241; + +P5OUT = 0x0242; + +P6OUT = 0x0243; + +P5DIR = 0x0244; + +P6DIR = 0x0245; + +P5REN = 0x0246; + +P6REN = 0x0247; + +P5SEL0 = 0x024A; + +P6SEL0 = 0x024B; + +P5SEL1 = 0x024C; + +P6SEL1 = 0x024D; + +P5SELC = 0x0256; + +P6SELC = 0x0257; + +P5IES = 0x0258; + +P6IES = 0x0259; + +P5IE = 0x025A; + +P6IE = 0x025B; + +P5IFG = 0x025C; + +P6IFG = 0x025D; + +P7IN = 0x0260; + +P8IN = 0x0261; + +P7OUT = 0x0262; + +P8OUT = 0x0263; + +P7DIR = 0x0264; + +P8DIR = 0x0265; + +P7REN = 0x0266; + +P8REN = 0x0267; + +P7SEL0 = 0x026A; + +P8SEL0 = 0x026B; + +P7SEL1 = 0x026C; + +P8SEL1 = 0x026D; + +P7SELC = 0x0276; + +P8SELC = 0x0277; + +P7IES = 0x0278; + +P8IES = 0x0279; + +P7IE = 0x027A; + +P8IE = 0x027B; + +P7IFG = 0x027C; + +P8IFG = 0x027D; + +P9IN = 0x0280; + +P9OUT = 0x0282; + +P9DIR = 0x0284; + +P9REN = 0x0286; + +P9SEL0 = 0x028A; + +P9SEL1 = 0x028C; + +P9SELC = 0x0296; + +P9IES = 0x0298; + +P9IE = 0x029A; + +P9IFG = 0x029C; + + + +/***************************************************************************** + DMA +*****************************************************************************/ +DMACTL0 = 0x0500; +DMACTL0_L = 0x0500; +DMACTL0_H = 0x0501; +DMACTL1 = 0x0502; +DMACTL1_L = 0x0502; +DMACTL1_H = 0x0503; +DMACTL2 = 0x0504; +DMACTL2_L = 0x0504; +DMACTL2_H = 0x0505; +DMACTL4 = 0x0508; +DMACTL4_L = 0x0508; +DMACTL4_H = 0x0509; +DMAIV = 0x050E; +DMAIV_L = 0x050E; +DMAIV_H = 0x050F; +DMA0CTL = 0x0510; +DMA0CTL_L = 0x0510; +DMA0CTL_H = 0x0511; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA0SZ_L = 0x051A; +DMA0SZ_H = 0x051B; +DMA1CTL = 0x0520; +DMA1CTL_L = 0x0520; +DMA1CTL_H = 0x0521; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA1SZ_L = 0x052A; +DMA1SZ_H = 0x052B; +DMA2CTL = 0x0530; +DMA2CTL_L = 0x0530; +DMA2CTL_H = 0x0531; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +DMA2SZ_L = 0x053A; +DMA2SZ_H = 0x053B; +DMA3CTL = 0x0540; +DMA3CTL_L = 0x0540; +DMA3CTL_H = 0x0541; +DMA3SA = 0x0542; +DMA3SAL = 0x0542; +DMA3SAH = 0x0544; +DMA3DA = 0x0546; +DMA3DAL = 0x0546; +DMA3DAH = 0x0548; +DMA3SZ = 0x054A; +DMA3SZ_L = 0x054A; +DMA3SZ_H = 0x054B; +DMA4CTL = 0x0550; +DMA4CTL_L = 0x0550; +DMA4CTL_H = 0x0551; +DMA4SA = 0x0552; +DMA4SAL = 0x0552; +DMA4SAH = 0x0554; +DMA4DA = 0x0556; +DMA4DAL = 0x0556; +DMA4DAH = 0x0558; +DMA4SZ = 0x055A; +DMA4SZ_L = 0x055A; +DMA4SZ_H = 0x055B; +DMA5CTL = 0x0560; +DMA5CTL_L = 0x0560; +DMA5CTL_H = 0x0561; +DMA5SA = 0x0562; +DMA5SAL = 0x0562; +DMA5SAH = 0x0564; +DMA5DA = 0x0566; +DMA5DAL = 0x0566; +DMA5DAH = 0x0568; +DMA5SZ = 0x056A; +DMA5SZ_L = 0x056A; +DMA5SZ_H = 0x056B; + + +/***************************************************************************** + FRCTL_A +*****************************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; + + +/***************************************************************************** + HSPLL +*****************************************************************************/ +HSPLLIIDX = 0x0EE0; +HSPLLIIDX_L = 0x0EE0; +HSPLLIIDX_H = 0x0EE1; +HSPLLMIS = 0x0EE2; +HSPLLMIS_L = 0x0EE2; +HSPLLMIS_H = 0x0EE3; +HSPLLRIS = 0x0EE4; +HSPLLRIS_L = 0x0EE4; +HSPLLRIS_H = 0x0EE5; +HSPLLIMSC = 0x0EE6; +HSPLLIMSC_L = 0x0EE6; +HSPLLIMSC_H = 0x0EE7; +HSPLLICR = 0x0EE8; +HSPLLICR_L = 0x0EE8; +HSPLLICR_H = 0x0EE9; +HSPLLISR = 0x0EEA; +HSPLLISR_L = 0x0EEA; +HSPLLISR_H = 0x0EEB; +HSPLLDESCLO = 0x0EEC; +HSPLLDESCLO_L = 0x0EEC; +HSPLLDESCLO_H = 0x0EED; +HSPLLDESCHI = 0x0EEE; +HSPLLDESCHI_L = 0x0EEE; +HSPLLDESCHI_H = 0x0EEF; +HSPLLCTL = 0x0EF0; +HSPLLCTL_L = 0x0EF0; +HSPLLCTL_H = 0x0EF1; +HSPLLUSSXTLCTL = 0x0EF2; +HSPLLUSSXTLCTL_L = 0x0EF2; +HSPLLUSSXTLCTL_H = 0x0EF3; + + +/***************************************************************************** + LCD_C +*****************************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCPCTL3 = 0x0A10; +LCDCPCTL3_L = 0x0A10; +LCDCPCTL3_H = 0x0A11; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDCIV_L = 0x0A1E; +LCDCIV_H = 0x0A1F; +LCDM1 = 0x0A20; + +LCDM2 = 0x0A21; + +LCDM3 = 0x0A22; + +LCDM4 = 0x0A23; + +LCDM5 = 0x0A24; + +LCDM6 = 0x0A25; + +LCDM7 = 0x0A26; + +LCDM8 = 0x0A27; + +LCDM9 = 0x0A28; + +LCDM10 = 0x0A29; + +LCDM11 = 0x0A2A; + +LCDM12 = 0x0A2B; + +LCDM13 = 0x0A2C; + +LCDM14 = 0x0A2D; + +LCDM15 = 0x0A2E; + +LCDM16 = 0x0A2F; + +LCDM17 = 0x0A30; + +LCDM18 = 0x0A31; + +LCDM19 = 0x0A32; + +LCDM20 = 0x0A33; + +LCDM21 = 0x0A34; + +LCDM22 = 0x0A35; + +LCDM23 = 0x0A36; + +LCDM24 = 0x0A37; + +LCDM25 = 0x0A38; + +LCDM26 = 0x0A39; + +LCDM27 = 0x0A3A; + +LCDM28 = 0x0A3B; + +LCDM29 = 0x0A3C; + +LCDM30 = 0x0A3D; + +LCDM31 = 0x0A3E; + +LCDM32 = 0x0A3F; + +LCDM33_LCDBM1 = 0x0A40; + +LCDM34_LCDBM2 = 0x0A41; + +LCDM35_LCDBM3 = 0x0A42; + +LCDM36_LCDBM4 = 0x0A43; + +LCDM37_LCDBM5 = 0x0A44; + +LCDM38_LCDBM6 = 0x0A45; + +LCDM39_LCDBM7 = 0x0A46; + +LCDM40_LCDBM8 = 0x0A47; + +LCDM41_LCDBM9 = 0x0A48; + +LCDM42_LCDBM10 = 0x0A49; + +LCDM43_LCDBM11 = 0x0A4A; + +LCDM44_LCDBM12 = 0x0A4B; + +LCDM45_LCDBM13 = 0x0A4C; + +LCDM46_LCDBM14 = 0x0A4D; + +LCDM47_LCDBM15 = 0x0A4E; + +LCDM48_LCDBM16 = 0x0A4F; + +LCDM49_LCDBM17 = 0x0A50; + +LCDM50_LCDBM18 = 0x0A51; + +LCDM51_LCDBM19 = 0x0A52; + +LCDM52_LCDBM20 = 0x0A53; + + + +/***************************************************************************** + LEA +*****************************************************************************/ +LEACAP = 0x0A80; +LEACAPL = 0x0A80; +LEACAPH = 0x0A82; + +LEACNF0 = 0x0A84; +LEACNF0L = 0x0A84; +LEACNF0H = 0x0A86; + +LEACNF1 = 0x0A88; +LEACNF1L = 0x0A88; +LEACNF1H = 0x0A8A; + +LEACNF2 = 0x0A8C; +LEACNF2L = 0x0A8C; +LEACNF2H = 0x0A8E; + +LEAMB = 0x0A90; +LEAMBL = 0x0A90; +LEAMBH = 0x0A92; + +LEAMT = 0x0A94; +LEAMTL = 0x0A94; +LEAMTH = 0x0A96; + +LEACMA = 0x0A98; +LEACMAL = 0x0A98; +LEACMAH = 0x0A9A; + +LEACMCTL = 0x0A9C; +LEACMCTLL = 0x0A9C; +LEACMCTLH = 0x0A9E; + +LEACMDSTAT = 0x0AA8; +LEACMDSTATL = 0x0AA8; +LEACMDSTATH = 0x0AAA; + +LEAS1STAT = 0x0AAC; +LEAS1STATL = 0x0AAC; +LEAS1STATH = 0x0AAE; + +LEAS0STAT = 0x0AB0; +LEAS0STATL = 0x0AB0; +LEAS0STATH = 0x0AB2; + +LEADSTSTAT = 0x0AB4; +LEADSTSTATL = 0x0AB4; +LEADSTSTATH = 0x0AB6; + +LEAPMCTL = 0x0AC0; +LEAPMCTLL = 0x0AC0; +LEAPMCTLH = 0x0AC2; + +LEAPMDST = 0x0AC4; +LEAPMDSTL = 0x0AC4; +LEAPMDSTH = 0x0AC6; + +LEAPMS1 = 0x0AC8; +LEAPMS1L = 0x0AC8; +LEAPMS1H = 0x0ACA; + +LEAPMS0 = 0x0ACC; +LEAPMS0L = 0x0ACC; +LEAPMS0H = 0x0ACE; + +LEAPMCB = 0x0AD0; +LEAPMCBL = 0x0AD0; +LEAPMCBH = 0x0AD2; + +LEAIFGSET = 0x0AF0; +LEAIFGSETL = 0x0AF0; +LEAIFGSETH = 0x0AF2; + +LEAIE = 0x0AF4; +LEAIEL = 0x0AF4; +LEAIEH = 0x0AF6; + +LEAIFG = 0x0AF8; +LEAIFGL = 0x0AF8; +LEAIFGH = 0x0AFA; + +LEAIV = 0x0AFC; +LEAIVL = 0x0AFC; +LEAIVH = 0x0AFE; + + + +/***************************************************************************** + MPU +*****************************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; + + +/***************************************************************************** + MPY32 +*****************************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; + + +/***************************************************************************** + MTIF +*****************************************************************************/ +MTIFPGCNF = 0x0F00; +MTIFPGCNF_L = 0x0F00; +MTIFPGCNF_H = 0x0F01; +MTIFPGKVAL = 0x0F02; +MTIFPGKVAL_L = 0x0F02; +MTIFPGKVAL_H = 0x0F03; +MTIFPGCTL = 0x0F04; +MTIFPGCTL_L = 0x0F04; +MTIFPGCTL_H = 0x0F05; +MTIFPGSR = 0x0F06; +MTIFPGSR_L = 0x0F06; +MTIFPGSR_H = 0x0F07; +MTIFPCCNF = 0x0F08; +MTIFPCCNF_L = 0x0F08; +MTIFPCCNF_H = 0x0F09; +MTIFPCR = 0x0F0A; +MTIFPCR_L = 0x0F0A; +MTIFPCR_H = 0x0F0B; +MTIFPCCTL = 0x0F0C; +MTIFPCCTL_L = 0x0F0C; +MTIFPCCTL_H = 0x0F0D; +MTIFPCSR = 0x0F0E; +MTIFPCSR_L = 0x0F0E; +MTIFPCSR_H = 0x0F0F; +MTIFTPCTL = 0x0F10; +MTIFTPCTL_L = 0x0F10; +MTIFTPCTL_H = 0x0F11; + + +/***************************************************************************** + PMM +*****************************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; + + +/***************************************************************************** + RAMCTL +*****************************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +RCCTL1 = 0x015A; +RCCTL1_L = 0x015A; +RCCTL1_H = 0x015B; + + +/***************************************************************************** + REF_A +*****************************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; + + +/***************************************************************************** + RTC_C +*****************************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCIV_L = 0x04AE; +RTCIV_H = 0x04AF; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCCNT12 = 0x04B0; +RTCCNT12_L = 0x04B0; +RTCCNT12_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCCNT34 = 0x04B2; +RTCCNT34_L = 0x04B2; +RTCCNT34_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BIN2BCD_L = 0x04BC; +BIN2BCD_H = 0x04BD; +BCD2BIN = 0x04BE; +BCD2BIN_L = 0x04BE; +BCD2BIN_H = 0x04BF; +RT0PS = 0x04AC; + +RT1PS = 0x04AD; + +RTCCNT1 = 0x04B0; + +RTCCNT2 = 0x04B1; + +RTCCNT3 = 0x04B2; + +RTCCNT4 = 0x04B3; + + + +/***************************************************************************** + SAPH +*****************************************************************************/ +SAPHIIDX = 0x0E00; +SAPHIIDX_L = 0x0E00; +SAPHIIDX_H = 0x0E01; +SAPHMIS = 0x0E02; +SAPHMIS_L = 0x0E02; +SAPHMIS_H = 0x0E03; +SAPHRIS = 0x0E04; +SAPHRIS_L = 0x0E04; +SAPHRIS_H = 0x0E05; +SAPHIMSC = 0x0E06; +SAPHIMSC_L = 0x0E06; +SAPHIMSC_H = 0x0E07; +SAPHICR = 0x0E08; +SAPHICR_L = 0x0E08; +SAPHICR_H = 0x0E09; +SAPHISR = 0x0E0A; +SAPHISR_L = 0x0E0A; +SAPHISR_H = 0x0E0B; +SAPHDESCLO = 0x0E0C; +SAPHDESCLO_L = 0x0E0C; +SAPHDESCLO_H = 0x0E0D; +SAPHDESCHI = 0x0E0E; +SAPHDESCHI_L = 0x0E0E; +SAPHDESCHI_H = 0x0E0F; +SAPHKEY = 0x0E10; +SAPHKEY_L = 0x0E10; +SAPHKEY_H = 0x0E11; +SAPHOCTL0 = 0x0E12; +SAPHOCTL0_L = 0x0E12; +SAPHOCTL0_H = 0x0E13; +SAPHOCTL1 = 0x0E14; +SAPHOCTL1_L = 0x0E14; +SAPHOCTL1_H = 0x0E15; +SAPHOSEL = 0x0E16; +SAPHOSEL_L = 0x0E16; +SAPHOSEL_H = 0x0E17; +SAPHCH0PUT = 0x0E20; +SAPHCH0PUT_L = 0x0E20; +SAPHCH0PUT_H = 0x0E21; +SAPHCH0PDT = 0x0E22; +SAPHCH0PDT_L = 0x0E22; +SAPHCH0PDT_H = 0x0E23; +SAPHCH0TT = 0x0E24; +SAPHCH0TT_L = 0x0E24; +SAPHCH0TT_H = 0x0E25; +SAPHCH1PUT = 0x0E26; +SAPHCH1PUT_L = 0x0E26; +SAPHCH1PUT_H = 0x0E27; +SAPHCH1PDT = 0x0E28; +SAPHCH1PDT_L = 0x0E28; +SAPHCH1PDT_H = 0x0E29; +SAPHCH1TT = 0x0E2A; +SAPHCH1TT_L = 0x0E2A; +SAPHCH1TT_H = 0x0E2B; +SAPHMCNF = 0x0E2C; +SAPHMCNF_L = 0x0E2C; +SAPHMCNF_H = 0x0E2D; +SAPHTACTL = 0x0E2E; +SAPHTACTL_L = 0x0E2E; +SAPHTACTL_H = 0x0E2F; +SAPHICTL0 = 0x0E30; +SAPHICTL0_L = 0x0E30; +SAPHICTL0_H = 0x0E31; +SAPHBCTL = 0x0E34; +SAPHBCTL_L = 0x0E34; +SAPHBCTL_H = 0x0E35; +SAPHPGC = 0x0E40; +SAPHPGC_L = 0x0E40; +SAPHPGC_H = 0x0E41; +SAPHPGLPER = 0x0E42; +SAPHPGLPER_L = 0x0E42; +SAPHPGLPER_H = 0x0E43; +SAPHPGHPER = 0x0E44; +SAPHPGHPER_L = 0x0E44; +SAPHPGHPER_H = 0x0E45; +SAPHPGCTL = 0x0E46; +SAPHPGCTL_L = 0x0E46; +SAPHPGCTL_H = 0x0E47; +SAPHPPGTRIG = 0x0E48; +SAPHPPGTRIG_L = 0x0E48; +SAPHPPGTRIG_H = 0x0E49; +SAPHASCTL0 = 0x0E60; +SAPHASCTL0_L = 0x0E60; +SAPHASCTL0_H = 0x0E61; +SAPHASCTL1 = 0x0E62; +SAPHASCTL1_L = 0x0E62; +SAPHASCTL1_H = 0x0E63; +SAPHASQTRIG = 0x0E64; + +SAPHAPOL = 0x0E66; +SAPHAPOL_L = 0x0E66; +SAPHAPOL_H = 0x0E67; +SAPHAPLEV = 0x0E68; +SAPHAPLEV_L = 0x0E68; +SAPHAPLEV_H = 0x0E69; +SAPHAPHIZ = 0x0E6A; +SAPHAPHIZ_L = 0x0E6A; +SAPHAPHIZ_H = 0x0E6B; +SAPHATM_A = 0x0E6E; +SAPHATM_A_L = 0x0E6E; +SAPHATM_A_H = 0x0E6F; +SAPHATM_B = 0x0E70; +SAPHATM_B_L = 0x0E70; +SAPHATM_B_H = 0x0E71; +SAPHATM_C = 0x0E72; +SAPHATM_C_L = 0x0E72; +SAPHATM_C_H = 0x0E73; +SAPHATM_D = 0x0E74; +SAPHATM_D_L = 0x0E74; +SAPHATM_D_H = 0x0E75; +SAPHATM_E = 0x0E76; +SAPHATM_E_L = 0x0E76; +SAPHATM_E_H = 0x0E77; +SAPHATM_F = 0x0E78; +SAPHATM_F_L = 0x0E78; +SAPHATM_F_H = 0x0E79; +SAPHTBCTL = 0x0E7A; +SAPHTBCTL_L = 0x0E7A; +SAPHTBCTL_H = 0x0E7B; +SAPHATIMLO = 0x0E7C; +SAPHATIMLO_L = 0x0E7C; +SAPHATIMLO_H = 0x0E7D; +SAPHATIMHI = 0x0E7E; +SAPHATIMHI_L = 0x0E7E; +SAPHATIMHI_H = 0x0E7F; + + +/***************************************************************************** + SDHS +*****************************************************************************/ +SDHSIIDX = 0x0E80; +SDHSIIDX_L = 0x0E80; +SDHSIIDX_H = 0x0E81; +SDHSMIS = 0x0E82; +SDHSMIS_L = 0x0E82; +SDHSMIS_H = 0x0E83; +SDHSRIS = 0x0E84; +SDHSRIS_L = 0x0E84; +SDHSRIS_H = 0x0E85; +SDHSIMSC = 0x0E86; +SDHSIMSC_L = 0x0E86; +SDHSIMSC_H = 0x0E87; +SDHSICR = 0x0E88; +SDHSICR_L = 0x0E88; +SDHSICR_H = 0x0E89; +SDHSISR = 0x0E8A; +SDHSISR_L = 0x0E8A; +SDHSISR_H = 0x0E8B; +SDHSDESCLO = 0x0E8C; +SDHSDESCLO_L = 0x0E8C; +SDHSDESCLO_H = 0x0E8D; +SDHSDESCHI = 0x0E8E; +SDHSDESCHI_L = 0x0E8E; +SDHSDESCHI_H = 0x0E8F; +SDHSCTL0 = 0x0E90; +SDHSCTL0_L = 0x0E90; +SDHSCTL0_H = 0x0E91; +SDHSCTL1 = 0x0E92; +SDHSCTL1_L = 0x0E92; +SDHSCTL1_H = 0x0E93; +SDHSCTL2 = 0x0E94; +SDHSCTL2_L = 0x0E94; +SDHSCTL2_H = 0x0E95; +SDHSCTL3 = 0x0E96; +SDHSCTL3_L = 0x0E96; +SDHSCTL3_H = 0x0E97; +SDHSCTL4 = 0x0E98; +SDHSCTL4_L = 0x0E98; +SDHSCTL4_H = 0x0E99; +SDHSCTL5 = 0x0E9A; +SDHSCTL5_L = 0x0E9A; +SDHSCTL5_H = 0x0E9B; +SDHSCTL6 = 0x0E9C; +SDHSCTL6_L = 0x0E9C; +SDHSCTL6_H = 0x0E9D; +SDHSCTL7 = 0x0E9E; +SDHSCTL7_L = 0x0E9E; +SDHSCTL7_H = 0x0E9F; +SDHSDT = 0x0EA2; +SDHSDT_L = 0x0EA2; +SDHSDT_H = 0x0EA3; +SDHSWINHITH = 0x0EA4; +SDHSWINHITH_L = 0x0EA4; +SDHSWINHITH_H = 0x0EA5; +SDHSWINLOTH = 0x0EA6; +SDHSWINLOTH_L = 0x0EA6; +SDHSWINLOTH_H = 0x0EA7; +SDHSDTCDA = 0x0EA8; +SDHSDTCDA_L = 0x0EA8; +SDHSDTCDA_H = 0x0EA9; + + +/***************************************************************************** + SFR +*****************************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; + + +/***************************************************************************** + SYS +*****************************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; + + +/***************************************************************************** + TA0 +*****************************************************************************/ +TA0CTL = 0x0340; +TA0CTL_L = 0x0340; +TA0CTL_H = 0x0341; +TA0CCTL0 = 0x0342; +TA0CCTL0_L = 0x0342; +TA0CCTL0_H = 0x0343; +TA0CCTL1 = 0x0344; +TA0CCTL1_L = 0x0344; +TA0CCTL1_H = 0x0345; +TA0CCTL2 = 0x0346; +TA0CCTL2_L = 0x0346; +TA0CCTL2_H = 0x0347; +TA0R = 0x0350; +TA0R_L = 0x0350; +TA0R_H = 0x0351; +TA0CCR0 = 0x0352; +TA0CCR0_L = 0x0352; +TA0CCR0_H = 0x0353; +TA0CCR1 = 0x0354; +TA0CCR1_L = 0x0354; +TA0CCR1_H = 0x0355; +TA0CCR2 = 0x0356; +TA0CCR2_L = 0x0356; +TA0CCR2_H = 0x0357; +TA0EX0 = 0x0360; +TA0EX0_L = 0x0360; +TA0EX0_H = 0x0361; +TA0IV = 0x036E; +TA0IV_L = 0x036E; +TA0IV_H = 0x036F; + + +/***************************************************************************** + TA1 +*****************************************************************************/ +TA1CTL = 0x0380; +TA1CTL_L = 0x0380; +TA1CTL_H = 0x0381; +TA1CCTL0 = 0x0382; +TA1CCTL0_L = 0x0382; +TA1CCTL0_H = 0x0383; +TA1CCTL1 = 0x0384; +TA1CCTL1_L = 0x0384; +TA1CCTL1_H = 0x0385; +TA1CCTL2 = 0x0386; +TA1CCTL2_L = 0x0386; +TA1CCTL2_H = 0x0387; +TA1R = 0x0390; +TA1R_L = 0x0390; +TA1R_H = 0x0391; +TA1CCR0 = 0x0392; +TA1CCR0_L = 0x0392; +TA1CCR0_H = 0x0393; +TA1CCR1 = 0x0394; +TA1CCR1_L = 0x0394; +TA1CCR1_H = 0x0395; +TA1CCR2 = 0x0396; +TA1CCR2_L = 0x0396; +TA1CCR2_H = 0x0397; +TA1EX0 = 0x03A0; +TA1EX0_L = 0x03A0; +TA1EX0_H = 0x03A1; +TA1IV = 0x03AE; +TA1IV_L = 0x03AE; +TA1IV_H = 0x03AF; + + +/***************************************************************************** + TA2 +*****************************************************************************/ +TA2CTL = 0x0400; +TA2CTL_L = 0x0400; +TA2CTL_H = 0x0401; +TA2CCTL0 = 0x0402; +TA2CCTL0_L = 0x0402; +TA2CCTL0_H = 0x0403; +TA2CCTL1 = 0x0404; +TA2CCTL1_L = 0x0404; +TA2CCTL1_H = 0x0405; +TA2R = 0x0410; +TA2R_L = 0x0410; +TA2R_H = 0x0411; +TA2CCR0 = 0x0412; +TA2CCR0_L = 0x0412; +TA2CCR0_H = 0x0413; +TA2CCR1 = 0x0414; +TA2CCR1_L = 0x0414; +TA2CCR1_H = 0x0415; +TA2EX0 = 0x0420; +TA2EX0_L = 0x0420; +TA2EX0_H = 0x0421; +TA2IV = 0x042E; +TA2IV_L = 0x042E; +TA2IV_H = 0x042F; + + +/***************************************************************************** + TA3 +*****************************************************************************/ +TA3CTL = 0x0440; +TA3CTL_L = 0x0440; +TA3CTL_H = 0x0441; +TA3CCTL0 = 0x0442; +TA3CCTL0_L = 0x0442; +TA3CCTL0_H = 0x0443; +TA3CCTL1 = 0x0444; +TA3CCTL1_L = 0x0444; +TA3CCTL1_H = 0x0445; +TA3R = 0x0450; +TA3R_L = 0x0450; +TA3R_H = 0x0451; +TA3CCR0 = 0x0452; +TA3CCR0_L = 0x0452; +TA3CCR0_H = 0x0453; +TA3CCR1 = 0x0454; +TA3CCR1_L = 0x0454; +TA3CCR1_H = 0x0455; +TA3EX0 = 0x0460; +TA3EX0_L = 0x0460; +TA3EX0_H = 0x0461; +TA3IV = 0x046E; +TA3IV_L = 0x046E; +TA3IV_H = 0x046F; + + +/***************************************************************************** + TA4 +*****************************************************************************/ +TA4CTL = 0x07C0; +TA4CTL_L = 0x07C0; +TA4CTL_H = 0x07C1; +TA4CCTL0 = 0x07C2; +TA4CCTL0_L = 0x07C2; +TA4CCTL0_H = 0x07C3; +TA4CCTL1 = 0x07C4; +TA4CCTL1_L = 0x07C4; +TA4CCTL1_H = 0x07C5; +TA4R = 0x07D0; +TA4R_L = 0x07D0; +TA4R_H = 0x07D1; +TA4CCR0 = 0x07D2; +TA4CCR0_L = 0x07D2; +TA4CCR0_H = 0x07D3; +TA4CCR1 = 0x07D4; +TA4CCR1_L = 0x07D4; +TA4CCR1_H = 0x07D5; +TA4EX0 = 0x07E0; +TA4EX0_L = 0x07E0; +TA4EX0_H = 0x07E1; +TA4IV = 0x07EE; +TA4IV_L = 0x07EE; +TA4IV_H = 0x07EF; + + +/***************************************************************************** + TB0 +*****************************************************************************/ +TB0CTL = 0x03C0; +TB0CTL_L = 0x03C0; +TB0CTL_H = 0x03C1; +TB0CCTL0 = 0x03C2; +TB0CCTL0_L = 0x03C2; +TB0CCTL0_H = 0x03C3; +TB0CCTL1 = 0x03C4; +TB0CCTL1_L = 0x03C4; +TB0CCTL1_H = 0x03C5; +TB0CCTL2 = 0x03C6; +TB0CCTL2_L = 0x03C6; +TB0CCTL2_H = 0x03C7; +TB0CCTL3 = 0x03C8; +TB0CCTL3_L = 0x03C8; +TB0CCTL3_H = 0x03C9; +TB0CCTL4 = 0x03CA; +TB0CCTL4_L = 0x03CA; +TB0CCTL4_H = 0x03CB; +TB0CCTL5 = 0x03CC; +TB0CCTL5_L = 0x03CC; +TB0CCTL5_H = 0x03CD; +TB0CCTL6 = 0x03CE; +TB0CCTL6_L = 0x03CE; +TB0CCTL6_H = 0x03CF; +TB0R = 0x03D0; +TB0R_L = 0x03D0; +TB0R_H = 0x03D1; +TB0CCR0 = 0x03D2; +TB0CCR0_L = 0x03D2; +TB0CCR0_H = 0x03D3; +TB0CCR1 = 0x03D4; +TB0CCR1_L = 0x03D4; +TB0CCR1_H = 0x03D5; +TB0CCR2 = 0x03D6; +TB0CCR2_L = 0x03D6; +TB0CCR2_H = 0x03D7; +TB0CCR3 = 0x03D8; +TB0CCR3_L = 0x03D8; +TB0CCR3_H = 0x03D9; +TB0CCR4 = 0x03DA; +TB0CCR4_L = 0x03DA; +TB0CCR4_H = 0x03DB; +TB0CCR5 = 0x03DC; +TB0CCR5_L = 0x03DC; +TB0CCR5_H = 0x03DD; +TB0CCR6 = 0x03DE; +TB0CCR6_L = 0x03DE; +TB0CCR6_H = 0x03DF; +TB0EX0 = 0x03E0; +TB0EX0_L = 0x03E0; +TB0EX0_H = 0x03E1; +TB0IV = 0x03EE; +TB0IV_L = 0x03EE; +TB0IV_H = 0x03EF; + + +/***************************************************************************** + UUPS +*****************************************************************************/ +UUPSIIDX = 0x0EC0; +UUPSIIDX_L = 0x0EC0; +UUPSIIDX_H = 0x0EC1; +UUPSMIS = 0x0EC2; +UUPSMIS_L = 0x0EC2; +UUPSMIS_H = 0x0EC3; +UUPSRIS = 0x0EC4; +UUPSRIS_L = 0x0EC4; +UUPSRIS_H = 0x0EC5; +UUPSIMSC = 0x0EC6; +UUPSIMSC_L = 0x0EC6; +UUPSIMSC_H = 0x0EC7; +UUPSICR = 0x0EC8; +UUPSICR_L = 0x0EC8; +UUPSICR_H = 0x0EC9; +UUPSISR = 0x0ECA; +UUPSISR_L = 0x0ECA; +UUPSISR_H = 0x0ECB; +UUPSDESCLO = 0x0ECC; +UUPSDESCLO_L = 0x0ECC; +UUPSDESCLO_H = 0x0ECD; +UUPSDESCHI = 0x0ECE; +UUPSDESCHI_L = 0x0ECE; +UUPSDESCHI_H = 0x0ECF; +UUPSCTL = 0x0ED0; +UUPSCTL_L = 0x0ED0; +UUPSCTL_H = 0x0ED1; + + +/***************************************************************************** + WDT_A +*****************************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; + + +/***************************************************************************** + eUSCI_A0 +*****************************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0STATW_L = 0x05CA; +UCA0STATW_H = 0x05CB; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0ABCTL_L = 0x05D0; +UCA0ABCTL_H = 0x05D1; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +UCA0IV_L = 0x05DE; +UCA0IV_H = 0x05DF; + + +/***************************************************************************** + eUSCI_A1 +*****************************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1STATW_L = 0x05EA; +UCA1STATW_H = 0x05EB; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1ABCTL_L = 0x05F0; +UCA1ABCTL_H = 0x05F1; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +UCA1IV_L = 0x05FE; +UCA1IV_H = 0x05FF; + + +/***************************************************************************** + eUSCI_A2 +*****************************************************************************/ +UCA2CTLW0 = 0x0600; +UCA2CTLW0_L = 0x0600; +UCA2CTLW0_H = 0x0601; +UCA2CTLW1 = 0x0602; +UCA2CTLW1_L = 0x0602; +UCA2CTLW1_H = 0x0603; +UCA2BRW = 0x0606; +UCA2BRW_L = 0x0606; +UCA2BRW_H = 0x0607; +UCA2MCTLW = 0x0608; +UCA2MCTLW_L = 0x0608; +UCA2MCTLW_H = 0x0609; +UCA2STATW = 0x060A; +UCA2STATW_L = 0x060A; +UCA2STATW_H = 0x060B; +UCA2RXBUF = 0x060C; +UCA2RXBUF_L = 0x060C; +UCA2RXBUF_H = 0x060D; +UCA2TXBUF = 0x060E; +UCA2TXBUF_L = 0x060E; +UCA2TXBUF_H = 0x060F; +UCA2ABCTL = 0x0610; +UCA2ABCTL_L = 0x0610; +UCA2ABCTL_H = 0x0611; +UCA2IRCTL = 0x0612; +UCA2IRCTL_L = 0x0612; +UCA2IRCTL_H = 0x0613; +UCA2IE = 0x061A; +UCA2IE_L = 0x061A; +UCA2IE_H = 0x061B; +UCA2IFG = 0x061C; +UCA2IFG_L = 0x061C; +UCA2IFG_H = 0x061D; +UCA2IV = 0x061E; +UCA2IV_L = 0x061E; +UCA2IV_H = 0x061F; + + +/***************************************************************************** + eUSCI_A3 +*****************************************************************************/ +UCA3CTLW0 = 0x0620; +UCA3CTLW0_L = 0x0620; +UCA3CTLW0_H = 0x0621; +UCA3CTLW1 = 0x0622; +UCA3CTLW1_L = 0x0622; +UCA3CTLW1_H = 0x0623; +UCA3BRW = 0x0626; +UCA3BRW_L = 0x0626; +UCA3BRW_H = 0x0627; +UCA3MCTLW = 0x0628; +UCA3MCTLW_L = 0x0628; +UCA3MCTLW_H = 0x0629; +UCA3STATW = 0x062A; +UCA3STATW_L = 0x062A; +UCA3STATW_H = 0x062B; +UCA3RXBUF = 0x062C; +UCA3RXBUF_L = 0x062C; +UCA3RXBUF_H = 0x062D; +UCA3TXBUF = 0x062E; +UCA3TXBUF_L = 0x062E; +UCA3TXBUF_H = 0x062F; +UCA3ABCTL = 0x0630; +UCA3ABCTL_L = 0x0630; +UCA3ABCTL_H = 0x0631; +UCA3IRCTL = 0x0632; +UCA3IRCTL_L = 0x0632; +UCA3IRCTL_H = 0x0633; +UCA3IE = 0x063A; +UCA3IE_L = 0x063A; +UCA3IE_H = 0x063B; +UCA3IFG = 0x063C; +UCA3IFG_L = 0x063C; +UCA3IFG_H = 0x063D; +UCA3IV = 0x063E; +UCA3IV_L = 0x063E; +UCA3IV_H = 0x063F; + + +/***************************************************************************** + eUSCI_B0 +*****************************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +UCB0IV_L = 0x066E; +UCB0IV_H = 0x066F; + + +/***************************************************************************** + eUSCI_B1 +*****************************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +UCB1IV_L = 0x06AE; +UCB1IV_H = 0x06AF; + + +/**************************************************************** +* End of Modules +****************************************************************/ + diff --git a/msp430/msp430fr6820.cmd b/msp430/msp430fr6820.cmd new file mode 100644 index 00000000..7b18a271 --- /dev/null +++ b/msp430/msp430fr6820.cmd @@ -0,0 +1,1182 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr6820.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr6822.cmd b/msp430/msp430fr6822.cmd new file mode 100644 index 00000000..c7f0b473 --- /dev/null +++ b/msp430/msp430fr6822.cmd @@ -0,0 +1,1182 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr6822.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr68221.cmd b/msp430/msp430fr68221.cmd new file mode 100644 index 00000000..eacc23fa --- /dev/null +++ b/msp430/msp430fr68221.cmd @@ -0,0 +1,1182 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr68221.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr6870.cmd b/msp430/msp430fr6870.cmd new file mode 100644 index 00000000..ad0d36d0 --- /dev/null +++ b/msp430/msp430fr6870.cmd @@ -0,0 +1,1182 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr6870.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr6872.cmd b/msp430/msp430fr6872.cmd new file mode 100644 index 00000000..6252d733 --- /dev/null +++ b/msp430/msp430fr6872.cmd @@ -0,0 +1,1182 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr6872.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr68721.cmd b/msp430/msp430fr68721.cmd new file mode 100644 index 00000000..fd8de70c --- /dev/null +++ b/msp430/msp430fr68721.cmd @@ -0,0 +1,1182 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr68721.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr6877.cmd b/msp430/msp430fr6877.cmd new file mode 100644 index 00000000..62a824cf --- /dev/null +++ b/msp430/msp430fr6877.cmd @@ -0,0 +1,1182 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr6877.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr6879.cmd b/msp430/msp430fr6879.cmd new file mode 100644 index 00000000..d521d224 --- /dev/null +++ b/msp430/msp430fr6879.cmd @@ -0,0 +1,1182 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr6879.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr68791.cmd b/msp430/msp430fr68791.cmd new file mode 100644 index 00000000..0a6778ac --- /dev/null +++ b/msp430/msp430fr68791.cmd @@ -0,0 +1,1182 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr68791.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr6887.cmd b/msp430/msp430fr6887.cmd new file mode 100644 index 00000000..c1cdf99a --- /dev/null +++ b/msp430/msp430fr6887.cmd @@ -0,0 +1,1520 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr6887.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************ +* EXTENDED SCAN INTERFACE +************************************************************/ +ESIDEBUG1 = 0x0D00; +ESIDEBUG1_L = 0x0D00; +ESIDEBUG1_H = 0x0D01; +ESIDEBUG2 = 0x0D02; +ESIDEBUG2_L = 0x0D02; +ESIDEBUG2_H = 0x0D03; +ESIDEBUG3 = 0x0D04; +ESIDEBUG3_L = 0x0D04; +ESIDEBUG3_H = 0x0D05; +ESIDEBUG4 = 0x0D06; +ESIDEBUG4_L = 0x0D06; +ESIDEBUG4_H = 0x0D07; +ESIDEBUG5 = 0x0D08; +ESIDEBUG5_L = 0x0D08; +ESIDEBUG5_H = 0x0D09; +ESICNT0 = 0x0D10; +ESICNT0_L = 0x0D10; +ESICNT0_H = 0x0D11; +ESICNT1 = 0x0D12; +ESICNT1_L = 0x0D12; +ESICNT1_H = 0x0D13; +ESICNT2 = 0x0D14; +ESICNT2_L = 0x0D14; +ESICNT2_H = 0x0D15; +ESICNT3 = 0x0D16; +ESICNT3_L = 0x0D16; +ESICNT3_H = 0x0D17; +ESIIV = 0x0D1A; +ESIIV_L = 0x0D1A; +ESIIV_H = 0x0D1B; +ESIINT1 = 0x0D1C; +ESIINT1_L = 0x0D1C; +ESIINT1_H = 0x0D1D; +ESIINT2 = 0x0D1E; +ESIINT2_L = 0x0D1E; +ESIINT2_H = 0x0D1F; +ESIAFE = 0x0D20; +ESIAFE_L = 0x0D20; +ESIAFE_H = 0x0D21; +ESIPPU = 0x0D22; +ESIPPU_L = 0x0D22; +ESIPPU_H = 0x0D23; +ESITSM = 0x0D24; +ESITSM_L = 0x0D24; +ESITSM_H = 0x0D25; +ESIPSM = 0x0D26; +ESIPSM_L = 0x0D26; +ESIPSM_H = 0x0D27; +ESIOSC = 0x0D28; +ESIOSC_L = 0x0D28; +ESIOSC_H = 0x0D29; +ESICTL = 0x0D2A; +ESICTL_L = 0x0D2A; +ESICTL_H = 0x0D2B; +ESITHR1 = 0x0D2C; +ESITHR1_L = 0x0D2C; +ESITHR1_H = 0x0D2D; +ESITHR2 = 0x0D2E; +ESITHR2_L = 0x0D2E; +ESITHR2_H = 0x0D2F; +ESIDAC1R0 = 0x0D40; +ESIDAC1R0_L = 0x0D40; +ESIDAC1R0_H = 0x0D41; +ESIDAC1R1 = 0x0D42; +ESIDAC1R1_L = 0x0D42; +ESIDAC1R1_H = 0x0D43; +ESIDAC1R2 = 0x0D44; +ESIDAC1R2_L = 0x0D44; +ESIDAC1R2_H = 0x0D45; +ESIDAC1R3 = 0x0D46; +ESIDAC1R3_L = 0x0D46; +ESIDAC1R3_H = 0x0D47; +ESIDAC1R4 = 0x0D48; +ESIDAC1R4_L = 0x0D48; +ESIDAC1R4_H = 0x0D49; +ESIDAC1R5 = 0x0D4A; +ESIDAC1R5_L = 0x0D4A; +ESIDAC1R5_H = 0x0D4B; +ESIDAC1R6 = 0x0D4C; +ESIDAC1R6_L = 0x0D4C; +ESIDAC1R6_H = 0x0D4D; +ESIDAC1R7 = 0x0D4E; +ESIDAC1R7_L = 0x0D4E; +ESIDAC1R7_H = 0x0D4F; +ESIDAC2R0 = 0x0D50; +ESIDAC2R0_L = 0x0D50; +ESIDAC2R0_H = 0x0D51; +ESIDAC2R1 = 0x0D52; +ESIDAC2R1_L = 0x0D52; +ESIDAC2R1_H = 0x0D53; +ESIDAC2R2 = 0x0D54; +ESIDAC2R2_L = 0x0D54; +ESIDAC2R2_H = 0x0D55; +ESIDAC2R3 = 0x0D56; +ESIDAC2R3_L = 0x0D56; +ESIDAC2R3_H = 0x0D57; +ESIDAC2R4 = 0x0D58; +ESIDAC2R4_L = 0x0D58; +ESIDAC2R4_H = 0x0D59; +ESIDAC2R5 = 0x0D5A; +ESIDAC2R5_L = 0x0D5A; +ESIDAC2R5_H = 0x0D5B; +ESIDAC2R6 = 0x0D5C; +ESIDAC2R6_L = 0x0D5C; +ESIDAC2R6_H = 0x0D5D; +ESIDAC2R7 = 0x0D5E; +ESIDAC2R7_L = 0x0D5E; +ESIDAC2R7_H = 0x0D5F; +ESITSM0 = 0x0D60; +ESITSM0_L = 0x0D60; +ESITSM0_H = 0x0D61; +ESITSM1 = 0x0D62; +ESITSM1_L = 0x0D62; +ESITSM1_H = 0x0D63; +ESITSM2 = 0x0D64; +ESITSM2_L = 0x0D64; +ESITSM2_H = 0x0D65; +ESITSM3 = 0x0D66; +ESITSM3_L = 0x0D66; +ESITSM3_H = 0x0D67; +ESITSM4 = 0x0D68; +ESITSM4_L = 0x0D68; +ESITSM4_H = 0x0D69; +ESITSM5 = 0x0D6A; +ESITSM5_L = 0x0D6A; +ESITSM5_H = 0x0D6B; +ESITSM6 = 0x0D6C; +ESITSM6_L = 0x0D6C; +ESITSM6_H = 0x0D6D; +ESITSM7 = 0x0D6E; +ESITSM7_L = 0x0D6E; +ESITSM7_H = 0x0D6F; +ESITSM8 = 0x0D70; +ESITSM8_L = 0x0D70; +ESITSM8_H = 0x0D71; +ESITSM9 = 0x0D72; +ESITSM9_L = 0x0D72; +ESITSM9_H = 0x0D73; +ESITSM10 = 0x0D74; +ESITSM10_L = 0x0D74; +ESITSM10_H = 0x0D75; +ESITSM11 = 0x0D76; +ESITSM11_L = 0x0D76; +ESITSM11_H = 0x0D77; +ESITSM12 = 0x0D78; +ESITSM12_L = 0x0D78; +ESITSM12_H = 0x0D79; +ESITSM13 = 0x0D7A; +ESITSM13_L = 0x0D7A; +ESITSM13_H = 0x0D7B; +ESITSM14 = 0x0D7C; +ESITSM14_L = 0x0D7C; +ESITSM14_H = 0x0D7D; +ESITSM15 = 0x0D7E; +ESITSM15_L = 0x0D7E; +ESITSM15_H = 0x0D7F; +ESITSM16 = 0x0D80; +ESITSM16_L = 0x0D80; +ESITSM16_H = 0x0D81; +ESITSM17 = 0x0D82; +ESITSM17_L = 0x0D82; +ESITSM17_H = 0x0D83; +ESITSM18 = 0x0D84; +ESITSM18_L = 0x0D84; +ESITSM18_H = 0x0D85; +ESITSM19 = 0x0D86; +ESITSM19_L = 0x0D86; +ESITSM19_H = 0x0D87; +ESITSM20 = 0x0D88; +ESITSM20_L = 0x0D88; +ESITSM20_H = 0x0D89; +ESITSM21 = 0x0D8A; +ESITSM21_L = 0x0D8A; +ESITSM21_H = 0x0D8B; +ESITSM22 = 0x0D8C; +ESITSM22_L = 0x0D8C; +ESITSM22_H = 0x0D8D; +ESITSM23 = 0x0D8E; +ESITSM23_L = 0x0D8E; +ESITSM23_H = 0x0D8F; +ESITSM24 = 0x0D90; +ESITSM24_L = 0x0D90; +ESITSM24_H = 0x0D91; +ESITSM25 = 0x0D92; +ESITSM25_L = 0x0D92; +ESITSM25_H = 0x0D93; +ESITSM26 = 0x0D94; +ESITSM26_L = 0x0D94; +ESITSM26_H = 0x0D95; +ESITSM27 = 0x0D96; +ESITSM27_L = 0x0D96; +ESITSM27_H = 0x0D97; +ESITSM28 = 0x0D98; +ESITSM28_L = 0x0D98; +ESITSM28_H = 0x0D99; +ESITSM29 = 0x0D9A; +ESITSM29_L = 0x0D9A; +ESITSM29_H = 0x0D9B; +ESITSM30 = 0x0D9C; +ESITSM30_L = 0x0D9C; +ESITSM30_H = 0x0D9D; +ESITSM31 = 0x0D9E; +ESITSM31_L = 0x0D9E; +ESITSM31_H = 0x0D9F; +/************************************************************ +* EXTENDED SCAN INTERFACE RAM +************************************************************/ +ESIRAM0 = 0x0E00; +ESIRAM1 = 0x0E01; +ESIRAM2 = 0x0E02; +ESIRAM3 = 0x0E03; +ESIRAM4 = 0x0E04; +ESIRAM5 = 0x0E05; +ESIRAM6 = 0x0E06; +ESIRAM7 = 0x0E07; +ESIRAM8 = 0x0E08; +ESIRAM9 = 0x0E09; +ESIRAM10 = 0x0E0A; +ESIRAM11 = 0x0E0B; +ESIRAM12 = 0x0E0C; +ESIRAM13 = 0x0E0D; +ESIRAM14 = 0x0E0E; +ESIRAM15 = 0x0E0F; +ESIRAM16 = 0x0E10; +ESIRAM17 = 0x0E11; +ESIRAM18 = 0x0E12; +ESIRAM19 = 0x0E13; +ESIRAM20 = 0x0E14; +ESIRAM21 = 0x0E15; +ESIRAM22 = 0x0E16; +ESIRAM23 = 0x0E17; +ESIRAM24 = 0x0E18; +ESIRAM25 = 0x0E19; +ESIRAM26 = 0x0E1A; +ESIRAM27 = 0x0E1B; +ESIRAM28 = 0x0E1C; +ESIRAM29 = 0x0E1D; +ESIRAM30 = 0x0E1E; +ESIRAM31 = 0x0E1F; +ESIRAM32 = 0x0E20; +ESIRAM33 = 0x0E21; +ESIRAM34 = 0x0E22; +ESIRAM35 = 0x0E23; +ESIRAM36 = 0x0E24; +ESIRAM37 = 0x0E25; +ESIRAM38 = 0x0E26; +ESIRAM39 = 0x0E27; +ESIRAM40 = 0x0E28; +ESIRAM41 = 0x0E29; +ESIRAM42 = 0x0E2A; +ESIRAM43 = 0x0E2B; +ESIRAM44 = 0x0E2C; +ESIRAM45 = 0x0E2D; +ESIRAM46 = 0x0E2E; +ESIRAM47 = 0x0E2F; +ESIRAM48 = 0x0E30; +ESIRAM49 = 0x0E31; +ESIRAM50 = 0x0E32; +ESIRAM51 = 0x0E33; +ESIRAM52 = 0x0E34; +ESIRAM53 = 0x0E35; +ESIRAM54 = 0x0E36; +ESIRAM55 = 0x0E37; +ESIRAM56 = 0x0E38; +ESIRAM57 = 0x0E39; +ESIRAM58 = 0x0E3A; +ESIRAM59 = 0x0E3B; +ESIRAM60 = 0x0E3C; +ESIRAM61 = 0x0E3D; +ESIRAM62 = 0x0E3E; +ESIRAM63 = 0x0E3F; +ESIRAM64 = 0x0E40; +ESIRAM65 = 0x0E41; +ESIRAM66 = 0x0E42; +ESIRAM67 = 0x0E43; +ESIRAM68 = 0x0E44; +ESIRAM69 = 0x0E45; +ESIRAM70 = 0x0E46; +ESIRAM71 = 0x0E47; +ESIRAM72 = 0x0E48; +ESIRAM73 = 0x0E49; +ESIRAM74 = 0x0E4A; +ESIRAM75 = 0x0E4B; +ESIRAM76 = 0x0E4C; +ESIRAM77 = 0x0E4D; +ESIRAM78 = 0x0E4E; +ESIRAM79 = 0x0E4F; +ESIRAM80 = 0x0E50; +ESIRAM81 = 0x0E51; +ESIRAM82 = 0x0E52; +ESIRAM83 = 0x0E53; +ESIRAM84 = 0x0E54; +ESIRAM85 = 0x0E55; +ESIRAM86 = 0x0E56; +ESIRAM87 = 0x0E57; +ESIRAM88 = 0x0E58; +ESIRAM89 = 0x0E59; +ESIRAM90 = 0x0E5A; +ESIRAM91 = 0x0E5B; +ESIRAM92 = 0x0E5C; +ESIRAM93 = 0x0E5D; +ESIRAM94 = 0x0E5E; +ESIRAM95 = 0x0E5F; +ESIRAM96 = 0x0E60; +ESIRAM97 = 0x0E61; +ESIRAM98 = 0x0E62; +ESIRAM99 = 0x0E63; +ESIRAM100 = 0x0E64; +ESIRAM101 = 0x0E65; +ESIRAM102 = 0x0E66; +ESIRAM103 = 0x0E67; +ESIRAM104 = 0x0E68; +ESIRAM105 = 0x0E69; +ESIRAM106 = 0x0E6A; +ESIRAM107 = 0x0E6B; +ESIRAM108 = 0x0E6C; +ESIRAM109 = 0x0E6D; +ESIRAM110 = 0x0E6E; +ESIRAM111 = 0x0E6F; +ESIRAM112 = 0x0E70; +ESIRAM113 = 0x0E71; +ESIRAM114 = 0x0E72; +ESIRAM115 = 0x0E73; +ESIRAM116 = 0x0E74; +ESIRAM117 = 0x0E75; +ESIRAM118 = 0x0E76; +ESIRAM119 = 0x0E77; +ESIRAM120 = 0x0E78; +ESIRAM121 = 0x0E79; +ESIRAM122 = 0x0E7A; +ESIRAM123 = 0x0E7B; +ESIRAM124 = 0x0E7C; +ESIRAM125 = 0x0E7D; +ESIRAM126 = 0x0E7E; +ESIRAM127 = 0x0E7F; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr6888.cmd b/msp430/msp430fr6888.cmd new file mode 100644 index 00000000..d6e53ca7 --- /dev/null +++ b/msp430/msp430fr6888.cmd @@ -0,0 +1,1520 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr6888.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************ +* EXTENDED SCAN INTERFACE +************************************************************/ +ESIDEBUG1 = 0x0D00; +ESIDEBUG1_L = 0x0D00; +ESIDEBUG1_H = 0x0D01; +ESIDEBUG2 = 0x0D02; +ESIDEBUG2_L = 0x0D02; +ESIDEBUG2_H = 0x0D03; +ESIDEBUG3 = 0x0D04; +ESIDEBUG3_L = 0x0D04; +ESIDEBUG3_H = 0x0D05; +ESIDEBUG4 = 0x0D06; +ESIDEBUG4_L = 0x0D06; +ESIDEBUG4_H = 0x0D07; +ESIDEBUG5 = 0x0D08; +ESIDEBUG5_L = 0x0D08; +ESIDEBUG5_H = 0x0D09; +ESICNT0 = 0x0D10; +ESICNT0_L = 0x0D10; +ESICNT0_H = 0x0D11; +ESICNT1 = 0x0D12; +ESICNT1_L = 0x0D12; +ESICNT1_H = 0x0D13; +ESICNT2 = 0x0D14; +ESICNT2_L = 0x0D14; +ESICNT2_H = 0x0D15; +ESICNT3 = 0x0D16; +ESICNT3_L = 0x0D16; +ESICNT3_H = 0x0D17; +ESIIV = 0x0D1A; +ESIIV_L = 0x0D1A; +ESIIV_H = 0x0D1B; +ESIINT1 = 0x0D1C; +ESIINT1_L = 0x0D1C; +ESIINT1_H = 0x0D1D; +ESIINT2 = 0x0D1E; +ESIINT2_L = 0x0D1E; +ESIINT2_H = 0x0D1F; +ESIAFE = 0x0D20; +ESIAFE_L = 0x0D20; +ESIAFE_H = 0x0D21; +ESIPPU = 0x0D22; +ESIPPU_L = 0x0D22; +ESIPPU_H = 0x0D23; +ESITSM = 0x0D24; +ESITSM_L = 0x0D24; +ESITSM_H = 0x0D25; +ESIPSM = 0x0D26; +ESIPSM_L = 0x0D26; +ESIPSM_H = 0x0D27; +ESIOSC = 0x0D28; +ESIOSC_L = 0x0D28; +ESIOSC_H = 0x0D29; +ESICTL = 0x0D2A; +ESICTL_L = 0x0D2A; +ESICTL_H = 0x0D2B; +ESITHR1 = 0x0D2C; +ESITHR1_L = 0x0D2C; +ESITHR1_H = 0x0D2D; +ESITHR2 = 0x0D2E; +ESITHR2_L = 0x0D2E; +ESITHR2_H = 0x0D2F; +ESIDAC1R0 = 0x0D40; +ESIDAC1R0_L = 0x0D40; +ESIDAC1R0_H = 0x0D41; +ESIDAC1R1 = 0x0D42; +ESIDAC1R1_L = 0x0D42; +ESIDAC1R1_H = 0x0D43; +ESIDAC1R2 = 0x0D44; +ESIDAC1R2_L = 0x0D44; +ESIDAC1R2_H = 0x0D45; +ESIDAC1R3 = 0x0D46; +ESIDAC1R3_L = 0x0D46; +ESIDAC1R3_H = 0x0D47; +ESIDAC1R4 = 0x0D48; +ESIDAC1R4_L = 0x0D48; +ESIDAC1R4_H = 0x0D49; +ESIDAC1R5 = 0x0D4A; +ESIDAC1R5_L = 0x0D4A; +ESIDAC1R5_H = 0x0D4B; +ESIDAC1R6 = 0x0D4C; +ESIDAC1R6_L = 0x0D4C; +ESIDAC1R6_H = 0x0D4D; +ESIDAC1R7 = 0x0D4E; +ESIDAC1R7_L = 0x0D4E; +ESIDAC1R7_H = 0x0D4F; +ESIDAC2R0 = 0x0D50; +ESIDAC2R0_L = 0x0D50; +ESIDAC2R0_H = 0x0D51; +ESIDAC2R1 = 0x0D52; +ESIDAC2R1_L = 0x0D52; +ESIDAC2R1_H = 0x0D53; +ESIDAC2R2 = 0x0D54; +ESIDAC2R2_L = 0x0D54; +ESIDAC2R2_H = 0x0D55; +ESIDAC2R3 = 0x0D56; +ESIDAC2R3_L = 0x0D56; +ESIDAC2R3_H = 0x0D57; +ESIDAC2R4 = 0x0D58; +ESIDAC2R4_L = 0x0D58; +ESIDAC2R4_H = 0x0D59; +ESIDAC2R5 = 0x0D5A; +ESIDAC2R5_L = 0x0D5A; +ESIDAC2R5_H = 0x0D5B; +ESIDAC2R6 = 0x0D5C; +ESIDAC2R6_L = 0x0D5C; +ESIDAC2R6_H = 0x0D5D; +ESIDAC2R7 = 0x0D5E; +ESIDAC2R7_L = 0x0D5E; +ESIDAC2R7_H = 0x0D5F; +ESITSM0 = 0x0D60; +ESITSM0_L = 0x0D60; +ESITSM0_H = 0x0D61; +ESITSM1 = 0x0D62; +ESITSM1_L = 0x0D62; +ESITSM1_H = 0x0D63; +ESITSM2 = 0x0D64; +ESITSM2_L = 0x0D64; +ESITSM2_H = 0x0D65; +ESITSM3 = 0x0D66; +ESITSM3_L = 0x0D66; +ESITSM3_H = 0x0D67; +ESITSM4 = 0x0D68; +ESITSM4_L = 0x0D68; +ESITSM4_H = 0x0D69; +ESITSM5 = 0x0D6A; +ESITSM5_L = 0x0D6A; +ESITSM5_H = 0x0D6B; +ESITSM6 = 0x0D6C; +ESITSM6_L = 0x0D6C; +ESITSM6_H = 0x0D6D; +ESITSM7 = 0x0D6E; +ESITSM7_L = 0x0D6E; +ESITSM7_H = 0x0D6F; +ESITSM8 = 0x0D70; +ESITSM8_L = 0x0D70; +ESITSM8_H = 0x0D71; +ESITSM9 = 0x0D72; +ESITSM9_L = 0x0D72; +ESITSM9_H = 0x0D73; +ESITSM10 = 0x0D74; +ESITSM10_L = 0x0D74; +ESITSM10_H = 0x0D75; +ESITSM11 = 0x0D76; +ESITSM11_L = 0x0D76; +ESITSM11_H = 0x0D77; +ESITSM12 = 0x0D78; +ESITSM12_L = 0x0D78; +ESITSM12_H = 0x0D79; +ESITSM13 = 0x0D7A; +ESITSM13_L = 0x0D7A; +ESITSM13_H = 0x0D7B; +ESITSM14 = 0x0D7C; +ESITSM14_L = 0x0D7C; +ESITSM14_H = 0x0D7D; +ESITSM15 = 0x0D7E; +ESITSM15_L = 0x0D7E; +ESITSM15_H = 0x0D7F; +ESITSM16 = 0x0D80; +ESITSM16_L = 0x0D80; +ESITSM16_H = 0x0D81; +ESITSM17 = 0x0D82; +ESITSM17_L = 0x0D82; +ESITSM17_H = 0x0D83; +ESITSM18 = 0x0D84; +ESITSM18_L = 0x0D84; +ESITSM18_H = 0x0D85; +ESITSM19 = 0x0D86; +ESITSM19_L = 0x0D86; +ESITSM19_H = 0x0D87; +ESITSM20 = 0x0D88; +ESITSM20_L = 0x0D88; +ESITSM20_H = 0x0D89; +ESITSM21 = 0x0D8A; +ESITSM21_L = 0x0D8A; +ESITSM21_H = 0x0D8B; +ESITSM22 = 0x0D8C; +ESITSM22_L = 0x0D8C; +ESITSM22_H = 0x0D8D; +ESITSM23 = 0x0D8E; +ESITSM23_L = 0x0D8E; +ESITSM23_H = 0x0D8F; +ESITSM24 = 0x0D90; +ESITSM24_L = 0x0D90; +ESITSM24_H = 0x0D91; +ESITSM25 = 0x0D92; +ESITSM25_L = 0x0D92; +ESITSM25_H = 0x0D93; +ESITSM26 = 0x0D94; +ESITSM26_L = 0x0D94; +ESITSM26_H = 0x0D95; +ESITSM27 = 0x0D96; +ESITSM27_L = 0x0D96; +ESITSM27_H = 0x0D97; +ESITSM28 = 0x0D98; +ESITSM28_L = 0x0D98; +ESITSM28_H = 0x0D99; +ESITSM29 = 0x0D9A; +ESITSM29_L = 0x0D9A; +ESITSM29_H = 0x0D9B; +ESITSM30 = 0x0D9C; +ESITSM30_L = 0x0D9C; +ESITSM30_H = 0x0D9D; +ESITSM31 = 0x0D9E; +ESITSM31_L = 0x0D9E; +ESITSM31_H = 0x0D9F; +/************************************************************ +* EXTENDED SCAN INTERFACE RAM +************************************************************/ +ESIRAM0 = 0x0E00; +ESIRAM1 = 0x0E01; +ESIRAM2 = 0x0E02; +ESIRAM3 = 0x0E03; +ESIRAM4 = 0x0E04; +ESIRAM5 = 0x0E05; +ESIRAM6 = 0x0E06; +ESIRAM7 = 0x0E07; +ESIRAM8 = 0x0E08; +ESIRAM9 = 0x0E09; +ESIRAM10 = 0x0E0A; +ESIRAM11 = 0x0E0B; +ESIRAM12 = 0x0E0C; +ESIRAM13 = 0x0E0D; +ESIRAM14 = 0x0E0E; +ESIRAM15 = 0x0E0F; +ESIRAM16 = 0x0E10; +ESIRAM17 = 0x0E11; +ESIRAM18 = 0x0E12; +ESIRAM19 = 0x0E13; +ESIRAM20 = 0x0E14; +ESIRAM21 = 0x0E15; +ESIRAM22 = 0x0E16; +ESIRAM23 = 0x0E17; +ESIRAM24 = 0x0E18; +ESIRAM25 = 0x0E19; +ESIRAM26 = 0x0E1A; +ESIRAM27 = 0x0E1B; +ESIRAM28 = 0x0E1C; +ESIRAM29 = 0x0E1D; +ESIRAM30 = 0x0E1E; +ESIRAM31 = 0x0E1F; +ESIRAM32 = 0x0E20; +ESIRAM33 = 0x0E21; +ESIRAM34 = 0x0E22; +ESIRAM35 = 0x0E23; +ESIRAM36 = 0x0E24; +ESIRAM37 = 0x0E25; +ESIRAM38 = 0x0E26; +ESIRAM39 = 0x0E27; +ESIRAM40 = 0x0E28; +ESIRAM41 = 0x0E29; +ESIRAM42 = 0x0E2A; +ESIRAM43 = 0x0E2B; +ESIRAM44 = 0x0E2C; +ESIRAM45 = 0x0E2D; +ESIRAM46 = 0x0E2E; +ESIRAM47 = 0x0E2F; +ESIRAM48 = 0x0E30; +ESIRAM49 = 0x0E31; +ESIRAM50 = 0x0E32; +ESIRAM51 = 0x0E33; +ESIRAM52 = 0x0E34; +ESIRAM53 = 0x0E35; +ESIRAM54 = 0x0E36; +ESIRAM55 = 0x0E37; +ESIRAM56 = 0x0E38; +ESIRAM57 = 0x0E39; +ESIRAM58 = 0x0E3A; +ESIRAM59 = 0x0E3B; +ESIRAM60 = 0x0E3C; +ESIRAM61 = 0x0E3D; +ESIRAM62 = 0x0E3E; +ESIRAM63 = 0x0E3F; +ESIRAM64 = 0x0E40; +ESIRAM65 = 0x0E41; +ESIRAM66 = 0x0E42; +ESIRAM67 = 0x0E43; +ESIRAM68 = 0x0E44; +ESIRAM69 = 0x0E45; +ESIRAM70 = 0x0E46; +ESIRAM71 = 0x0E47; +ESIRAM72 = 0x0E48; +ESIRAM73 = 0x0E49; +ESIRAM74 = 0x0E4A; +ESIRAM75 = 0x0E4B; +ESIRAM76 = 0x0E4C; +ESIRAM77 = 0x0E4D; +ESIRAM78 = 0x0E4E; +ESIRAM79 = 0x0E4F; +ESIRAM80 = 0x0E50; +ESIRAM81 = 0x0E51; +ESIRAM82 = 0x0E52; +ESIRAM83 = 0x0E53; +ESIRAM84 = 0x0E54; +ESIRAM85 = 0x0E55; +ESIRAM86 = 0x0E56; +ESIRAM87 = 0x0E57; +ESIRAM88 = 0x0E58; +ESIRAM89 = 0x0E59; +ESIRAM90 = 0x0E5A; +ESIRAM91 = 0x0E5B; +ESIRAM92 = 0x0E5C; +ESIRAM93 = 0x0E5D; +ESIRAM94 = 0x0E5E; +ESIRAM95 = 0x0E5F; +ESIRAM96 = 0x0E60; +ESIRAM97 = 0x0E61; +ESIRAM98 = 0x0E62; +ESIRAM99 = 0x0E63; +ESIRAM100 = 0x0E64; +ESIRAM101 = 0x0E65; +ESIRAM102 = 0x0E66; +ESIRAM103 = 0x0E67; +ESIRAM104 = 0x0E68; +ESIRAM105 = 0x0E69; +ESIRAM106 = 0x0E6A; +ESIRAM107 = 0x0E6B; +ESIRAM108 = 0x0E6C; +ESIRAM109 = 0x0E6D; +ESIRAM110 = 0x0E6E; +ESIRAM111 = 0x0E6F; +ESIRAM112 = 0x0E70; +ESIRAM113 = 0x0E71; +ESIRAM114 = 0x0E72; +ESIRAM115 = 0x0E73; +ESIRAM116 = 0x0E74; +ESIRAM117 = 0x0E75; +ESIRAM118 = 0x0E76; +ESIRAM119 = 0x0E77; +ESIRAM120 = 0x0E78; +ESIRAM121 = 0x0E79; +ESIRAM122 = 0x0E7A; +ESIRAM123 = 0x0E7B; +ESIRAM124 = 0x0E7C; +ESIRAM125 = 0x0E7D; +ESIRAM126 = 0x0E7E; +ESIRAM127 = 0x0E7F; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr6889.cmd b/msp430/msp430fr6889.cmd new file mode 100644 index 00000000..a525e174 --- /dev/null +++ b/msp430/msp430fr6889.cmd @@ -0,0 +1,1520 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr6889.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************ +* EXTENDED SCAN INTERFACE +************************************************************/ +ESIDEBUG1 = 0x0D00; +ESIDEBUG1_L = 0x0D00; +ESIDEBUG1_H = 0x0D01; +ESIDEBUG2 = 0x0D02; +ESIDEBUG2_L = 0x0D02; +ESIDEBUG2_H = 0x0D03; +ESIDEBUG3 = 0x0D04; +ESIDEBUG3_L = 0x0D04; +ESIDEBUG3_H = 0x0D05; +ESIDEBUG4 = 0x0D06; +ESIDEBUG4_L = 0x0D06; +ESIDEBUG4_H = 0x0D07; +ESIDEBUG5 = 0x0D08; +ESIDEBUG5_L = 0x0D08; +ESIDEBUG5_H = 0x0D09; +ESICNT0 = 0x0D10; +ESICNT0_L = 0x0D10; +ESICNT0_H = 0x0D11; +ESICNT1 = 0x0D12; +ESICNT1_L = 0x0D12; +ESICNT1_H = 0x0D13; +ESICNT2 = 0x0D14; +ESICNT2_L = 0x0D14; +ESICNT2_H = 0x0D15; +ESICNT3 = 0x0D16; +ESICNT3_L = 0x0D16; +ESICNT3_H = 0x0D17; +ESIIV = 0x0D1A; +ESIIV_L = 0x0D1A; +ESIIV_H = 0x0D1B; +ESIINT1 = 0x0D1C; +ESIINT1_L = 0x0D1C; +ESIINT1_H = 0x0D1D; +ESIINT2 = 0x0D1E; +ESIINT2_L = 0x0D1E; +ESIINT2_H = 0x0D1F; +ESIAFE = 0x0D20; +ESIAFE_L = 0x0D20; +ESIAFE_H = 0x0D21; +ESIPPU = 0x0D22; +ESIPPU_L = 0x0D22; +ESIPPU_H = 0x0D23; +ESITSM = 0x0D24; +ESITSM_L = 0x0D24; +ESITSM_H = 0x0D25; +ESIPSM = 0x0D26; +ESIPSM_L = 0x0D26; +ESIPSM_H = 0x0D27; +ESIOSC = 0x0D28; +ESIOSC_L = 0x0D28; +ESIOSC_H = 0x0D29; +ESICTL = 0x0D2A; +ESICTL_L = 0x0D2A; +ESICTL_H = 0x0D2B; +ESITHR1 = 0x0D2C; +ESITHR1_L = 0x0D2C; +ESITHR1_H = 0x0D2D; +ESITHR2 = 0x0D2E; +ESITHR2_L = 0x0D2E; +ESITHR2_H = 0x0D2F; +ESIDAC1R0 = 0x0D40; +ESIDAC1R0_L = 0x0D40; +ESIDAC1R0_H = 0x0D41; +ESIDAC1R1 = 0x0D42; +ESIDAC1R1_L = 0x0D42; +ESIDAC1R1_H = 0x0D43; +ESIDAC1R2 = 0x0D44; +ESIDAC1R2_L = 0x0D44; +ESIDAC1R2_H = 0x0D45; +ESIDAC1R3 = 0x0D46; +ESIDAC1R3_L = 0x0D46; +ESIDAC1R3_H = 0x0D47; +ESIDAC1R4 = 0x0D48; +ESIDAC1R4_L = 0x0D48; +ESIDAC1R4_H = 0x0D49; +ESIDAC1R5 = 0x0D4A; +ESIDAC1R5_L = 0x0D4A; +ESIDAC1R5_H = 0x0D4B; +ESIDAC1R6 = 0x0D4C; +ESIDAC1R6_L = 0x0D4C; +ESIDAC1R6_H = 0x0D4D; +ESIDAC1R7 = 0x0D4E; +ESIDAC1R7_L = 0x0D4E; +ESIDAC1R7_H = 0x0D4F; +ESIDAC2R0 = 0x0D50; +ESIDAC2R0_L = 0x0D50; +ESIDAC2R0_H = 0x0D51; +ESIDAC2R1 = 0x0D52; +ESIDAC2R1_L = 0x0D52; +ESIDAC2R1_H = 0x0D53; +ESIDAC2R2 = 0x0D54; +ESIDAC2R2_L = 0x0D54; +ESIDAC2R2_H = 0x0D55; +ESIDAC2R3 = 0x0D56; +ESIDAC2R3_L = 0x0D56; +ESIDAC2R3_H = 0x0D57; +ESIDAC2R4 = 0x0D58; +ESIDAC2R4_L = 0x0D58; +ESIDAC2R4_H = 0x0D59; +ESIDAC2R5 = 0x0D5A; +ESIDAC2R5_L = 0x0D5A; +ESIDAC2R5_H = 0x0D5B; +ESIDAC2R6 = 0x0D5C; +ESIDAC2R6_L = 0x0D5C; +ESIDAC2R6_H = 0x0D5D; +ESIDAC2R7 = 0x0D5E; +ESIDAC2R7_L = 0x0D5E; +ESIDAC2R7_H = 0x0D5F; +ESITSM0 = 0x0D60; +ESITSM0_L = 0x0D60; +ESITSM0_H = 0x0D61; +ESITSM1 = 0x0D62; +ESITSM1_L = 0x0D62; +ESITSM1_H = 0x0D63; +ESITSM2 = 0x0D64; +ESITSM2_L = 0x0D64; +ESITSM2_H = 0x0D65; +ESITSM3 = 0x0D66; +ESITSM3_L = 0x0D66; +ESITSM3_H = 0x0D67; +ESITSM4 = 0x0D68; +ESITSM4_L = 0x0D68; +ESITSM4_H = 0x0D69; +ESITSM5 = 0x0D6A; +ESITSM5_L = 0x0D6A; +ESITSM5_H = 0x0D6B; +ESITSM6 = 0x0D6C; +ESITSM6_L = 0x0D6C; +ESITSM6_H = 0x0D6D; +ESITSM7 = 0x0D6E; +ESITSM7_L = 0x0D6E; +ESITSM7_H = 0x0D6F; +ESITSM8 = 0x0D70; +ESITSM8_L = 0x0D70; +ESITSM8_H = 0x0D71; +ESITSM9 = 0x0D72; +ESITSM9_L = 0x0D72; +ESITSM9_H = 0x0D73; +ESITSM10 = 0x0D74; +ESITSM10_L = 0x0D74; +ESITSM10_H = 0x0D75; +ESITSM11 = 0x0D76; +ESITSM11_L = 0x0D76; +ESITSM11_H = 0x0D77; +ESITSM12 = 0x0D78; +ESITSM12_L = 0x0D78; +ESITSM12_H = 0x0D79; +ESITSM13 = 0x0D7A; +ESITSM13_L = 0x0D7A; +ESITSM13_H = 0x0D7B; +ESITSM14 = 0x0D7C; +ESITSM14_L = 0x0D7C; +ESITSM14_H = 0x0D7D; +ESITSM15 = 0x0D7E; +ESITSM15_L = 0x0D7E; +ESITSM15_H = 0x0D7F; +ESITSM16 = 0x0D80; +ESITSM16_L = 0x0D80; +ESITSM16_H = 0x0D81; +ESITSM17 = 0x0D82; +ESITSM17_L = 0x0D82; +ESITSM17_H = 0x0D83; +ESITSM18 = 0x0D84; +ESITSM18_L = 0x0D84; +ESITSM18_H = 0x0D85; +ESITSM19 = 0x0D86; +ESITSM19_L = 0x0D86; +ESITSM19_H = 0x0D87; +ESITSM20 = 0x0D88; +ESITSM20_L = 0x0D88; +ESITSM20_H = 0x0D89; +ESITSM21 = 0x0D8A; +ESITSM21_L = 0x0D8A; +ESITSM21_H = 0x0D8B; +ESITSM22 = 0x0D8C; +ESITSM22_L = 0x0D8C; +ESITSM22_H = 0x0D8D; +ESITSM23 = 0x0D8E; +ESITSM23_L = 0x0D8E; +ESITSM23_H = 0x0D8F; +ESITSM24 = 0x0D90; +ESITSM24_L = 0x0D90; +ESITSM24_H = 0x0D91; +ESITSM25 = 0x0D92; +ESITSM25_L = 0x0D92; +ESITSM25_H = 0x0D93; +ESITSM26 = 0x0D94; +ESITSM26_L = 0x0D94; +ESITSM26_H = 0x0D95; +ESITSM27 = 0x0D96; +ESITSM27_L = 0x0D96; +ESITSM27_H = 0x0D97; +ESITSM28 = 0x0D98; +ESITSM28_L = 0x0D98; +ESITSM28_H = 0x0D99; +ESITSM29 = 0x0D9A; +ESITSM29_L = 0x0D9A; +ESITSM29_H = 0x0D9B; +ESITSM30 = 0x0D9C; +ESITSM30_L = 0x0D9C; +ESITSM30_H = 0x0D9D; +ESITSM31 = 0x0D9E; +ESITSM31_L = 0x0D9E; +ESITSM31_H = 0x0D9F; +/************************************************************ +* EXTENDED SCAN INTERFACE RAM +************************************************************/ +ESIRAM0 = 0x0E00; +ESIRAM1 = 0x0E01; +ESIRAM2 = 0x0E02; +ESIRAM3 = 0x0E03; +ESIRAM4 = 0x0E04; +ESIRAM5 = 0x0E05; +ESIRAM6 = 0x0E06; +ESIRAM7 = 0x0E07; +ESIRAM8 = 0x0E08; +ESIRAM9 = 0x0E09; +ESIRAM10 = 0x0E0A; +ESIRAM11 = 0x0E0B; +ESIRAM12 = 0x0E0C; +ESIRAM13 = 0x0E0D; +ESIRAM14 = 0x0E0E; +ESIRAM15 = 0x0E0F; +ESIRAM16 = 0x0E10; +ESIRAM17 = 0x0E11; +ESIRAM18 = 0x0E12; +ESIRAM19 = 0x0E13; +ESIRAM20 = 0x0E14; +ESIRAM21 = 0x0E15; +ESIRAM22 = 0x0E16; +ESIRAM23 = 0x0E17; +ESIRAM24 = 0x0E18; +ESIRAM25 = 0x0E19; +ESIRAM26 = 0x0E1A; +ESIRAM27 = 0x0E1B; +ESIRAM28 = 0x0E1C; +ESIRAM29 = 0x0E1D; +ESIRAM30 = 0x0E1E; +ESIRAM31 = 0x0E1F; +ESIRAM32 = 0x0E20; +ESIRAM33 = 0x0E21; +ESIRAM34 = 0x0E22; +ESIRAM35 = 0x0E23; +ESIRAM36 = 0x0E24; +ESIRAM37 = 0x0E25; +ESIRAM38 = 0x0E26; +ESIRAM39 = 0x0E27; +ESIRAM40 = 0x0E28; +ESIRAM41 = 0x0E29; +ESIRAM42 = 0x0E2A; +ESIRAM43 = 0x0E2B; +ESIRAM44 = 0x0E2C; +ESIRAM45 = 0x0E2D; +ESIRAM46 = 0x0E2E; +ESIRAM47 = 0x0E2F; +ESIRAM48 = 0x0E30; +ESIRAM49 = 0x0E31; +ESIRAM50 = 0x0E32; +ESIRAM51 = 0x0E33; +ESIRAM52 = 0x0E34; +ESIRAM53 = 0x0E35; +ESIRAM54 = 0x0E36; +ESIRAM55 = 0x0E37; +ESIRAM56 = 0x0E38; +ESIRAM57 = 0x0E39; +ESIRAM58 = 0x0E3A; +ESIRAM59 = 0x0E3B; +ESIRAM60 = 0x0E3C; +ESIRAM61 = 0x0E3D; +ESIRAM62 = 0x0E3E; +ESIRAM63 = 0x0E3F; +ESIRAM64 = 0x0E40; +ESIRAM65 = 0x0E41; +ESIRAM66 = 0x0E42; +ESIRAM67 = 0x0E43; +ESIRAM68 = 0x0E44; +ESIRAM69 = 0x0E45; +ESIRAM70 = 0x0E46; +ESIRAM71 = 0x0E47; +ESIRAM72 = 0x0E48; +ESIRAM73 = 0x0E49; +ESIRAM74 = 0x0E4A; +ESIRAM75 = 0x0E4B; +ESIRAM76 = 0x0E4C; +ESIRAM77 = 0x0E4D; +ESIRAM78 = 0x0E4E; +ESIRAM79 = 0x0E4F; +ESIRAM80 = 0x0E50; +ESIRAM81 = 0x0E51; +ESIRAM82 = 0x0E52; +ESIRAM83 = 0x0E53; +ESIRAM84 = 0x0E54; +ESIRAM85 = 0x0E55; +ESIRAM86 = 0x0E56; +ESIRAM87 = 0x0E57; +ESIRAM88 = 0x0E58; +ESIRAM89 = 0x0E59; +ESIRAM90 = 0x0E5A; +ESIRAM91 = 0x0E5B; +ESIRAM92 = 0x0E5C; +ESIRAM93 = 0x0E5D; +ESIRAM94 = 0x0E5E; +ESIRAM95 = 0x0E5F; +ESIRAM96 = 0x0E60; +ESIRAM97 = 0x0E61; +ESIRAM98 = 0x0E62; +ESIRAM99 = 0x0E63; +ESIRAM100 = 0x0E64; +ESIRAM101 = 0x0E65; +ESIRAM102 = 0x0E66; +ESIRAM103 = 0x0E67; +ESIRAM104 = 0x0E68; +ESIRAM105 = 0x0E69; +ESIRAM106 = 0x0E6A; +ESIRAM107 = 0x0E6B; +ESIRAM108 = 0x0E6C; +ESIRAM109 = 0x0E6D; +ESIRAM110 = 0x0E6E; +ESIRAM111 = 0x0E6F; +ESIRAM112 = 0x0E70; +ESIRAM113 = 0x0E71; +ESIRAM114 = 0x0E72; +ESIRAM115 = 0x0E73; +ESIRAM116 = 0x0E74; +ESIRAM117 = 0x0E75; +ESIRAM118 = 0x0E76; +ESIRAM119 = 0x0E77; +ESIRAM120 = 0x0E78; +ESIRAM121 = 0x0E79; +ESIRAM122 = 0x0E7A; +ESIRAM123 = 0x0E7B; +ESIRAM124 = 0x0E7C; +ESIRAM125 = 0x0E7D; +ESIRAM126 = 0x0E7E; +ESIRAM127 = 0x0E7F; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr68891.cmd b/msp430/msp430fr68891.cmd new file mode 100644 index 00000000..ac9ee305 --- /dev/null +++ b/msp430/msp430fr68891.cmd @@ -0,0 +1,1520 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr68891.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************ +* EXTENDED SCAN INTERFACE +************************************************************/ +ESIDEBUG1 = 0x0D00; +ESIDEBUG1_L = 0x0D00; +ESIDEBUG1_H = 0x0D01; +ESIDEBUG2 = 0x0D02; +ESIDEBUG2_L = 0x0D02; +ESIDEBUG2_H = 0x0D03; +ESIDEBUG3 = 0x0D04; +ESIDEBUG3_L = 0x0D04; +ESIDEBUG3_H = 0x0D05; +ESIDEBUG4 = 0x0D06; +ESIDEBUG4_L = 0x0D06; +ESIDEBUG4_H = 0x0D07; +ESIDEBUG5 = 0x0D08; +ESIDEBUG5_L = 0x0D08; +ESIDEBUG5_H = 0x0D09; +ESICNT0 = 0x0D10; +ESICNT0_L = 0x0D10; +ESICNT0_H = 0x0D11; +ESICNT1 = 0x0D12; +ESICNT1_L = 0x0D12; +ESICNT1_H = 0x0D13; +ESICNT2 = 0x0D14; +ESICNT2_L = 0x0D14; +ESICNT2_H = 0x0D15; +ESICNT3 = 0x0D16; +ESICNT3_L = 0x0D16; +ESICNT3_H = 0x0D17; +ESIIV = 0x0D1A; +ESIIV_L = 0x0D1A; +ESIIV_H = 0x0D1B; +ESIINT1 = 0x0D1C; +ESIINT1_L = 0x0D1C; +ESIINT1_H = 0x0D1D; +ESIINT2 = 0x0D1E; +ESIINT2_L = 0x0D1E; +ESIINT2_H = 0x0D1F; +ESIAFE = 0x0D20; +ESIAFE_L = 0x0D20; +ESIAFE_H = 0x0D21; +ESIPPU = 0x0D22; +ESIPPU_L = 0x0D22; +ESIPPU_H = 0x0D23; +ESITSM = 0x0D24; +ESITSM_L = 0x0D24; +ESITSM_H = 0x0D25; +ESIPSM = 0x0D26; +ESIPSM_L = 0x0D26; +ESIPSM_H = 0x0D27; +ESIOSC = 0x0D28; +ESIOSC_L = 0x0D28; +ESIOSC_H = 0x0D29; +ESICTL = 0x0D2A; +ESICTL_L = 0x0D2A; +ESICTL_H = 0x0D2B; +ESITHR1 = 0x0D2C; +ESITHR1_L = 0x0D2C; +ESITHR1_H = 0x0D2D; +ESITHR2 = 0x0D2E; +ESITHR2_L = 0x0D2E; +ESITHR2_H = 0x0D2F; +ESIDAC1R0 = 0x0D40; +ESIDAC1R0_L = 0x0D40; +ESIDAC1R0_H = 0x0D41; +ESIDAC1R1 = 0x0D42; +ESIDAC1R1_L = 0x0D42; +ESIDAC1R1_H = 0x0D43; +ESIDAC1R2 = 0x0D44; +ESIDAC1R2_L = 0x0D44; +ESIDAC1R2_H = 0x0D45; +ESIDAC1R3 = 0x0D46; +ESIDAC1R3_L = 0x0D46; +ESIDAC1R3_H = 0x0D47; +ESIDAC1R4 = 0x0D48; +ESIDAC1R4_L = 0x0D48; +ESIDAC1R4_H = 0x0D49; +ESIDAC1R5 = 0x0D4A; +ESIDAC1R5_L = 0x0D4A; +ESIDAC1R5_H = 0x0D4B; +ESIDAC1R6 = 0x0D4C; +ESIDAC1R6_L = 0x0D4C; +ESIDAC1R6_H = 0x0D4D; +ESIDAC1R7 = 0x0D4E; +ESIDAC1R7_L = 0x0D4E; +ESIDAC1R7_H = 0x0D4F; +ESIDAC2R0 = 0x0D50; +ESIDAC2R0_L = 0x0D50; +ESIDAC2R0_H = 0x0D51; +ESIDAC2R1 = 0x0D52; +ESIDAC2R1_L = 0x0D52; +ESIDAC2R1_H = 0x0D53; +ESIDAC2R2 = 0x0D54; +ESIDAC2R2_L = 0x0D54; +ESIDAC2R2_H = 0x0D55; +ESIDAC2R3 = 0x0D56; +ESIDAC2R3_L = 0x0D56; +ESIDAC2R3_H = 0x0D57; +ESIDAC2R4 = 0x0D58; +ESIDAC2R4_L = 0x0D58; +ESIDAC2R4_H = 0x0D59; +ESIDAC2R5 = 0x0D5A; +ESIDAC2R5_L = 0x0D5A; +ESIDAC2R5_H = 0x0D5B; +ESIDAC2R6 = 0x0D5C; +ESIDAC2R6_L = 0x0D5C; +ESIDAC2R6_H = 0x0D5D; +ESIDAC2R7 = 0x0D5E; +ESIDAC2R7_L = 0x0D5E; +ESIDAC2R7_H = 0x0D5F; +ESITSM0 = 0x0D60; +ESITSM0_L = 0x0D60; +ESITSM0_H = 0x0D61; +ESITSM1 = 0x0D62; +ESITSM1_L = 0x0D62; +ESITSM1_H = 0x0D63; +ESITSM2 = 0x0D64; +ESITSM2_L = 0x0D64; +ESITSM2_H = 0x0D65; +ESITSM3 = 0x0D66; +ESITSM3_L = 0x0D66; +ESITSM3_H = 0x0D67; +ESITSM4 = 0x0D68; +ESITSM4_L = 0x0D68; +ESITSM4_H = 0x0D69; +ESITSM5 = 0x0D6A; +ESITSM5_L = 0x0D6A; +ESITSM5_H = 0x0D6B; +ESITSM6 = 0x0D6C; +ESITSM6_L = 0x0D6C; +ESITSM6_H = 0x0D6D; +ESITSM7 = 0x0D6E; +ESITSM7_L = 0x0D6E; +ESITSM7_H = 0x0D6F; +ESITSM8 = 0x0D70; +ESITSM8_L = 0x0D70; +ESITSM8_H = 0x0D71; +ESITSM9 = 0x0D72; +ESITSM9_L = 0x0D72; +ESITSM9_H = 0x0D73; +ESITSM10 = 0x0D74; +ESITSM10_L = 0x0D74; +ESITSM10_H = 0x0D75; +ESITSM11 = 0x0D76; +ESITSM11_L = 0x0D76; +ESITSM11_H = 0x0D77; +ESITSM12 = 0x0D78; +ESITSM12_L = 0x0D78; +ESITSM12_H = 0x0D79; +ESITSM13 = 0x0D7A; +ESITSM13_L = 0x0D7A; +ESITSM13_H = 0x0D7B; +ESITSM14 = 0x0D7C; +ESITSM14_L = 0x0D7C; +ESITSM14_H = 0x0D7D; +ESITSM15 = 0x0D7E; +ESITSM15_L = 0x0D7E; +ESITSM15_H = 0x0D7F; +ESITSM16 = 0x0D80; +ESITSM16_L = 0x0D80; +ESITSM16_H = 0x0D81; +ESITSM17 = 0x0D82; +ESITSM17_L = 0x0D82; +ESITSM17_H = 0x0D83; +ESITSM18 = 0x0D84; +ESITSM18_L = 0x0D84; +ESITSM18_H = 0x0D85; +ESITSM19 = 0x0D86; +ESITSM19_L = 0x0D86; +ESITSM19_H = 0x0D87; +ESITSM20 = 0x0D88; +ESITSM20_L = 0x0D88; +ESITSM20_H = 0x0D89; +ESITSM21 = 0x0D8A; +ESITSM21_L = 0x0D8A; +ESITSM21_H = 0x0D8B; +ESITSM22 = 0x0D8C; +ESITSM22_L = 0x0D8C; +ESITSM22_H = 0x0D8D; +ESITSM23 = 0x0D8E; +ESITSM23_L = 0x0D8E; +ESITSM23_H = 0x0D8F; +ESITSM24 = 0x0D90; +ESITSM24_L = 0x0D90; +ESITSM24_H = 0x0D91; +ESITSM25 = 0x0D92; +ESITSM25_L = 0x0D92; +ESITSM25_H = 0x0D93; +ESITSM26 = 0x0D94; +ESITSM26_L = 0x0D94; +ESITSM26_H = 0x0D95; +ESITSM27 = 0x0D96; +ESITSM27_L = 0x0D96; +ESITSM27_H = 0x0D97; +ESITSM28 = 0x0D98; +ESITSM28_L = 0x0D98; +ESITSM28_H = 0x0D99; +ESITSM29 = 0x0D9A; +ESITSM29_L = 0x0D9A; +ESITSM29_H = 0x0D9B; +ESITSM30 = 0x0D9C; +ESITSM30_L = 0x0D9C; +ESITSM30_H = 0x0D9D; +ESITSM31 = 0x0D9E; +ESITSM31_L = 0x0D9E; +ESITSM31_H = 0x0D9F; +/************************************************************ +* EXTENDED SCAN INTERFACE RAM +************************************************************/ +ESIRAM0 = 0x0E00; +ESIRAM1 = 0x0E01; +ESIRAM2 = 0x0E02; +ESIRAM3 = 0x0E03; +ESIRAM4 = 0x0E04; +ESIRAM5 = 0x0E05; +ESIRAM6 = 0x0E06; +ESIRAM7 = 0x0E07; +ESIRAM8 = 0x0E08; +ESIRAM9 = 0x0E09; +ESIRAM10 = 0x0E0A; +ESIRAM11 = 0x0E0B; +ESIRAM12 = 0x0E0C; +ESIRAM13 = 0x0E0D; +ESIRAM14 = 0x0E0E; +ESIRAM15 = 0x0E0F; +ESIRAM16 = 0x0E10; +ESIRAM17 = 0x0E11; +ESIRAM18 = 0x0E12; +ESIRAM19 = 0x0E13; +ESIRAM20 = 0x0E14; +ESIRAM21 = 0x0E15; +ESIRAM22 = 0x0E16; +ESIRAM23 = 0x0E17; +ESIRAM24 = 0x0E18; +ESIRAM25 = 0x0E19; +ESIRAM26 = 0x0E1A; +ESIRAM27 = 0x0E1B; +ESIRAM28 = 0x0E1C; +ESIRAM29 = 0x0E1D; +ESIRAM30 = 0x0E1E; +ESIRAM31 = 0x0E1F; +ESIRAM32 = 0x0E20; +ESIRAM33 = 0x0E21; +ESIRAM34 = 0x0E22; +ESIRAM35 = 0x0E23; +ESIRAM36 = 0x0E24; +ESIRAM37 = 0x0E25; +ESIRAM38 = 0x0E26; +ESIRAM39 = 0x0E27; +ESIRAM40 = 0x0E28; +ESIRAM41 = 0x0E29; +ESIRAM42 = 0x0E2A; +ESIRAM43 = 0x0E2B; +ESIRAM44 = 0x0E2C; +ESIRAM45 = 0x0E2D; +ESIRAM46 = 0x0E2E; +ESIRAM47 = 0x0E2F; +ESIRAM48 = 0x0E30; +ESIRAM49 = 0x0E31; +ESIRAM50 = 0x0E32; +ESIRAM51 = 0x0E33; +ESIRAM52 = 0x0E34; +ESIRAM53 = 0x0E35; +ESIRAM54 = 0x0E36; +ESIRAM55 = 0x0E37; +ESIRAM56 = 0x0E38; +ESIRAM57 = 0x0E39; +ESIRAM58 = 0x0E3A; +ESIRAM59 = 0x0E3B; +ESIRAM60 = 0x0E3C; +ESIRAM61 = 0x0E3D; +ESIRAM62 = 0x0E3E; +ESIRAM63 = 0x0E3F; +ESIRAM64 = 0x0E40; +ESIRAM65 = 0x0E41; +ESIRAM66 = 0x0E42; +ESIRAM67 = 0x0E43; +ESIRAM68 = 0x0E44; +ESIRAM69 = 0x0E45; +ESIRAM70 = 0x0E46; +ESIRAM71 = 0x0E47; +ESIRAM72 = 0x0E48; +ESIRAM73 = 0x0E49; +ESIRAM74 = 0x0E4A; +ESIRAM75 = 0x0E4B; +ESIRAM76 = 0x0E4C; +ESIRAM77 = 0x0E4D; +ESIRAM78 = 0x0E4E; +ESIRAM79 = 0x0E4F; +ESIRAM80 = 0x0E50; +ESIRAM81 = 0x0E51; +ESIRAM82 = 0x0E52; +ESIRAM83 = 0x0E53; +ESIRAM84 = 0x0E54; +ESIRAM85 = 0x0E55; +ESIRAM86 = 0x0E56; +ESIRAM87 = 0x0E57; +ESIRAM88 = 0x0E58; +ESIRAM89 = 0x0E59; +ESIRAM90 = 0x0E5A; +ESIRAM91 = 0x0E5B; +ESIRAM92 = 0x0E5C; +ESIRAM93 = 0x0E5D; +ESIRAM94 = 0x0E5E; +ESIRAM95 = 0x0E5F; +ESIRAM96 = 0x0E60; +ESIRAM97 = 0x0E61; +ESIRAM98 = 0x0E62; +ESIRAM99 = 0x0E63; +ESIRAM100 = 0x0E64; +ESIRAM101 = 0x0E65; +ESIRAM102 = 0x0E66; +ESIRAM103 = 0x0E67; +ESIRAM104 = 0x0E68; +ESIRAM105 = 0x0E69; +ESIRAM106 = 0x0E6A; +ESIRAM107 = 0x0E6B; +ESIRAM108 = 0x0E6C; +ESIRAM109 = 0x0E6D; +ESIRAM110 = 0x0E6E; +ESIRAM111 = 0x0E6F; +ESIRAM112 = 0x0E70; +ESIRAM113 = 0x0E71; +ESIRAM114 = 0x0E72; +ESIRAM115 = 0x0E73; +ESIRAM116 = 0x0E74; +ESIRAM117 = 0x0E75; +ESIRAM118 = 0x0E76; +ESIRAM119 = 0x0E77; +ESIRAM120 = 0x0E78; +ESIRAM121 = 0x0E79; +ESIRAM122 = 0x0E7A; +ESIRAM123 = 0x0E7B; +ESIRAM124 = 0x0E7C; +ESIRAM125 = 0x0E7D; +ESIRAM126 = 0x0E7E; +ESIRAM127 = 0x0E7F; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr6920.cmd b/msp430/msp430fr6920.cmd new file mode 100644 index 00000000..fadd7ba4 --- /dev/null +++ b/msp430/msp430fr6920.cmd @@ -0,0 +1,1209 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr6920.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr6922.cmd b/msp430/msp430fr6922.cmd new file mode 100644 index 00000000..3ab37608 --- /dev/null +++ b/msp430/msp430fr6922.cmd @@ -0,0 +1,1209 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr6922.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr69221.cmd b/msp430/msp430fr69221.cmd new file mode 100644 index 00000000..9fc73052 --- /dev/null +++ b/msp430/msp430fr69221.cmd @@ -0,0 +1,1209 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr69221.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr6927.cmd b/msp430/msp430fr6927.cmd new file mode 100644 index 00000000..244ed935 --- /dev/null +++ b/msp430/msp430fr6927.cmd @@ -0,0 +1,1209 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr6927.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr69271.cmd b/msp430/msp430fr69271.cmd new file mode 100644 index 00000000..c1c4d263 --- /dev/null +++ b/msp430/msp430fr69271.cmd @@ -0,0 +1,1209 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr69271.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr6928.cmd b/msp430/msp430fr6928.cmd new file mode 100644 index 00000000..f41a188b --- /dev/null +++ b/msp430/msp430fr6928.cmd @@ -0,0 +1,1209 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr6928.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr6970.cmd b/msp430/msp430fr6970.cmd new file mode 100644 index 00000000..89eac43f --- /dev/null +++ b/msp430/msp430fr6970.cmd @@ -0,0 +1,1209 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr6970.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr6972.cmd b/msp430/msp430fr6972.cmd new file mode 100644 index 00000000..53da6f31 --- /dev/null +++ b/msp430/msp430fr6972.cmd @@ -0,0 +1,1209 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr6972.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr69721.cmd b/msp430/msp430fr69721.cmd new file mode 100644 index 00000000..f9e8c630 --- /dev/null +++ b/msp430/msp430fr69721.cmd @@ -0,0 +1,1209 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr69721.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr6977.cmd b/msp430/msp430fr6977.cmd new file mode 100644 index 00000000..3f6950c6 --- /dev/null +++ b/msp430/msp430fr6977.cmd @@ -0,0 +1,1209 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr6977.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr6979.cmd b/msp430/msp430fr6979.cmd new file mode 100644 index 00000000..d502a1c8 --- /dev/null +++ b/msp430/msp430fr6979.cmd @@ -0,0 +1,1209 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr6979.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr69791.cmd b/msp430/msp430fr69791.cmd new file mode 100644 index 00000000..79abaa42 --- /dev/null +++ b/msp430/msp430fr69791.cmd @@ -0,0 +1,1209 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr69791.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr6987.cmd b/msp430/msp430fr6987.cmd new file mode 100644 index 00000000..c42d1331 --- /dev/null +++ b/msp430/msp430fr6987.cmd @@ -0,0 +1,1547 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr6987.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************ +* EXTENDED SCAN INTERFACE +************************************************************/ +ESIDEBUG1 = 0x0D00; +ESIDEBUG1_L = 0x0D00; +ESIDEBUG1_H = 0x0D01; +ESIDEBUG2 = 0x0D02; +ESIDEBUG2_L = 0x0D02; +ESIDEBUG2_H = 0x0D03; +ESIDEBUG3 = 0x0D04; +ESIDEBUG3_L = 0x0D04; +ESIDEBUG3_H = 0x0D05; +ESIDEBUG4 = 0x0D06; +ESIDEBUG4_L = 0x0D06; +ESIDEBUG4_H = 0x0D07; +ESIDEBUG5 = 0x0D08; +ESIDEBUG5_L = 0x0D08; +ESIDEBUG5_H = 0x0D09; +ESICNT0 = 0x0D10; +ESICNT0_L = 0x0D10; +ESICNT0_H = 0x0D11; +ESICNT1 = 0x0D12; +ESICNT1_L = 0x0D12; +ESICNT1_H = 0x0D13; +ESICNT2 = 0x0D14; +ESICNT2_L = 0x0D14; +ESICNT2_H = 0x0D15; +ESICNT3 = 0x0D16; +ESICNT3_L = 0x0D16; +ESICNT3_H = 0x0D17; +ESIIV = 0x0D1A; +ESIIV_L = 0x0D1A; +ESIIV_H = 0x0D1B; +ESIINT1 = 0x0D1C; +ESIINT1_L = 0x0D1C; +ESIINT1_H = 0x0D1D; +ESIINT2 = 0x0D1E; +ESIINT2_L = 0x0D1E; +ESIINT2_H = 0x0D1F; +ESIAFE = 0x0D20; +ESIAFE_L = 0x0D20; +ESIAFE_H = 0x0D21; +ESIPPU = 0x0D22; +ESIPPU_L = 0x0D22; +ESIPPU_H = 0x0D23; +ESITSM = 0x0D24; +ESITSM_L = 0x0D24; +ESITSM_H = 0x0D25; +ESIPSM = 0x0D26; +ESIPSM_L = 0x0D26; +ESIPSM_H = 0x0D27; +ESIOSC = 0x0D28; +ESIOSC_L = 0x0D28; +ESIOSC_H = 0x0D29; +ESICTL = 0x0D2A; +ESICTL_L = 0x0D2A; +ESICTL_H = 0x0D2B; +ESITHR1 = 0x0D2C; +ESITHR1_L = 0x0D2C; +ESITHR1_H = 0x0D2D; +ESITHR2 = 0x0D2E; +ESITHR2_L = 0x0D2E; +ESITHR2_H = 0x0D2F; +ESIDAC1R0 = 0x0D40; +ESIDAC1R0_L = 0x0D40; +ESIDAC1R0_H = 0x0D41; +ESIDAC1R1 = 0x0D42; +ESIDAC1R1_L = 0x0D42; +ESIDAC1R1_H = 0x0D43; +ESIDAC1R2 = 0x0D44; +ESIDAC1R2_L = 0x0D44; +ESIDAC1R2_H = 0x0D45; +ESIDAC1R3 = 0x0D46; +ESIDAC1R3_L = 0x0D46; +ESIDAC1R3_H = 0x0D47; +ESIDAC1R4 = 0x0D48; +ESIDAC1R4_L = 0x0D48; +ESIDAC1R4_H = 0x0D49; +ESIDAC1R5 = 0x0D4A; +ESIDAC1R5_L = 0x0D4A; +ESIDAC1R5_H = 0x0D4B; +ESIDAC1R6 = 0x0D4C; +ESIDAC1R6_L = 0x0D4C; +ESIDAC1R6_H = 0x0D4D; +ESIDAC1R7 = 0x0D4E; +ESIDAC1R7_L = 0x0D4E; +ESIDAC1R7_H = 0x0D4F; +ESIDAC2R0 = 0x0D50; +ESIDAC2R0_L = 0x0D50; +ESIDAC2R0_H = 0x0D51; +ESIDAC2R1 = 0x0D52; +ESIDAC2R1_L = 0x0D52; +ESIDAC2R1_H = 0x0D53; +ESIDAC2R2 = 0x0D54; +ESIDAC2R2_L = 0x0D54; +ESIDAC2R2_H = 0x0D55; +ESIDAC2R3 = 0x0D56; +ESIDAC2R3_L = 0x0D56; +ESIDAC2R3_H = 0x0D57; +ESIDAC2R4 = 0x0D58; +ESIDAC2R4_L = 0x0D58; +ESIDAC2R4_H = 0x0D59; +ESIDAC2R5 = 0x0D5A; +ESIDAC2R5_L = 0x0D5A; +ESIDAC2R5_H = 0x0D5B; +ESIDAC2R6 = 0x0D5C; +ESIDAC2R6_L = 0x0D5C; +ESIDAC2R6_H = 0x0D5D; +ESIDAC2R7 = 0x0D5E; +ESIDAC2R7_L = 0x0D5E; +ESIDAC2R7_H = 0x0D5F; +ESITSM0 = 0x0D60; +ESITSM0_L = 0x0D60; +ESITSM0_H = 0x0D61; +ESITSM1 = 0x0D62; +ESITSM1_L = 0x0D62; +ESITSM1_H = 0x0D63; +ESITSM2 = 0x0D64; +ESITSM2_L = 0x0D64; +ESITSM2_H = 0x0D65; +ESITSM3 = 0x0D66; +ESITSM3_L = 0x0D66; +ESITSM3_H = 0x0D67; +ESITSM4 = 0x0D68; +ESITSM4_L = 0x0D68; +ESITSM4_H = 0x0D69; +ESITSM5 = 0x0D6A; +ESITSM5_L = 0x0D6A; +ESITSM5_H = 0x0D6B; +ESITSM6 = 0x0D6C; +ESITSM6_L = 0x0D6C; +ESITSM6_H = 0x0D6D; +ESITSM7 = 0x0D6E; +ESITSM7_L = 0x0D6E; +ESITSM7_H = 0x0D6F; +ESITSM8 = 0x0D70; +ESITSM8_L = 0x0D70; +ESITSM8_H = 0x0D71; +ESITSM9 = 0x0D72; +ESITSM9_L = 0x0D72; +ESITSM9_H = 0x0D73; +ESITSM10 = 0x0D74; +ESITSM10_L = 0x0D74; +ESITSM10_H = 0x0D75; +ESITSM11 = 0x0D76; +ESITSM11_L = 0x0D76; +ESITSM11_H = 0x0D77; +ESITSM12 = 0x0D78; +ESITSM12_L = 0x0D78; +ESITSM12_H = 0x0D79; +ESITSM13 = 0x0D7A; +ESITSM13_L = 0x0D7A; +ESITSM13_H = 0x0D7B; +ESITSM14 = 0x0D7C; +ESITSM14_L = 0x0D7C; +ESITSM14_H = 0x0D7D; +ESITSM15 = 0x0D7E; +ESITSM15_L = 0x0D7E; +ESITSM15_H = 0x0D7F; +ESITSM16 = 0x0D80; +ESITSM16_L = 0x0D80; +ESITSM16_H = 0x0D81; +ESITSM17 = 0x0D82; +ESITSM17_L = 0x0D82; +ESITSM17_H = 0x0D83; +ESITSM18 = 0x0D84; +ESITSM18_L = 0x0D84; +ESITSM18_H = 0x0D85; +ESITSM19 = 0x0D86; +ESITSM19_L = 0x0D86; +ESITSM19_H = 0x0D87; +ESITSM20 = 0x0D88; +ESITSM20_L = 0x0D88; +ESITSM20_H = 0x0D89; +ESITSM21 = 0x0D8A; +ESITSM21_L = 0x0D8A; +ESITSM21_H = 0x0D8B; +ESITSM22 = 0x0D8C; +ESITSM22_L = 0x0D8C; +ESITSM22_H = 0x0D8D; +ESITSM23 = 0x0D8E; +ESITSM23_L = 0x0D8E; +ESITSM23_H = 0x0D8F; +ESITSM24 = 0x0D90; +ESITSM24_L = 0x0D90; +ESITSM24_H = 0x0D91; +ESITSM25 = 0x0D92; +ESITSM25_L = 0x0D92; +ESITSM25_H = 0x0D93; +ESITSM26 = 0x0D94; +ESITSM26_L = 0x0D94; +ESITSM26_H = 0x0D95; +ESITSM27 = 0x0D96; +ESITSM27_L = 0x0D96; +ESITSM27_H = 0x0D97; +ESITSM28 = 0x0D98; +ESITSM28_L = 0x0D98; +ESITSM28_H = 0x0D99; +ESITSM29 = 0x0D9A; +ESITSM29_L = 0x0D9A; +ESITSM29_H = 0x0D9B; +ESITSM30 = 0x0D9C; +ESITSM30_L = 0x0D9C; +ESITSM30_H = 0x0D9D; +ESITSM31 = 0x0D9E; +ESITSM31_L = 0x0D9E; +ESITSM31_H = 0x0D9F; +/************************************************************ +* EXTENDED SCAN INTERFACE RAM +************************************************************/ +ESIRAM0 = 0x0E00; +ESIRAM1 = 0x0E01; +ESIRAM2 = 0x0E02; +ESIRAM3 = 0x0E03; +ESIRAM4 = 0x0E04; +ESIRAM5 = 0x0E05; +ESIRAM6 = 0x0E06; +ESIRAM7 = 0x0E07; +ESIRAM8 = 0x0E08; +ESIRAM9 = 0x0E09; +ESIRAM10 = 0x0E0A; +ESIRAM11 = 0x0E0B; +ESIRAM12 = 0x0E0C; +ESIRAM13 = 0x0E0D; +ESIRAM14 = 0x0E0E; +ESIRAM15 = 0x0E0F; +ESIRAM16 = 0x0E10; +ESIRAM17 = 0x0E11; +ESIRAM18 = 0x0E12; +ESIRAM19 = 0x0E13; +ESIRAM20 = 0x0E14; +ESIRAM21 = 0x0E15; +ESIRAM22 = 0x0E16; +ESIRAM23 = 0x0E17; +ESIRAM24 = 0x0E18; +ESIRAM25 = 0x0E19; +ESIRAM26 = 0x0E1A; +ESIRAM27 = 0x0E1B; +ESIRAM28 = 0x0E1C; +ESIRAM29 = 0x0E1D; +ESIRAM30 = 0x0E1E; +ESIRAM31 = 0x0E1F; +ESIRAM32 = 0x0E20; +ESIRAM33 = 0x0E21; +ESIRAM34 = 0x0E22; +ESIRAM35 = 0x0E23; +ESIRAM36 = 0x0E24; +ESIRAM37 = 0x0E25; +ESIRAM38 = 0x0E26; +ESIRAM39 = 0x0E27; +ESIRAM40 = 0x0E28; +ESIRAM41 = 0x0E29; +ESIRAM42 = 0x0E2A; +ESIRAM43 = 0x0E2B; +ESIRAM44 = 0x0E2C; +ESIRAM45 = 0x0E2D; +ESIRAM46 = 0x0E2E; +ESIRAM47 = 0x0E2F; +ESIRAM48 = 0x0E30; +ESIRAM49 = 0x0E31; +ESIRAM50 = 0x0E32; +ESIRAM51 = 0x0E33; +ESIRAM52 = 0x0E34; +ESIRAM53 = 0x0E35; +ESIRAM54 = 0x0E36; +ESIRAM55 = 0x0E37; +ESIRAM56 = 0x0E38; +ESIRAM57 = 0x0E39; +ESIRAM58 = 0x0E3A; +ESIRAM59 = 0x0E3B; +ESIRAM60 = 0x0E3C; +ESIRAM61 = 0x0E3D; +ESIRAM62 = 0x0E3E; +ESIRAM63 = 0x0E3F; +ESIRAM64 = 0x0E40; +ESIRAM65 = 0x0E41; +ESIRAM66 = 0x0E42; +ESIRAM67 = 0x0E43; +ESIRAM68 = 0x0E44; +ESIRAM69 = 0x0E45; +ESIRAM70 = 0x0E46; +ESIRAM71 = 0x0E47; +ESIRAM72 = 0x0E48; +ESIRAM73 = 0x0E49; +ESIRAM74 = 0x0E4A; +ESIRAM75 = 0x0E4B; +ESIRAM76 = 0x0E4C; +ESIRAM77 = 0x0E4D; +ESIRAM78 = 0x0E4E; +ESIRAM79 = 0x0E4F; +ESIRAM80 = 0x0E50; +ESIRAM81 = 0x0E51; +ESIRAM82 = 0x0E52; +ESIRAM83 = 0x0E53; +ESIRAM84 = 0x0E54; +ESIRAM85 = 0x0E55; +ESIRAM86 = 0x0E56; +ESIRAM87 = 0x0E57; +ESIRAM88 = 0x0E58; +ESIRAM89 = 0x0E59; +ESIRAM90 = 0x0E5A; +ESIRAM91 = 0x0E5B; +ESIRAM92 = 0x0E5C; +ESIRAM93 = 0x0E5D; +ESIRAM94 = 0x0E5E; +ESIRAM95 = 0x0E5F; +ESIRAM96 = 0x0E60; +ESIRAM97 = 0x0E61; +ESIRAM98 = 0x0E62; +ESIRAM99 = 0x0E63; +ESIRAM100 = 0x0E64; +ESIRAM101 = 0x0E65; +ESIRAM102 = 0x0E66; +ESIRAM103 = 0x0E67; +ESIRAM104 = 0x0E68; +ESIRAM105 = 0x0E69; +ESIRAM106 = 0x0E6A; +ESIRAM107 = 0x0E6B; +ESIRAM108 = 0x0E6C; +ESIRAM109 = 0x0E6D; +ESIRAM110 = 0x0E6E; +ESIRAM111 = 0x0E6F; +ESIRAM112 = 0x0E70; +ESIRAM113 = 0x0E71; +ESIRAM114 = 0x0E72; +ESIRAM115 = 0x0E73; +ESIRAM116 = 0x0E74; +ESIRAM117 = 0x0E75; +ESIRAM118 = 0x0E76; +ESIRAM119 = 0x0E77; +ESIRAM120 = 0x0E78; +ESIRAM121 = 0x0E79; +ESIRAM122 = 0x0E7A; +ESIRAM123 = 0x0E7B; +ESIRAM124 = 0x0E7C; +ESIRAM125 = 0x0E7D; +ESIRAM126 = 0x0E7E; +ESIRAM127 = 0x0E7F; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr6988.cmd b/msp430/msp430fr6988.cmd new file mode 100644 index 00000000..ed572fe0 --- /dev/null +++ b/msp430/msp430fr6988.cmd @@ -0,0 +1,1547 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr6988.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************ +* EXTENDED SCAN INTERFACE +************************************************************/ +ESIDEBUG1 = 0x0D00; +ESIDEBUG1_L = 0x0D00; +ESIDEBUG1_H = 0x0D01; +ESIDEBUG2 = 0x0D02; +ESIDEBUG2_L = 0x0D02; +ESIDEBUG2_H = 0x0D03; +ESIDEBUG3 = 0x0D04; +ESIDEBUG3_L = 0x0D04; +ESIDEBUG3_H = 0x0D05; +ESIDEBUG4 = 0x0D06; +ESIDEBUG4_L = 0x0D06; +ESIDEBUG4_H = 0x0D07; +ESIDEBUG5 = 0x0D08; +ESIDEBUG5_L = 0x0D08; +ESIDEBUG5_H = 0x0D09; +ESICNT0 = 0x0D10; +ESICNT0_L = 0x0D10; +ESICNT0_H = 0x0D11; +ESICNT1 = 0x0D12; +ESICNT1_L = 0x0D12; +ESICNT1_H = 0x0D13; +ESICNT2 = 0x0D14; +ESICNT2_L = 0x0D14; +ESICNT2_H = 0x0D15; +ESICNT3 = 0x0D16; +ESICNT3_L = 0x0D16; +ESICNT3_H = 0x0D17; +ESIIV = 0x0D1A; +ESIIV_L = 0x0D1A; +ESIIV_H = 0x0D1B; +ESIINT1 = 0x0D1C; +ESIINT1_L = 0x0D1C; +ESIINT1_H = 0x0D1D; +ESIINT2 = 0x0D1E; +ESIINT2_L = 0x0D1E; +ESIINT2_H = 0x0D1F; +ESIAFE = 0x0D20; +ESIAFE_L = 0x0D20; +ESIAFE_H = 0x0D21; +ESIPPU = 0x0D22; +ESIPPU_L = 0x0D22; +ESIPPU_H = 0x0D23; +ESITSM = 0x0D24; +ESITSM_L = 0x0D24; +ESITSM_H = 0x0D25; +ESIPSM = 0x0D26; +ESIPSM_L = 0x0D26; +ESIPSM_H = 0x0D27; +ESIOSC = 0x0D28; +ESIOSC_L = 0x0D28; +ESIOSC_H = 0x0D29; +ESICTL = 0x0D2A; +ESICTL_L = 0x0D2A; +ESICTL_H = 0x0D2B; +ESITHR1 = 0x0D2C; +ESITHR1_L = 0x0D2C; +ESITHR1_H = 0x0D2D; +ESITHR2 = 0x0D2E; +ESITHR2_L = 0x0D2E; +ESITHR2_H = 0x0D2F; +ESIDAC1R0 = 0x0D40; +ESIDAC1R0_L = 0x0D40; +ESIDAC1R0_H = 0x0D41; +ESIDAC1R1 = 0x0D42; +ESIDAC1R1_L = 0x0D42; +ESIDAC1R1_H = 0x0D43; +ESIDAC1R2 = 0x0D44; +ESIDAC1R2_L = 0x0D44; +ESIDAC1R2_H = 0x0D45; +ESIDAC1R3 = 0x0D46; +ESIDAC1R3_L = 0x0D46; +ESIDAC1R3_H = 0x0D47; +ESIDAC1R4 = 0x0D48; +ESIDAC1R4_L = 0x0D48; +ESIDAC1R4_H = 0x0D49; +ESIDAC1R5 = 0x0D4A; +ESIDAC1R5_L = 0x0D4A; +ESIDAC1R5_H = 0x0D4B; +ESIDAC1R6 = 0x0D4C; +ESIDAC1R6_L = 0x0D4C; +ESIDAC1R6_H = 0x0D4D; +ESIDAC1R7 = 0x0D4E; +ESIDAC1R7_L = 0x0D4E; +ESIDAC1R7_H = 0x0D4F; +ESIDAC2R0 = 0x0D50; +ESIDAC2R0_L = 0x0D50; +ESIDAC2R0_H = 0x0D51; +ESIDAC2R1 = 0x0D52; +ESIDAC2R1_L = 0x0D52; +ESIDAC2R1_H = 0x0D53; +ESIDAC2R2 = 0x0D54; +ESIDAC2R2_L = 0x0D54; +ESIDAC2R2_H = 0x0D55; +ESIDAC2R3 = 0x0D56; +ESIDAC2R3_L = 0x0D56; +ESIDAC2R3_H = 0x0D57; +ESIDAC2R4 = 0x0D58; +ESIDAC2R4_L = 0x0D58; +ESIDAC2R4_H = 0x0D59; +ESIDAC2R5 = 0x0D5A; +ESIDAC2R5_L = 0x0D5A; +ESIDAC2R5_H = 0x0D5B; +ESIDAC2R6 = 0x0D5C; +ESIDAC2R6_L = 0x0D5C; +ESIDAC2R6_H = 0x0D5D; +ESIDAC2R7 = 0x0D5E; +ESIDAC2R7_L = 0x0D5E; +ESIDAC2R7_H = 0x0D5F; +ESITSM0 = 0x0D60; +ESITSM0_L = 0x0D60; +ESITSM0_H = 0x0D61; +ESITSM1 = 0x0D62; +ESITSM1_L = 0x0D62; +ESITSM1_H = 0x0D63; +ESITSM2 = 0x0D64; +ESITSM2_L = 0x0D64; +ESITSM2_H = 0x0D65; +ESITSM3 = 0x0D66; +ESITSM3_L = 0x0D66; +ESITSM3_H = 0x0D67; +ESITSM4 = 0x0D68; +ESITSM4_L = 0x0D68; +ESITSM4_H = 0x0D69; +ESITSM5 = 0x0D6A; +ESITSM5_L = 0x0D6A; +ESITSM5_H = 0x0D6B; +ESITSM6 = 0x0D6C; +ESITSM6_L = 0x0D6C; +ESITSM6_H = 0x0D6D; +ESITSM7 = 0x0D6E; +ESITSM7_L = 0x0D6E; +ESITSM7_H = 0x0D6F; +ESITSM8 = 0x0D70; +ESITSM8_L = 0x0D70; +ESITSM8_H = 0x0D71; +ESITSM9 = 0x0D72; +ESITSM9_L = 0x0D72; +ESITSM9_H = 0x0D73; +ESITSM10 = 0x0D74; +ESITSM10_L = 0x0D74; +ESITSM10_H = 0x0D75; +ESITSM11 = 0x0D76; +ESITSM11_L = 0x0D76; +ESITSM11_H = 0x0D77; +ESITSM12 = 0x0D78; +ESITSM12_L = 0x0D78; +ESITSM12_H = 0x0D79; +ESITSM13 = 0x0D7A; +ESITSM13_L = 0x0D7A; +ESITSM13_H = 0x0D7B; +ESITSM14 = 0x0D7C; +ESITSM14_L = 0x0D7C; +ESITSM14_H = 0x0D7D; +ESITSM15 = 0x0D7E; +ESITSM15_L = 0x0D7E; +ESITSM15_H = 0x0D7F; +ESITSM16 = 0x0D80; +ESITSM16_L = 0x0D80; +ESITSM16_H = 0x0D81; +ESITSM17 = 0x0D82; +ESITSM17_L = 0x0D82; +ESITSM17_H = 0x0D83; +ESITSM18 = 0x0D84; +ESITSM18_L = 0x0D84; +ESITSM18_H = 0x0D85; +ESITSM19 = 0x0D86; +ESITSM19_L = 0x0D86; +ESITSM19_H = 0x0D87; +ESITSM20 = 0x0D88; +ESITSM20_L = 0x0D88; +ESITSM20_H = 0x0D89; +ESITSM21 = 0x0D8A; +ESITSM21_L = 0x0D8A; +ESITSM21_H = 0x0D8B; +ESITSM22 = 0x0D8C; +ESITSM22_L = 0x0D8C; +ESITSM22_H = 0x0D8D; +ESITSM23 = 0x0D8E; +ESITSM23_L = 0x0D8E; +ESITSM23_H = 0x0D8F; +ESITSM24 = 0x0D90; +ESITSM24_L = 0x0D90; +ESITSM24_H = 0x0D91; +ESITSM25 = 0x0D92; +ESITSM25_L = 0x0D92; +ESITSM25_H = 0x0D93; +ESITSM26 = 0x0D94; +ESITSM26_L = 0x0D94; +ESITSM26_H = 0x0D95; +ESITSM27 = 0x0D96; +ESITSM27_L = 0x0D96; +ESITSM27_H = 0x0D97; +ESITSM28 = 0x0D98; +ESITSM28_L = 0x0D98; +ESITSM28_H = 0x0D99; +ESITSM29 = 0x0D9A; +ESITSM29_L = 0x0D9A; +ESITSM29_H = 0x0D9B; +ESITSM30 = 0x0D9C; +ESITSM30_L = 0x0D9C; +ESITSM30_H = 0x0D9D; +ESITSM31 = 0x0D9E; +ESITSM31_L = 0x0D9E; +ESITSM31_H = 0x0D9F; +/************************************************************ +* EXTENDED SCAN INTERFACE RAM +************************************************************/ +ESIRAM0 = 0x0E00; +ESIRAM1 = 0x0E01; +ESIRAM2 = 0x0E02; +ESIRAM3 = 0x0E03; +ESIRAM4 = 0x0E04; +ESIRAM5 = 0x0E05; +ESIRAM6 = 0x0E06; +ESIRAM7 = 0x0E07; +ESIRAM8 = 0x0E08; +ESIRAM9 = 0x0E09; +ESIRAM10 = 0x0E0A; +ESIRAM11 = 0x0E0B; +ESIRAM12 = 0x0E0C; +ESIRAM13 = 0x0E0D; +ESIRAM14 = 0x0E0E; +ESIRAM15 = 0x0E0F; +ESIRAM16 = 0x0E10; +ESIRAM17 = 0x0E11; +ESIRAM18 = 0x0E12; +ESIRAM19 = 0x0E13; +ESIRAM20 = 0x0E14; +ESIRAM21 = 0x0E15; +ESIRAM22 = 0x0E16; +ESIRAM23 = 0x0E17; +ESIRAM24 = 0x0E18; +ESIRAM25 = 0x0E19; +ESIRAM26 = 0x0E1A; +ESIRAM27 = 0x0E1B; +ESIRAM28 = 0x0E1C; +ESIRAM29 = 0x0E1D; +ESIRAM30 = 0x0E1E; +ESIRAM31 = 0x0E1F; +ESIRAM32 = 0x0E20; +ESIRAM33 = 0x0E21; +ESIRAM34 = 0x0E22; +ESIRAM35 = 0x0E23; +ESIRAM36 = 0x0E24; +ESIRAM37 = 0x0E25; +ESIRAM38 = 0x0E26; +ESIRAM39 = 0x0E27; +ESIRAM40 = 0x0E28; +ESIRAM41 = 0x0E29; +ESIRAM42 = 0x0E2A; +ESIRAM43 = 0x0E2B; +ESIRAM44 = 0x0E2C; +ESIRAM45 = 0x0E2D; +ESIRAM46 = 0x0E2E; +ESIRAM47 = 0x0E2F; +ESIRAM48 = 0x0E30; +ESIRAM49 = 0x0E31; +ESIRAM50 = 0x0E32; +ESIRAM51 = 0x0E33; +ESIRAM52 = 0x0E34; +ESIRAM53 = 0x0E35; +ESIRAM54 = 0x0E36; +ESIRAM55 = 0x0E37; +ESIRAM56 = 0x0E38; +ESIRAM57 = 0x0E39; +ESIRAM58 = 0x0E3A; +ESIRAM59 = 0x0E3B; +ESIRAM60 = 0x0E3C; +ESIRAM61 = 0x0E3D; +ESIRAM62 = 0x0E3E; +ESIRAM63 = 0x0E3F; +ESIRAM64 = 0x0E40; +ESIRAM65 = 0x0E41; +ESIRAM66 = 0x0E42; +ESIRAM67 = 0x0E43; +ESIRAM68 = 0x0E44; +ESIRAM69 = 0x0E45; +ESIRAM70 = 0x0E46; +ESIRAM71 = 0x0E47; +ESIRAM72 = 0x0E48; +ESIRAM73 = 0x0E49; +ESIRAM74 = 0x0E4A; +ESIRAM75 = 0x0E4B; +ESIRAM76 = 0x0E4C; +ESIRAM77 = 0x0E4D; +ESIRAM78 = 0x0E4E; +ESIRAM79 = 0x0E4F; +ESIRAM80 = 0x0E50; +ESIRAM81 = 0x0E51; +ESIRAM82 = 0x0E52; +ESIRAM83 = 0x0E53; +ESIRAM84 = 0x0E54; +ESIRAM85 = 0x0E55; +ESIRAM86 = 0x0E56; +ESIRAM87 = 0x0E57; +ESIRAM88 = 0x0E58; +ESIRAM89 = 0x0E59; +ESIRAM90 = 0x0E5A; +ESIRAM91 = 0x0E5B; +ESIRAM92 = 0x0E5C; +ESIRAM93 = 0x0E5D; +ESIRAM94 = 0x0E5E; +ESIRAM95 = 0x0E5F; +ESIRAM96 = 0x0E60; +ESIRAM97 = 0x0E61; +ESIRAM98 = 0x0E62; +ESIRAM99 = 0x0E63; +ESIRAM100 = 0x0E64; +ESIRAM101 = 0x0E65; +ESIRAM102 = 0x0E66; +ESIRAM103 = 0x0E67; +ESIRAM104 = 0x0E68; +ESIRAM105 = 0x0E69; +ESIRAM106 = 0x0E6A; +ESIRAM107 = 0x0E6B; +ESIRAM108 = 0x0E6C; +ESIRAM109 = 0x0E6D; +ESIRAM110 = 0x0E6E; +ESIRAM111 = 0x0E6F; +ESIRAM112 = 0x0E70; +ESIRAM113 = 0x0E71; +ESIRAM114 = 0x0E72; +ESIRAM115 = 0x0E73; +ESIRAM116 = 0x0E74; +ESIRAM117 = 0x0E75; +ESIRAM118 = 0x0E76; +ESIRAM119 = 0x0E77; +ESIRAM120 = 0x0E78; +ESIRAM121 = 0x0E79; +ESIRAM122 = 0x0E7A; +ESIRAM123 = 0x0E7B; +ESIRAM124 = 0x0E7C; +ESIRAM125 = 0x0E7D; +ESIRAM126 = 0x0E7E; +ESIRAM127 = 0x0E7F; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr6989.cmd b/msp430/msp430fr6989.cmd new file mode 100644 index 00000000..1f7808ac --- /dev/null +++ b/msp430/msp430fr6989.cmd @@ -0,0 +1,1547 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr6989.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************ +* EXTENDED SCAN INTERFACE +************************************************************/ +ESIDEBUG1 = 0x0D00; +ESIDEBUG1_L = 0x0D00; +ESIDEBUG1_H = 0x0D01; +ESIDEBUG2 = 0x0D02; +ESIDEBUG2_L = 0x0D02; +ESIDEBUG2_H = 0x0D03; +ESIDEBUG3 = 0x0D04; +ESIDEBUG3_L = 0x0D04; +ESIDEBUG3_H = 0x0D05; +ESIDEBUG4 = 0x0D06; +ESIDEBUG4_L = 0x0D06; +ESIDEBUG4_H = 0x0D07; +ESIDEBUG5 = 0x0D08; +ESIDEBUG5_L = 0x0D08; +ESIDEBUG5_H = 0x0D09; +ESICNT0 = 0x0D10; +ESICNT0_L = 0x0D10; +ESICNT0_H = 0x0D11; +ESICNT1 = 0x0D12; +ESICNT1_L = 0x0D12; +ESICNT1_H = 0x0D13; +ESICNT2 = 0x0D14; +ESICNT2_L = 0x0D14; +ESICNT2_H = 0x0D15; +ESICNT3 = 0x0D16; +ESICNT3_L = 0x0D16; +ESICNT3_H = 0x0D17; +ESIIV = 0x0D1A; +ESIIV_L = 0x0D1A; +ESIIV_H = 0x0D1B; +ESIINT1 = 0x0D1C; +ESIINT1_L = 0x0D1C; +ESIINT1_H = 0x0D1D; +ESIINT2 = 0x0D1E; +ESIINT2_L = 0x0D1E; +ESIINT2_H = 0x0D1F; +ESIAFE = 0x0D20; +ESIAFE_L = 0x0D20; +ESIAFE_H = 0x0D21; +ESIPPU = 0x0D22; +ESIPPU_L = 0x0D22; +ESIPPU_H = 0x0D23; +ESITSM = 0x0D24; +ESITSM_L = 0x0D24; +ESITSM_H = 0x0D25; +ESIPSM = 0x0D26; +ESIPSM_L = 0x0D26; +ESIPSM_H = 0x0D27; +ESIOSC = 0x0D28; +ESIOSC_L = 0x0D28; +ESIOSC_H = 0x0D29; +ESICTL = 0x0D2A; +ESICTL_L = 0x0D2A; +ESICTL_H = 0x0D2B; +ESITHR1 = 0x0D2C; +ESITHR1_L = 0x0D2C; +ESITHR1_H = 0x0D2D; +ESITHR2 = 0x0D2E; +ESITHR2_L = 0x0D2E; +ESITHR2_H = 0x0D2F; +ESIDAC1R0 = 0x0D40; +ESIDAC1R0_L = 0x0D40; +ESIDAC1R0_H = 0x0D41; +ESIDAC1R1 = 0x0D42; +ESIDAC1R1_L = 0x0D42; +ESIDAC1R1_H = 0x0D43; +ESIDAC1R2 = 0x0D44; +ESIDAC1R2_L = 0x0D44; +ESIDAC1R2_H = 0x0D45; +ESIDAC1R3 = 0x0D46; +ESIDAC1R3_L = 0x0D46; +ESIDAC1R3_H = 0x0D47; +ESIDAC1R4 = 0x0D48; +ESIDAC1R4_L = 0x0D48; +ESIDAC1R4_H = 0x0D49; +ESIDAC1R5 = 0x0D4A; +ESIDAC1R5_L = 0x0D4A; +ESIDAC1R5_H = 0x0D4B; +ESIDAC1R6 = 0x0D4C; +ESIDAC1R6_L = 0x0D4C; +ESIDAC1R6_H = 0x0D4D; +ESIDAC1R7 = 0x0D4E; +ESIDAC1R7_L = 0x0D4E; +ESIDAC1R7_H = 0x0D4F; +ESIDAC2R0 = 0x0D50; +ESIDAC2R0_L = 0x0D50; +ESIDAC2R0_H = 0x0D51; +ESIDAC2R1 = 0x0D52; +ESIDAC2R1_L = 0x0D52; +ESIDAC2R1_H = 0x0D53; +ESIDAC2R2 = 0x0D54; +ESIDAC2R2_L = 0x0D54; +ESIDAC2R2_H = 0x0D55; +ESIDAC2R3 = 0x0D56; +ESIDAC2R3_L = 0x0D56; +ESIDAC2R3_H = 0x0D57; +ESIDAC2R4 = 0x0D58; +ESIDAC2R4_L = 0x0D58; +ESIDAC2R4_H = 0x0D59; +ESIDAC2R5 = 0x0D5A; +ESIDAC2R5_L = 0x0D5A; +ESIDAC2R5_H = 0x0D5B; +ESIDAC2R6 = 0x0D5C; +ESIDAC2R6_L = 0x0D5C; +ESIDAC2R6_H = 0x0D5D; +ESIDAC2R7 = 0x0D5E; +ESIDAC2R7_L = 0x0D5E; +ESIDAC2R7_H = 0x0D5F; +ESITSM0 = 0x0D60; +ESITSM0_L = 0x0D60; +ESITSM0_H = 0x0D61; +ESITSM1 = 0x0D62; +ESITSM1_L = 0x0D62; +ESITSM1_H = 0x0D63; +ESITSM2 = 0x0D64; +ESITSM2_L = 0x0D64; +ESITSM2_H = 0x0D65; +ESITSM3 = 0x0D66; +ESITSM3_L = 0x0D66; +ESITSM3_H = 0x0D67; +ESITSM4 = 0x0D68; +ESITSM4_L = 0x0D68; +ESITSM4_H = 0x0D69; +ESITSM5 = 0x0D6A; +ESITSM5_L = 0x0D6A; +ESITSM5_H = 0x0D6B; +ESITSM6 = 0x0D6C; +ESITSM6_L = 0x0D6C; +ESITSM6_H = 0x0D6D; +ESITSM7 = 0x0D6E; +ESITSM7_L = 0x0D6E; +ESITSM7_H = 0x0D6F; +ESITSM8 = 0x0D70; +ESITSM8_L = 0x0D70; +ESITSM8_H = 0x0D71; +ESITSM9 = 0x0D72; +ESITSM9_L = 0x0D72; +ESITSM9_H = 0x0D73; +ESITSM10 = 0x0D74; +ESITSM10_L = 0x0D74; +ESITSM10_H = 0x0D75; +ESITSM11 = 0x0D76; +ESITSM11_L = 0x0D76; +ESITSM11_H = 0x0D77; +ESITSM12 = 0x0D78; +ESITSM12_L = 0x0D78; +ESITSM12_H = 0x0D79; +ESITSM13 = 0x0D7A; +ESITSM13_L = 0x0D7A; +ESITSM13_H = 0x0D7B; +ESITSM14 = 0x0D7C; +ESITSM14_L = 0x0D7C; +ESITSM14_H = 0x0D7D; +ESITSM15 = 0x0D7E; +ESITSM15_L = 0x0D7E; +ESITSM15_H = 0x0D7F; +ESITSM16 = 0x0D80; +ESITSM16_L = 0x0D80; +ESITSM16_H = 0x0D81; +ESITSM17 = 0x0D82; +ESITSM17_L = 0x0D82; +ESITSM17_H = 0x0D83; +ESITSM18 = 0x0D84; +ESITSM18_L = 0x0D84; +ESITSM18_H = 0x0D85; +ESITSM19 = 0x0D86; +ESITSM19_L = 0x0D86; +ESITSM19_H = 0x0D87; +ESITSM20 = 0x0D88; +ESITSM20_L = 0x0D88; +ESITSM20_H = 0x0D89; +ESITSM21 = 0x0D8A; +ESITSM21_L = 0x0D8A; +ESITSM21_H = 0x0D8B; +ESITSM22 = 0x0D8C; +ESITSM22_L = 0x0D8C; +ESITSM22_H = 0x0D8D; +ESITSM23 = 0x0D8E; +ESITSM23_L = 0x0D8E; +ESITSM23_H = 0x0D8F; +ESITSM24 = 0x0D90; +ESITSM24_L = 0x0D90; +ESITSM24_H = 0x0D91; +ESITSM25 = 0x0D92; +ESITSM25_L = 0x0D92; +ESITSM25_H = 0x0D93; +ESITSM26 = 0x0D94; +ESITSM26_L = 0x0D94; +ESITSM26_H = 0x0D95; +ESITSM27 = 0x0D96; +ESITSM27_L = 0x0D96; +ESITSM27_H = 0x0D97; +ESITSM28 = 0x0D98; +ESITSM28_L = 0x0D98; +ESITSM28_H = 0x0D99; +ESITSM29 = 0x0D9A; +ESITSM29_L = 0x0D9A; +ESITSM29_H = 0x0D9B; +ESITSM30 = 0x0D9C; +ESITSM30_L = 0x0D9C; +ESITSM30_H = 0x0D9D; +ESITSM31 = 0x0D9E; +ESITSM31_L = 0x0D9E; +ESITSM31_H = 0x0D9F; +/************************************************************ +* EXTENDED SCAN INTERFACE RAM +************************************************************/ +ESIRAM0 = 0x0E00; +ESIRAM1 = 0x0E01; +ESIRAM2 = 0x0E02; +ESIRAM3 = 0x0E03; +ESIRAM4 = 0x0E04; +ESIRAM5 = 0x0E05; +ESIRAM6 = 0x0E06; +ESIRAM7 = 0x0E07; +ESIRAM8 = 0x0E08; +ESIRAM9 = 0x0E09; +ESIRAM10 = 0x0E0A; +ESIRAM11 = 0x0E0B; +ESIRAM12 = 0x0E0C; +ESIRAM13 = 0x0E0D; +ESIRAM14 = 0x0E0E; +ESIRAM15 = 0x0E0F; +ESIRAM16 = 0x0E10; +ESIRAM17 = 0x0E11; +ESIRAM18 = 0x0E12; +ESIRAM19 = 0x0E13; +ESIRAM20 = 0x0E14; +ESIRAM21 = 0x0E15; +ESIRAM22 = 0x0E16; +ESIRAM23 = 0x0E17; +ESIRAM24 = 0x0E18; +ESIRAM25 = 0x0E19; +ESIRAM26 = 0x0E1A; +ESIRAM27 = 0x0E1B; +ESIRAM28 = 0x0E1C; +ESIRAM29 = 0x0E1D; +ESIRAM30 = 0x0E1E; +ESIRAM31 = 0x0E1F; +ESIRAM32 = 0x0E20; +ESIRAM33 = 0x0E21; +ESIRAM34 = 0x0E22; +ESIRAM35 = 0x0E23; +ESIRAM36 = 0x0E24; +ESIRAM37 = 0x0E25; +ESIRAM38 = 0x0E26; +ESIRAM39 = 0x0E27; +ESIRAM40 = 0x0E28; +ESIRAM41 = 0x0E29; +ESIRAM42 = 0x0E2A; +ESIRAM43 = 0x0E2B; +ESIRAM44 = 0x0E2C; +ESIRAM45 = 0x0E2D; +ESIRAM46 = 0x0E2E; +ESIRAM47 = 0x0E2F; +ESIRAM48 = 0x0E30; +ESIRAM49 = 0x0E31; +ESIRAM50 = 0x0E32; +ESIRAM51 = 0x0E33; +ESIRAM52 = 0x0E34; +ESIRAM53 = 0x0E35; +ESIRAM54 = 0x0E36; +ESIRAM55 = 0x0E37; +ESIRAM56 = 0x0E38; +ESIRAM57 = 0x0E39; +ESIRAM58 = 0x0E3A; +ESIRAM59 = 0x0E3B; +ESIRAM60 = 0x0E3C; +ESIRAM61 = 0x0E3D; +ESIRAM62 = 0x0E3E; +ESIRAM63 = 0x0E3F; +ESIRAM64 = 0x0E40; +ESIRAM65 = 0x0E41; +ESIRAM66 = 0x0E42; +ESIRAM67 = 0x0E43; +ESIRAM68 = 0x0E44; +ESIRAM69 = 0x0E45; +ESIRAM70 = 0x0E46; +ESIRAM71 = 0x0E47; +ESIRAM72 = 0x0E48; +ESIRAM73 = 0x0E49; +ESIRAM74 = 0x0E4A; +ESIRAM75 = 0x0E4B; +ESIRAM76 = 0x0E4C; +ESIRAM77 = 0x0E4D; +ESIRAM78 = 0x0E4E; +ESIRAM79 = 0x0E4F; +ESIRAM80 = 0x0E50; +ESIRAM81 = 0x0E51; +ESIRAM82 = 0x0E52; +ESIRAM83 = 0x0E53; +ESIRAM84 = 0x0E54; +ESIRAM85 = 0x0E55; +ESIRAM86 = 0x0E56; +ESIRAM87 = 0x0E57; +ESIRAM88 = 0x0E58; +ESIRAM89 = 0x0E59; +ESIRAM90 = 0x0E5A; +ESIRAM91 = 0x0E5B; +ESIRAM92 = 0x0E5C; +ESIRAM93 = 0x0E5D; +ESIRAM94 = 0x0E5E; +ESIRAM95 = 0x0E5F; +ESIRAM96 = 0x0E60; +ESIRAM97 = 0x0E61; +ESIRAM98 = 0x0E62; +ESIRAM99 = 0x0E63; +ESIRAM100 = 0x0E64; +ESIRAM101 = 0x0E65; +ESIRAM102 = 0x0E66; +ESIRAM103 = 0x0E67; +ESIRAM104 = 0x0E68; +ESIRAM105 = 0x0E69; +ESIRAM106 = 0x0E6A; +ESIRAM107 = 0x0E6B; +ESIRAM108 = 0x0E6C; +ESIRAM109 = 0x0E6D; +ESIRAM110 = 0x0E6E; +ESIRAM111 = 0x0E6F; +ESIRAM112 = 0x0E70; +ESIRAM113 = 0x0E71; +ESIRAM114 = 0x0E72; +ESIRAM115 = 0x0E73; +ESIRAM116 = 0x0E74; +ESIRAM117 = 0x0E75; +ESIRAM118 = 0x0E76; +ESIRAM119 = 0x0E77; +ESIRAM120 = 0x0E78; +ESIRAM121 = 0x0E79; +ESIRAM122 = 0x0E7A; +ESIRAM123 = 0x0E7B; +ESIRAM124 = 0x0E7C; +ESIRAM125 = 0x0E7D; +ESIRAM126 = 0x0E7E; +ESIRAM127 = 0x0E7F; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fr69891.cmd b/msp430/msp430fr69891.cmd new file mode 100644 index 00000000..8e8ad68d --- /dev/null +++ b/msp430/msp430fr69891.cmd @@ -0,0 +1,1547 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fr69891.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12_B +************************************************************/ +ADC12CTL0 = 0x0800; +ADC12CTL0_L = 0x0800; +ADC12CTL0_H = 0x0801; +ADC12CTL1 = 0x0802; +ADC12CTL1_L = 0x0802; +ADC12CTL1_H = 0x0803; +ADC12CTL2 = 0x0804; +ADC12CTL2_L = 0x0804; +ADC12CTL2_H = 0x0805; +ADC12CTL3 = 0x0806; +ADC12CTL3_L = 0x0806; +ADC12CTL3_H = 0x0807; +ADC12LO = 0x0808; +ADC12LO_L = 0x0808; +ADC12LO_H = 0x0809; +ADC12HI = 0x080A; +ADC12HI_L = 0x080A; +ADC12HI_H = 0x080B; +ADC12IFGR0 = 0x080C; +ADC12IFGR0_L = 0x080C; +ADC12IFGR0_H = 0x080D; +ADC12IFGR1 = 0x080E; +ADC12IFGR1_L = 0x080E; +ADC12IFGR1_H = 0x080F; +ADC12IFGR2 = 0x0810; +ADC12IFGR2_L = 0x0810; +ADC12IFGR2_H = 0x0811; +ADC12IER0 = 0x0812; +ADC12IER0_L = 0x0812; +ADC12IER0_H = 0x0813; +ADC12IER1 = 0x0814; +ADC12IER1_L = 0x0814; +ADC12IER1_H = 0x0815; +ADC12IER2 = 0x0816; +ADC12IER2_L = 0x0816; +ADC12IER2_H = 0x0817; +ADC12IV = 0x0818; +ADC12IV_L = 0x0818; +ADC12IV_H = 0x0819; +ADC12MCTL0 = 0x0820; +ADC12MCTL0_L = 0x0820; +ADC12MCTL0_H = 0x0821; +ADC12MCTL1 = 0x0822; +ADC12MCTL1_L = 0x0822; +ADC12MCTL1_H = 0x0823; +ADC12MCTL2 = 0x0824; +ADC12MCTL2_L = 0x0824; +ADC12MCTL2_H = 0x0825; +ADC12MCTL3 = 0x0826; +ADC12MCTL3_L = 0x0826; +ADC12MCTL3_H = 0x0827; +ADC12MCTL4 = 0x0828; +ADC12MCTL4_L = 0x0828; +ADC12MCTL4_H = 0x0829; +ADC12MCTL5 = 0x082A; +ADC12MCTL5_L = 0x082A; +ADC12MCTL5_H = 0x082B; +ADC12MCTL6 = 0x082C; +ADC12MCTL6_L = 0x082C; +ADC12MCTL6_H = 0x082D; +ADC12MCTL7 = 0x082E; +ADC12MCTL7_L = 0x082E; +ADC12MCTL7_H = 0x082F; +ADC12MCTL8 = 0x0830; +ADC12MCTL8_L = 0x0830; +ADC12MCTL8_H = 0x0831; +ADC12MCTL9 = 0x0832; +ADC12MCTL9_L = 0x0832; +ADC12MCTL9_H = 0x0833; +ADC12MCTL10 = 0x0834; +ADC12MCTL10_L = 0x0834; +ADC12MCTL10_H = 0x0835; +ADC12MCTL11 = 0x0836; +ADC12MCTL11_L = 0x0836; +ADC12MCTL11_H = 0x0837; +ADC12MCTL12 = 0x0838; +ADC12MCTL12_L = 0x0838; +ADC12MCTL12_H = 0x0839; +ADC12MCTL13 = 0x083A; +ADC12MCTL13_L = 0x083A; +ADC12MCTL13_H = 0x083B; +ADC12MCTL14 = 0x083C; +ADC12MCTL14_L = 0x083C; +ADC12MCTL14_H = 0x083D; +ADC12MCTL15 = 0x083E; +ADC12MCTL15_L = 0x083E; +ADC12MCTL15_H = 0x083F; +ADC12MCTL16 = 0x0840; +ADC12MCTL16_L = 0x0840; +ADC12MCTL16_H = 0x0841; +ADC12MCTL17 = 0x0842; +ADC12MCTL17_L = 0x0842; +ADC12MCTL17_H = 0x0843; +ADC12MCTL18 = 0x0844; +ADC12MCTL18_L = 0x0844; +ADC12MCTL18_H = 0x0845; +ADC12MCTL19 = 0x0846; +ADC12MCTL19_L = 0x0846; +ADC12MCTL19_H = 0x0847; +ADC12MCTL20 = 0x0848; +ADC12MCTL20_L = 0x0848; +ADC12MCTL20_H = 0x0849; +ADC12MCTL21 = 0x084A; +ADC12MCTL21_L = 0x084A; +ADC12MCTL21_H = 0x084B; +ADC12MCTL22 = 0x084C; +ADC12MCTL22_L = 0x084C; +ADC12MCTL22_H = 0x084D; +ADC12MCTL23 = 0x084E; +ADC12MCTL23_L = 0x084E; +ADC12MCTL23_H = 0x084F; +ADC12MCTL24 = 0x0850; +ADC12MCTL24_L = 0x0850; +ADC12MCTL24_H = 0x0851; +ADC12MCTL25 = 0x0852; +ADC12MCTL25_L = 0x0852; +ADC12MCTL25_H = 0x0853; +ADC12MCTL26 = 0x0854; +ADC12MCTL26_L = 0x0854; +ADC12MCTL26_H = 0x0855; +ADC12MCTL27 = 0x0856; +ADC12MCTL27_L = 0x0856; +ADC12MCTL27_H = 0x0857; +ADC12MCTL28 = 0x0858; +ADC12MCTL28_L = 0x0858; +ADC12MCTL28_H = 0x0859; +ADC12MCTL29 = 0x085A; +ADC12MCTL29_L = 0x085A; +ADC12MCTL29_H = 0x085B; +ADC12MCTL30 = 0x085C; +ADC12MCTL30_L = 0x085C; +ADC12MCTL30_H = 0x085D; +ADC12MCTL31 = 0x085E; +ADC12MCTL31_L = 0x085E; +ADC12MCTL31_H = 0x085F; +ADC12MEM0 = 0x0860; +ADC12MEM0_L = 0x0860; +ADC12MEM0_H = 0x0861; +ADC12MEM1 = 0x0862; +ADC12MEM1_L = 0x0862; +ADC12MEM1_H = 0x0863; +ADC12MEM2 = 0x0864; +ADC12MEM2_L = 0x0864; +ADC12MEM2_H = 0x0865; +ADC12MEM3 = 0x0866; +ADC12MEM3_L = 0x0866; +ADC12MEM3_H = 0x0867; +ADC12MEM4 = 0x0868; +ADC12MEM4_L = 0x0868; +ADC12MEM4_H = 0x0869; +ADC12MEM5 = 0x086A; +ADC12MEM5_L = 0x086A; +ADC12MEM5_H = 0x086B; +ADC12MEM6 = 0x086C; +ADC12MEM6_L = 0x086C; +ADC12MEM6_H = 0x086D; +ADC12MEM7 = 0x086E; +ADC12MEM7_L = 0x086E; +ADC12MEM7_H = 0x086F; +ADC12MEM8 = 0x0870; +ADC12MEM8_L = 0x0870; +ADC12MEM8_H = 0x0871; +ADC12MEM9 = 0x0872; +ADC12MEM9_L = 0x0872; +ADC12MEM9_H = 0x0873; +ADC12MEM10 = 0x0874; +ADC12MEM10_L = 0x0874; +ADC12MEM10_H = 0x0875; +ADC12MEM11 = 0x0876; +ADC12MEM11_L = 0x0876; +ADC12MEM11_H = 0x0877; +ADC12MEM12 = 0x0878; +ADC12MEM12_L = 0x0878; +ADC12MEM12_H = 0x0879; +ADC12MEM13 = 0x087A; +ADC12MEM13_L = 0x087A; +ADC12MEM13_H = 0x087B; +ADC12MEM14 = 0x087C; +ADC12MEM14_L = 0x087C; +ADC12MEM14_H = 0x087D; +ADC12MEM15 = 0x087E; +ADC12MEM15_L = 0x087E; +ADC12MEM15_H = 0x087F; +ADC12MEM16 = 0x0880; +ADC12MEM16_L = 0x0880; +ADC12MEM16_H = 0x0881; +ADC12MEM17 = 0x0882; +ADC12MEM17_L = 0x0882; +ADC12MEM17_H = 0x0883; +ADC12MEM18 = 0x0884; +ADC12MEM18_L = 0x0884; +ADC12MEM18_H = 0x0885; +ADC12MEM19 = 0x0886; +ADC12MEM19_L = 0x0886; +ADC12MEM19_H = 0x0887; +ADC12MEM20 = 0x0888; +ADC12MEM20_L = 0x0888; +ADC12MEM20_H = 0x0889; +ADC12MEM21 = 0x088A; +ADC12MEM21_L = 0x088A; +ADC12MEM21_H = 0x088B; +ADC12MEM22 = 0x088C; +ADC12MEM22_L = 0x088C; +ADC12MEM22_H = 0x088D; +ADC12MEM23 = 0x088E; +ADC12MEM23_L = 0x088E; +ADC12MEM23_H = 0x088F; +ADC12MEM24 = 0x0890; +ADC12MEM24_L = 0x0890; +ADC12MEM24_H = 0x0891; +ADC12MEM25 = 0x0892; +ADC12MEM25_L = 0x0892; +ADC12MEM25_H = 0x0893; +ADC12MEM26 = 0x0894; +ADC12MEM26_L = 0x0894; +ADC12MEM26_H = 0x0895; +ADC12MEM27 = 0x0896; +ADC12MEM27_L = 0x0896; +ADC12MEM27_H = 0x0897; +ADC12MEM28 = 0x0898; +ADC12MEM28_L = 0x0898; +ADC12MEM28_H = 0x0899; +ADC12MEM29 = 0x089A; +ADC12MEM29_L = 0x089A; +ADC12MEM29_H = 0x089B; +ADC12MEM30 = 0x089C; +ADC12MEM30_L = 0x089C; +ADC12MEM30_H = 0x089D; +ADC12MEM31 = 0x089E; +ADC12MEM31_L = 0x089E; +ADC12MEM31_H = 0x089F; +/************************************************************ +* AES256 Accelerator +************************************************************/ +AESACTL0 = 0x09C0; +AESACTL0_L = 0x09C0; +AESACTL0_H = 0x09C1; +AESACTL1 = 0x09C2; +AESACTL1_L = 0x09C2; +AESACTL1_H = 0x09C3; +AESASTAT = 0x09C4; +AESASTAT_L = 0x09C4; +AESASTAT_H = 0x09C5; +AESAKEY = 0x09C6; +AESAKEY_L = 0x09C6; +AESAKEY_H = 0x09C7; +AESADIN = 0x09C8; +AESADIN_L = 0x09C8; +AESADIN_H = 0x09C9; +AESADOUT = 0x09CA; +AESADOUT_L = 0x09CA; +AESADOUT_H = 0x09CB; +AESAXDIN = 0x09CC; +AESAXDIN_L = 0x09CC; +AESAXDIN_H = 0x09CD; +AESAXIN = 0x09CE; +AESAXIN_L = 0x09CE; +AESAXIN_H = 0x09CF; +/************************************************************ +* Capacitive_Touch_IO 0 +************************************************************/ +CAPTIO0CTL = 0x043E; +CAPTIO0CTL_L = 0x043E; +CAPTIO0CTL_H = 0x043F; +/************************************************************ +* Capacitive_Touch_IO 1 +************************************************************/ +CAPTIO1CTL = 0x047E; +CAPTIO1CTL_L = 0x047E; +CAPTIO1CTL_H = 0x047F; +/************************************************************ +* Comparator E +************************************************************/ +CECTL0 = 0x08C0; +CECTL0_L = 0x08C0; +CECTL0_H = 0x08C1; +CECTL1 = 0x08C2; +CECTL1_L = 0x08C2; +CECTL1_H = 0x08C3; +CECTL2 = 0x08C4; +CECTL2_L = 0x08C4; +CECTL2_H = 0x08C5; +CECTL3 = 0x08C6; +CECTL3_L = 0x08C6; +CECTL3_H = 0x08C7; +CEINT = 0x08CC; +CEINT_L = 0x08CC; +CEINT_H = 0x08CD; +CEIV = 0x08CE; +CEIV_L = 0x08CE; +CEIV_H = 0x08CF; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************* +* CRC Module +*************************************************************/ +CRC32DIW0 = 0x0980; +CRC32DIW0_L = 0x0980; +CRC32DIW0_H = 0x0981; +CRC32DIW1 = 0x0982; +CRC32DIW1_L = 0x0982; +CRC32DIW1_H = 0x0983; +CRC32DIRBW1 = 0x0984; +CRC32DIRBW1_L = 0x0984; +CRC32DIRBW1_H = 0x0985; +CRC32DIRBW0 = 0x0986; +CRC32DIRBW0_L = 0x0986; +CRC32DIRBW0_H = 0x0987; +CRC32INIRESW0 = 0x0988; +CRC32INIRESW0_L = 0x0988; +CRC32INIRESW0_H = 0x0989; +CRC32INIRESW1 = 0x098A; +CRC32INIRESW1_L = 0x098A; +CRC32INIRESW1_H = 0x098B; +CRC32RESRW1 = 0x098C; +CRC32RESRW1_L = 0x098C; +CRC32RESRW1_H = 0x098D; +CRC32RESRW0 = 0x098E; +CRC32RESRW0_L = 0x098E; +CRC32RESRW0_H = 0x098F; +CRC16DIW0 = 0x0990; +CRC16DIW0_L = 0x0990; +CRC16DIW0_H = 0x0991; +CRC16DIW1 = 0x0992; +CRC16DIW1_L = 0x0992; +CRC16DIW1_H = 0x0993; +CRC16DIRBW1 = 0x0994; +CRC16DIRBW1_L = 0x0994; +CRC16DIRBW1_H = 0x0995; +CRC16DIRBW0 = 0x0996; +CRC16DIRBW0_L = 0x0996; +CRC16DIRBW0_H = 0x0997; +CRC16INIRESW0 = 0x0998; +CRC16INIRESW0_L = 0x0998; +CRC16INIRESW0_H = 0x0999; +CRC16RESRW0 = 0x099E; +CRC16RESRW0_L = 0x099E; +CRC16RESRW0_H = 0x099F; +CRC16RESRW1 = 0x099C; +CRC16RESRW1_L = 0x099C; +CRC16RESRW1_H = 0x099D; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0160; +CSCTL0_L = 0x0160; +CSCTL0_H = 0x0161; +CSCTL1 = 0x0162; +CSCTL1_L = 0x0162; +CSCTL1_H = 0x0163; +CSCTL2 = 0x0164; +CSCTL2_L = 0x0164; +CSCTL2_H = 0x0165; +CSCTL3 = 0x0166; +CSCTL3_L = 0x0166; +CSCTL3_H = 0x0167; +CSCTL4 = 0x0168; +CSCTL4_L = 0x0168; +CSCTL4_H = 0x0169; +CSCTL5 = 0x016A; +CSCTL5_L = 0x016A; +CSCTL5_H = 0x016B; +CSCTL6 = 0x016C; +CSCTL6_L = 0x016C; +CSCTL6_H = 0x016D; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************ +* EXTENDED SCAN INTERFACE +************************************************************/ +ESIDEBUG1 = 0x0D00; +ESIDEBUG1_L = 0x0D00; +ESIDEBUG1_H = 0x0D01; +ESIDEBUG2 = 0x0D02; +ESIDEBUG2_L = 0x0D02; +ESIDEBUG2_H = 0x0D03; +ESIDEBUG3 = 0x0D04; +ESIDEBUG3_L = 0x0D04; +ESIDEBUG3_H = 0x0D05; +ESIDEBUG4 = 0x0D06; +ESIDEBUG4_L = 0x0D06; +ESIDEBUG4_H = 0x0D07; +ESIDEBUG5 = 0x0D08; +ESIDEBUG5_L = 0x0D08; +ESIDEBUG5_H = 0x0D09; +ESICNT0 = 0x0D10; +ESICNT0_L = 0x0D10; +ESICNT0_H = 0x0D11; +ESICNT1 = 0x0D12; +ESICNT1_L = 0x0D12; +ESICNT1_H = 0x0D13; +ESICNT2 = 0x0D14; +ESICNT2_L = 0x0D14; +ESICNT2_H = 0x0D15; +ESICNT3 = 0x0D16; +ESICNT3_L = 0x0D16; +ESICNT3_H = 0x0D17; +ESIIV = 0x0D1A; +ESIIV_L = 0x0D1A; +ESIIV_H = 0x0D1B; +ESIINT1 = 0x0D1C; +ESIINT1_L = 0x0D1C; +ESIINT1_H = 0x0D1D; +ESIINT2 = 0x0D1E; +ESIINT2_L = 0x0D1E; +ESIINT2_H = 0x0D1F; +ESIAFE = 0x0D20; +ESIAFE_L = 0x0D20; +ESIAFE_H = 0x0D21; +ESIPPU = 0x0D22; +ESIPPU_L = 0x0D22; +ESIPPU_H = 0x0D23; +ESITSM = 0x0D24; +ESITSM_L = 0x0D24; +ESITSM_H = 0x0D25; +ESIPSM = 0x0D26; +ESIPSM_L = 0x0D26; +ESIPSM_H = 0x0D27; +ESIOSC = 0x0D28; +ESIOSC_L = 0x0D28; +ESIOSC_H = 0x0D29; +ESICTL = 0x0D2A; +ESICTL_L = 0x0D2A; +ESICTL_H = 0x0D2B; +ESITHR1 = 0x0D2C; +ESITHR1_L = 0x0D2C; +ESITHR1_H = 0x0D2D; +ESITHR2 = 0x0D2E; +ESITHR2_L = 0x0D2E; +ESITHR2_H = 0x0D2F; +ESIDAC1R0 = 0x0D40; +ESIDAC1R0_L = 0x0D40; +ESIDAC1R0_H = 0x0D41; +ESIDAC1R1 = 0x0D42; +ESIDAC1R1_L = 0x0D42; +ESIDAC1R1_H = 0x0D43; +ESIDAC1R2 = 0x0D44; +ESIDAC1R2_L = 0x0D44; +ESIDAC1R2_H = 0x0D45; +ESIDAC1R3 = 0x0D46; +ESIDAC1R3_L = 0x0D46; +ESIDAC1R3_H = 0x0D47; +ESIDAC1R4 = 0x0D48; +ESIDAC1R4_L = 0x0D48; +ESIDAC1R4_H = 0x0D49; +ESIDAC1R5 = 0x0D4A; +ESIDAC1R5_L = 0x0D4A; +ESIDAC1R5_H = 0x0D4B; +ESIDAC1R6 = 0x0D4C; +ESIDAC1R6_L = 0x0D4C; +ESIDAC1R6_H = 0x0D4D; +ESIDAC1R7 = 0x0D4E; +ESIDAC1R7_L = 0x0D4E; +ESIDAC1R7_H = 0x0D4F; +ESIDAC2R0 = 0x0D50; +ESIDAC2R0_L = 0x0D50; +ESIDAC2R0_H = 0x0D51; +ESIDAC2R1 = 0x0D52; +ESIDAC2R1_L = 0x0D52; +ESIDAC2R1_H = 0x0D53; +ESIDAC2R2 = 0x0D54; +ESIDAC2R2_L = 0x0D54; +ESIDAC2R2_H = 0x0D55; +ESIDAC2R3 = 0x0D56; +ESIDAC2R3_L = 0x0D56; +ESIDAC2R3_H = 0x0D57; +ESIDAC2R4 = 0x0D58; +ESIDAC2R4_L = 0x0D58; +ESIDAC2R4_H = 0x0D59; +ESIDAC2R5 = 0x0D5A; +ESIDAC2R5_L = 0x0D5A; +ESIDAC2R5_H = 0x0D5B; +ESIDAC2R6 = 0x0D5C; +ESIDAC2R6_L = 0x0D5C; +ESIDAC2R6_H = 0x0D5D; +ESIDAC2R7 = 0x0D5E; +ESIDAC2R7_L = 0x0D5E; +ESIDAC2R7_H = 0x0D5F; +ESITSM0 = 0x0D60; +ESITSM0_L = 0x0D60; +ESITSM0_H = 0x0D61; +ESITSM1 = 0x0D62; +ESITSM1_L = 0x0D62; +ESITSM1_H = 0x0D63; +ESITSM2 = 0x0D64; +ESITSM2_L = 0x0D64; +ESITSM2_H = 0x0D65; +ESITSM3 = 0x0D66; +ESITSM3_L = 0x0D66; +ESITSM3_H = 0x0D67; +ESITSM4 = 0x0D68; +ESITSM4_L = 0x0D68; +ESITSM4_H = 0x0D69; +ESITSM5 = 0x0D6A; +ESITSM5_L = 0x0D6A; +ESITSM5_H = 0x0D6B; +ESITSM6 = 0x0D6C; +ESITSM6_L = 0x0D6C; +ESITSM6_H = 0x0D6D; +ESITSM7 = 0x0D6E; +ESITSM7_L = 0x0D6E; +ESITSM7_H = 0x0D6F; +ESITSM8 = 0x0D70; +ESITSM8_L = 0x0D70; +ESITSM8_H = 0x0D71; +ESITSM9 = 0x0D72; +ESITSM9_L = 0x0D72; +ESITSM9_H = 0x0D73; +ESITSM10 = 0x0D74; +ESITSM10_L = 0x0D74; +ESITSM10_H = 0x0D75; +ESITSM11 = 0x0D76; +ESITSM11_L = 0x0D76; +ESITSM11_H = 0x0D77; +ESITSM12 = 0x0D78; +ESITSM12_L = 0x0D78; +ESITSM12_H = 0x0D79; +ESITSM13 = 0x0D7A; +ESITSM13_L = 0x0D7A; +ESITSM13_H = 0x0D7B; +ESITSM14 = 0x0D7C; +ESITSM14_L = 0x0D7C; +ESITSM14_H = 0x0D7D; +ESITSM15 = 0x0D7E; +ESITSM15_L = 0x0D7E; +ESITSM15_H = 0x0D7F; +ESITSM16 = 0x0D80; +ESITSM16_L = 0x0D80; +ESITSM16_H = 0x0D81; +ESITSM17 = 0x0D82; +ESITSM17_L = 0x0D82; +ESITSM17_H = 0x0D83; +ESITSM18 = 0x0D84; +ESITSM18_L = 0x0D84; +ESITSM18_H = 0x0D85; +ESITSM19 = 0x0D86; +ESITSM19_L = 0x0D86; +ESITSM19_H = 0x0D87; +ESITSM20 = 0x0D88; +ESITSM20_L = 0x0D88; +ESITSM20_H = 0x0D89; +ESITSM21 = 0x0D8A; +ESITSM21_L = 0x0D8A; +ESITSM21_H = 0x0D8B; +ESITSM22 = 0x0D8C; +ESITSM22_L = 0x0D8C; +ESITSM22_H = 0x0D8D; +ESITSM23 = 0x0D8E; +ESITSM23_L = 0x0D8E; +ESITSM23_H = 0x0D8F; +ESITSM24 = 0x0D90; +ESITSM24_L = 0x0D90; +ESITSM24_H = 0x0D91; +ESITSM25 = 0x0D92; +ESITSM25_L = 0x0D92; +ESITSM25_H = 0x0D93; +ESITSM26 = 0x0D94; +ESITSM26_L = 0x0D94; +ESITSM26_H = 0x0D95; +ESITSM27 = 0x0D96; +ESITSM27_L = 0x0D96; +ESITSM27_H = 0x0D97; +ESITSM28 = 0x0D98; +ESITSM28_L = 0x0D98; +ESITSM28_H = 0x0D99; +ESITSM29 = 0x0D9A; +ESITSM29_L = 0x0D9A; +ESITSM29_H = 0x0D9B; +ESITSM30 = 0x0D9C; +ESITSM30_L = 0x0D9C; +ESITSM30_H = 0x0D9D; +ESITSM31 = 0x0D9E; +ESITSM31_L = 0x0D9E; +ESITSM31_H = 0x0D9F; +/************************************************************ +* EXTENDED SCAN INTERFACE RAM +************************************************************/ +ESIRAM0 = 0x0E00; +ESIRAM1 = 0x0E01; +ESIRAM2 = 0x0E02; +ESIRAM3 = 0x0E03; +ESIRAM4 = 0x0E04; +ESIRAM5 = 0x0E05; +ESIRAM6 = 0x0E06; +ESIRAM7 = 0x0E07; +ESIRAM8 = 0x0E08; +ESIRAM9 = 0x0E09; +ESIRAM10 = 0x0E0A; +ESIRAM11 = 0x0E0B; +ESIRAM12 = 0x0E0C; +ESIRAM13 = 0x0E0D; +ESIRAM14 = 0x0E0E; +ESIRAM15 = 0x0E0F; +ESIRAM16 = 0x0E10; +ESIRAM17 = 0x0E11; +ESIRAM18 = 0x0E12; +ESIRAM19 = 0x0E13; +ESIRAM20 = 0x0E14; +ESIRAM21 = 0x0E15; +ESIRAM22 = 0x0E16; +ESIRAM23 = 0x0E17; +ESIRAM24 = 0x0E18; +ESIRAM25 = 0x0E19; +ESIRAM26 = 0x0E1A; +ESIRAM27 = 0x0E1B; +ESIRAM28 = 0x0E1C; +ESIRAM29 = 0x0E1D; +ESIRAM30 = 0x0E1E; +ESIRAM31 = 0x0E1F; +ESIRAM32 = 0x0E20; +ESIRAM33 = 0x0E21; +ESIRAM34 = 0x0E22; +ESIRAM35 = 0x0E23; +ESIRAM36 = 0x0E24; +ESIRAM37 = 0x0E25; +ESIRAM38 = 0x0E26; +ESIRAM39 = 0x0E27; +ESIRAM40 = 0x0E28; +ESIRAM41 = 0x0E29; +ESIRAM42 = 0x0E2A; +ESIRAM43 = 0x0E2B; +ESIRAM44 = 0x0E2C; +ESIRAM45 = 0x0E2D; +ESIRAM46 = 0x0E2E; +ESIRAM47 = 0x0E2F; +ESIRAM48 = 0x0E30; +ESIRAM49 = 0x0E31; +ESIRAM50 = 0x0E32; +ESIRAM51 = 0x0E33; +ESIRAM52 = 0x0E34; +ESIRAM53 = 0x0E35; +ESIRAM54 = 0x0E36; +ESIRAM55 = 0x0E37; +ESIRAM56 = 0x0E38; +ESIRAM57 = 0x0E39; +ESIRAM58 = 0x0E3A; +ESIRAM59 = 0x0E3B; +ESIRAM60 = 0x0E3C; +ESIRAM61 = 0x0E3D; +ESIRAM62 = 0x0E3E; +ESIRAM63 = 0x0E3F; +ESIRAM64 = 0x0E40; +ESIRAM65 = 0x0E41; +ESIRAM66 = 0x0E42; +ESIRAM67 = 0x0E43; +ESIRAM68 = 0x0E44; +ESIRAM69 = 0x0E45; +ESIRAM70 = 0x0E46; +ESIRAM71 = 0x0E47; +ESIRAM72 = 0x0E48; +ESIRAM73 = 0x0E49; +ESIRAM74 = 0x0E4A; +ESIRAM75 = 0x0E4B; +ESIRAM76 = 0x0E4C; +ESIRAM77 = 0x0E4D; +ESIRAM78 = 0x0E4E; +ESIRAM79 = 0x0E4F; +ESIRAM80 = 0x0E50; +ESIRAM81 = 0x0E51; +ESIRAM82 = 0x0E52; +ESIRAM83 = 0x0E53; +ESIRAM84 = 0x0E54; +ESIRAM85 = 0x0E55; +ESIRAM86 = 0x0E56; +ESIRAM87 = 0x0E57; +ESIRAM88 = 0x0E58; +ESIRAM89 = 0x0E59; +ESIRAM90 = 0x0E5A; +ESIRAM91 = 0x0E5B; +ESIRAM92 = 0x0E5C; +ESIRAM93 = 0x0E5D; +ESIRAM94 = 0x0E5E; +ESIRAM95 = 0x0E5F; +ESIRAM96 = 0x0E60; +ESIRAM97 = 0x0E61; +ESIRAM98 = 0x0E62; +ESIRAM99 = 0x0E63; +ESIRAM100 = 0x0E64; +ESIRAM101 = 0x0E65; +ESIRAM102 = 0x0E66; +ESIRAM103 = 0x0E67; +ESIRAM104 = 0x0E68; +ESIRAM105 = 0x0E69; +ESIRAM106 = 0x0E6A; +ESIRAM107 = 0x0E6B; +ESIRAM108 = 0x0E6C; +ESIRAM109 = 0x0E6D; +ESIRAM110 = 0x0E6E; +ESIRAM111 = 0x0E6F; +ESIRAM112 = 0x0E70; +ESIRAM113 = 0x0E71; +ESIRAM114 = 0x0E72; +ESIRAM115 = 0x0E73; +ESIRAM116 = 0x0E74; +ESIRAM117 = 0x0E75; +ESIRAM118 = 0x0E76; +ESIRAM119 = 0x0E77; +ESIRAM120 = 0x0E78; +ESIRAM121 = 0x0E79; +ESIRAM122 = 0x0E7A; +ESIRAM123 = 0x0E7B; +ESIRAM124 = 0x0E7C; +ESIRAM125 = 0x0E7D; +ESIRAM126 = 0x0E7E; +ESIRAM127 = 0x0E7F; +/************************************************************* +* FRAM Memory +*************************************************************/ +FRCTL0 = 0x0140; +FRCTL0_L = 0x0140; +FRCTL0_H = 0x0141; +GCCTL0 = 0x0144; +GCCTL0_L = 0x0144; +GCCTL0_H = 0x0145; +GCCTL1 = 0x0146; +GCCTL1_L = 0x0146; +GCCTL1_H = 0x0147; +/************************************************************ +* LCD_C +************************************************************/ +LCDCCTL0 = 0x0A00; +LCDCCTL0_L = 0x0A00; +LCDCCTL0_H = 0x0A01; +LCDCCTL1 = 0x0A02; +LCDCCTL1_L = 0x0A02; +LCDCCTL1_H = 0x0A03; +LCDCBLKCTL = 0x0A04; +LCDCBLKCTL_L = 0x0A04; +LCDCBLKCTL_H = 0x0A05; +LCDCMEMCTL = 0x0A06; +LCDCMEMCTL_L = 0x0A06; +LCDCMEMCTL_H = 0x0A07; +LCDCVCTL = 0x0A08; +LCDCVCTL_L = 0x0A08; +LCDCVCTL_H = 0x0A09; +LCDCPCTL0 = 0x0A0A; +LCDCPCTL0_L = 0x0A0A; +LCDCPCTL0_H = 0x0A0B; +LCDCPCTL1 = 0x0A0C; +LCDCPCTL1_L = 0x0A0C; +LCDCPCTL1_H = 0x0A0D; +LCDCPCTL2 = 0x0A0E; +LCDCPCTL2_L = 0x0A0E; +LCDCPCTL2_H = 0x0A0F; +LCDCCPCTL = 0x0A12; +LCDCCPCTL_L = 0x0A12; +LCDCCPCTL_H = 0x0A13; +LCDCIV = 0x0A1E; +LCDM1 = 0x0A20; +LCDM2 = 0x0A21; +LCDM3 = 0x0A22; +LCDM4 = 0x0A23; +LCDM5 = 0x0A24; +LCDM6 = 0x0A25; +LCDM7 = 0x0A26; +LCDM8 = 0x0A27; +LCDM9 = 0x0A28; +LCDM10 = 0x0A29; +LCDM11 = 0x0A2A; +LCDM12 = 0x0A2B; +LCDM13 = 0x0A2C; +LCDM14 = 0x0A2D; +LCDM15 = 0x0A2E; +LCDM16 = 0x0A2F; +LCDM17 = 0x0A30; +LCDM18 = 0x0A31; +LCDM19 = 0x0A32; +LCDM20 = 0x0A33; +LCDM21 = 0x0A34; +LCDM22 = 0x0A35; +LCDM23 = 0x0A36; +LCDM24 = 0x0A37; +LCDM25 = 0x0A38; +LCDM26 = 0x0A39; +LCDM27 = 0x0A3A; +LCDM28 = 0x0A3B; +LCDM29 = 0x0A3C; +LCDM30 = 0x0A3D; +LCDM31 = 0x0A3E; +LCDM32 = 0x0A3F; +LCDM33 = 0x0A40; +LCDM34 = 0x0A41; +LCDM35 = 0x0A42; +LCDM36 = 0x0A43; +LCDM37 = 0x0A44; +LCDM38 = 0x0A45; +LCDM39 = 0x0A46; +LCDM40 = 0x0A47; +LCDM41 = 0x0A48; +LCDM42 = 0x0A49; +LCDM43 = 0x0A4A; +LCDBM1 = 0x0A40; +LCDBM2 = 0x0A41; +LCDBM3 = 0x0A42; +LCDBM4 = 0x0A43; +LCDBM5 = 0x0A44; +LCDBM6 = 0x0A45; +LCDBM7 = 0x0A46; +LCDBM8 = 0x0A47; +LCDBM9 = 0x0A48; +LCDBM10 = 0x0A49; +LCDBM11 = 0x0A4A; +LCDBM12 = 0x0A4B; +LCDBM13 = 0x0A4C; +LCDBM14 = 0x0A4D; +LCDBM15 = 0x0A4E; +LCDBM16 = 0x0A4F; +LCDBM17 = 0x0A50; +LCDBM18 = 0x0A51; +LCDBM19 = 0x0A52; +LCDBM20 = 0x0A53; +LCDBM21 = 0x0A54; +LCDBM22 = 0x0A55; +/************************************************************ +* Memory Protection Unit +************************************************************/ +MPUCTL0 = 0x05A0; +MPUCTL0_L = 0x05A0; +MPUCTL0_H = 0x05A1; +MPUCTL1 = 0x05A2; +MPUCTL1_L = 0x05A2; +MPUCTL1_H = 0x05A3; +MPUSEGB2 = 0x05A4; +MPUSEGB2_L = 0x05A4; +MPUSEGB2_H = 0x05A5; +MPUSEGB1 = 0x05A6; +MPUSEGB1_L = 0x05A6; +MPUSEGB1_H = 0x05A7; +MPUSAM = 0x05A8; +MPUSAM_L = 0x05A8; +MPUSAM_H = 0x05A9; +MPUIPC0 = 0x05AA; +MPUIPC0_L = 0x05AA; +MPUIPC0_H = 0x05AB; +MPUIPSEGB2 = 0x05AC; +MPUIPSEGB2_L = 0x05AC; +MPUIPSEGB2_H = 0x05AD; +MPUIPSEGB1 = 0x05AE; +MPUIPSEGB1_L = 0x05AE; +MPUIPSEGB1_H = 0x05AF; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* PMM - Power Management System for FRAM +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMIFG = 0x012A; +PMMIFG_L = 0x012A; +PMMIFG_H = 0x012B; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PASELC = 0x0216; +PASELC_L = 0x0216; +PASELC_H = 0x0217; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBSEL0 = 0x022A; +PBSEL0_L = 0x022A; +PBSEL0_H = 0x022B; +PBSEL1 = 0x022C; +PBSEL1_L = 0x022C; +PBSEL1_H = 0x022D; +PBSELC = 0x0236; +PBSELC_L = 0x0236; +PBSELC_H = 0x0237; +PBIES = 0x0238; +PBIES_L = 0x0238; +PBIES_H = 0x0239; +PBIE = 0x023A; +PBIE_L = 0x023A; +PBIE_H = 0x023B; +PBIFG = 0x023C; +PBIFG_L = 0x023C; +PBIFG_H = 0x023D; +P3IV = 0x022E; +P4IV = 0x023E; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCSEL0 = 0x024A; +PCSEL0_L = 0x024A; +PCSEL0_H = 0x024B; +PCSEL1 = 0x024C; +PCSEL1_L = 0x024C; +PCSEL1_H = 0x024D; +PCSELC = 0x0256; +PCSELC_L = 0x0256; +PCSELC_H = 0x0257; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDSEL0 = 0x026A; +PDSEL0_L = 0x026A; +PDSEL0_H = 0x026B; +PDSEL1 = 0x026C; +PDSEL1_L = 0x026C; +PDSEL1_H = 0x026D; +PDSELC = 0x0276; +PDSELC_L = 0x0276; +PDSELC_H = 0x0277; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PESEL0 = 0x028A; +PESEL0_L = 0x028A; +PESEL0_H = 0x028B; +PESEL1 = 0x028C; +PESEL1_L = 0x028C; +PESEL1_H = 0x028D; +PESELC = 0x0296; +PESELC_L = 0x0296; +PESELC_H = 0x0297; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJSEL0 = 0x032A; +PJSEL0_L = 0x032A; +PJSEL0_H = 0x032B; +PJSEL1 = 0x032C; +PJSEL1_L = 0x032C; +PJSEL1_H = 0x032D; +PJSELC = 0x0336; +PJSELC_L = 0x0336; +PJSELC_H = 0x0337; +/************************************************************* +* RAM Control Module for FRAM +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL0 = 0x04A0; +RTCCTL0_L = 0x04A0; +RTCCTL0_H = 0x04A1; +RTCCTL13 = 0x04A2; +RTCCTL13_L = 0x04A2; +RTCCTL13_H = 0x04A3; +RTCOCAL = 0x04A4; +RTCOCAL_L = 0x04A4; +RTCOCAL_H = 0x04A5; +RTCTCMP = 0x04A6; +RTCTCMP_L = 0x04A6; +RTCTCMP_H = 0x04A7; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +BIN2BCD = 0x04BC; +BCD2BIN = 0x04BE; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A2 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer3_A5 +************************************************************/ +TA3CTL = 0x0440; +TA3CCTL0 = 0x0442; +TA3CCTL1 = 0x0444; +TA3CCTL2 = 0x0446; +TA3CCTL3 = 0x0448; +TA3CCTL4 = 0x044A; +TA3R = 0x0450; +TA3CCR0 = 0x0452; +TA3CCR1 = 0x0454; +TA3CCR2 = 0x0456; +TA3CCR3 = 0x0458; +TA3CCR4 = 0x045A; +TA3IV = 0x046E; +TA3EX0 = 0x0460; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0CTLW1 = 0x05C2; +UCA0CTLW1_L = 0x05C2; +UCA0CTLW1_H = 0x05C3; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTLW = 0x05C8; +UCA0MCTLW_L = 0x05C8; +UCA0MCTLW_H = 0x05C9; +UCA0STATW = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0RXBUF_L = 0x05CC; +UCA0RXBUF_H = 0x05CD; +UCA0TXBUF = 0x05CE; +UCA0TXBUF_L = 0x05CE; +UCA0TXBUF_H = 0x05CF; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0IE = 0x05DA; +UCA0IE_L = 0x05DA; +UCA0IE_H = 0x05DB; +UCA0IFG = 0x05DC; +UCA0IFG_L = 0x05DC; +UCA0IFG_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x05E0; +UCA1CTLW0_L = 0x05E0; +UCA1CTLW0_H = 0x05E1; +UCA1CTLW1 = 0x05E2; +UCA1CTLW1_L = 0x05E2; +UCA1CTLW1_H = 0x05E3; +UCA1BRW = 0x05E6; +UCA1BRW_L = 0x05E6; +UCA1BRW_H = 0x05E7; +UCA1MCTLW = 0x05E8; +UCA1MCTLW_L = 0x05E8; +UCA1MCTLW_H = 0x05E9; +UCA1STATW = 0x05EA; +UCA1RXBUF = 0x05EC; +UCA1RXBUF_L = 0x05EC; +UCA1RXBUF_H = 0x05ED; +UCA1TXBUF = 0x05EE; +UCA1TXBUF_L = 0x05EE; +UCA1TXBUF_H = 0x05EF; +UCA1ABCTL = 0x05F0; +UCA1IRCTL = 0x05F2; +UCA1IRCTL_L = 0x05F2; +UCA1IRCTL_H = 0x05F3; +UCA1IE = 0x05FA; +UCA1IE_L = 0x05FA; +UCA1IE_H = 0x05FB; +UCA1IFG = 0x05FC; +UCA1IFG_L = 0x05FC; +UCA1IFG_H = 0x05FD; +UCA1IV = 0x05FE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0680; +UCB1CTLW0_L = 0x0680; +UCB1CTLW0_H = 0x0681; +UCB1CTLW1 = 0x0682; +UCB1CTLW1_L = 0x0682; +UCB1CTLW1_H = 0x0683; +UCB1BRW = 0x0686; +UCB1BRW_L = 0x0686; +UCB1BRW_H = 0x0687; +UCB1STATW = 0x0688; +UCB1STATW_L = 0x0688; +UCB1STATW_H = 0x0689; +UCB1TBCNT = 0x068A; +UCB1TBCNT_L = 0x068A; +UCB1TBCNT_H = 0x068B; +UCB1RXBUF = 0x068C; +UCB1RXBUF_L = 0x068C; +UCB1RXBUF_H = 0x068D; +UCB1TXBUF = 0x068E; +UCB1TXBUF_L = 0x068E; +UCB1TXBUF_H = 0x068F; +UCB1I2COA0 = 0x0694; +UCB1I2COA0_L = 0x0694; +UCB1I2COA0_H = 0x0695; +UCB1I2COA1 = 0x0696; +UCB1I2COA1_L = 0x0696; +UCB1I2COA1_H = 0x0697; +UCB1I2COA2 = 0x0698; +UCB1I2COA2_L = 0x0698; +UCB1I2COA2_H = 0x0699; +UCB1I2COA3 = 0x069A; +UCB1I2COA3_L = 0x069A; +UCB1I2COA3_H = 0x069B; +UCB1ADDRX = 0x069C; +UCB1ADDRX_L = 0x069C; +UCB1ADDRX_H = 0x069D; +UCB1ADDMASK = 0x069E; +UCB1ADDMASK_L = 0x069E; +UCB1ADDMASK_H = 0x069F; +UCB1I2CSA = 0x06A0; +UCB1I2CSA_L = 0x06A0; +UCB1I2CSA_H = 0x06A1; +UCB1IE = 0x06AA; +UCB1IE_L = 0x06AA; +UCB1IE_H = 0x06AB; +UCB1IFG = 0x06AC; +UCB1IFG_L = 0x06AC; +UCB1IFG_H = 0x06AD; +UCB1IV = 0x06AE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fw423.cmd b/msp430/msp430fw423.cmd new file mode 100644 index 00000000..302cdb60 --- /dev/null +++ b/msp430/msp430fw423.cmd @@ -0,0 +1,232 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fw423.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A5 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1CCTL3 = 0x0188; +TA1CCTL4 = 0x018A; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +TA1CCR3 = 0x0198; +TA1CCR4 = 0x019A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Scan-I/F +************************************************************/ +SIFDEBUG = 0x01B0; +SIFCNT = 0x01B2; +SIFPSMV = 0x01B4; +SIFCTL1 = 0x01B6; +SIFCTL2 = 0x01B8; +SIFCTL3 = 0x01BA; +SIFCTL4 = 0x01BC; +SIFCTL5 = 0x01BE; +SIFDACR0 = 0x01C0; +SIFDACR1 = 0x01C2; +SIFDACR2 = 0x01C4; +SIFDACR3 = 0x01C6; +SIFDACR4 = 0x01C8; +SIFDACR5 = 0x01CA; +SIFDACR6 = 0x01CC; +SIFDACR7 = 0x01CE; +SIFTSM0 = 0x01D0; +SIFTSM1 = 0x01D2; +SIFTSM2 = 0x01D4; +SIFTSM3 = 0x01D6; +SIFTSM4 = 0x01D8; +SIFTSM5 = 0x01DA; +SIFTSM6 = 0x01DC; +SIFTSM7 = 0x01DE; +SIFTSM8 = 0x01E0; +SIFTSM9 = 0x01E2; +SIFTSM10 = 0x01E4; +SIFTSM11 = 0x01E6; +SIFTSM12 = 0x01E8; +SIFTSM13 = 0x01EA; +SIFTSM14 = 0x01EC; +SIFTSM15 = 0x01EE; +SIFTSM16 = 0x01F0; +SIFTSM17 = 0x01F2; +SIFTSM18 = 0x01F4; +SIFTSM19 = 0x01F6; +SIFTSM20 = 0x01F8; +SIFTSM21 = 0x01FA; +SIFTSM22 = 0x01FC; +SIFTSM23 = 0x01FE; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fw425.cmd b/msp430/msp430fw425.cmd new file mode 100644 index 00000000..f5a07e90 --- /dev/null +++ b/msp430/msp430fw425.cmd @@ -0,0 +1,232 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fw425.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A5 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1CCTL3 = 0x0188; +TA1CCTL4 = 0x018A; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +TA1CCR3 = 0x0198; +TA1CCR4 = 0x019A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Scan-I/F +************************************************************/ +SIFDEBUG = 0x01B0; +SIFCNT = 0x01B2; +SIFPSMV = 0x01B4; +SIFCTL1 = 0x01B6; +SIFCTL2 = 0x01B8; +SIFCTL3 = 0x01BA; +SIFCTL4 = 0x01BC; +SIFCTL5 = 0x01BE; +SIFDACR0 = 0x01C0; +SIFDACR1 = 0x01C2; +SIFDACR2 = 0x01C4; +SIFDACR3 = 0x01C6; +SIFDACR4 = 0x01C8; +SIFDACR5 = 0x01CA; +SIFDACR6 = 0x01CC; +SIFDACR7 = 0x01CE; +SIFTSM0 = 0x01D0; +SIFTSM1 = 0x01D2; +SIFTSM2 = 0x01D4; +SIFTSM3 = 0x01D6; +SIFTSM4 = 0x01D8; +SIFTSM5 = 0x01DA; +SIFTSM6 = 0x01DC; +SIFTSM7 = 0x01DE; +SIFTSM8 = 0x01E0; +SIFTSM9 = 0x01E2; +SIFTSM10 = 0x01E4; +SIFTSM11 = 0x01E6; +SIFTSM12 = 0x01E8; +SIFTSM13 = 0x01EA; +SIFTSM14 = 0x01EC; +SIFTSM15 = 0x01EE; +SIFTSM16 = 0x01F0; +SIFTSM17 = 0x01F2; +SIFTSM18 = 0x01F4; +SIFTSM19 = 0x01F6; +SIFTSM20 = 0x01F8; +SIFTSM21 = 0x01FA; +SIFTSM22 = 0x01FC; +SIFTSM23 = 0x01FE; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fw427.cmd b/msp430/msp430fw427.cmd new file mode 100644 index 00000000..7ad6be7c --- /dev/null +++ b/msp430/msp430fw427.cmd @@ -0,0 +1,232 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fw427.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A5 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1CCTL3 = 0x0188; +TA1CCTL4 = 0x018A; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +TA1CCR3 = 0x0198; +TA1CCR4 = 0x019A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Scan-I/F +************************************************************/ +SIFDEBUG = 0x01B0; +SIFCNT = 0x01B2; +SIFPSMV = 0x01B4; +SIFCTL1 = 0x01B6; +SIFCTL2 = 0x01B8; +SIFCTL3 = 0x01BA; +SIFCTL4 = 0x01BC; +SIFCTL5 = 0x01BE; +SIFDACR0 = 0x01C0; +SIFDACR1 = 0x01C2; +SIFDACR2 = 0x01C4; +SIFDACR3 = 0x01C6; +SIFDACR4 = 0x01C8; +SIFDACR5 = 0x01CA; +SIFDACR6 = 0x01CC; +SIFDACR7 = 0x01CE; +SIFTSM0 = 0x01D0; +SIFTSM1 = 0x01D2; +SIFTSM2 = 0x01D4; +SIFTSM3 = 0x01D6; +SIFTSM4 = 0x01D8; +SIFTSM5 = 0x01DA; +SIFTSM6 = 0x01DC; +SIFTSM7 = 0x01DE; +SIFTSM8 = 0x01E0; +SIFTSM9 = 0x01E2; +SIFTSM10 = 0x01E4; +SIFTSM11 = 0x01E6; +SIFTSM12 = 0x01E8; +SIFTSM13 = 0x01EA; +SIFTSM14 = 0x01EC; +SIFTSM15 = 0x01EE; +SIFTSM16 = 0x01F0; +SIFTSM17 = 0x01F2; +SIFTSM18 = 0x01F4; +SIFTSM19 = 0x01F6; +SIFTSM20 = 0x01F8; +SIFTSM21 = 0x01FA; +SIFTSM22 = 0x01FC; +SIFTSM23 = 0x01FE; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fw428.cmd b/msp430/msp430fw428.cmd new file mode 100644 index 00000000..ebd00891 --- /dev/null +++ b/msp430/msp430fw428.cmd @@ -0,0 +1,232 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fw428.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A5 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1CCTL3 = 0x0188; +TA1CCTL4 = 0x018A; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +TA1CCR3 = 0x0198; +TA1CCR4 = 0x019A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Scan-I/F +************************************************************/ +SIFDEBUG = 0x01B0; +SIFCNT = 0x01B2; +SIFPSMV = 0x01B4; +SIFCTL1 = 0x01B6; +SIFCTL2 = 0x01B8; +SIFCTL3 = 0x01BA; +SIFCTL4 = 0x01BC; +SIFCTL5 = 0x01BE; +SIFDACR0 = 0x01C0; +SIFDACR1 = 0x01C2; +SIFDACR2 = 0x01C4; +SIFDACR3 = 0x01C6; +SIFDACR4 = 0x01C8; +SIFDACR5 = 0x01CA; +SIFDACR6 = 0x01CC; +SIFDACR7 = 0x01CE; +SIFTSM0 = 0x01D0; +SIFTSM1 = 0x01D2; +SIFTSM2 = 0x01D4; +SIFTSM3 = 0x01D6; +SIFTSM4 = 0x01D8; +SIFTSM5 = 0x01DA; +SIFTSM6 = 0x01DC; +SIFTSM7 = 0x01DE; +SIFTSM8 = 0x01E0; +SIFTSM9 = 0x01E2; +SIFTSM10 = 0x01E4; +SIFTSM11 = 0x01E6; +SIFTSM12 = 0x01E8; +SIFTSM13 = 0x01EA; +SIFTSM14 = 0x01EC; +SIFTSM15 = 0x01EE; +SIFTSM16 = 0x01F0; +SIFTSM17 = 0x01F2; +SIFTSM18 = 0x01F4; +SIFTSM19 = 0x01F6; +SIFTSM20 = 0x01F8; +SIFTSM21 = 0x01FA; +SIFTSM22 = 0x01FC; +SIFTSM23 = 0x01FE; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430fw429.cmd b/msp430/msp430fw429.cmd new file mode 100644 index 00000000..590340f0 --- /dev/null +++ b/msp430/msp430fw429.cmd @@ -0,0 +1,232 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fw429.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A5 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1CCTL3 = 0x0188; +TA1CCTL4 = 0x018A; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +TA1CCR3 = 0x0198; +TA1CCR4 = 0x019A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Scan-I/F +************************************************************/ +SIFDEBUG = 0x01B0; +SIFCNT = 0x01B2; +SIFPSMV = 0x01B4; +SIFCTL1 = 0x01B6; +SIFCTL2 = 0x01B8; +SIFCTL3 = 0x01BA; +SIFCTL4 = 0x01BC; +SIFCTL5 = 0x01BE; +SIFDACR0 = 0x01C0; +SIFDACR1 = 0x01C2; +SIFDACR2 = 0x01C4; +SIFDACR3 = 0x01C6; +SIFDACR4 = 0x01C8; +SIFDACR5 = 0x01CA; +SIFDACR6 = 0x01CC; +SIFDACR7 = 0x01CE; +SIFTSM0 = 0x01D0; +SIFTSM1 = 0x01D2; +SIFTSM2 = 0x01D4; +SIFTSM3 = 0x01D6; +SIFTSM4 = 0x01D8; +SIFTSM5 = 0x01DA; +SIFTSM6 = 0x01DC; +SIFTSM7 = 0x01DE; +SIFTSM8 = 0x01E0; +SIFTSM9 = 0x01E2; +SIFTSM10 = 0x01E4; +SIFTSM11 = 0x01E6; +SIFTSM12 = 0x01E8; +SIFTSM13 = 0x01EA; +SIFTSM14 = 0x01EC; +SIFTSM15 = 0x01EE; +SIFTSM16 = 0x01F0; +SIFTSM17 = 0x01F2; +SIFTSM18 = 0x01F4; +SIFTSM19 = 0x01F6; +SIFTSM20 = 0x01F8; +SIFTSM21 = 0x01FA; +SIFTSM22 = 0x01FC; +SIFTSM23 = 0x01FE; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2001.cmd b/msp430/msp430g2001.cmd new file mode 100644 index 00000000..d413a0c3 --- /dev/null +++ b/msp430/msp430g2001.cmd @@ -0,0 +1,113 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2001.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* Timer A2 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2101.cmd b/msp430/msp430g2101.cmd new file mode 100644 index 00000000..97b79bb8 --- /dev/null +++ b/msp430/msp430g2101.cmd @@ -0,0 +1,113 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2101.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* Timer A2 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2102.cmd b/msp430/msp430g2102.cmd new file mode 100644 index 00000000..d49435f8 --- /dev/null +++ b/msp430/msp430g2102.cmd @@ -0,0 +1,143 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2102.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2111.cmd b/msp430/msp430g2111.cmd new file mode 100644 index 00000000..6cdfbcfc --- /dev/null +++ b/msp430/msp430g2111.cmd @@ -0,0 +1,119 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2111.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* Timer A2 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2112.cmd b/msp430/msp430g2112.cmd new file mode 100644 index 00000000..3acfd453 --- /dev/null +++ b/msp430/msp430g2112.cmd @@ -0,0 +1,149 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2112.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2113.cmd b/msp430/msp430g2113.cmd new file mode 100644 index 00000000..f6638f6a --- /dev/null +++ b/msp430/msp430g2113.cmd @@ -0,0 +1,184 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2113.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3SEL2 = 0x0043; +P3REN = 0x0010; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2121.cmd b/msp430/msp430g2121.cmd new file mode 100644 index 00000000..23ff08d7 --- /dev/null +++ b/msp430/msp430g2121.cmd @@ -0,0 +1,125 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2121.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* Timer A2 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2131.cmd b/msp430/msp430g2131.cmd new file mode 100644 index 00000000..d2c6ea9b --- /dev/null +++ b/msp430/msp430g2131.cmd @@ -0,0 +1,135 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2131.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* Timer A2 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2132.cmd b/msp430/msp430g2132.cmd new file mode 100644 index 00000000..239e2523 --- /dev/null +++ b/msp430/msp430g2132.cmd @@ -0,0 +1,153 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2132.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2152.cmd b/msp430/msp430g2152.cmd new file mode 100644 index 00000000..e57c3b49 --- /dev/null +++ b/msp430/msp430g2152.cmd @@ -0,0 +1,159 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2152.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2153.cmd b/msp430/msp430g2153.cmd new file mode 100644 index 00000000..40f4f1cd --- /dev/null +++ b/msp430/msp430g2153.cmd @@ -0,0 +1,194 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2153.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3SEL2 = 0x0043; +P3REN = 0x0010; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2201.cmd b/msp430/msp430g2201.cmd new file mode 100644 index 00000000..f44e2668 --- /dev/null +++ b/msp430/msp430g2201.cmd @@ -0,0 +1,113 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2201.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* Timer A2 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2202.cmd b/msp430/msp430g2202.cmd new file mode 100644 index 00000000..442fafb0 --- /dev/null +++ b/msp430/msp430g2202.cmd @@ -0,0 +1,143 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2202.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2203.cmd b/msp430/msp430g2203.cmd new file mode 100644 index 00000000..88e76509 --- /dev/null +++ b/msp430/msp430g2203.cmd @@ -0,0 +1,178 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2203.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3SEL2 = 0x0043; +P3REN = 0x0010; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2210.cmd b/msp430/msp430g2210.cmd new file mode 100644 index 00000000..b043fae5 --- /dev/null +++ b/msp430/msp430g2210.cmd @@ -0,0 +1,125 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2210.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* Timer A2 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2211.cmd b/msp430/msp430g2211.cmd new file mode 100644 index 00000000..6d2b200c --- /dev/null +++ b/msp430/msp430g2211.cmd @@ -0,0 +1,119 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2211.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* Timer A2 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2212.cmd b/msp430/msp430g2212.cmd new file mode 100644 index 00000000..5e8d42dc --- /dev/null +++ b/msp430/msp430g2212.cmd @@ -0,0 +1,149 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2212.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2213.cmd b/msp430/msp430g2213.cmd new file mode 100644 index 00000000..780b686b --- /dev/null +++ b/msp430/msp430g2213.cmd @@ -0,0 +1,184 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2213.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3SEL2 = 0x0043; +P3REN = 0x0010; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2221.cmd b/msp430/msp430g2221.cmd new file mode 100644 index 00000000..f43b7843 --- /dev/null +++ b/msp430/msp430g2221.cmd @@ -0,0 +1,125 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2221.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* Timer A2 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2230.cmd b/msp430/msp430g2230.cmd new file mode 100644 index 00000000..04d3d60c --- /dev/null +++ b/msp430/msp430g2230.cmd @@ -0,0 +1,141 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2230.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* Timer A2 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2231.cmd b/msp430/msp430g2231.cmd new file mode 100644 index 00000000..41a1a83a --- /dev/null +++ b/msp430/msp430g2231.cmd @@ -0,0 +1,135 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2231.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* Timer A2 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2232.cmd b/msp430/msp430g2232.cmd new file mode 100644 index 00000000..ecd88224 --- /dev/null +++ b/msp430/msp430g2232.cmd @@ -0,0 +1,153 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2232.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2233.cmd b/msp430/msp430g2233.cmd new file mode 100644 index 00000000..318740aa --- /dev/null +++ b/msp430/msp430g2233.cmd @@ -0,0 +1,188 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2233.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3SEL2 = 0x0043; +P3REN = 0x0010; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2252.cmd b/msp430/msp430g2252.cmd new file mode 100644 index 00000000..83a3bc01 --- /dev/null +++ b/msp430/msp430g2252.cmd @@ -0,0 +1,159 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2252.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2253.cmd b/msp430/msp430g2253.cmd new file mode 100644 index 00000000..bfa7f753 --- /dev/null +++ b/msp430/msp430g2253.cmd @@ -0,0 +1,194 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2253.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3SEL2 = 0x0043; +P3REN = 0x0010; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2302.cmd b/msp430/msp430g2302.cmd new file mode 100644 index 00000000..233a10e3 --- /dev/null +++ b/msp430/msp430g2302.cmd @@ -0,0 +1,143 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2302.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2303.cmd b/msp430/msp430g2303.cmd new file mode 100644 index 00000000..b8d8f934 --- /dev/null +++ b/msp430/msp430g2303.cmd @@ -0,0 +1,178 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2303.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3SEL2 = 0x0043; +P3REN = 0x0010; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2312.cmd b/msp430/msp430g2312.cmd new file mode 100644 index 00000000..4db7bd55 --- /dev/null +++ b/msp430/msp430g2312.cmd @@ -0,0 +1,149 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2312.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2313.cmd b/msp430/msp430g2313.cmd new file mode 100644 index 00000000..0ae8d239 --- /dev/null +++ b/msp430/msp430g2313.cmd @@ -0,0 +1,184 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2313.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3SEL2 = 0x0043; +P3REN = 0x0010; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2332.cmd b/msp430/msp430g2332.cmd new file mode 100644 index 00000000..1c13144a --- /dev/null +++ b/msp430/msp430g2332.cmd @@ -0,0 +1,153 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2332.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2333.cmd b/msp430/msp430g2333.cmd new file mode 100644 index 00000000..1925f9a4 --- /dev/null +++ b/msp430/msp430g2333.cmd @@ -0,0 +1,188 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2333.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3SEL2 = 0x0043; +P3REN = 0x0010; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2352.cmd b/msp430/msp430g2352.cmd new file mode 100644 index 00000000..dc4ddfc0 --- /dev/null +++ b/msp430/msp430g2352.cmd @@ -0,0 +1,159 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2352.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2353.cmd b/msp430/msp430g2353.cmd new file mode 100644 index 00000000..f8549939 --- /dev/null +++ b/msp430/msp430g2353.cmd @@ -0,0 +1,194 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2353.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3SEL2 = 0x0043; +P3REN = 0x0010; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2402.cmd b/msp430/msp430g2402.cmd new file mode 100644 index 00000000..b59484e3 --- /dev/null +++ b/msp430/msp430g2402.cmd @@ -0,0 +1,143 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2402.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2403.cmd b/msp430/msp430g2403.cmd new file mode 100644 index 00000000..b35a5ccb --- /dev/null +++ b/msp430/msp430g2403.cmd @@ -0,0 +1,178 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2403.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3SEL2 = 0x0043; +P3REN = 0x0010; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2412.cmd b/msp430/msp430g2412.cmd new file mode 100644 index 00000000..349deb19 --- /dev/null +++ b/msp430/msp430g2412.cmd @@ -0,0 +1,149 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2412.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2413.cmd b/msp430/msp430g2413.cmd new file mode 100644 index 00000000..b665e5e4 --- /dev/null +++ b/msp430/msp430g2413.cmd @@ -0,0 +1,184 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2413.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3SEL2 = 0x0043; +P3REN = 0x0010; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2432.cmd b/msp430/msp430g2432.cmd new file mode 100644 index 00000000..3420dfe5 --- /dev/null +++ b/msp430/msp430g2432.cmd @@ -0,0 +1,153 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2432.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2433.cmd b/msp430/msp430g2433.cmd new file mode 100644 index 00000000..d02fab7f --- /dev/null +++ b/msp430/msp430g2433.cmd @@ -0,0 +1,188 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2433.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3SEL2 = 0x0043; +P3REN = 0x0010; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2444.cmd b/msp430/msp430g2444.cmd new file mode 100644 index 00000000..f9938eee --- /dev/null +++ b/msp430/msp430g2444.cmd @@ -0,0 +1,183 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2444.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10AE1 = 0x004B; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2452.cmd b/msp430/msp430g2452.cmd new file mode 100644 index 00000000..dc6e4bc1 --- /dev/null +++ b/msp430/msp430g2452.cmd @@ -0,0 +1,159 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2452.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2453.cmd b/msp430/msp430g2453.cmd new file mode 100644 index 00000000..546c9354 --- /dev/null +++ b/msp430/msp430g2453.cmd @@ -0,0 +1,194 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2453.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3SEL2 = 0x0043; +P3REN = 0x0010; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2513.cmd b/msp430/msp430g2513.cmd new file mode 100644 index 00000000..84026ccf --- /dev/null +++ b/msp430/msp430g2513.cmd @@ -0,0 +1,184 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2513.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3SEL2 = 0x0043; +P3REN = 0x0010; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2533.cmd b/msp430/msp430g2533.cmd new file mode 100644 index 00000000..00b8347e --- /dev/null +++ b/msp430/msp430g2533.cmd @@ -0,0 +1,188 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2533.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3SEL2 = 0x0043; +P3REN = 0x0010; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2544.cmd b/msp430/msp430g2544.cmd new file mode 100644 index 00000000..3c505ead --- /dev/null +++ b/msp430/msp430g2544.cmd @@ -0,0 +1,183 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2544.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10AE1 = 0x004B; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2553.cmd b/msp430/msp430g2553.cmd new file mode 100644 index 00000000..5fe05624 --- /dev/null +++ b/msp430/msp430g2553.cmd @@ -0,0 +1,194 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2553.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3SEL2 = 0x0043; +P3REN = 0x0010; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2744.cmd b/msp430/msp430g2744.cmd new file mode 100644 index 00000000..acb0241d --- /dev/null +++ b/msp430/msp430g2744.cmd @@ -0,0 +1,183 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2744.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10AE1 = 0x004B; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2755.cmd b/msp430/msp430g2755.cmd new file mode 100644 index 00000000..c89b568e --- /dev/null +++ b/msp430/msp430g2755.cmd @@ -0,0 +1,213 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2755.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10AE1 = 0x004B; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3SEL2 = 0x0043; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4SEL2 = 0x0044; +P4REN = 0x0011; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011C; +TA1CTL = 0x0140; +TA1CCTL0 = 0x0142; +TA1CCTL1 = 0x0144; +TA1CCTL2 = 0x0146; +TA1R = 0x0150; +TA1CCR0 = 0x0152; +TA1CCR1 = 0x0154; +TA1CCR2 = 0x0156; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2855.cmd b/msp430/msp430g2855.cmd new file mode 100644 index 00000000..b208988d --- /dev/null +++ b/msp430/msp430g2855.cmd @@ -0,0 +1,213 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2855.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10AE1 = 0x004B; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3SEL2 = 0x0043; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4SEL2 = 0x0044; +P4REN = 0x0011; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011C; +TA1CTL = 0x0140; +TA1CCTL0 = 0x0142; +TA1CCTL1 = 0x0144; +TA1CCTL2 = 0x0146; +TA1R = 0x0150; +TA1CCR0 = 0x0152; +TA1CCR1 = 0x0154; +TA1CCR2 = 0x0156; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430g2955.cmd b/msp430/msp430g2955.cmd new file mode 100644 index 00000000..8f3e9d48 --- /dev/null +++ b/msp430/msp430g2955.cmd @@ -0,0 +1,213 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430g2955.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10AE1 = 0x004B; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3SEL2 = 0x0043; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4SEL2 = 0x0044; +P4REN = 0x0011; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011C; +TA1CTL = 0x0140; +TA1CCTL0 = 0x0142; +TA1CCTL1 = 0x0144; +TA1CCTL2 = 0x0146; +TA1R = 0x0150; +TA1CCR0 = 0x0152; +TA1CCR1 = 0x0154; +TA1CCR2 = 0x0156; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430i2020.cmd b/msp430/msp430i2020.cmd new file mode 100644 index 00000000..d979fa2e --- /dev/null +++ b/msp430/msp430i2020.cmd @@ -0,0 +1,255 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430i2020.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +SYSJTAGDIS = 0x01FE; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0050; +CSCTL1 = 0x0051; +CSIRFCAL = 0x0052; +CSIRTCAL = 0x0053; +CSERFCAL = 0x0054; +CSERTCAL = 0x0055; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* PMM - Power Management System +************************************************************/ +LPM45CTL = 0x0060; +VMONCTL = 0x0061; +REFCAL0 = 0x0062; +REFCAL1 = 0x0063; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +PAIN = 0x0010; +PAIN_L = 0x0010; +PAIN_H = 0x0011; +PAOUT = 0x0012; +PAOUT_L = 0x0012; +PAOUT_H = 0x0013; +PADIR = 0x0014; +PADIR_L = 0x0014; +PADIR_H = 0x0015; +PASEL0 = 0x001A; +PASEL0_L = 0x001A; +PASEL0_H = 0x001B; +PASEL1 = 0x001C; +PASEL1_L = 0x001C; +PASEL1_H = 0x001D; +PAIES = 0x0028; +PAIES_L = 0x0028; +PAIES_H = 0x0029; +PAIE = 0x002A; +PAIE_L = 0x002A; +PAIE_H = 0x002B; +PAIFG = 0x002C; +PAIFG_L = 0x002C; +PAIFG_H = 0x002D; +P1IV = 0x001E; +P2IV = 0x002E; +/************************************************************ +* SD24_2 - Sigma Delta 24 Bit +************************************************************/ +SD24INCTL0 = 0x00B0; +SD24INCTL1 = 0x00B1; +SD24PRE0 = 0x00B8; +SD24PRE1 = 0x00B9; +SD24TRIM = 0x00BF; +SD24CTL = 0x0100; +SD24CCTL0 = 0x0102; +SD24CCTL1 = 0x0104; +SD24MEM0 = 0x0110; +SD24MEM1 = 0x0112; +SD24IV = 0x01F0; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x0140; +UCA0CTLW0_L = 0x0140; +UCA0CTLW0_H = 0x0141; +UCA0CTLW1 = 0x0142; +UCA0CTLW1_L = 0x0142; +UCA0CTLW1_H = 0x0143; +UCA0BRW = 0x0146; +UCA0BRW_L = 0x0146; +UCA0BRW_H = 0x0147; +UCA0MCTLW = 0x0148; +UCA0MCTLW_L = 0x0148; +UCA0MCTLW_H = 0x0149; +UCA0STATW = 0x014A; +UCA0RXBUF = 0x014C; +UCA0RXBUF_L = 0x014C; +UCA0RXBUF_H = 0x014D; +UCA0TXBUF = 0x014E; +UCA0TXBUF_L = 0x014E; +UCA0TXBUF_H = 0x014F; +UCA0ABCTL = 0x0150; +UCA0IRCTL = 0x0152; +UCA0IRCTL_L = 0x0152; +UCA0IRCTL_H = 0x0153; +UCA0IE = 0x015A; +UCA0IE_L = 0x015A; +UCA0IE_H = 0x015B; +UCA0IFG = 0x015C; +UCA0IFG_L = 0x015C; +UCA0IFG_H = 0x015D; +UCA0IV = 0x015E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x01C0; +UCB0CTLW0_L = 0x01C0; +UCB0CTLW0_H = 0x01C1; +UCB0CTLW1 = 0x01C2; +UCB0CTLW1_L = 0x01C2; +UCB0CTLW1_H = 0x01C3; +UCB0BRW = 0x01C6; +UCB0BRW_L = 0x01C6; +UCB0BRW_H = 0x01C7; +UCB0STATW = 0x01C8; +UCB0STATW_L = 0x01C8; +UCB0STATW_H = 0x01C9; +UCB0TBCNT = 0x01CA; +UCB0TBCNT_L = 0x01CA; +UCB0TBCNT_H = 0x01CB; +UCB0RXBUF = 0x01CC; +UCB0RXBUF_L = 0x01CC; +UCB0RXBUF_H = 0x01CD; +UCB0TXBUF = 0x01CE; +UCB0TXBUF_L = 0x01CE; +UCB0TXBUF_H = 0x01CF; +UCB0I2COA0 = 0x01D4; +UCB0I2COA0_L = 0x01D4; +UCB0I2COA0_H = 0x01D5; +UCB0I2COA1 = 0x01D6; +UCB0I2COA1_L = 0x01D6; +UCB0I2COA1_H = 0x01D7; +UCB0I2COA2 = 0x01D8; +UCB0I2COA2_L = 0x01D8; +UCB0I2COA2_H = 0x01D9; +UCB0I2COA3 = 0x01DA; +UCB0I2COA3_L = 0x01DA; +UCB0I2COA3_H = 0x01DB; +UCB0ADDRX = 0x01DC; +UCB0ADDRX_L = 0x01DC; +UCB0ADDRX_H = 0x01DD; +UCB0ADDMASK = 0x01DE; +UCB0ADDMASK_L = 0x01DE; +UCB0ADDMASK_H = 0x01DF; +UCB0I2CSA = 0x01E0; +UCB0I2CSA_L = 0x01E0; +UCB0I2CSA_H = 0x01E1; +UCB0IE = 0x01EA; +UCB0IE_L = 0x01EA; +UCB0IE_H = 0x01EB; +UCB0IFG = 0x01EC; +UCB0IFG_L = 0x01EC; +UCB0IFG_H = 0x01ED; +UCB0IV = 0x01EE; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430i2021.cmd b/msp430/msp430i2021.cmd new file mode 100644 index 00000000..6f2776eb --- /dev/null +++ b/msp430/msp430i2021.cmd @@ -0,0 +1,255 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430i2021.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +SYSJTAGDIS = 0x01FE; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0050; +CSCTL1 = 0x0051; +CSIRFCAL = 0x0052; +CSIRTCAL = 0x0053; +CSERFCAL = 0x0054; +CSERTCAL = 0x0055; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* PMM - Power Management System +************************************************************/ +LPM45CTL = 0x0060; +VMONCTL = 0x0061; +REFCAL0 = 0x0062; +REFCAL1 = 0x0063; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +PAIN = 0x0010; +PAIN_L = 0x0010; +PAIN_H = 0x0011; +PAOUT = 0x0012; +PAOUT_L = 0x0012; +PAOUT_H = 0x0013; +PADIR = 0x0014; +PADIR_L = 0x0014; +PADIR_H = 0x0015; +PASEL0 = 0x001A; +PASEL0_L = 0x001A; +PASEL0_H = 0x001B; +PASEL1 = 0x001C; +PASEL1_L = 0x001C; +PASEL1_H = 0x001D; +PAIES = 0x0028; +PAIES_L = 0x0028; +PAIES_H = 0x0029; +PAIE = 0x002A; +PAIE_L = 0x002A; +PAIE_H = 0x002B; +PAIFG = 0x002C; +PAIFG_L = 0x002C; +PAIFG_H = 0x002D; +P1IV = 0x001E; +P2IV = 0x002E; +/************************************************************ +* SD24_2 - Sigma Delta 24 Bit +************************************************************/ +SD24INCTL0 = 0x00B0; +SD24INCTL1 = 0x00B1; +SD24PRE0 = 0x00B8; +SD24PRE1 = 0x00B9; +SD24TRIM = 0x00BF; +SD24CTL = 0x0100; +SD24CCTL0 = 0x0102; +SD24CCTL1 = 0x0104; +SD24MEM0 = 0x0110; +SD24MEM1 = 0x0112; +SD24IV = 0x01F0; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x0140; +UCA0CTLW0_L = 0x0140; +UCA0CTLW0_H = 0x0141; +UCA0CTLW1 = 0x0142; +UCA0CTLW1_L = 0x0142; +UCA0CTLW1_H = 0x0143; +UCA0BRW = 0x0146; +UCA0BRW_L = 0x0146; +UCA0BRW_H = 0x0147; +UCA0MCTLW = 0x0148; +UCA0MCTLW_L = 0x0148; +UCA0MCTLW_H = 0x0149; +UCA0STATW = 0x014A; +UCA0RXBUF = 0x014C; +UCA0RXBUF_L = 0x014C; +UCA0RXBUF_H = 0x014D; +UCA0TXBUF = 0x014E; +UCA0TXBUF_L = 0x014E; +UCA0TXBUF_H = 0x014F; +UCA0ABCTL = 0x0150; +UCA0IRCTL = 0x0152; +UCA0IRCTL_L = 0x0152; +UCA0IRCTL_H = 0x0153; +UCA0IE = 0x015A; +UCA0IE_L = 0x015A; +UCA0IE_H = 0x015B; +UCA0IFG = 0x015C; +UCA0IFG_L = 0x015C; +UCA0IFG_H = 0x015D; +UCA0IV = 0x015E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x01C0; +UCB0CTLW0_L = 0x01C0; +UCB0CTLW0_H = 0x01C1; +UCB0CTLW1 = 0x01C2; +UCB0CTLW1_L = 0x01C2; +UCB0CTLW1_H = 0x01C3; +UCB0BRW = 0x01C6; +UCB0BRW_L = 0x01C6; +UCB0BRW_H = 0x01C7; +UCB0STATW = 0x01C8; +UCB0STATW_L = 0x01C8; +UCB0STATW_H = 0x01C9; +UCB0TBCNT = 0x01CA; +UCB0TBCNT_L = 0x01CA; +UCB0TBCNT_H = 0x01CB; +UCB0RXBUF = 0x01CC; +UCB0RXBUF_L = 0x01CC; +UCB0RXBUF_H = 0x01CD; +UCB0TXBUF = 0x01CE; +UCB0TXBUF_L = 0x01CE; +UCB0TXBUF_H = 0x01CF; +UCB0I2COA0 = 0x01D4; +UCB0I2COA0_L = 0x01D4; +UCB0I2COA0_H = 0x01D5; +UCB0I2COA1 = 0x01D6; +UCB0I2COA1_L = 0x01D6; +UCB0I2COA1_H = 0x01D7; +UCB0I2COA2 = 0x01D8; +UCB0I2COA2_L = 0x01D8; +UCB0I2COA2_H = 0x01D9; +UCB0I2COA3 = 0x01DA; +UCB0I2COA3_L = 0x01DA; +UCB0I2COA3_H = 0x01DB; +UCB0ADDRX = 0x01DC; +UCB0ADDRX_L = 0x01DC; +UCB0ADDRX_H = 0x01DD; +UCB0ADDMASK = 0x01DE; +UCB0ADDMASK_L = 0x01DE; +UCB0ADDMASK_H = 0x01DF; +UCB0I2CSA = 0x01E0; +UCB0I2CSA_L = 0x01E0; +UCB0I2CSA_H = 0x01E1; +UCB0IE = 0x01EA; +UCB0IE_L = 0x01EA; +UCB0IE_H = 0x01EB; +UCB0IFG = 0x01EC; +UCB0IFG_L = 0x01EC; +UCB0IFG_H = 0x01ED; +UCB0IV = 0x01EE; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430i2030.cmd b/msp430/msp430i2030.cmd new file mode 100644 index 00000000..42ead4be --- /dev/null +++ b/msp430/msp430i2030.cmd @@ -0,0 +1,259 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430i2030.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +SYSJTAGDIS = 0x01FE; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0050; +CSCTL1 = 0x0051; +CSIRFCAL = 0x0052; +CSIRTCAL = 0x0053; +CSERFCAL = 0x0054; +CSERTCAL = 0x0055; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* PMM - Power Management System +************************************************************/ +LPM45CTL = 0x0060; +VMONCTL = 0x0061; +REFCAL0 = 0x0062; +REFCAL1 = 0x0063; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +PAIN = 0x0010; +PAIN_L = 0x0010; +PAIN_H = 0x0011; +PAOUT = 0x0012; +PAOUT_L = 0x0012; +PAOUT_H = 0x0013; +PADIR = 0x0014; +PADIR_L = 0x0014; +PADIR_H = 0x0015; +PASEL0 = 0x001A; +PASEL0_L = 0x001A; +PASEL0_H = 0x001B; +PASEL1 = 0x001C; +PASEL1_L = 0x001C; +PASEL1_H = 0x001D; +PAIES = 0x0028; +PAIES_L = 0x0028; +PAIES_H = 0x0029; +PAIE = 0x002A; +PAIE_L = 0x002A; +PAIE_H = 0x002B; +PAIFG = 0x002C; +PAIFG_L = 0x002C; +PAIFG_H = 0x002D; +P1IV = 0x001E; +P2IV = 0x002E; +/************************************************************ +* SD24_3 - Sigma Delta 24 Bit +************************************************************/ +SD24INCTL0 = 0x00B0; +SD24INCTL1 = 0x00B1; +SD24INCTL2 = 0x00B2; +SD24PRE0 = 0x00B8; +SD24PRE1 = 0x00B9; +SD24PRE2 = 0x00BA; +SD24TRIM = 0x00BF; +SD24CTL = 0x0100; +SD24CCTL0 = 0x0102; +SD24CCTL1 = 0x0104; +SD24CCTL2 = 0x0106; +SD24MEM0 = 0x0110; +SD24MEM1 = 0x0112; +SD24MEM2 = 0x0114; +SD24IV = 0x01F0; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x0140; +UCA0CTLW0_L = 0x0140; +UCA0CTLW0_H = 0x0141; +UCA0CTLW1 = 0x0142; +UCA0CTLW1_L = 0x0142; +UCA0CTLW1_H = 0x0143; +UCA0BRW = 0x0146; +UCA0BRW_L = 0x0146; +UCA0BRW_H = 0x0147; +UCA0MCTLW = 0x0148; +UCA0MCTLW_L = 0x0148; +UCA0MCTLW_H = 0x0149; +UCA0STATW = 0x014A; +UCA0RXBUF = 0x014C; +UCA0RXBUF_L = 0x014C; +UCA0RXBUF_H = 0x014D; +UCA0TXBUF = 0x014E; +UCA0TXBUF_L = 0x014E; +UCA0TXBUF_H = 0x014F; +UCA0ABCTL = 0x0150; +UCA0IRCTL = 0x0152; +UCA0IRCTL_L = 0x0152; +UCA0IRCTL_H = 0x0153; +UCA0IE = 0x015A; +UCA0IE_L = 0x015A; +UCA0IE_H = 0x015B; +UCA0IFG = 0x015C; +UCA0IFG_L = 0x015C; +UCA0IFG_H = 0x015D; +UCA0IV = 0x015E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x01C0; +UCB0CTLW0_L = 0x01C0; +UCB0CTLW0_H = 0x01C1; +UCB0CTLW1 = 0x01C2; +UCB0CTLW1_L = 0x01C2; +UCB0CTLW1_H = 0x01C3; +UCB0BRW = 0x01C6; +UCB0BRW_L = 0x01C6; +UCB0BRW_H = 0x01C7; +UCB0STATW = 0x01C8; +UCB0STATW_L = 0x01C8; +UCB0STATW_H = 0x01C9; +UCB0TBCNT = 0x01CA; +UCB0TBCNT_L = 0x01CA; +UCB0TBCNT_H = 0x01CB; +UCB0RXBUF = 0x01CC; +UCB0RXBUF_L = 0x01CC; +UCB0RXBUF_H = 0x01CD; +UCB0TXBUF = 0x01CE; +UCB0TXBUF_L = 0x01CE; +UCB0TXBUF_H = 0x01CF; +UCB0I2COA0 = 0x01D4; +UCB0I2COA0_L = 0x01D4; +UCB0I2COA0_H = 0x01D5; +UCB0I2COA1 = 0x01D6; +UCB0I2COA1_L = 0x01D6; +UCB0I2COA1_H = 0x01D7; +UCB0I2COA2 = 0x01D8; +UCB0I2COA2_L = 0x01D8; +UCB0I2COA2_H = 0x01D9; +UCB0I2COA3 = 0x01DA; +UCB0I2COA3_L = 0x01DA; +UCB0I2COA3_H = 0x01DB; +UCB0ADDRX = 0x01DC; +UCB0ADDRX_L = 0x01DC; +UCB0ADDRX_H = 0x01DD; +UCB0ADDMASK = 0x01DE; +UCB0ADDMASK_L = 0x01DE; +UCB0ADDMASK_H = 0x01DF; +UCB0I2CSA = 0x01E0; +UCB0I2CSA_L = 0x01E0; +UCB0I2CSA_H = 0x01E1; +UCB0IE = 0x01EA; +UCB0IE_L = 0x01EA; +UCB0IE_H = 0x01EB; +UCB0IFG = 0x01EC; +UCB0IFG_L = 0x01EC; +UCB0IFG_H = 0x01ED; +UCB0IV = 0x01EE; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430i2031.cmd b/msp430/msp430i2031.cmd new file mode 100644 index 00000000..57fd5d27 --- /dev/null +++ b/msp430/msp430i2031.cmd @@ -0,0 +1,259 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430i2031.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +SYSJTAGDIS = 0x01FE; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0050; +CSCTL1 = 0x0051; +CSIRFCAL = 0x0052; +CSIRTCAL = 0x0053; +CSERFCAL = 0x0054; +CSERTCAL = 0x0055; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* PMM - Power Management System +************************************************************/ +LPM45CTL = 0x0060; +VMONCTL = 0x0061; +REFCAL0 = 0x0062; +REFCAL1 = 0x0063; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +PAIN = 0x0010; +PAIN_L = 0x0010; +PAIN_H = 0x0011; +PAOUT = 0x0012; +PAOUT_L = 0x0012; +PAOUT_H = 0x0013; +PADIR = 0x0014; +PADIR_L = 0x0014; +PADIR_H = 0x0015; +PASEL0 = 0x001A; +PASEL0_L = 0x001A; +PASEL0_H = 0x001B; +PASEL1 = 0x001C; +PASEL1_L = 0x001C; +PASEL1_H = 0x001D; +PAIES = 0x0028; +PAIES_L = 0x0028; +PAIES_H = 0x0029; +PAIE = 0x002A; +PAIE_L = 0x002A; +PAIE_H = 0x002B; +PAIFG = 0x002C; +PAIFG_L = 0x002C; +PAIFG_H = 0x002D; +P1IV = 0x001E; +P2IV = 0x002E; +/************************************************************ +* SD24_3 - Sigma Delta 24 Bit +************************************************************/ +SD24INCTL0 = 0x00B0; +SD24INCTL1 = 0x00B1; +SD24INCTL2 = 0x00B2; +SD24PRE0 = 0x00B8; +SD24PRE1 = 0x00B9; +SD24PRE2 = 0x00BA; +SD24TRIM = 0x00BF; +SD24CTL = 0x0100; +SD24CCTL0 = 0x0102; +SD24CCTL1 = 0x0104; +SD24CCTL2 = 0x0106; +SD24MEM0 = 0x0110; +SD24MEM1 = 0x0112; +SD24MEM2 = 0x0114; +SD24IV = 0x01F0; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x0140; +UCA0CTLW0_L = 0x0140; +UCA0CTLW0_H = 0x0141; +UCA0CTLW1 = 0x0142; +UCA0CTLW1_L = 0x0142; +UCA0CTLW1_H = 0x0143; +UCA0BRW = 0x0146; +UCA0BRW_L = 0x0146; +UCA0BRW_H = 0x0147; +UCA0MCTLW = 0x0148; +UCA0MCTLW_L = 0x0148; +UCA0MCTLW_H = 0x0149; +UCA0STATW = 0x014A; +UCA0RXBUF = 0x014C; +UCA0RXBUF_L = 0x014C; +UCA0RXBUF_H = 0x014D; +UCA0TXBUF = 0x014E; +UCA0TXBUF_L = 0x014E; +UCA0TXBUF_H = 0x014F; +UCA0ABCTL = 0x0150; +UCA0IRCTL = 0x0152; +UCA0IRCTL_L = 0x0152; +UCA0IRCTL_H = 0x0153; +UCA0IE = 0x015A; +UCA0IE_L = 0x015A; +UCA0IE_H = 0x015B; +UCA0IFG = 0x015C; +UCA0IFG_L = 0x015C; +UCA0IFG_H = 0x015D; +UCA0IV = 0x015E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x01C0; +UCB0CTLW0_L = 0x01C0; +UCB0CTLW0_H = 0x01C1; +UCB0CTLW1 = 0x01C2; +UCB0CTLW1_L = 0x01C2; +UCB0CTLW1_H = 0x01C3; +UCB0BRW = 0x01C6; +UCB0BRW_L = 0x01C6; +UCB0BRW_H = 0x01C7; +UCB0STATW = 0x01C8; +UCB0STATW_L = 0x01C8; +UCB0STATW_H = 0x01C9; +UCB0TBCNT = 0x01CA; +UCB0TBCNT_L = 0x01CA; +UCB0TBCNT_H = 0x01CB; +UCB0RXBUF = 0x01CC; +UCB0RXBUF_L = 0x01CC; +UCB0RXBUF_H = 0x01CD; +UCB0TXBUF = 0x01CE; +UCB0TXBUF_L = 0x01CE; +UCB0TXBUF_H = 0x01CF; +UCB0I2COA0 = 0x01D4; +UCB0I2COA0_L = 0x01D4; +UCB0I2COA0_H = 0x01D5; +UCB0I2COA1 = 0x01D6; +UCB0I2COA1_L = 0x01D6; +UCB0I2COA1_H = 0x01D7; +UCB0I2COA2 = 0x01D8; +UCB0I2COA2_L = 0x01D8; +UCB0I2COA2_H = 0x01D9; +UCB0I2COA3 = 0x01DA; +UCB0I2COA3_L = 0x01DA; +UCB0I2COA3_H = 0x01DB; +UCB0ADDRX = 0x01DC; +UCB0ADDRX_L = 0x01DC; +UCB0ADDRX_H = 0x01DD; +UCB0ADDMASK = 0x01DE; +UCB0ADDMASK_L = 0x01DE; +UCB0ADDMASK_H = 0x01DF; +UCB0I2CSA = 0x01E0; +UCB0I2CSA_L = 0x01E0; +UCB0I2CSA_H = 0x01E1; +UCB0IE = 0x01EA; +UCB0IE_L = 0x01EA; +UCB0IE_H = 0x01EB; +UCB0IFG = 0x01EC; +UCB0IFG_L = 0x01EC; +UCB0IFG_H = 0x01ED; +UCB0IV = 0x01EE; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430i2040.cmd b/msp430/msp430i2040.cmd new file mode 100644 index 00000000..92d3d4e4 --- /dev/null +++ b/msp430/msp430i2040.cmd @@ -0,0 +1,263 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430i2040.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +SYSJTAGDIS = 0x01FE; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0050; +CSCTL1 = 0x0051; +CSIRFCAL = 0x0052; +CSIRTCAL = 0x0053; +CSERFCAL = 0x0054; +CSERTCAL = 0x0055; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* PMM - Power Management System +************************************************************/ +LPM45CTL = 0x0060; +VMONCTL = 0x0061; +REFCAL0 = 0x0062; +REFCAL1 = 0x0063; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +PAIN = 0x0010; +PAIN_L = 0x0010; +PAIN_H = 0x0011; +PAOUT = 0x0012; +PAOUT_L = 0x0012; +PAOUT_H = 0x0013; +PADIR = 0x0014; +PADIR_L = 0x0014; +PADIR_H = 0x0015; +PASEL0 = 0x001A; +PASEL0_L = 0x001A; +PASEL0_H = 0x001B; +PASEL1 = 0x001C; +PASEL1_L = 0x001C; +PASEL1_H = 0x001D; +PAIES = 0x0028; +PAIES_L = 0x0028; +PAIES_H = 0x0029; +PAIE = 0x002A; +PAIE_L = 0x002A; +PAIE_H = 0x002B; +PAIFG = 0x002C; +PAIFG_L = 0x002C; +PAIFG_H = 0x002D; +P1IV = 0x001E; +P2IV = 0x002E; +/************************************************************ +* SD24_4 - Sigma Delta 24 Bit +************************************************************/ +SD24INCTL0 = 0x00B0; +SD24INCTL1 = 0x00B1; +SD24INCTL2 = 0x00B2; +SD24INCTL3 = 0x00B3; +SD24PRE0 = 0x00B8; +SD24PRE1 = 0x00B9; +SD24PRE2 = 0x00BA; +SD24PRE3 = 0x00BB; +SD24TRIM = 0x00BF; +SD24CTL = 0x0100; +SD24CCTL0 = 0x0102; +SD24CCTL1 = 0x0104; +SD24CCTL2 = 0x0106; +SD24CCTL3 = 0x0108; +SD24MEM0 = 0x0110; +SD24MEM1 = 0x0112; +SD24MEM2 = 0x0114; +SD24MEM3 = 0x0116; +SD24IV = 0x01F0; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x0140; +UCA0CTLW0_L = 0x0140; +UCA0CTLW0_H = 0x0141; +UCA0CTLW1 = 0x0142; +UCA0CTLW1_L = 0x0142; +UCA0CTLW1_H = 0x0143; +UCA0BRW = 0x0146; +UCA0BRW_L = 0x0146; +UCA0BRW_H = 0x0147; +UCA0MCTLW = 0x0148; +UCA0MCTLW_L = 0x0148; +UCA0MCTLW_H = 0x0149; +UCA0STATW = 0x014A; +UCA0RXBUF = 0x014C; +UCA0RXBUF_L = 0x014C; +UCA0RXBUF_H = 0x014D; +UCA0TXBUF = 0x014E; +UCA0TXBUF_L = 0x014E; +UCA0TXBUF_H = 0x014F; +UCA0ABCTL = 0x0150; +UCA0IRCTL = 0x0152; +UCA0IRCTL_L = 0x0152; +UCA0IRCTL_H = 0x0153; +UCA0IE = 0x015A; +UCA0IE_L = 0x015A; +UCA0IE_H = 0x015B; +UCA0IFG = 0x015C; +UCA0IFG_L = 0x015C; +UCA0IFG_H = 0x015D; +UCA0IV = 0x015E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x01C0; +UCB0CTLW0_L = 0x01C0; +UCB0CTLW0_H = 0x01C1; +UCB0CTLW1 = 0x01C2; +UCB0CTLW1_L = 0x01C2; +UCB0CTLW1_H = 0x01C3; +UCB0BRW = 0x01C6; +UCB0BRW_L = 0x01C6; +UCB0BRW_H = 0x01C7; +UCB0STATW = 0x01C8; +UCB0STATW_L = 0x01C8; +UCB0STATW_H = 0x01C9; +UCB0TBCNT = 0x01CA; +UCB0TBCNT_L = 0x01CA; +UCB0TBCNT_H = 0x01CB; +UCB0RXBUF = 0x01CC; +UCB0RXBUF_L = 0x01CC; +UCB0RXBUF_H = 0x01CD; +UCB0TXBUF = 0x01CE; +UCB0TXBUF_L = 0x01CE; +UCB0TXBUF_H = 0x01CF; +UCB0I2COA0 = 0x01D4; +UCB0I2COA0_L = 0x01D4; +UCB0I2COA0_H = 0x01D5; +UCB0I2COA1 = 0x01D6; +UCB0I2COA1_L = 0x01D6; +UCB0I2COA1_H = 0x01D7; +UCB0I2COA2 = 0x01D8; +UCB0I2COA2_L = 0x01D8; +UCB0I2COA2_H = 0x01D9; +UCB0I2COA3 = 0x01DA; +UCB0I2COA3_L = 0x01DA; +UCB0I2COA3_H = 0x01DB; +UCB0ADDRX = 0x01DC; +UCB0ADDRX_L = 0x01DC; +UCB0ADDRX_H = 0x01DD; +UCB0ADDMASK = 0x01DE; +UCB0ADDMASK_L = 0x01DE; +UCB0ADDMASK_H = 0x01DF; +UCB0I2CSA = 0x01E0; +UCB0I2CSA_L = 0x01E0; +UCB0I2CSA_H = 0x01E1; +UCB0IE = 0x01EA; +UCB0IE_L = 0x01EA; +UCB0IE_H = 0x01EB; +UCB0IFG = 0x01EC; +UCB0IFG_L = 0x01EC; +UCB0IFG_H = 0x01ED; +UCB0IV = 0x01EE; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430i2041.cmd b/msp430/msp430i2041.cmd new file mode 100644 index 00000000..0791feeb --- /dev/null +++ b/msp430/msp430i2041.cmd @@ -0,0 +1,263 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430i2041.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +SYSJTAGDIS = 0x01FE; +/************************************************************ +* CLOCK SYSTEM +************************************************************/ +CSCTL0 = 0x0050; +CSCTL1 = 0x0051; +CSIRFCAL = 0x0052; +CSIRTCAL = 0x0053; +CSERFCAL = 0x0054; +CSERTCAL = 0x0055; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* PMM - Power Management System +************************************************************/ +LPM45CTL = 0x0060; +VMONCTL = 0x0061; +REFCAL0 = 0x0062; +REFCAL1 = 0x0063; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +PAIN = 0x0010; +PAIN_L = 0x0010; +PAIN_H = 0x0011; +PAOUT = 0x0012; +PAOUT_L = 0x0012; +PAOUT_H = 0x0013; +PADIR = 0x0014; +PADIR_L = 0x0014; +PADIR_H = 0x0015; +PASEL0 = 0x001A; +PASEL0_L = 0x001A; +PASEL0_H = 0x001B; +PASEL1 = 0x001C; +PASEL1_L = 0x001C; +PASEL1_H = 0x001D; +PAIES = 0x0028; +PAIES_L = 0x0028; +PAIES_H = 0x0029; +PAIE = 0x002A; +PAIE_L = 0x002A; +PAIE_H = 0x002B; +PAIFG = 0x002C; +PAIFG_L = 0x002C; +PAIFG_H = 0x002D; +P1IV = 0x001E; +P2IV = 0x002E; +/************************************************************ +* SD24_4 - Sigma Delta 24 Bit +************************************************************/ +SD24INCTL0 = 0x00B0; +SD24INCTL1 = 0x00B1; +SD24INCTL2 = 0x00B2; +SD24INCTL3 = 0x00B3; +SD24PRE0 = 0x00B8; +SD24PRE1 = 0x00B9; +SD24PRE2 = 0x00BA; +SD24PRE3 = 0x00BB; +SD24TRIM = 0x00BF; +SD24CTL = 0x0100; +SD24CCTL0 = 0x0102; +SD24CCTL1 = 0x0104; +SD24CCTL2 = 0x0106; +SD24CCTL3 = 0x0108; +SD24MEM0 = 0x0110; +SD24MEM1 = 0x0112; +SD24MEM2 = 0x0114; +SD24MEM3 = 0x0116; +SD24IV = 0x01F0; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x0140; +UCA0CTLW0_L = 0x0140; +UCA0CTLW0_H = 0x0141; +UCA0CTLW1 = 0x0142; +UCA0CTLW1_L = 0x0142; +UCA0CTLW1_H = 0x0143; +UCA0BRW = 0x0146; +UCA0BRW_L = 0x0146; +UCA0BRW_H = 0x0147; +UCA0MCTLW = 0x0148; +UCA0MCTLW_L = 0x0148; +UCA0MCTLW_H = 0x0149; +UCA0STATW = 0x014A; +UCA0RXBUF = 0x014C; +UCA0RXBUF_L = 0x014C; +UCA0RXBUF_H = 0x014D; +UCA0TXBUF = 0x014E; +UCA0TXBUF_L = 0x014E; +UCA0TXBUF_H = 0x014F; +UCA0ABCTL = 0x0150; +UCA0IRCTL = 0x0152; +UCA0IRCTL_L = 0x0152; +UCA0IRCTL_H = 0x0153; +UCA0IE = 0x015A; +UCA0IE_L = 0x015A; +UCA0IE_H = 0x015B; +UCA0IFG = 0x015C; +UCA0IFG_L = 0x015C; +UCA0IFG_H = 0x015D; +UCA0IV = 0x015E; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x01C0; +UCB0CTLW0_L = 0x01C0; +UCB0CTLW0_H = 0x01C1; +UCB0CTLW1 = 0x01C2; +UCB0CTLW1_L = 0x01C2; +UCB0CTLW1_H = 0x01C3; +UCB0BRW = 0x01C6; +UCB0BRW_L = 0x01C6; +UCB0BRW_H = 0x01C7; +UCB0STATW = 0x01C8; +UCB0STATW_L = 0x01C8; +UCB0STATW_H = 0x01C9; +UCB0TBCNT = 0x01CA; +UCB0TBCNT_L = 0x01CA; +UCB0TBCNT_H = 0x01CB; +UCB0RXBUF = 0x01CC; +UCB0RXBUF_L = 0x01CC; +UCB0RXBUF_H = 0x01CD; +UCB0TXBUF = 0x01CE; +UCB0TXBUF_L = 0x01CE; +UCB0TXBUF_H = 0x01CF; +UCB0I2COA0 = 0x01D4; +UCB0I2COA0_L = 0x01D4; +UCB0I2COA0_H = 0x01D5; +UCB0I2COA1 = 0x01D6; +UCB0I2COA1_L = 0x01D6; +UCB0I2COA1_H = 0x01D7; +UCB0I2COA2 = 0x01D8; +UCB0I2COA2_L = 0x01D8; +UCB0I2COA2_H = 0x01D9; +UCB0I2COA3 = 0x01DA; +UCB0I2COA3_L = 0x01DA; +UCB0I2COA3_H = 0x01DB; +UCB0ADDRX = 0x01DC; +UCB0ADDRX_L = 0x01DC; +UCB0ADDRX_H = 0x01DD; +UCB0ADDMASK = 0x01DE; +UCB0ADDMASK_L = 0x01DE; +UCB0ADDMASK_H = 0x01DF; +UCB0I2CSA = 0x01E0; +UCB0I2CSA_L = 0x01E0; +UCB0I2CSA_H = 0x01E1; +UCB0IE = 0x01EA; +UCB0IE_L = 0x01EA; +UCB0IE_H = 0x01EB; +UCB0IFG = 0x01EC; +UCB0IFG_L = 0x01EC; +UCB0IFG_H = 0x01ED; +UCB0IV = 0x01EE; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430l092.cmd b/msp430/msp430l092.cmd new file mode 100644 index 00000000..460c2dce --- /dev/null +++ b/msp430/msp430l092.cmd @@ -0,0 +1,241 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430l092.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* A-POOL +************************************************************/ +APCNF = 0x01A0; +APCNF_L = 0x01A0; +APCNF_H = 0x01A1; +APCTL = 0x01A2; +APCTL_L = 0x01A2; +APCTL_H = 0x01A3; +APOMR = 0x01A4; +APOMR_L = 0x01A4; +APOMR_H = 0x01A5; +APVDIV = 0x01A6; +APVDIV_L = 0x01A6; +APVDIV_H = 0x01A7; +APTRIM = 0x01A8; +APTRIM_L = 0x01A8; +APTRIM_H = 0x01A9; +APINT = 0x01B0; +APINT_L = 0x01B0; +APINT_H = 0x01B1; +APINTB = 0x01B2; +APINTB_L = 0x01B2; +APINTB_H = 0x01B3; +APFRACT = 0x01B4; +APFRACT_L = 0x01B4; +APFRACT_H = 0x01B5; +APFRACTB = 0x01B6; +APFRACTB_L = 0x01B6; +APFRACTB_H = 0x01B7; +APIFG = 0x01BA; +APIFG_L = 0x01BA; +APIFG_H = 0x01BB; +APIE = 0x01BC; +APIE_L = 0x01BC; +APIE_H = 0x01BD; +APIV = 0x01BE; +APIV_L = 0x01BE; +APIV_H = 0x01BF; +/************************************************************ +* COMPACT CLOCK SYSTEM +************************************************************/ +CCSCTL0 = 0x0160; +CCSCTL0_L = 0x0160; +CCSCTL0_H = 0x0161; +CCSCTL1 = 0x0162; +CCSCTL1_L = 0x0162; +CCSCTL1_H = 0x0163; +CCSCTL2 = 0x0164; +CCSCTL2_L = 0x0164; +CCSCTL2_H = 0x0165; +CCSCTL4 = 0x0168; +CCSCTL4_L = 0x0168; +CCSCTL4_H = 0x0169; +CCSCTL5 = 0x016A; +CCSCTL5_L = 0x016A; +CCSCTL5_H = 0x016B; +CCSCTL6 = 0x016C; +CCSCTL6_L = 0x016C; +CCSCTL6_H = 0x016D; +CCSCTL7 = 0x016E; +CCSCTL7_L = 0x016E; +CCSCTL7_H = 0x016F; +CCSCTL8 = 0x0170; +CCSCTL8_L = 0x0170; +CCSCTL8_H = 0x0171; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* COMPACT SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSCNF = 0x0190; +SYSCNF_L = 0x0190; +SYSCNF_H = 0x0191; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFFFF - 0x20) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430p112.cmd b/msp430/msp430p112.cmd new file mode 100644 index 00000000..b0167de5 --- /dev/null +++ b/msp430/msp430p112.cmd @@ -0,0 +1,111 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430p112.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430p313.cmd b/msp430/msp430p313.cmd new file mode 100644 index 00000000..42bfafb8 --- /dev/null +++ b/msp430/msp430p313.cmd @@ -0,0 +1,131 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430p313.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O PORT0 +************************************************************/ +P0IN = 0x0010; +P0OUT = 0x0011; +P0DIR = 0x0012; +P0IFG = 0x0013; +P0IES = 0x0014; +P0IE = 0x0015; +/************************************************************ +* LCD REGISTER +************************************************************/ +LCDCTL = 0x0030; +LCDM1 = 0x0031; +LCDM2 = 0x0032; +LCDM3 = 0x0033; +LCDM4 = 0x0034; +LCDM5 = 0x0035; +LCDM6 = 0x0036; +LCDM7 = 0x0037; +LCDM8 = 0x0038; +LCDM9 = 0x0039; +LCDM10 = 0x003A; +LCDM11 = 0x003B; +LCDM12 = 0x003C; +LCDM13 = 0x003D; +LCDM14 = 0x003E; +LCDM15 = 0x003F; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK GENERATOR +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +CBCTL = 0x0053; +/************************************************************ +* 8BIT TIMER/COUNTER +************************************************************/ +TCCTL = 0x0042; +TCPLD = 0x0043; +TCDAT = 0x0044; +/************************************************************ +* TIMER/PORT +************************************************************/ +TPCTL = 0x004B; +TPCNT1 = 0x004C; +TPCNT2 = 0x004D; +TPD = 0x004E; +TPE = 0x004F; +/* Source select of clock input coded with Bits 6-7 in TPE + NOTE: If the control bit B16 in TPD is set, TPSSEL2/3 + are 'don't care' and the clock source of counter + TPCNT2 is the same as of the counter TPCNT1. */ +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430p315.cmd b/msp430/msp430p315.cmd new file mode 100644 index 00000000..83d224ce --- /dev/null +++ b/msp430/msp430p315.cmd @@ -0,0 +1,131 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430p315.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O PORT0 +************************************************************/ +P0IN = 0x0010; +P0OUT = 0x0011; +P0DIR = 0x0012; +P0IFG = 0x0013; +P0IES = 0x0014; +P0IE = 0x0015; +/************************************************************ +* LCD REGISTER +************************************************************/ +LCDCTL = 0x0030; +LCDM1 = 0x0031; +LCDM2 = 0x0032; +LCDM3 = 0x0033; +LCDM4 = 0x0034; +LCDM5 = 0x0035; +LCDM6 = 0x0036; +LCDM7 = 0x0037; +LCDM8 = 0x0038; +LCDM9 = 0x0039; +LCDM10 = 0x003A; +LCDM11 = 0x003B; +LCDM12 = 0x003C; +LCDM13 = 0x003D; +LCDM14 = 0x003E; +LCDM15 = 0x003F; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK GENERATOR +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +CBCTL = 0x0053; +/************************************************************ +* 8BIT TIMER/COUNTER +************************************************************/ +TCCTL = 0x0042; +TCPLD = 0x0043; +TCDAT = 0x0044; +/************************************************************ +* TIMER/PORT +************************************************************/ +TPCTL = 0x004B; +TPCNT1 = 0x004C; +TPCNT2 = 0x004D; +TPD = 0x004E; +TPE = 0x004F; +/* Source select of clock input coded with Bits 6-7 in TPE + NOTE: If the control bit B16 in TPD is set, TPSSEL2/3 + are 'don't care' and the clock source of counter + TPCNT2 is the same as of the counter TPCNT1. */ +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430p315s.cmd b/msp430/msp430p315s.cmd new file mode 100644 index 00000000..e58f3254 --- /dev/null +++ b/msp430/msp430p315s.cmd @@ -0,0 +1,131 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430p315s.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O PORT0 +************************************************************/ +P0IN = 0x0010; +P0OUT = 0x0011; +P0DIR = 0x0012; +P0IFG = 0x0013; +P0IES = 0x0014; +P0IE = 0x0015; +/************************************************************ +* LCD REGISTER +************************************************************/ +LCDCTL = 0x0030; +LCDM1 = 0x0031; +LCDM2 = 0x0032; +LCDM3 = 0x0033; +LCDM4 = 0x0034; +LCDM5 = 0x0035; +LCDM6 = 0x0036; +LCDM7 = 0x0037; +LCDM8 = 0x0038; +LCDM9 = 0x0039; +LCDM10 = 0x003A; +LCDM11 = 0x003B; +LCDM12 = 0x003C; +LCDM13 = 0x003D; +LCDM14 = 0x003E; +LCDM15 = 0x003F; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK GENERATOR +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +CBCTL = 0x0053; +/************************************************************ +* 8BIT TIMER/COUNTER +************************************************************/ +TCCTL = 0x0042; +TCPLD = 0x0043; +TCDAT = 0x0044; +/************************************************************ +* TIMER/PORT +************************************************************/ +TPCTL = 0x004B; +TPCNT1 = 0x004C; +TPCNT2 = 0x004D; +TPD = 0x004E; +TPE = 0x004F; +/* Source select of clock input coded with Bits 6-7 in TPE + NOTE: If the control bit B16 in TPD is set, TPSSEL2/3 + are 'don't care' and the clock source of counter + TPCNT2 is the same as of the counter TPCNT1. */ +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430p325.cmd b/msp430/msp430p325.cmd new file mode 100644 index 00000000..579cf014 --- /dev/null +++ b/msp430/msp430p325.cmd @@ -0,0 +1,138 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430p325.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O PORT0 +************************************************************/ +P0IN = 0x0010; +P0OUT = 0x0011; +P0DIR = 0x0012; +P0IFG = 0x0013; +P0IES = 0x0014; +P0IE = 0x0015; +/************************************************************ +* LCD REGISTER +************************************************************/ +LCDCTL = 0x0030; +LCDM1 = 0x0031; +LCDM2 = 0x0032; +LCDM3 = 0x0033; +LCDM4 = 0x0034; +LCDM5 = 0x0035; +LCDM6 = 0x0036; +LCDM7 = 0x0037; +LCDM8 = 0x0038; +LCDM9 = 0x0039; +LCDM10 = 0x003A; +LCDM11 = 0x003B; +LCDM12 = 0x003C; +LCDM13 = 0x003D; +LCDM14 = 0x003E; +LCDM15 = 0x003F; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK GENERATOR +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +CBCTL = 0x0053; +/************************************************************ +* 8BIT TIMER/COUNTER +************************************************************/ +TCCTL = 0x0042; +TCPLD = 0x0043; +TCDAT = 0x0044; +/************************************************************ +* TIMER/PORT +************************************************************/ +TPCTL = 0x004B; +TPCNT1 = 0x004C; +TPCNT2 = 0x004D; +TPD = 0x004E; +TPE = 0x004F; +/* Source select of clock input coded with Bits 6-7 in TPE + NOTE: If the control bit B16 in TPD is set, TPSSEL2/3 + are 'don't care' and the clock source of counter + TPCNT2 is the same as of the counter TPCNT1. */ +/************************************************************ +* A/D CONVERTER 12 + 2 +************************************************************/ +AIN = 0x0110; +AEN = 0x0112; +ACTL = 0x0114; +ADAT = 0x0118; +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430p337.cmd b/msp430/msp430p337.cmd new file mode 100644 index 00000000..783014d7 --- /dev/null +++ b/msp430/msp430p337.cmd @@ -0,0 +1,198 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430p337.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O PORT0 +************************************************************/ +P0IN = 0x0010; +P0OUT = 0x0011; +P0DIR = 0x0012; +P0IFG = 0x0013; +P0IES = 0x0014; +P0IE = 0x0015; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK GENERATOR +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +CBCTL = 0x0053; +/************************************************************ +* LCD REGISTER +************************************************************/ +LCDCTL = 0x0030; +LCDM1 = 0x0031; +LCDM2 = 0x0032; +LCDM3 = 0x0033; +LCDM4 = 0x0034; +LCDM5 = 0x0035; +LCDM6 = 0x0036; +LCDM7 = 0x0037; +LCDM8 = 0x0038; +LCDM9 = 0x0039; +LCDM10 = 0x003A; +LCDM11 = 0x003B; +LCDM12 = 0x003C; +LCDM13 = 0x003D; +LCDM14 = 0x003E; +LCDM15 = 0x003F; +/************************************************************ +* USART +************************************************************/ +UCTL = 0x0070; +UTCTL = 0x0071; +URCTL = 0x0072; +UMCTL = 0x0073; +UBR0 = 0x0074; +UBR1 = 0x0075; +RXBUF = 0x0076; +TXBUF = 0x0077; +/************************************************************ +* Timer A5 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TACCTL3 = 0x0168; +TACCTL4 = 0x016A; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +TACCR3 = 0x0178; +TACCR4 = 0x017A; +/************************************************************ +* 8BIT TIMER/COUNTER +************************************************************/ +TCCTL = 0x0042; +TCPLD = 0x0043; +TCDAT = 0x0044; +/************************************************************ +* TIMER/PORT +************************************************************/ +TPCTL = 0x004B; +TPCNT1 = 0x004C; +TPCNT2 = 0x004D; +TPD = 0x004E; +TPE = 0x004F; +/* Source select of clock input coded with Bits 6-7 in TPE + NOTE: If the control bit B16 in TPD is set, TPSSEL2/3 + are 'don't care' and the clock source of counter + TPCNT2 is the same as of the counter TPCNT1. */ +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430sl5438a.cmd b/msp430/msp430sl5438a.cmd new file mode 100644 index 00000000..7d26d6ab --- /dev/null +++ b/msp430/msp430sl5438a.cmd @@ -0,0 +1,815 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430sl5438a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL = 0x02AA; +PFSEL_L = 0x02AA; +PFSEL_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0680; +UCA3CTLW0_L = 0x0680; +UCA3CTLW0_H = 0x0681; +UCA3BRW = 0x0686; +UCA3BRW_L = 0x0686; +UCA3BRW_H = 0x0687; +UCA3MCTL = 0x0688; +UCA3STAT = 0x068A; +UCA3RXBUF = 0x068C; +UCA3TXBUF = 0x068E; +UCA3ABCTL = 0x0690; +UCA3IRCTL = 0x0692; +UCA3IRCTL_L = 0x0692; +UCA3IRCTL_H = 0x0693; +UCA3ICTL = 0x069C; +UCA3ICTL_L = 0x069C; +UCA3ICTL_H = 0x069D; +UCA3IV = 0x069E; +/************************************************************ +* USCI B3 +************************************************************/ +UCB3CTLW0 = 0x06A0; +UCB3CTLW0_L = 0x06A0; +UCB3CTLW0_H = 0x06A1; +UCB3BRW = 0x06A6; +UCB3BRW_L = 0x06A6; +UCB3BRW_H = 0x06A7; +UCB3STAT = 0x06AA; +UCB3RXBUF = 0x06AC; +UCB3TXBUF = 0x06AE; +UCB3I2COA = 0x06B0; +UCB3I2COA_L = 0x06B0; +UCB3I2COA_H = 0x06B1; +UCB3I2CSA = 0x06B2; +UCB3I2CSA_L = 0x06B2; +UCB3I2CSA_H = 0x06B3; +UCB3ICTL = 0x06BC; +UCB3ICTL_L = 0x06BC; +UCB3ICTL_H = 0x06BD; +UCB3IV = 0x06BE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430tch5e.cmd b/msp430/msp430tch5e.cmd new file mode 100644 index 00000000..21ff40a8 --- /dev/null +++ b/msp430/msp430tch5e.cmd @@ -0,0 +1,194 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430tch5e.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3SEL2 = 0x0043; +P3REN = 0x0010; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x09x.cmd b/msp430/msp430x09x.cmd new file mode 100644 index 00000000..cb80d94a --- /dev/null +++ b/msp430/msp430x09x.cmd @@ -0,0 +1,247 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430l092.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* A-POOL +************************************************************/ +APCNF = 0x01A0; +APCNF_L = 0x01A0; +APCNF_H = 0x01A1; +APCTL = 0x01A2; +APCTL_L = 0x01A2; +APCTL_H = 0x01A3; +APOMR = 0x01A4; +APOMR_L = 0x01A4; +APOMR_H = 0x01A5; +APVDIV = 0x01A6; +APVDIV_L = 0x01A6; +APVDIV_H = 0x01A7; +APTRIM = 0x01A8; +APTRIM_L = 0x01A8; +APTRIM_H = 0x01A9; +APINT = 0x01B0; +APINT_L = 0x01B0; +APINT_H = 0x01B1; +APINTB = 0x01B2; +APINTB_L = 0x01B2; +APINTB_H = 0x01B3; +APFRACT = 0x01B4; +APFRACT_L = 0x01B4; +APFRACT_H = 0x01B5; +APFRACTB = 0x01B6; +APFRACTB_L = 0x01B6; +APFRACTB_H = 0x01B7; +APIFG = 0x01BA; +APIFG_L = 0x01BA; +APIFG_H = 0x01BB; +APIE = 0x01BC; +APIE_L = 0x01BC; +APIE_H = 0x01BD; +APIV = 0x01BE; +APIV_L = 0x01BE; +APIV_H = 0x01BF; +/************************************************************ +* COMPACT CLOCK SYSTEM +************************************************************/ +CCSCTL0 = 0x0160; +CCSCTL0_L = 0x0160; +CCSCTL0_H = 0x0161; +CCSCTL1 = 0x0162; +CCSCTL1_L = 0x0162; +CCSCTL1_H = 0x0163; +CCSCTL2 = 0x0164; +CCSCTL2_L = 0x0164; +CCSCTL2_H = 0x0165; +CCSCTL4 = 0x0168; +CCSCTL4_L = 0x0168; +CCSCTL4_H = 0x0169; +CCSCTL5 = 0x016A; +CCSCTL5_L = 0x016A; +CCSCTL5_H = 0x016B; +CCSCTL6 = 0x016C; +CCSCTL6_L = 0x016C; +CCSCTL6_H = 0x016D; +CCSCTL7 = 0x016E; +CCSCTL7_L = 0x016E; +CCSCTL7_H = 0x016F; +CCSCTL8 = 0x0170; +CCSCTL8_L = 0x0170; +CCSCTL8_H = 0x0171; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* COMPACT SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSCNF = 0x0190; +SYSCNF_L = 0x0190; +SYSCNF_H = 0x0191; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFFFF - 0x20) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x11x.cmd b/msp430/msp430x11x.cmd new file mode 100644 index 00000000..87aa36db --- /dev/null +++ b/msp430/msp430x11x.cmd @@ -0,0 +1,117 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430p112.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x11x1.cmd b/msp430/msp430x11x1.cmd new file mode 100644 index 00000000..42a5c4c8 --- /dev/null +++ b/msp430/msp430x11x1.cmd @@ -0,0 +1,119 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f1121a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x11x2.cmd b/msp430/msp430x11x2.cmd new file mode 100644 index 00000000..bc8cb8ca --- /dev/null +++ b/msp430/msp430x11x2.cmd @@ -0,0 +1,123 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f1132.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x12x.cmd b/msp430/msp430x12x.cmd new file mode 100644 index 00000000..2d5477e7 --- /dev/null +++ b/msp430/msp430x12x.cmd @@ -0,0 +1,143 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f123.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x12x2.cmd b/msp430/msp430x12x2.cmd new file mode 100644 index 00000000..4e1878a9 --- /dev/null +++ b/msp430/msp430x12x2.cmd @@ -0,0 +1,147 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f1232.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x13x.cmd b/msp430/msp430x13x.cmd new file mode 100644 index 00000000..9cded352 --- /dev/null +++ b/msp430/msp430x13x.cmd @@ -0,0 +1,208 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f135.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x13x1.cmd b/msp430/msp430x13x1.cmd new file mode 100644 index 00000000..5cab27b0 --- /dev/null +++ b/msp430/msp430x13x1.cmd @@ -0,0 +1,168 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430c1351.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x14x.cmd b/msp430/msp430x14x.cmd new file mode 100644 index 00000000..124be832 --- /dev/null +++ b/msp430/msp430x14x.cmd @@ -0,0 +1,241 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f149.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x14x1.cmd b/msp430/msp430x14x1.cmd new file mode 100644 index 00000000..55e08d38 --- /dev/null +++ b/msp430/msp430x14x1.cmd @@ -0,0 +1,201 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f1491.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x15x.cmd b/msp430/msp430x15x.cmd new file mode 100644 index 00000000..65ad9c1b --- /dev/null +++ b/msp430/msp430x15x.cmd @@ -0,0 +1,252 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f157.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART0 I2C +************************************************************/ +I2CIE = 0x0050; +I2CIFG = 0x0051; +I2CNDAT = 0x0052; +I2CTCTL = 0x0071; +I2CDCTL = 0x0072; +I2CPSC = 0x0073; +I2CSCLH = 0x0074; +I2CSCLL = 0x0075; +I2CDRB = 0x0076; +I2CDRW = 0x0076; +I2COA = 0x0118; +I2CSA = 0x011A; +I2CIV = 0x011C; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMA0CTL = 0x01E0; +DMA1CTL = 0x01E8; +DMA2CTL = 0x01F0; +DMA0SA = 0x01E2; +DMA0DA = 0x01E4; +DMA0SZ = 0x01E6; +DMA1SA = 0x01EA; +DMA1DA = 0x01EC; +DMA1SZ = 0x01EE; +DMA2SA = 0x01F2; +DMA2DA = 0x01F4; +DMA2SZ = 0x01F6; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x16x.cmd b/msp430/msp430x16x.cmd new file mode 100644 index 00000000..e5081ef4 --- /dev/null +++ b/msp430/msp430x16x.cmd @@ -0,0 +1,285 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f1612.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* USART0 I2C +************************************************************/ +I2CIE = 0x0050; +I2CIFG = 0x0051; +I2CNDAT = 0x0052; +I2CTCTL = 0x0071; +I2CDCTL = 0x0072; +I2CPSC = 0x0073; +I2CSCLH = 0x0074; +I2CSCLL = 0x0075; +I2CDRB = 0x0076; +I2CDRW = 0x0076; +I2COA = 0x0118; +I2CSA = 0x011A; +I2CIV = 0x011C; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMA0CTL = 0x01E0; +DMA1CTL = 0x01E8; +DMA2CTL = 0x01F0; +DMA0SA = 0x01E2; +DMA0DA = 0x01E4; +DMA0SZ = 0x01E6; +DMA1SA = 0x01EA; +DMA1DA = 0x01EC; +DMA1SZ = 0x01EE; +DMA2SA = 0x01F2; +DMA2DA = 0x01F4; +DMA2SZ = 0x01F6; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x20x1.cmd b/msp430/msp430x20x1.cmd new file mode 100644 index 00000000..2fdc0910 --- /dev/null +++ b/msp430/msp430x20x1.cmd @@ -0,0 +1,131 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2011.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* Timer A2 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x20x2.cmd b/msp430/msp430x20x2.cmd new file mode 100644 index 00000000..fbd37006 --- /dev/null +++ b/msp430/msp430x20x2.cmd @@ -0,0 +1,147 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2012.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* Timer A2 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x20x3.cmd b/msp430/msp430x20x3.cmd new file mode 100644 index 00000000..12c98ea8 --- /dev/null +++ b/msp430/msp430x20x3.cmd @@ -0,0 +1,149 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2013.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* SD16_A1 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16AE = 0x00B7; +SD16CONF0 = 0x00F7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +/************************************************************ +* Timer A2 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +/************************************************************ +* USI +************************************************************/ +USICTL0 = 0x0078; +USICTL1 = 0x0079; +USICKCTL = 0x007A; +USICNT = 0x007B; +USISRL = 0x007C; +USISRH = 0x007D; +USICTL = 0x0078; +USICCTL = 0x007A; +USISR = 0x007C; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x21x1.cmd b/msp430/msp430x21x1.cmd new file mode 100644 index 00000000..6925b9de --- /dev/null +++ b/msp430/msp430x21x1.cmd @@ -0,0 +1,133 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2131.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x21x2.cmd b/msp430/msp430x21x2.cmd new file mode 100644 index 00000000..0c3d8303 --- /dev/null +++ b/msp430/msp430x21x2.cmd @@ -0,0 +1,198 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2132.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10AE1 = 0x004B; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0041; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2SEL2 = 0x0042; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A2 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC10_1_TAG = 0x10DA; +TLV_ADC10_1_LEN = 0x10DB; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x22x2.cmd b/msp430/msp430x22x2.cmd new file mode 100644 index 00000000..86d0b58e --- /dev/null +++ b/msp430/msp430x22x2.cmd @@ -0,0 +1,189 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2272.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10AE1 = 0x004B; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x22x4.cmd b/msp430/msp430x22x4.cmd new file mode 100644 index 00000000..c18b7ec1 --- /dev/null +++ b/msp430/msp430x22x4.cmd @@ -0,0 +1,196 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2274.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10AE1 = 0x004B; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x00C0; +OA0CTL1 = 0x00C1; +OA1CTL0 = 0x00C2; +OA1CTL1 = 0x00C3; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x23x.cmd b/msp430/msp430x23x.cmd new file mode 100644 index 00000000..803b076f --- /dev/null +++ b/msp430/msp430x23x.cmd @@ -0,0 +1,261 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f235.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +P6REN = 0x0013; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC12_1_TAG = 0x10DA; +TLV_ADC12_1_LEN = 0x10DB; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x23x0.cmd b/msp430/msp430x23x0.cmd new file mode 100644 index 00000000..89cadbd8 --- /dev/null +++ b/msp430/msp430x23x0.cmd @@ -0,0 +1,195 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2370.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x241x.cmd b/msp430/msp430x241x.cmd new file mode 100644 index 00000000..5c8965b8 --- /dev/null +++ b/msp430/msp430x241x.cmd @@ -0,0 +1,310 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2419.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +P6REN = 0x0013; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC12_1_TAG = 0x10DA; +TLV_ADC12_1_LEN = 0x10DB; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x24x.cmd b/msp430/msp430x24x.cmd new file mode 100644 index 00000000..de919ed0 --- /dev/null +++ b/msp430/msp430x24x.cmd @@ -0,0 +1,292 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2410.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +P6REN = 0x0013; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC12_1_TAG = 0x10DA; +TLV_ADC12_1_LEN = 0x10DB; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x24x1.cmd b/msp430/msp430x24x1.cmd new file mode 100644 index 00000000..568a6e64 --- /dev/null +++ b/msp430/msp430x24x1.cmd @@ -0,0 +1,250 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2491.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +P6REN = 0x0013; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x26x.cmd b/msp430/msp430x26x.cmd new file mode 100644 index 00000000..dd8686c4 --- /dev/null +++ b/msp430/msp430x26x.cmd @@ -0,0 +1,341 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f2619.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Basic Clock Module +************************************************************/ +DCOCTL = 0x0056; +BCSCTL1 = 0x0057; +BCSCTL2 = 0x0058; +BCSCTL3 = 0x0053; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +P6REN = 0x0013; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0055; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +TLV_CHECKSUM = 0x10C0; +TLV_DCO_30_TAG = 0x10F6; +TLV_DCO_30_LEN = 0x10F7; +TLV_ADC12_1_TAG = 0x10DA; +TLV_ADC12_1_LEN = 0x10DB; +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +CALDCO_16MHZ = 0x10F8; +CALBC1_16MHZ = 0x10F9; +CALDCO_12MHZ = 0x10FA; +CALBC1_12MHZ = 0x10FB; +CALDCO_8MHZ = 0x10FC; +CALBC1_8MHZ = 0x10FD; +CALDCO_1MHZ = 0x10FE; +CALBC1_1MHZ = 0x10FF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x31x.cmd b/msp430/msp430x31x.cmd new file mode 100644 index 00000000..22744be4 --- /dev/null +++ b/msp430/msp430x31x.cmd @@ -0,0 +1,137 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430p315s.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O PORT0 +************************************************************/ +P0IN = 0x0010; +P0OUT = 0x0011; +P0DIR = 0x0012; +P0IFG = 0x0013; +P0IES = 0x0014; +P0IE = 0x0015; +/************************************************************ +* LCD REGISTER +************************************************************/ +LCDCTL = 0x0030; +LCDM1 = 0x0031; +LCDM2 = 0x0032; +LCDM3 = 0x0033; +LCDM4 = 0x0034; +LCDM5 = 0x0035; +LCDM6 = 0x0036; +LCDM7 = 0x0037; +LCDM8 = 0x0038; +LCDM9 = 0x0039; +LCDM10 = 0x003A; +LCDM11 = 0x003B; +LCDM12 = 0x003C; +LCDM13 = 0x003D; +LCDM14 = 0x003E; +LCDM15 = 0x003F; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK GENERATOR +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +CBCTL = 0x0053; +/************************************************************ +* 8BIT TIMER/COUNTER +************************************************************/ +TCCTL = 0x0042; +TCPLD = 0x0043; +TCDAT = 0x0044; +/************************************************************ +* TIMER/PORT +************************************************************/ +TPCTL = 0x004B; +TPCNT1 = 0x004C; +TPCNT2 = 0x004D; +TPD = 0x004E; +TPE = 0x004F; +/* Source select of clock input coded with Bits 6-7 in TPE + NOTE: If the control bit B16 in TPD is set, TPSSEL2/3 + are 'don't care' and the clock source of counter + TPCNT2 is the same as of the counter TPCNT1. */ +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x32x.cmd b/msp430/msp430x32x.cmd new file mode 100644 index 00000000..ee8643c9 --- /dev/null +++ b/msp430/msp430x32x.cmd @@ -0,0 +1,144 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430p325.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O PORT0 +************************************************************/ +P0IN = 0x0010; +P0OUT = 0x0011; +P0DIR = 0x0012; +P0IFG = 0x0013; +P0IES = 0x0014; +P0IE = 0x0015; +/************************************************************ +* LCD REGISTER +************************************************************/ +LCDCTL = 0x0030; +LCDM1 = 0x0031; +LCDM2 = 0x0032; +LCDM3 = 0x0033; +LCDM4 = 0x0034; +LCDM5 = 0x0035; +LCDM6 = 0x0036; +LCDM7 = 0x0037; +LCDM8 = 0x0038; +LCDM9 = 0x0039; +LCDM10 = 0x003A; +LCDM11 = 0x003B; +LCDM12 = 0x003C; +LCDM13 = 0x003D; +LCDM14 = 0x003E; +LCDM15 = 0x003F; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK GENERATOR +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +CBCTL = 0x0053; +/************************************************************ +* 8BIT TIMER/COUNTER +************************************************************/ +TCCTL = 0x0042; +TCPLD = 0x0043; +TCDAT = 0x0044; +/************************************************************ +* TIMER/PORT +************************************************************/ +TPCTL = 0x004B; +TPCNT1 = 0x004C; +TPCNT2 = 0x004D; +TPD = 0x004E; +TPE = 0x004F; +/* Source select of clock input coded with Bits 6-7 in TPE + NOTE: If the control bit B16 in TPD is set, TPSSEL2/3 + are 'don't care' and the clock source of counter + TPCNT2 is the same as of the counter TPCNT1. */ +/************************************************************ +* A/D CONVERTER 12 + 2 +************************************************************/ +AIN = 0x0110; +AEN = 0x0112; +ACTL = 0x0114; +ADAT = 0x0118; +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x33x.cmd b/msp430/msp430x33x.cmd new file mode 100644 index 00000000..b3ee0d5b --- /dev/null +++ b/msp430/msp430x33x.cmd @@ -0,0 +1,204 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430p337.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O PORT0 +************************************************************/ +P0IN = 0x0010; +P0OUT = 0x0011; +P0DIR = 0x0012; +P0IFG = 0x0013; +P0IES = 0x0014; +P0IE = 0x0015; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK GENERATOR +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +CBCTL = 0x0053; +/************************************************************ +* LCD REGISTER +************************************************************/ +LCDCTL = 0x0030; +LCDM1 = 0x0031; +LCDM2 = 0x0032; +LCDM3 = 0x0033; +LCDM4 = 0x0034; +LCDM5 = 0x0035; +LCDM6 = 0x0036; +LCDM7 = 0x0037; +LCDM8 = 0x0038; +LCDM9 = 0x0039; +LCDM10 = 0x003A; +LCDM11 = 0x003B; +LCDM12 = 0x003C; +LCDM13 = 0x003D; +LCDM14 = 0x003E; +LCDM15 = 0x003F; +/************************************************************ +* USART +************************************************************/ +UCTL = 0x0070; +UTCTL = 0x0071; +URCTL = 0x0072; +UMCTL = 0x0073; +UBR0 = 0x0074; +UBR1 = 0x0075; +RXBUF = 0x0076; +TXBUF = 0x0077; +/************************************************************ +* Timer A5 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TACCTL3 = 0x0168; +TACCTL4 = 0x016A; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +TACCR3 = 0x0178; +TACCR4 = 0x017A; +/************************************************************ +* 8BIT TIMER/COUNTER +************************************************************/ +TCCTL = 0x0042; +TCPLD = 0x0043; +TCDAT = 0x0044; +/************************************************************ +* TIMER/PORT +************************************************************/ +TPCTL = 0x004B; +TPCNT1 = 0x004C; +TPCNT2 = 0x004D; +TPD = 0x004E; +TPE = 0x004F; +/* Source select of clock input coded with Bits 6-7 in TPE + NOTE: If the control bit B16 in TPD is set, TPSSEL2/3 + are 'don't care' and the clock source of counter + TPCNT2 is the same as of the counter TPCNT1. */ +/************************************************************ +* EPROM CONTROL +************************************************************/ +EPCTL = 0x0054; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x415.cmd b/msp430/msp430x415.cmd new file mode 100644 index 00000000..05a7b143 --- /dev/null +++ b/msp430/msp430x415.cmd @@ -0,0 +1,195 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f415.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A5 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1CCTL3 = 0x0188; +TA1CCTL4 = 0x018A; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +TA1CCR3 = 0x0198; +TA1CCR4 = 0x019A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x417.cmd b/msp430/msp430x417.cmd new file mode 100644 index 00000000..96c6e6fb --- /dev/null +++ b/msp430/msp430x417.cmd @@ -0,0 +1,195 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f417.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A5 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1CCTL3 = 0x0188; +TA1CCTL4 = 0x018A; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +TA1CCR3 = 0x0198; +TA1CCR4 = 0x019A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x41x.cmd b/msp430/msp430x41x.cmd new file mode 100644 index 00000000..e4548b51 --- /dev/null +++ b/msp430/msp430x41x.cmd @@ -0,0 +1,179 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f413.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x41x2.cmd b/msp430/msp430x41x2.cmd new file mode 100644 index 00000000..fc9aeb77 --- /dev/null +++ b/msp430/msp430x41x2.cmd @@ -0,0 +1,257 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f4152.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* ADC10 +************************************************************/ +ADC10DTC0 = 0x0048; +ADC10DTC1 = 0x0049; +ADC10AE0 = 0x004A; +ADC10AE1 = 0x004B; +ADC10CTL0 = 0x01B0; +ADC10CTL1 = 0x01B2; +ADC10MEM = 0x01B4; +ADC10SA = 0x01BC; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* DIGITAL I/O Port7 +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x0039; +P7DIR = 0x003A; +P7SEL = 0x003B; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A5 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1CCTL3 = 0x0188; +TA1CCTL4 = 0x018A; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +TA1CCR3 = 0x0198; +TA1CCR4 = 0x019A; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x42x.cmd b/msp430/msp430x42x.cmd new file mode 100644 index 00000000..01652b00 --- /dev/null +++ b/msp430/msp430x42x.cmd @@ -0,0 +1,197 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f427a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* SD16 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +SD16MEM2 = 0x0116; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x42x0.cmd b/msp430/msp430x42x0.cmd new file mode 100644 index 00000000..4b72c920 --- /dev/null +++ b/msp430/msp430x42x0.cmd @@ -0,0 +1,179 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f4270.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SD16_A1 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16AE = 0x00B7; +SD16CONF0 = 0x00F7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_0DAT = 0x01C8; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x43x.cmd b/msp430/msp430x43x.cmd new file mode 100644 index 00000000..44842ed5 --- /dev/null +++ b/msp430/msp430x43x.cmd @@ -0,0 +1,246 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f437.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x43x1.cmd b/msp430/msp430x43x1.cmd new file mode 100644 index 00000000..bcae53e0 --- /dev/null +++ b/msp430/msp430x43x1.cmd @@ -0,0 +1,206 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f4371.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x44x.cmd b/msp430/msp430x44x.cmd new file mode 100644 index 00000000..5f9afb05 --- /dev/null +++ b/msp430/msp430x44x.cmd @@ -0,0 +1,277 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f449.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x44x1.cmd b/msp430/msp430x44x1.cmd new file mode 100644 index 00000000..dcff1eff --- /dev/null +++ b/msp430/msp430x44x1.cmd @@ -0,0 +1,237 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f4491.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x461x1.cmd b/msp430/msp430x461x1.cmd new file mode 100644 index 00000000..140bbdd6 --- /dev/null +++ b/msp430/msp430x461x1.cmd @@ -0,0 +1,322 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f46191.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* DIGITAL I/O Port7/8 +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +/************************************************************ +* DIGITAL I/O Port9/10 +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x46x.cmd b/msp430/msp430x46x.cmd new file mode 100644 index 00000000..6f8512b8 --- /dev/null +++ b/msp430/msp430x46x.cmd @@ -0,0 +1,362 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f4619.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* DIGITAL I/O Port7/8 +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +/************************************************************ +* DIGITAL I/O Port9/10 +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x471x3.cmd b/msp430/msp430x471x3.cmd new file mode 100644 index 00000000..6001bbaf --- /dev/null +++ b/msp430/msp430x471x3.cmd @@ -0,0 +1,380 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f47193.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY_B = 0x0130; +MPYS_B = 0x0132; +MAC_B = 0x0134; +MACS_B = 0x0136; +OP2_B = 0x0138; +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +MPY32L_B = 0x0140; +MPY32H_B = 0x0142; +MPYS32L_B = 0x0144; +MPYS32H_B = 0x0146; +MAC32L_B = 0x0148; +MAC32H_B = 0x014A; +MACS32L_B = 0x014C; +MACS32H_B = 0x014E; +OP2L_B = 0x0150; +OP2H_B = 0x0152; +MPY32L = 0x0140; +MPY32H = 0x0142; +MPYS32L = 0x0144; +MPYS32H = 0x0146; +MAC32L = 0x0148; +MAC32H = 0x014A; +MACS32L = 0x014C; +MACS32H = 0x014E; +OP2L = 0x0150; +OP2H = 0x0152; +RES0 = 0x0154; +RES1 = 0x0156; +RES2 = 0x0158; +RES3 = 0x015A; +MPY32CTL0 = 0x015C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P9REN = 0x0016; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +P10REN = 0x0017; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +PBREN = 0x0016; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* SD16_A3 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16IV = 0x01AE; +SD16MEM0 = 0x0110; +SD16MEM1 = 0x0112; +SD16MEM2 = 0x0114; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x016C; +UCB0I2CSA = 0x016E; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x471x6.cmd b/msp430/msp430x471x6.cmd new file mode 100644 index 00000000..91b883eb --- /dev/null +++ b/msp430/msp430x471x6.cmd @@ -0,0 +1,393 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f47196.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY_B = 0x0130; +MPYS_B = 0x0132; +MAC_B = 0x0134; +MACS_B = 0x0136; +OP2_B = 0x0138; +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +MPY32L_B = 0x0140; +MPY32H_B = 0x0142; +MPYS32L_B = 0x0144; +MPYS32H_B = 0x0146; +MAC32L_B = 0x0148; +MAC32H_B = 0x014A; +MACS32L_B = 0x014C; +MACS32H_B = 0x014E; +OP2L_B = 0x0150; +OP2H_B = 0x0152; +MPY32L = 0x0140; +MPY32H = 0x0142; +MPYS32L = 0x0144; +MPYS32H = 0x0146; +MAC32L = 0x0148; +MAC32H = 0x014A; +MACS32L = 0x014C; +MACS32H = 0x014E; +OP2L = 0x0150; +OP2H = 0x0152; +RES0 = 0x0154; +RES1 = 0x0156; +RES2 = 0x0158; +RES3 = 0x015A; +MPY32CTL0 = 0x015C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P9REN = 0x0016; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +P10REN = 0x0017; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +PBREN = 0x0016; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* SD16_A6 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16INCTL3 = 0x00B3; +SD16INCTL4 = 0x00B4; +SD16INCTL5 = 0x00B5; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16PRE3 = 0x00BB; +SD16PRE4 = 0x00BC; +SD16PRE5 = 0x00BD; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16CCTL3 = 0x0108; +SD16CCTL4 = 0x010A; +SD16CCTL5 = 0x010C; +SD16MEM0 = 0x0110; +SD16MEM1 = 0x0112; +SD16MEM2 = 0x0114; +SD16MEM3 = 0x0116; +SD16MEM4 = 0x0118; +SD16MEM5 = 0x011A; +SD16IV = 0x01AE; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x016C; +UCB0I2CSA = 0x016E; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x471x7.cmd b/msp430/msp430x471x7.cmd new file mode 100644 index 00000000..a62b3449 --- /dev/null +++ b/msp430/msp430x471x7.cmd @@ -0,0 +1,396 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f47197.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY_B = 0x0130; +MPYS_B = 0x0132; +MAC_B = 0x0134; +MACS_B = 0x0136; +OP2_B = 0x0138; +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +MPY32L_B = 0x0140; +MPY32H_B = 0x0142; +MPYS32L_B = 0x0144; +MPYS32H_B = 0x0146; +MAC32L_B = 0x0148; +MAC32H_B = 0x014A; +MACS32L_B = 0x014C; +MACS32H_B = 0x014E; +OP2L_B = 0x0150; +OP2H_B = 0x0152; +MPY32L = 0x0140; +MPY32H = 0x0142; +MPYS32L = 0x0144; +MPYS32H = 0x0146; +MAC32L = 0x0148; +MAC32H = 0x014A; +MACS32L = 0x014C; +MACS32H = 0x014E; +OP2L = 0x0150; +OP2H = 0x0152; +RES0 = 0x0154; +RES1 = 0x0156; +RES2 = 0x0158; +RES3 = 0x015A; +MPY32CTL0 = 0x015C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P9REN = 0x0016; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +P10REN = 0x0017; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +PBREN = 0x0016; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* SD16_A7 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16INCTL3 = 0x00B3; +SD16INCTL4 = 0x00B4; +SD16INCTL5 = 0x00B5; +SD16INCTL6 = 0x00B6; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16PRE3 = 0x00BB; +SD16PRE4 = 0x00BC; +SD16PRE5 = 0x00BD; +SD16PRE6 = 0x00BE; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16CCTL3 = 0x0108; +SD16CCTL4 = 0x010A; +SD16CCTL5 = 0x010C; +SD16CCTL6 = 0x010E; +SD16MEM0 = 0x0110; +SD16MEM1 = 0x0112; +SD16MEM2 = 0x0114; +SD16MEM3 = 0x0116; +SD16MEM4 = 0x0118; +SD16MEM5 = 0x011A; +SD16MEM6 = 0x011C; +SD16IV = 0x01AE; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x016C; +UCB0I2CSA = 0x016E; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x47x.cmd b/msp430/msp430x47x.cmd new file mode 100644 index 00000000..2d76fa58 --- /dev/null +++ b/msp430/msp430x47x.cmd @@ -0,0 +1,255 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f479.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0057; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* SD16_A1 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16AE = 0x00B7; +SD16CONF0 = 0x00F7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x47x3.cmd b/msp430/msp430x47x3.cmd new file mode 100644 index 00000000..a81c5e2c --- /dev/null +++ b/msp430/msp430x47x3.cmd @@ -0,0 +1,342 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f4793.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY_B = 0x0130; +MPYS_B = 0x0132; +MAC_B = 0x0134; +MACS_B = 0x0136; +OP2_B = 0x0138; +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +MPY32L_B = 0x0140; +MPY32H_B = 0x0142; +MPYS32L_B = 0x0144; +MPYS32H_B = 0x0146; +MAC32L_B = 0x0148; +MAC32H_B = 0x014A; +MACS32L_B = 0x014C; +MACS32H_B = 0x014E; +OP2L_B = 0x0150; +OP2H_B = 0x0152; +MPY32L = 0x0140; +MPY32H = 0x0142; +MPYS32L = 0x0144; +MPYS32H = 0x0146; +MAC32L = 0x0148; +MAC32H = 0x014A; +MACS32L = 0x014C; +MACS32H = 0x014E; +OP2L = 0x0150; +OP2H = 0x0152; +RES0 = 0x0154; +RES1 = 0x0156; +RES2 = 0x0158; +RES3 = 0x015A; +MPY32CTL0 = 0x015C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P9REN = 0x0016; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +P10REN = 0x0017; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +PBREN = 0x0016; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* SD16_A3 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +SD16MEM2 = 0x0116; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x016C; +UCB0I2CSA = 0x016E; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x47x4.cmd b/msp430/msp430x47x4.cmd new file mode 100644 index 00000000..3e1a12ea --- /dev/null +++ b/msp430/msp430x47x4.cmd @@ -0,0 +1,346 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f4794.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +UC1IE = 0x0006; +UC1IFG = 0x0007; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +FLL_CTL2 = 0x0055; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY_B = 0x0130; +MPYS_B = 0x0132; +MAC_B = 0x0134; +MACS_B = 0x0136; +OP2_B = 0x0138; +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +MPY32L_B = 0x0140; +MPY32H_B = 0x0142; +MPYS32L_B = 0x0144; +MPYS32H_B = 0x0146; +MAC32L_B = 0x0148; +MAC32H_B = 0x014A; +MACS32L_B = 0x014C; +MACS32H_B = 0x014E; +OP2L_B = 0x0150; +OP2H_B = 0x0152; +MPY32L = 0x0140; +MPY32H = 0x0142; +MPYS32L = 0x0144; +MPYS32H = 0x0146; +MAC32L = 0x0148; +MAC32H = 0x014A; +MACS32L = 0x014C; +MACS32H = 0x014E; +OP2L = 0x0150; +OP2H = 0x0152; +RES0 = 0x0154; +RES1 = 0x0156; +RES2 = 0x0158; +RES3 = 0x015A; +MPY32CTL0 = 0x015C; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1REN = 0x0027; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +P2REN = 0x002F; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P3REN = 0x0010; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +P4REN = 0x0011; +/************************************************************ +* DIGITAL I/O Port5 Pull up / Pull down Resistors +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P5REN = 0x0012; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P7REN = 0x0014; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +P8REN = 0x0015; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +PAREN = 0x0014; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P9REN = 0x0016; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +P10REN = 0x0017; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +PBREN = 0x0016; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* SD16_A4 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16INCTL3 = 0x00B3; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16PRE3 = 0x00BB; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16CCTL3 = 0x0108; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +SD16MEM2 = 0x0116; +SD16MEM3 = 0x0118; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x016C; +UCB0I2CSA = 0x016E; +UCA1CTL0 = 0x00D0; +UCA1CTL1 = 0x00D1; +UCA1BR0 = 0x00D2; +UCA1BR1 = 0x00D3; +UCA1MCTL = 0x00D4; +UCA1STAT = 0x00D5; +UCA1RXBUF = 0x00D6; +UCA1TXBUF = 0x00D7; +UCA1ABCTL = 0x00CD; +UCA1IRTCTL = 0x00CE; +UCA1IRRCTL = 0x00CF; +UCB1CTL0 = 0x00D8; +UCB1CTL1 = 0x00D9; +UCB1BR0 = 0x00DA; +UCB1BR1 = 0x00DB; +UCB1I2CIE = 0x00DC; +UCB1STAT = 0x00DD; +UCB1RXBUF = 0x00DE; +UCB1TXBUF = 0x00DF; +UCB1I2COA = 0x017C; +UCB1I2CSA = 0x017E; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x54x.cmd b/msp430/msp430x54x.cmd new file mode 100644 index 00000000..0dac019f --- /dev/null +++ b/msp430/msp430x54x.cmd @@ -0,0 +1,803 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5438.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL = 0x02AA; +PFSEL_L = 0x02AA; +PFSEL_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0680; +UCA3CTLW0_L = 0x0680; +UCA3CTLW0_H = 0x0681; +UCA3BRW = 0x0686; +UCA3BRW_L = 0x0686; +UCA3BRW_H = 0x0687; +UCA3MCTL = 0x0688; +UCA3STAT = 0x068A; +UCA3RXBUF = 0x068C; +UCA3TXBUF = 0x068E; +UCA3ABCTL = 0x0690; +UCA3IRCTL = 0x0692; +UCA3IRCTL_L = 0x0692; +UCA3IRCTL_H = 0x0693; +UCA3ICTL = 0x069C; +UCA3ICTL_L = 0x069C; +UCA3ICTL_H = 0x069D; +UCA3IV = 0x069E; +/************************************************************ +* USCI B3 +************************************************************/ +UCB3CTLW0 = 0x06A0; +UCB3CTLW0_L = 0x06A0; +UCB3CTLW0_H = 0x06A1; +UCB3BRW = 0x06A6; +UCB3BRW_L = 0x06A6; +UCB3BRW_H = 0x06A7; +UCB3STAT = 0x06AA; +UCB3RXBUF = 0x06AC; +UCB3TXBUF = 0x06AE; +UCB3I2COA = 0x06B0; +UCB3I2COA_L = 0x06B0; +UCB3I2COA_H = 0x06B1; +UCB3I2CSA = 0x06B2; +UCB3I2CSA_L = 0x06B2; +UCB3I2CSA_H = 0x06B3; +UCB3ICTL = 0x06BC; +UCB3ICTL_L = 0x06BC; +UCB3ICTL_H = 0x06BD; +UCB3IV = 0x06BE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x54xa.cmd b/msp430/msp430x54xa.cmd new file mode 100644 index 00000000..263f274a --- /dev/null +++ b/msp430/msp430x54xa.cmd @@ -0,0 +1,821 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5438a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O Port9/10 Pull up / Pull down Resistors +************************************************************/ +PEIN = 0x0280; +PEIN_L = 0x0280; +PEIN_H = 0x0281; +PEOUT = 0x0282; +PEOUT_L = 0x0282; +PEOUT_H = 0x0283; +PEDIR = 0x0284; +PEDIR_L = 0x0284; +PEDIR_H = 0x0285; +PEREN = 0x0286; +PEREN_L = 0x0286; +PEREN_H = 0x0287; +PEDS = 0x0288; +PEDS_L = 0x0288; +PEDS_H = 0x0289; +PESEL = 0x028A; +PESEL_L = 0x028A; +PESEL_H = 0x028B; +/************************************************************ +* DIGITAL I/O Port11 Pull up / Pull down Resistors +************************************************************/ +PFIN = 0x02A0; +PFIN_L = 0x02A0; +PFIN_H = 0x02A1; +PFOUT = 0x02A2; +PFOUT_L = 0x02A2; +PFOUT_H = 0x02A3; +PFDIR = 0x02A4; +PFDIR_L = 0x02A4; +PFDIR_H = 0x02A5; +PFREN = 0x02A6; +PFREN_L = 0x02A6; +PFREN_H = 0x02A7; +PFDS = 0x02A8; +PFDS_L = 0x02A8; +PFDS_H = 0x02A9; +PFSEL = 0x02AA; +PFSEL_L = 0x02AA; +PFSEL_H = 0x02AB; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* USCI A2 +************************************************************/ +UCA2CTLW0 = 0x0640; +UCA2CTLW0_L = 0x0640; +UCA2CTLW0_H = 0x0641; +UCA2BRW = 0x0646; +UCA2BRW_L = 0x0646; +UCA2BRW_H = 0x0647; +UCA2MCTL = 0x0648; +UCA2STAT = 0x064A; +UCA2RXBUF = 0x064C; +UCA2TXBUF = 0x064E; +UCA2ABCTL = 0x0650; +UCA2IRCTL = 0x0652; +UCA2IRCTL_L = 0x0652; +UCA2IRCTL_H = 0x0653; +UCA2ICTL = 0x065C; +UCA2ICTL_L = 0x065C; +UCA2ICTL_H = 0x065D; +UCA2IV = 0x065E; +/************************************************************ +* USCI B2 +************************************************************/ +UCB2CTLW0 = 0x0660; +UCB2CTLW0_L = 0x0660; +UCB2CTLW0_H = 0x0661; +UCB2BRW = 0x0666; +UCB2BRW_L = 0x0666; +UCB2BRW_H = 0x0667; +UCB2STAT = 0x066A; +UCB2RXBUF = 0x066C; +UCB2TXBUF = 0x066E; +UCB2I2COA = 0x0670; +UCB2I2COA_L = 0x0670; +UCB2I2COA_H = 0x0671; +UCB2I2CSA = 0x0672; +UCB2I2CSA_L = 0x0672; +UCB2I2CSA_H = 0x0673; +UCB2ICTL = 0x067C; +UCB2ICTL_L = 0x067C; +UCB2ICTL_H = 0x067D; +UCB2IV = 0x067E; +/************************************************************ +* USCI A3 +************************************************************/ +UCA3CTLW0 = 0x0680; +UCA3CTLW0_L = 0x0680; +UCA3CTLW0_H = 0x0681; +UCA3BRW = 0x0686; +UCA3BRW_L = 0x0686; +UCA3BRW_H = 0x0687; +UCA3MCTL = 0x0688; +UCA3STAT = 0x068A; +UCA3RXBUF = 0x068C; +UCA3TXBUF = 0x068E; +UCA3ABCTL = 0x0690; +UCA3IRCTL = 0x0692; +UCA3IRCTL_L = 0x0692; +UCA3IRCTL_H = 0x0693; +UCA3ICTL = 0x069C; +UCA3ICTL_L = 0x069C; +UCA3ICTL_H = 0x069D; +UCA3IV = 0x069E; +/************************************************************ +* USCI B3 +************************************************************/ +UCB3CTLW0 = 0x06A0; +UCB3CTLW0_L = 0x06A0; +UCB3CTLW0_H = 0x06A1; +UCB3BRW = 0x06A6; +UCB3BRW_L = 0x06A6; +UCB3BRW_H = 0x06A7; +UCB3STAT = 0x06AA; +UCB3RXBUF = 0x06AC; +UCB3TXBUF = 0x06AE; +UCB3I2COA = 0x06B0; +UCB3I2COA_L = 0x06B0; +UCB3I2COA_H = 0x06B1; +UCB3I2CSA = 0x06B2; +UCB3I2CSA_L = 0x06B2; +UCB3I2CSA_H = 0x06B3; +UCB3ICTL = 0x06BC; +UCB3ICTL_L = 0x06BC; +UCB3ICTL_H = 0x06BD; +UCB3IV = 0x06BE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x551x.cmd b/msp430/msp430x551x.cmd new file mode 100644 index 00000000..a08b350d --- /dev/null +++ b/msp430/msp430x551x.cmd @@ -0,0 +1,801 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5519.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430x552x.cmd b/msp430/msp430x552x.cmd new file mode 100644 index 00000000..764d6f5a --- /dev/null +++ b/msp430/msp430x552x.cmd @@ -0,0 +1,886 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430f5529.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC12 PLUS +************************************************************/ +ADC12CTL0 = 0x0700; +ADC12CTL0_L = 0x0700; +ADC12CTL0_H = 0x0701; +ADC12CTL1 = 0x0702; +ADC12CTL1_L = 0x0702; +ADC12CTL1_H = 0x0703; +ADC12CTL2 = 0x0704; +ADC12CTL2_L = 0x0704; +ADC12CTL2_H = 0x0705; +ADC12IFG = 0x070A; +ADC12IFG_L = 0x070A; +ADC12IFG_H = 0x070B; +ADC12IE = 0x070C; +ADC12IE_L = 0x070C; +ADC12IE_H = 0x070D; +ADC12IV = 0x070E; +ADC12IV_L = 0x070E; +ADC12IV_H = 0x070F; +ADC12MEM0 = 0x0720; +ADC12MEM0_L = 0x0720; +ADC12MEM0_H = 0x0721; +ADC12MEM1 = 0x0722; +ADC12MEM1_L = 0x0722; +ADC12MEM1_H = 0x0723; +ADC12MEM2 = 0x0724; +ADC12MEM2_L = 0x0724; +ADC12MEM2_H = 0x0725; +ADC12MEM3 = 0x0726; +ADC12MEM3_L = 0x0726; +ADC12MEM3_H = 0x0727; +ADC12MEM4 = 0x0728; +ADC12MEM4_L = 0x0728; +ADC12MEM4_H = 0x0729; +ADC12MEM5 = 0x072A; +ADC12MEM5_L = 0x072A; +ADC12MEM5_H = 0x072B; +ADC12MEM6 = 0x072C; +ADC12MEM6_L = 0x072C; +ADC12MEM6_H = 0x072D; +ADC12MEM7 = 0x072E; +ADC12MEM7_L = 0x072E; +ADC12MEM7_H = 0x072F; +ADC12MEM8 = 0x0730; +ADC12MEM8_L = 0x0730; +ADC12MEM8_H = 0x0731; +ADC12MEM9 = 0x0732; +ADC12MEM9_L = 0x0732; +ADC12MEM9_H = 0x0733; +ADC12MEM10 = 0x0734; +ADC12MEM10_L = 0x0734; +ADC12MEM10_H = 0x0735; +ADC12MEM11 = 0x0736; +ADC12MEM11_L = 0x0736; +ADC12MEM11_H = 0x0737; +ADC12MEM12 = 0x0738; +ADC12MEM12_L = 0x0738; +ADC12MEM12_H = 0x0739; +ADC12MEM13 = 0x073A; +ADC12MEM13_L = 0x073A; +ADC12MEM13_H = 0x073B; +ADC12MEM14 = 0x073C; +ADC12MEM14_L = 0x073C; +ADC12MEM14_H = 0x073D; +ADC12MEM15 = 0x073E; +ADC12MEM15_L = 0x073E; +ADC12MEM15_H = 0x073F; +ADC12MCTL0 = 0x0710; +ADC12MCTL1 = 0x0711; +ADC12MCTL2 = 0x0712; +ADC12MCTL3 = 0x0713; +ADC12MCTL4 = 0x0714; +ADC12MCTL5 = 0x0715; +ADC12MCTL6 = 0x0716; +ADC12MCTL7 = 0x0717; +ADC12MCTL8 = 0x0718; +ADC12MCTL9 = 0x0719; +ADC12MCTL10 = 0x071A; +ADC12MCTL11 = 0x071B; +ADC12MCTL12 = 0x071C; +ADC12MCTL13 = 0x071D; +ADC12MCTL14 = 0x071E; +ADC12MCTL15 = 0x071F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PCIN = 0x0240; +PCIN_L = 0x0240; +PCIN_H = 0x0241; +PCOUT = 0x0242; +PCOUT_L = 0x0242; +PCOUT_H = 0x0243; +PCDIR = 0x0244; +PCDIR_L = 0x0244; +PCDIR_H = 0x0245; +PCREN = 0x0246; +PCREN_L = 0x0246; +PCREN_H = 0x0247; +PCDS = 0x0248; +PCDS_L = 0x0248; +PCDS_H = 0x0249; +PCSEL = 0x024A; +PCSEL_L = 0x024A; +PCSEL_H = 0x024B; +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PDIN = 0x0260; +PDIN_L = 0x0260; +PDIN_H = 0x0261; +PDOUT = 0x0262; +PDOUT_L = 0x0262; +PDOUT_H = 0x0263; +PDDIR = 0x0264; +PDDIR_L = 0x0264; +PDDIR_H = 0x0265; +PDREN = 0x0266; +PDREN_L = 0x0266; +PDREN_H = 0x0267; +PDDS = 0x0268; +PDDS_L = 0x0268; +PDDS_H = 0x0269; +PDSEL = 0x026A; +PDSEL_L = 0x026A; +PDSEL_H = 0x026B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 4 MAPPING CONTROLLER +************************************************************/ +P4MAP01 = 0x01E0; +P4MAP01_L = 0x01E0; +P4MAP01_H = 0x01E1; +P4MAP23 = 0x01E2; +P4MAP23_L = 0x01E2; +P4MAP23_H = 0x01E3; +P4MAP45 = 0x01E4; +P4MAP45_L = 0x01E4; +P4MAP45_H = 0x01E5; +P4MAP67 = 0x01E6; +P4MAP67_L = 0x01E6; +P4MAP67_H = 0x01E7; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* Real Time Clock +************************************************************/ +RTCCTL01 = 0x04A0; +RTCCTL01_L = 0x04A0; +RTCCTL01_H = 0x04A1; +RTCCTL23 = 0x04A2; +RTCCTL23_L = 0x04A2; +RTCCTL23_H = 0x04A3; +RTCPS0CTL = 0x04A8; +RTCPS0CTL_L = 0x04A8; +RTCPS0CTL_H = 0x04A9; +RTCPS1CTL = 0x04AA; +RTCPS1CTL_L = 0x04AA; +RTCPS1CTL_H = 0x04AB; +RTCPS = 0x04AC; +RTCPS_L = 0x04AC; +RTCPS_H = 0x04AD; +RTCIV = 0x04AE; +RTCTIM0 = 0x04B0; +RTCTIM0_L = 0x04B0; +RTCTIM0_H = 0x04B1; +RTCTIM1 = 0x04B2; +RTCTIM1_L = 0x04B2; +RTCTIM1_H = 0x04B3; +RTCDATE = 0x04B4; +RTCDATE_L = 0x04B4; +RTCDATE_H = 0x04B5; +RTCYEAR = 0x04B6; +RTCYEAR_L = 0x04B6; +RTCYEAR_H = 0x04B7; +RTCAMINHR = 0x04B8; +RTCAMINHR_L = 0x04B8; +RTCAMINHR_H = 0x04B9; +RTCADOWDAY = 0x04BA; +RTCADOWDAY_L = 0x04BA; +RTCADOWDAY_H = 0x04BB; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A5 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0CCTL3 = 0x0348; +TA0CCTL4 = 0x034A; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0CCR3 = 0x0358; +TA0CCR4 = 0x035A; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* Timer1_A3 +************************************************************/ +TA1CTL = 0x0380; +TA1CCTL0 = 0x0382; +TA1CCTL1 = 0x0384; +TA1CCTL2 = 0x0386; +TA1R = 0x0390; +TA1CCR0 = 0x0392; +TA1CCR1 = 0x0394; +TA1CCR2 = 0x0396; +TA1IV = 0x03AE; +TA1EX0 = 0x03A0; +/************************************************************ +* Timer2_A3 +************************************************************/ +TA2CTL = 0x0400; +TA2CCTL0 = 0x0402; +TA2CCTL1 = 0x0404; +TA2CCTL2 = 0x0406; +TA2R = 0x0410; +TA2CCR0 = 0x0412; +TA2CCR1 = 0x0414; +TA2CCR2 = 0x0416; +TA2IV = 0x042E; +TA2EX0 = 0x0420; +/************************************************************ +* Timer0_B7 +************************************************************/ +TB0CTL = 0x03C0; +TB0CCTL0 = 0x03C2; +TB0CCTL1 = 0x03C4; +TB0CCTL2 = 0x03C6; +TB0CCTL3 = 0x03C8; +TB0CCTL4 = 0x03CA; +TB0CCTL5 = 0x03CC; +TB0CCTL6 = 0x03CE; +TB0R = 0x03D0; +TB0CCR0 = 0x03D2; +TB0CCR1 = 0x03D4; +TB0CCR2 = 0x03D6; +TB0CCR3 = 0x03D8; +TB0CCR4 = 0x03DA; +TB0CCR5 = 0x03DC; +TB0CCR6 = 0x03DE; +TB0EX0 = 0x03E0; +TB0IV = 0x03EE; +/************************************************************ +* USB +************************************************************/ +USBKEYID = 0x0900; +USBKEYID_L = 0x0900; +USBKEYID_H = 0x0901; +USBCNF = 0x0902; +USBCNF_L = 0x0902; +USBCNF_H = 0x0903; +USBPHYCTL = 0x0904; +USBPHYCTL_L = 0x0904; +USBPHYCTL_H = 0x0905; +USBPWRCTL = 0x0908; +USBPWRCTL_L = 0x0908; +USBPWRCTL_H = 0x0909; +USBPLLCTL = 0x0910; +USBPLLCTL_L = 0x0910; +USBPLLCTL_H = 0x0911; +USBPLLDIVB = 0x0912; +USBPLLDIVB_L = 0x0912; +USBPLLDIVB_H = 0x0913; +USBPLLIR = 0x0914; +USBPLLIR_L = 0x0914; +USBPLLIR_H = 0x0915; +USBIEPCNF_0 = 0x0920; +USBIEPCNT_0 = 0x0921; +USBOEPCNF_0 = 0x0922; +USBOEPCNT_0 = 0x0923; +USBIEPIE = 0x092E; +USBOEPIE = 0x092F; +USBIEPIFG = 0x0930; +USBOEPIFG = 0x0931; +USBVECINT = 0x0932; +USBVECINT_L = 0x0932; +USBVECINT_H = 0x0933; +USBMAINT = 0x0936; +USBMAINT_L = 0x0936; +USBMAINT_H = 0x0937; +USBTSREG = 0x0938; +USBTSREG_L = 0x0938; +USBTSREG_H = 0x0939; +USBFN = 0x093A; +USBFN_L = 0x093A; +USBFN_H = 0x093B; +USBCTL = 0x093C; +USBIE = 0x093D; +USBIFG = 0x093E; +USBFUNADR = 0x093F; +USBIEPSIZXY_7 = 0x23FF; +USBIEPBCTY_7 = 0x23FE; +USBIEPBBAY_7 = 0x23FD; +USBIEPBCTX_7 = 0x23FA; +USBIEPBBAX_7 = 0x23F9; +USBIEPCNF_7 = 0x23F8; +USBIEPSIZXY_6 = 0x23F7; +USBIEPBCTY_6 = 0x23F6; +USBIEPBBAY_6 = 0x23F5; +USBIEPBCTX_6 = 0x23F2; +USBIEPBBAX_6 = 0x23F1; +USBIEPCNF_6 = 0x23F0; +USBIEPSIZXY_5 = 0x23EF; +USBIEPBCTY_5 = 0x23EE; +USBIEPBBAY_5 = 0x23ED; +USBIEPBCTX_5 = 0x23EA; +USBIEPBBAX_5 = 0x23E9; +USBIEPCNF_5 = 0x23E8; +USBIEPSIZXY_4 = 0x23E7; +USBIEPBCTY_4 = 0x23E6; +USBIEPBBAY_4 = 0x23E5; +USBIEPBCTX_4 = 0x23E2; +USBIEPBBAX_4 = 0x23E1; +USBIEPCNF_4 = 0x23E0; +USBIEPSIZXY_3 = 0x23DF; +USBIEPBCTY_3 = 0x23DE; +USBIEPBBAY_3 = 0x23DD; +USBIEPBCTX_3 = 0x23DA; +USBIEPBBAX_3 = 0x23D9; +USBIEPCNF_3 = 0x23D8; +USBIEPSIZXY_2 = 0x23D7; +USBIEPBCTY_2 = 0x23D6; +USBIEPBBAY_2 = 0x23D5; +USBIEPBCTX_2 = 0x23D2; +USBIEPBBAX_2 = 0x23D1; +USBIEPCNF_2 = 0x23D0; +USBIEPSIZXY_1 = 0x23CF; +USBIEPBCTY_1 = 0x23CE; +USBIEPBBAY_1 = 0x23CD; +USBIEPBCTX_1 = 0x23CA; +USBIEPBBAX_1 = 0x23C9; +USBIEPCNF_1 = 0x23C8; +USBOEPSIZXY_7 = 0x23BF; +USBOEPBCTY_7 = 0x23BE; +USBOEPBBAY_7 = 0x23BD; +USBOEPBCTX_7 = 0x23BA; +USBOEPBBAX_7 = 0x23B9; +USBOEPCNF_7 = 0x23B8; +USBOEPSIZXY_6 = 0x23B7; +USBOEPBCTY_6 = 0x23B6; +USBOEPBBAY_6 = 0x23B5; +USBOEPBCTX_6 = 0x23B2; +USBOEPBBAX_6 = 0x23B1; +USBOEPCNF_6 = 0x23B0; +USBOEPSIZXY_5 = 0x23AF; +USBOEPBCTY_5 = 0x23AE; +USBOEPBBAY_5 = 0x23AD; +USBOEPBCTX_5 = 0x23AA; +USBOEPBBAX_5 = 0x23A9; +USBOEPCNF_5 = 0x23A8; +USBOEPSIZXY_4 = 0x23A7; +USBOEPBCTY_4 = 0x23A6; +USBOEPBBAY_4 = 0x23A5; +USBOEPBCTX_4 = 0x23A2; +USBOEPBBAX_4 = 0x23A1; +USBOEPCNF_4 = 0x23A0; +USBOEPSIZXY_3 = 0x239F; +USBOEPBCTY_3 = 0x239E; +USBOEPBBAY_3 = 0x239D; +USBOEPBCTX_3 = 0x239A; +USBOEPBBAX_3 = 0x2399; +USBOEPCNF_3 = 0x2398; +USBOEPSIZXY_2 = 0x2397; +USBOEPBCTY_2 = 0x2396; +USBOEPBBAY_2 = 0x2395; +USBOEPBCTX_2 = 0x2392; +USBOEPBBAX_2 = 0x2391; +USBOEPCNF_2 = 0x2390; +USBOEPSIZXY_1 = 0x238F; +USBOEPBCTY_1 = 0x238E; +USBOEPBBAY_1 = 0x238D; +USBOEPBCTX_1 = 0x238A; +USBOEPBBAX_1 = 0x2389; +USBOEPCNF_1 = 0x2388; +USBSUBLK = 0x2380; +USBIEP0BUF = 0x2378; +USBOEP0BUF = 0x2370; +USBTOPBUFF = 0x236F; +USBSTABUFF = 0x1C00; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* USCI A1 +************************************************************/ +UCA1CTLW0 = 0x0600; +UCA1CTLW0_L = 0x0600; +UCA1CTLW0_H = 0x0601; +UCA1BRW = 0x0606; +UCA1BRW_L = 0x0606; +UCA1BRW_H = 0x0607; +UCA1MCTL = 0x0608; +UCA1STAT = 0x060A; +UCA1RXBUF = 0x060C; +UCA1TXBUF = 0x060E; +UCA1ABCTL = 0x0610; +UCA1IRCTL = 0x0612; +UCA1IRCTL_L = 0x0612; +UCA1IRCTL_H = 0x0613; +UCA1ICTL = 0x061C; +UCA1ICTL_L = 0x061C; +UCA1ICTL_H = 0x061D; +UCA1IV = 0x061E; +/************************************************************ +* USCI B1 +************************************************************/ +UCB1CTLW0 = 0x0620; +UCB1CTLW0_L = 0x0620; +UCB1CTLW0_H = 0x0621; +UCB1BRW = 0x0626; +UCB1BRW_L = 0x0626; +UCB1BRW_H = 0x0627; +UCB1STAT = 0x062A; +UCB1RXBUF = 0x062C; +UCB1TXBUF = 0x062E; +UCB1I2COA = 0x0630; +UCB1I2COA_L = 0x0630; +UCB1I2COA_H = 0x0631; +UCB1I2CSA = 0x0632; +UCB1I2CSA_L = 0x0632; +UCB1I2CSA_H = 0x0633; +UCB1ICTL = 0x063C; +UCB1ICTL_L = 0x063C; +UCB1ICTL_H = 0x063D; +UCB1IV = 0x063E; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430xe42x.cmd b/msp430/msp430xe42x.cmd new file mode 100644 index 00000000..78663b7d --- /dev/null +++ b/msp430/msp430xe42x.cmd @@ -0,0 +1,240 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fe427.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* SD16 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +SD16MEM2 = 0x0116; +/************************************************************ +* ESP430E +************************************************************/ +ESPCTL = 0x0150; +MBCTL = 0x0152; +MBIN0 = 0x0154; +MBIN1 = 0x0156; +MBOUT0 = 0x0158; +MBOUT1 = 0x015A; +ESP430_STAT0 = 0x01C0; +ESP430_STAT1 = 0x01C2; +WAVEFSV1 = 0x01C4; +RET3 = 0x01C6; +RET4 = 0x01C8; +WAVEFSI1 = 0x01CA; +WAVEFSI2 = 0x01CC; +RET7 = 0x01CE; +ACTENERGY1_LO = 0x01D0; +ACTENERGY1_HI = 0x01D2; +ACTENERGY2_LO = 0x01D4; +ACTENERGY2_HI = 0x01D6; +REACTENERGY_LO = 0x01D8; +REACTENERGY_HI = 0x01DA; +APPENERGY_LO = 0x01DC; +APPENERGY_HI = 0x01DE; +ACTENSPER1_LO = 0x01E0; +ACTENSPER1_HI = 0x01E2; +ACTENSPER2_LO = 0x01E4; +ACTENSPER2_HI = 0x01E6; +POWERFCT = 0x01E8; +CAPIND = 0x01EA; +MAINSPERIOD = 0x01EC; +V1RMS = 0x01EE; +IRMS_LO = 0x01F0; +IRMS_HI = 0x01F2; +VPEAK = 0x01F4; +IPEAK = 0x01F6; +LINECYCLCNT_LO = 0x01F8; +LINECYCLCNT_HI = 0x01FA; +NMBMEAS_LO = 0x01FC; +NMBMEAS_HI = 0x01FE; + /* 1: I2 path implemented (CT, dc-tol CT or shunt) */ + /* 1: Rogowski coil (not yet implemented) */ +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430xe42x2.cmd b/msp430/msp430xe42x2.cmd new file mode 100644 index 00000000..3c7197b0 --- /dev/null +++ b/msp430/msp430xe42x2.cmd @@ -0,0 +1,231 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fe4272.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* SD16 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +/************************************************************ +* ESP430E +************************************************************/ +ESPCTL = 0x0150; +MBCTL = 0x0152; +MBIN0 = 0x0154; +MBIN1 = 0x0156; +MBOUT0 = 0x0158; +MBOUT1 = 0x015A; +ESP430_STAT0 = 0x01C0; +ESP430_STAT1 = 0x01C2; +WAVEFSV1 = 0x01C4; +RET3 = 0x01C6; +RET4 = 0x01C8; +WAVEFSI1 = 0x01CA; +RET7 = 0x01CE; +ACTENERGY1_LO = 0x01D0; +ACTENERGY1_HI = 0x01D2; +REACTENERGY_LO = 0x01D8; +REACTENERGY_HI = 0x01DA; +APPENERGY_LO = 0x01DC; +APPENERGY_HI = 0x01DE; +ACTENSPER1_LO = 0x01E0; +ACTENSPER1_HI = 0x01E2; +IRMS_2_HI = 0x01E4; +IRMS_2_LO = 0x01E6; +POWERFCT = 0x01E8; +MAINSPERIOD = 0x01EC; +V1RMS = 0x01EE; +IRMS_LO = 0x01F0; +IRMS_HI = 0x01F2; +VPEAK = 0x01F4; +IPEAK = 0x01F6; +LINECYCLCNT_LO = 0x01F8; +LINECYCLCNT_HI = 0x01FA; +NMBMEAS_LO = 0x01FC; +NMBMEAS_HI = 0x01FE; + /* 1: Rogowski coil (not yet implemented) */ +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430xe42xa.cmd b/msp430/msp430xe42xa.cmd new file mode 100644 index 00000000..f3bea506 --- /dev/null +++ b/msp430/msp430xe42xa.cmd @@ -0,0 +1,239 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fe427a.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* SD16 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16INCTL1 = 0x00B1; +SD16INCTL2 = 0x00B2; +SD16PRE0 = 0x00B8; +SD16PRE1 = 0x00B9; +SD16PRE2 = 0x00BA; +SD16CONF0 = 0x00B7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16CCTL1 = 0x0104; +SD16CCTL2 = 0x0106; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +SD16MEM1 = 0x0114; +SD16MEM2 = 0x0116; +/************************************************************ +* ESP430E +************************************************************/ +ESPCTL = 0x0150; +MBCTL = 0x0152; +MBIN0 = 0x0154; +MBIN1 = 0x0156; +MBOUT0 = 0x0158; +MBOUT1 = 0x015A; +ESP430_STAT0 = 0x01C0; +ESP430_STAT1 = 0x01C2; +WAVEFSV1 = 0x01C4; +RET3 = 0x01C6; +RET4 = 0x01C8; +WAVEFSI1 = 0x01CA; +WAVEFSI2 = 0x01CC; +RET7 = 0x01CE; +ACTENERGY1_LO = 0x01D0; +ACTENERGY1_HI = 0x01D2; +ACTENERGY2_LO = 0x01D4; +ACTENERGY2_HI = 0x01D6; +REACTENERGY_LO = 0x01D8; +REACTENERGY_HI = 0x01DA; +APPENERGY_LO = 0x01DC; +APPENERGY_HI = 0x01DE; +ACTENSPER1_LO = 0x01E0; +ACTENSPER1_HI = 0x01E2; +ACTENSPER2_LO = 0x01E4; +ACTENSPER2_HI = 0x01E6; +POWERFCT = 0x01E8; +MAINSPERIOD = 0x01EC; +V1RMS = 0x01EE; +IRMS_LO = 0x01F0; +IRMS_HI = 0x01F2; +VPEAK = 0x01F4; +IPEAK = 0x01F6; +LINECYCLCNT_LO = 0x01F8; +LINECYCLCNT_HI = 0x01FA; +NMBMEAS_LO = 0x01FC; +NMBMEAS_HI = 0x01FE; + /* 1: I2 path implemented (CT, dc-tol CT or shunt) */ + /* 1: Rogowski coil (not yet implemented) */ +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430xg42x0.cmd b/msp430/msp430xg42x0.cmd new file mode 100644 index 00000000..0cf8e1ac --- /dev/null +++ b/msp430/msp430xg42x0.cmd @@ -0,0 +1,187 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fg4270.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SD16_A1 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16AE = 0x00B7; +SD16CONF0 = 0x00F7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_0DAT = 0x01C8; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x00C0; +OA0CTL1 = 0x00C1; +OA1CTL0 = 0x00C2; +OA1CTL1 = 0x00C3; +SWCTL = 0x00CF; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430xg43x.cmd b/msp430/msp430xg43x.cmd new file mode 100644 index 00000000..3a5ad08b --- /dev/null +++ b/msp430/msp430xg43x.cmd @@ -0,0 +1,271 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fg439.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +ME1 = 0x0004; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 0 +************************************************************/ +U0CTL = 0x0070; +U0TCTL = 0x0071; +U0RCTL = 0x0072; +U0MCTL = 0x0073; +U0BR0 = 0x0074; +U0BR1 = 0x0075; +U0RXBUF = 0x0076; +U0TXBUF = 0x0077; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMA0CTL = 0x01E0; +DMA0SA = 0x01E2; +DMA0DA = 0x01E4; +DMA0SZ = 0x01E6; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x00C0; +OA0CTL1 = 0x00C1; +OA1CTL0 = 0x00C2; +OA1CTL1 = 0x00C3; +OA2CTL0 = 0x00C4; +OA2CTL1 = 0x00C5; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430xg46x.cmd b/msp430/msp430xg46x.cmd new file mode 100644 index 00000000..aaaa9c65 --- /dev/null +++ b/msp430/msp430xg46x.cmd @@ -0,0 +1,378 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fg4619.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +ME2 = 0x0005; +/************************************************************ +* ADC12 +************************************************************/ +ADC12CTL0 = 0x01A0; +ADC12CTL1 = 0x01A2; +ADC12IFG = 0x01A4; +ADC12IE = 0x01A6; +ADC12IV = 0x01A8; +ADC12MEM0 = 0x0140; +ADC12MEM1 = 0x0142; +ADC12MEM2 = 0x0144; +ADC12MEM3 = 0x0146; +ADC12MEM4 = 0x0148; +ADC12MEM5 = 0x014A; +ADC12MEM6 = 0x014C; +ADC12MEM7 = 0x014E; +ADC12MEM8 = 0x0150; +ADC12MEM9 = 0x0152; +ADC12MEM10 = 0x0154; +ADC12MEM11 = 0x0156; +ADC12MEM12 = 0x0158; +ADC12MEM13 = 0x015A; +ADC12MEM14 = 0x015C; +ADC12MEM15 = 0x015E; +ADC12MCTL0 = 0x0080; +ADC12MCTL1 = 0x0081; +ADC12MCTL2 = 0x0082; +ADC12MCTL3 = 0x0083; +ADC12MCTL4 = 0x0084; +ADC12MCTL5 = 0x0085; +ADC12MCTL6 = 0x0086; +ADC12MCTL7 = 0x0087; +ADC12MCTL8 = 0x0088; +ADC12MCTL9 = 0x0089; +ADC12MCTL10 = 0x008A; +ADC12MCTL11 = 0x008B; +ADC12MCTL12 = 0x008C; +ADC12MCTL13 = 0x008D; +ADC12MCTL14 = 0x008E; +ADC12MCTL15 = 0x008F; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0122; +DMACTL1 = 0x0124; +DMAIV = 0x0126; +DMA0CTL = 0x01D0; +DMA1CTL = 0x01DC; +DMA2CTL = 0x01E8; +DMA0SA = 0x01D2; +DMA0SAL = 0x01D2; +DMA0DA = 0x01D6; +DMA0DAL = 0x01D6; +DMA0SZ = 0x01DA; +DMA1SA = 0x01DE; +DMA1SAL = 0x01DE; +DMA1DA = 0x01E2; +DMA1DAL = 0x01E2; +DMA1SZ = 0x01E6; +DMA2SA = 0x01EA; +DMA2SAL = 0x01EA; +DMA2DA = 0x01EE; +DMA2DAL = 0x01EE; +DMA2SZ = 0x01F2; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +MPY = 0x0130; +MPYS = 0x0132; +MAC = 0x0134; +MACS = 0x0136; +OP2 = 0x0138; +RESLO = 0x013A; +RESHI = 0x013C; +SUMEXT = 0x013E; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x00C0; +OA0CTL1 = 0x00C1; +OA1CTL0 = 0x00C2; +OA1CTL1 = 0x00C3; +OA2CTL0 = 0x00C4; +OA2CTL1 = 0x00C5; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* DIGITAL I/O Port7/8 +************************************************************/ +P7IN = 0x0038; +P7OUT = 0x003A; +P7DIR = 0x003C; +P7SEL = 0x003E; +P8IN = 0x0039; +P8OUT = 0x003B; +P8DIR = 0x003D; +P8SEL = 0x003F; +PAIN = 0x0038; +PAOUT = 0x003A; +PADIR = 0x003C; +PASEL = 0x003E; +/************************************************************ +* DIGITAL I/O Port9/10 +************************************************************/ +P9IN = 0x0008; +P9OUT = 0x000A; +P9DIR = 0x000C; +P9SEL = 0x000E; +P10IN = 0x0009; +P10OUT = 0x000B; +P10DIR = 0x000D; +P10SEL = 0x000F; +PBIN = 0x0008; +PBOUT = 0x000A; +PBDIR = 0x000C; +PBSEL = 0x000E; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B7 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBCCTL3 = 0x0188; +TBCCTL4 = 0x018A; +TBCCTL5 = 0x018C; +TBCCTL6 = 0x018E; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +TBCCR3 = 0x0198; +TBCCR4 = 0x019A; +TBCCR5 = 0x019C; +TBCCR6 = 0x019E; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* USART +************************************************************/ +/************************************************************ +* USART 1 +************************************************************/ +U1CTL = 0x0078; +U1TCTL = 0x0079; +U1RCTL = 0x007A; +U1MCTL = 0x007B; +U1BR0 = 0x007C; +U1BR1 = 0x007D; +U1RXBUF = 0x007E; +U1TXBUF = 0x007F; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430xg47x.cmd b/msp430/msp430xg47x.cmd new file mode 100644 index 00000000..8e4ca067 --- /dev/null +++ b/msp430/msp430xg47x.cmd @@ -0,0 +1,265 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fg479.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* BASIC TIMER with Real Time Clock +************************************************************/ +BTCTL = 0x0040; +RTCCTL = 0x0041; +RTCNT1 = 0x0042; +RTCNT2 = 0x0043; +RTCNT3 = 0x0044; +RTCNT4 = 0x0045; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +RTCDAY = 0x004C; +RTCMON = 0x004D; +RTCYEARL = 0x004E; +RTCYEARH = 0x004F; +RTCTL = 0x0040; +RTCTIM0 = 0x0042; +RTCTIM1 = 0x0044; +BTCNT12 = 0x0046; +RTCDATE = 0x004C; +RTCYEAR = 0x004E; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* DAC12 +************************************************************/ +DAC12_0CTL = 0x01C0; +DAC12_1CTL = 0x01C2; +DAC12_0DAT = 0x01C8; +DAC12_1DAT = 0x01CA; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +FCTL4 = 0x01BE; +/************************************************************ +* SYSTEM CLOCK, FLL+ +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* LCD_A +************************************************************/ +LCDACTL = 0x0090; +LCDAPCTL0 = 0x00AC; +LCDAPCTL1 = 0x00AD; +LCDAVCTL0 = 0x00AE; +LCDAVCTL1 = 0x00AF; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Operational Amplifier +************************************************************/ +OA0CTL0 = 0x00C0; +OA0CTL1 = 0x00C1; +OA1CTL0 = 0x00C2; +OA1CTL1 = 0x00C3; +OASWCTL0 = 0x00CE; +OASWCTL0L = 0x00CE; +OASWCTL0H = 0x00CF; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P1SEL2 = 0x0057; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* SD16_A1 - Sigma Delta 16 Bit +************************************************************/ +SD16INCTL0 = 0x00B0; +SD16AE = 0x00B7; +SD16CONF0 = 0x00F7; +SD16CONF1 = 0x00BF; + /* Please use only the recommended settings */ +SD16CTL = 0x0100; +SD16CCTL0 = 0x0102; +SD16IV = 0x0110; +SD16MEM0 = 0x0112; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* Timer A3 +************************************************************/ +TAIV = 0x012E; +TACTL = 0x0160; +TACCTL0 = 0x0162; +TACCTL1 = 0x0164; +TACCTL2 = 0x0166; +TAR = 0x0170; +TACCR0 = 0x0172; +TACCR1 = 0x0174; +TACCR2 = 0x0176; +/************************************************************ +* Timer B3 +************************************************************/ +TBIV = 0x011E; +TBCTL = 0x0180; +TBCCTL0 = 0x0182; +TBCCTL1 = 0x0184; +TBCCTL2 = 0x0186; +TBR = 0x0190; +TBCCR0 = 0x0192; +TBCCR1 = 0x0194; +TBCCR2 = 0x0196; +/************************************************************ +* USCI +************************************************************/ +UCA0CTL0 = 0x0060; +UCA0CTL1 = 0x0061; +UCA0BR0 = 0x0062; +UCA0BR1 = 0x0063; +UCA0MCTL = 0x0064; +UCA0STAT = 0x0065; +UCA0RXBUF = 0x0066; +UCA0TXBUF = 0x0067; +UCA0ABCTL = 0x005D; +UCA0IRTCTL = 0x005E; +UCA0IRRCTL = 0x005F; +UCB0CTL0 = 0x0068; +UCB0CTL1 = 0x0069; +UCB0BR0 = 0x006A; +UCB0BR1 = 0x006B; +UCB0I2CIE = 0x006C; +UCB0STAT = 0x006D; +UCB0RXBUF = 0x006E; +UCB0TXBUF = 0x006F; +UCB0I2COA = 0x0118; +UCB0I2CSA = 0x011A; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/msp430xw42x.cmd b/msp430/msp430xw42x.cmd new file mode 100644 index 00000000..a7f4cbe0 --- /dev/null +++ b/msp430/msp430xw42x.cmd @@ -0,0 +1,238 @@ +/******************************************************************************/ +/* Legacy Linker Command File */ +/* Not recommended for use in new projects. */ +/* Please use the device specific cmd file */ +/******************************************************************************/ + +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* msp430fw429.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +IE1 = 0x0000; +IFG1 = 0x0002; +IE2 = 0x0001; +IFG2 = 0x0003; +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +WDTCTL = 0x0120; +/************************************************************ +* DIGITAL I/O Port1/2 +************************************************************/ +P1IN = 0x0020; +P1OUT = 0x0021; +P1DIR = 0x0022; +P1IFG = 0x0023; +P1IES = 0x0024; +P1IE = 0x0025; +P1SEL = 0x0026; +P2IN = 0x0028; +P2OUT = 0x0029; +P2DIR = 0x002A; +P2IFG = 0x002B; +P2IES = 0x002C; +P2IE = 0x002D; +P2SEL = 0x002E; +/************************************************************ +* DIGITAL I/O Port3/4 +************************************************************/ +P3IN = 0x0018; +P3OUT = 0x0019; +P3DIR = 0x001A; +P3SEL = 0x001B; +P4IN = 0x001C; +P4OUT = 0x001D; +P4DIR = 0x001E; +P4SEL = 0x001F; +/************************************************************ +* DIGITAL I/O Port5/6 +************************************************************/ +P5IN = 0x0030; +P5OUT = 0x0031; +P5DIR = 0x0032; +P5SEL = 0x0033; +P6IN = 0x0034; +P6OUT = 0x0035; +P6DIR = 0x0036; +P6SEL = 0x0037; +/************************************************************ +* BASIC TIMER +************************************************************/ +BTCTL = 0x0040; +BTCNT1 = 0x0046; +BTCNT2 = 0x0047; +/************************************************************ +* SYSTEM CLOCK, FLL+ (x41x) +************************************************************/ +SCFI0 = 0x0050; +SCFI1 = 0x0051; +SCFQCTL = 0x0052; +FLL_CTL0 = 0x0053; +FLL_CTL1 = 0x0054; +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +SVSCTL = 0x0056; +/************************************************************ +* LCD +************************************************************/ +LCDCTL = 0x0090; +LCDM1 = 0x0091; +LCDM2 = 0x0092; +LCDM3 = 0x0093; +LCDM4 = 0x0094; +LCDM5 = 0x0095; +LCDM6 = 0x0096; +LCDM7 = 0x0097; +LCDM8 = 0x0098; +LCDM9 = 0x0099; +LCDM10 = 0x009A; +LCDM11 = 0x009B; +LCDM12 = 0x009C; +LCDM13 = 0x009D; +LCDM14 = 0x009E; +LCDM15 = 0x009F; +LCDM16 = 0x00A0; +LCDM17 = 0x00A1; +LCDM18 = 0x00A2; +LCDM19 = 0x00A3; +LCDM20 = 0x00A4; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0IV = 0x012E; +TA0CTL = 0x0160; +TA0CCTL0 = 0x0162; +TA0CCTL1 = 0x0164; +TA0CCTL2 = 0x0166; +TA0R = 0x0170; +TA0CCR0 = 0x0172; +TA0CCR1 = 0x0174; +TA0CCR2 = 0x0176; +/************************************************************ +* Timer1_A5 +************************************************************/ +TA1IV = 0x011E; +TA1CTL = 0x0180; +TA1CCTL0 = 0x0182; +TA1CCTL1 = 0x0184; +TA1CCTL2 = 0x0186; +TA1CCTL3 = 0x0188; +TA1CCTL4 = 0x018A; +TA1R = 0x0190; +TA1CCR0 = 0x0192; +TA1CCR1 = 0x0194; +TA1CCR2 = 0x0196; +TA1CCR3 = 0x0198; +TA1CCR4 = 0x019A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0128; +FCTL2 = 0x012A; +FCTL3 = 0x012C; +/************************************************************ +* Comparator A +************************************************************/ +CACTL1 = 0x0059; +CACTL2 = 0x005A; +CAPD = 0x005B; +/************************************************************ +* Scan-I/F +************************************************************/ +SIFDEBUG = 0x01B0; +SIFCNT = 0x01B2; +SIFPSMV = 0x01B4; +SIFCTL1 = 0x01B6; +SIFCTL2 = 0x01B8; +SIFCTL3 = 0x01BA; +SIFCTL4 = 0x01BC; +SIFCTL5 = 0x01BE; +SIFDACR0 = 0x01C0; +SIFDACR1 = 0x01C2; +SIFDACR2 = 0x01C4; +SIFDACR3 = 0x01C6; +SIFDACR4 = 0x01C8; +SIFDACR5 = 0x01CA; +SIFDACR6 = 0x01CC; +SIFDACR7 = 0x01CE; +SIFTSM0 = 0x01D0; +SIFTSM1 = 0x01D2; +SIFTSM2 = 0x01D4; +SIFTSM3 = 0x01D6; +SIFTSM4 = 0x01D8; +SIFTSM5 = 0x01DA; +SIFTSM6 = 0x01DC; +SIFTSM7 = 0x01DE; +SIFTSM8 = 0x01E0; +SIFTSM9 = 0x01E2; +SIFTSM10 = 0x01E4; +SIFTSM11 = 0x01E6; +SIFTSM12 = 0x01E8; +SIFTSM13 = 0x01EA; +SIFTSM14 = 0x01EC; +SIFTSM15 = 0x01EE; +SIFTSM16 = 0x01F0; +SIFTSM17 = 0x01F2; +SIFTSM18 = 0x01F4; +SIFTSM19 = 0x01F6; +SIFTSM20 = 0x01F8; +SIFTSM21 = 0x01FA; +SIFTSM22 = 0x01FC; +SIFTSM23 = 0x01FE; +/************************************************************ +* Interrupt Vectors (offset from 0xFFE0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/rf430f5144.cmd b/msp430/rf430f5144.cmd new file mode 100644 index 00000000..188c536b --- /dev/null +++ b/msp430/rf430f5144.cmd @@ -0,0 +1,633 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* rf430f5144.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x03C0; +TA0CCTL0 = 0x03C2; +TA0CCTL1 = 0x03C4; +TA0CCTL2 = 0x03C6; +TA0R = 0x03D0; +TA0CCR0 = 0x03D2; +TA0CCR1 = 0x03D4; +TA0CCR2 = 0x03D6; +TA0IV = 0x03EE; +TA0EX0 = 0x03E0; +/************************************************************ +* Timer0_D3 +************************************************************/ +TD0CTL0 = 0x0B00; +TD0CTL1 = 0x0B02; +TD0CTL2 = 0x0B04; +TD0R = 0x0B06; +TD0CCTL0 = 0x0B08; +TD0CCR0 = 0x0B0A; +TD0CL0 = 0x0B0C; +TD0CCTL1 = 0x0B0E; +TD0CCR1 = 0x0B10; +TD0CL1 = 0x0B12; +TD0CCTL2 = 0x0B14; +TD0CCR2 = 0x0B16; +TD0CL2 = 0x0B18; +TD0HCTL0 = 0x0B38; +TD0HCTL1 = 0x0B3A; +TD0HINT = 0x0B3C; +TD0IV = 0x0B3E; +/************************************************************ +* Timer1_D3 +************************************************************/ +TD1CTL0 = 0x0B40; +TD1CTL1 = 0x0B42; +TD1CTL2 = 0x0B44; +TD1R = 0x0B46; +TD1CCTL0 = 0x0B48; +TD1CCR0 = 0x0B4A; +TD1CL0 = 0x0B4C; +TD1CCTL1 = 0x0B4E; +TD1CCR1 = 0x0B50; +TD1CL1 = 0x0B52; +TD1CCTL2 = 0x0B54; +TD1CCR2 = 0x0B56; +TD1CL2 = 0x0B58; +TD1HCTL0 = 0x0B78; +TD1HCTL1 = 0x0B7A; +TD1HINT = 0x0B7C; +TD1IV = 0x0B7E; +/************************************************************ +* Timer Event Control 0 +************************************************************/ +TEC0XCTL0 = 0x0C00; +TEC0XCTL0_L = 0x0C00; +TEC0XCTL0_H = 0x0C01; +TEC0XCTL1 = 0x0C02; +TEC0XCTL1_L = 0x0C02; +TEC0XCTL1_H = 0x0C03; +TEC0XCTL2 = 0x0C04; +TEC0XCTL2_L = 0x0C04; +TEC0XCTL2_H = 0x0C05; +TEC0STA = 0x0C06; +TEC0STA_L = 0x0C06; +TEC0STA_H = 0x0C07; +TEC0XINT = 0x0C08; +TEC0XINT_L = 0x0C08; +TEC0XINT_H = 0x0C09; +TEC0IV = 0x0C0A; +TEC0IV_L = 0x0C0A; +TEC0IV_H = 0x0C0B; +/************************************************************ +* Timer Event Control 1 +************************************************************/ +TEC1XCTL0 = 0x0C20; +TEC1XCTL0_L = 0x0C20; +TEC1XCTL0_H = 0x0C21; +TEC1XCTL1 = 0x0C22; +TEC1XCTL1_L = 0x0C22; +TEC1XCTL1_H = 0x0C23; +TEC1XCTL2 = 0x0C24; +TEC1XCTL2_L = 0x0C24; +TEC1XCTL2_H = 0x0C25; +TEC1STA = 0x0C26; +TEC1STA_L = 0x0C26; +TEC1STA_H = 0x0C27; +TEC1XINT = 0x0C28; +TEC1XINT_L = 0x0C28; +TEC1XINT_H = 0x0C29; +TEC1IV = 0x0C2A; +TEC1IV_L = 0x0C2A; +TEC1IV_H = 0x0C2B; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/rf430f5155.cmd b/msp430/rf430f5155.cmd new file mode 100644 index 00000000..25255914 --- /dev/null +++ b/msp430/rf430f5155.cmd @@ -0,0 +1,633 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* rf430f5155.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x03C0; +TA0CCTL0 = 0x03C2; +TA0CCTL1 = 0x03C4; +TA0CCTL2 = 0x03C6; +TA0R = 0x03D0; +TA0CCR0 = 0x03D2; +TA0CCR1 = 0x03D4; +TA0CCR2 = 0x03D6; +TA0IV = 0x03EE; +TA0EX0 = 0x03E0; +/************************************************************ +* Timer0_D3 +************************************************************/ +TD0CTL0 = 0x0B00; +TD0CTL1 = 0x0B02; +TD0CTL2 = 0x0B04; +TD0R = 0x0B06; +TD0CCTL0 = 0x0B08; +TD0CCR0 = 0x0B0A; +TD0CL0 = 0x0B0C; +TD0CCTL1 = 0x0B0E; +TD0CCR1 = 0x0B10; +TD0CL1 = 0x0B12; +TD0CCTL2 = 0x0B14; +TD0CCR2 = 0x0B16; +TD0CL2 = 0x0B18; +TD0HCTL0 = 0x0B38; +TD0HCTL1 = 0x0B3A; +TD0HINT = 0x0B3C; +TD0IV = 0x0B3E; +/************************************************************ +* Timer1_D3 +************************************************************/ +TD1CTL0 = 0x0B40; +TD1CTL1 = 0x0B42; +TD1CTL2 = 0x0B44; +TD1R = 0x0B46; +TD1CCTL0 = 0x0B48; +TD1CCR0 = 0x0B4A; +TD1CL0 = 0x0B4C; +TD1CCTL1 = 0x0B4E; +TD1CCR1 = 0x0B50; +TD1CL1 = 0x0B52; +TD1CCTL2 = 0x0B54; +TD1CCR2 = 0x0B56; +TD1CL2 = 0x0B58; +TD1HCTL0 = 0x0B78; +TD1HCTL1 = 0x0B7A; +TD1HINT = 0x0B7C; +TD1IV = 0x0B7E; +/************************************************************ +* Timer Event Control 0 +************************************************************/ +TEC0XCTL0 = 0x0C00; +TEC0XCTL0_L = 0x0C00; +TEC0XCTL0_H = 0x0C01; +TEC0XCTL1 = 0x0C02; +TEC0XCTL1_L = 0x0C02; +TEC0XCTL1_H = 0x0C03; +TEC0XCTL2 = 0x0C04; +TEC0XCTL2_L = 0x0C04; +TEC0XCTL2_H = 0x0C05; +TEC0STA = 0x0C06; +TEC0STA_L = 0x0C06; +TEC0STA_H = 0x0C07; +TEC0XINT = 0x0C08; +TEC0XINT_L = 0x0C08; +TEC0XINT_H = 0x0C09; +TEC0IV = 0x0C0A; +TEC0IV_L = 0x0C0A; +TEC0IV_H = 0x0C0B; +/************************************************************ +* Timer Event Control 1 +************************************************************/ +TEC1XCTL0 = 0x0C20; +TEC1XCTL0_L = 0x0C20; +TEC1XCTL0_H = 0x0C21; +TEC1XCTL1 = 0x0C22; +TEC1XCTL1_L = 0x0C22; +TEC1XCTL1_H = 0x0C23; +TEC1XCTL2 = 0x0C24; +TEC1XCTL2_L = 0x0C24; +TEC1XCTL2_H = 0x0C25; +TEC1STA = 0x0C26; +TEC1STA_L = 0x0C26; +TEC1STA_H = 0x0C27; +TEC1XINT = 0x0C28; +TEC1XINT_L = 0x0C28; +TEC1XINT_H = 0x0C29; +TEC1IV = 0x0C2A; +TEC1IV_L = 0x0C2A; +TEC1IV_H = 0x0C2B; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/rf430f5175.cmd b/msp430/rf430f5175.cmd new file mode 100644 index 00000000..84d05e65 --- /dev/null +++ b/msp430/rf430f5175.cmd @@ -0,0 +1,633 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* rf430f5175.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* ADC10_A +************************************************************/ +ADC10CTL0 = 0x0740; +ADC10CTL0_L = 0x0740; +ADC10CTL0_H = 0x0741; +ADC10CTL1 = 0x0742; +ADC10CTL1_L = 0x0742; +ADC10CTL1_H = 0x0743; +ADC10CTL2 = 0x0744; +ADC10CTL2_L = 0x0744; +ADC10CTL2_H = 0x0745; +ADC10LO = 0x0746; +ADC10LO_L = 0x0746; +ADC10LO_H = 0x0747; +ADC10HI = 0x0748; +ADC10HI_L = 0x0748; +ADC10HI_H = 0x0749; +ADC10MCTL0 = 0x074A; +ADC10MCTL0_L = 0x074A; +ADC10MCTL0_H = 0x074B; +ADC10MEM0 = 0x0752; +ADC10MEM0_L = 0x0752; +ADC10MEM0_H = 0x0753; +ADC10IE = 0x075A; +ADC10IE_L = 0x075A; +ADC10IE_H = 0x075B; +ADC10IFG = 0x075C; +ADC10IFG_L = 0x075C; +ADC10IFG_H = 0x075D; +ADC10IV = 0x075E; +ADC10IV_L = 0x075E; +ADC10IV_H = 0x075F; +/************************************************************ +* Comparator B +************************************************************/ +CBCTL0 = 0x08C0; +CBCTL0_L = 0x08C0; +CBCTL0_H = 0x08C1; +CBCTL1 = 0x08C2; +CBCTL1_L = 0x08C2; +CBCTL1_H = 0x08C3; +CBCTL2 = 0x08C4; +CBCTL2_L = 0x08C4; +CBCTL2_H = 0x08C5; +CBCTL3 = 0x08C6; +CBCTL3_L = 0x08C6; +CBCTL3_H = 0x08C7; +CBINT = 0x08CC; +CBINT_L = 0x08CC; +CBINT_H = 0x08CD; +CBIV = 0x08CE; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DMA_X +************************************************************/ +DMACTL0 = 0x0500; +DMACTL1 = 0x0502; +DMACTL2 = 0x0504; +DMACTL3 = 0x0506; +DMACTL4 = 0x0508; +DMAIV = 0x050E; +DMA0CTL = 0x0510; +DMA0SA = 0x0512; +DMA0SAL = 0x0512; +DMA0SAH = 0x0514; +DMA0DA = 0x0516; +DMA0DAL = 0x0516; +DMA0DAH = 0x0518; +DMA0SZ = 0x051A; +DMA1CTL = 0x0520; +DMA1SA = 0x0522; +DMA1SAL = 0x0522; +DMA1SAH = 0x0524; +DMA1DA = 0x0526; +DMA1DAL = 0x0526; +DMA1DAH = 0x0528; +DMA1SZ = 0x052A; +DMA2CTL = 0x0530; +DMA2SA = 0x0532; +DMA2SAL = 0x0532; +DMA2SAH = 0x0534; +DMA2DA = 0x0536; +DMA2DAL = 0x0536; +DMA2DAH = 0x0538; +DMA2SZ = 0x053A; +/************************************************************* +* Flash Memory +*************************************************************/ +FCTL1 = 0x0140; +FCTL1_L = 0x0140; +FCTL1_H = 0x0141; +FCTL3 = 0x0144; +FCTL3_L = 0x0144; +FCTL3_H = 0x0145; +FCTL4 = 0x0146; +FCTL4_L = 0x0146; +FCTL4_H = 0x0147; +/************************************************************ +* HARDWARE MULTIPLIER 32Bit +************************************************************/ +MPY = 0x04C0; +MPY_L = 0x04C0; +MPY_H = 0x04C1; +MPYS = 0x04C2; +MPYS_L = 0x04C2; +MPYS_H = 0x04C3; +MAC = 0x04C4; +MAC_L = 0x04C4; +MAC_H = 0x04C5; +MACS = 0x04C6; +MACS_L = 0x04C6; +MACS_H = 0x04C7; +OP2 = 0x04C8; +OP2_L = 0x04C8; +OP2_H = 0x04C9; +RESLO = 0x04CA; +RESLO_L = 0x04CA; +RESLO_H = 0x04CB; +RESHI = 0x04CC; +RESHI_L = 0x04CC; +RESHI_H = 0x04CD; +SUMEXT = 0x04CE; +SUMEXT_L = 0x04CE; +SUMEXT_H = 0x04CF; +MPY32L = 0x04D0; +MPY32L_L = 0x04D0; +MPY32L_H = 0x04D1; +MPY32H = 0x04D2; +MPY32H_L = 0x04D2; +MPY32H_H = 0x04D3; +MPYS32L = 0x04D4; +MPYS32L_L = 0x04D4; +MPYS32L_H = 0x04D5; +MPYS32H = 0x04D6; +MPYS32H_L = 0x04D6; +MPYS32H_H = 0x04D7; +MAC32L = 0x04D8; +MAC32L_L = 0x04D8; +MAC32L_H = 0x04D9; +MAC32H = 0x04DA; +MAC32H_L = 0x04DA; +MAC32H_H = 0x04DB; +MACS32L = 0x04DC; +MACS32L_L = 0x04DC; +MACS32L_H = 0x04DD; +MACS32H = 0x04DE; +MACS32H_L = 0x04DE; +MACS32H_H = 0x04DF; +OP2L = 0x04E0; +OP2L_L = 0x04E0; +OP2L_H = 0x04E1; +OP2H = 0x04E2; +OP2H_L = 0x04E2; +OP2H_H = 0x04E3; +RES0 = 0x04E4; +RES0_L = 0x04E4; +RES0_H = 0x04E5; +RES1 = 0x04E6; +RES1_L = 0x04E6; +RES1_H = 0x04E7; +RES2 = 0x04E8; +RES2_L = 0x04E8; +RES2_H = 0x04E9; +RES3 = 0x04EA; +RES3_L = 0x04EA; +RES3_H = 0x04EB; +MPY32CTL0 = 0x04EC; +MPY32CTL0_L = 0x04EC; +MPY32CTL0_H = 0x04ED; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL = 0x020A; +PASEL_L = 0x020A; +PASEL_H = 0x020B; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* DIGITAL I/O Port3 Pull up / Pull down Resistors +************************************************************/ +PBIN = 0x0220; +PBIN_L = 0x0220; +PBIN_H = 0x0221; +PBOUT = 0x0222; +PBOUT_L = 0x0222; +PBOUT_H = 0x0223; +PBDIR = 0x0224; +PBDIR_L = 0x0224; +PBDIR_H = 0x0225; +PBREN = 0x0226; +PBREN_L = 0x0226; +PBREN_H = 0x0227; +PBDS = 0x0228; +PBDS_L = 0x0228; +PBDS_H = 0x0229; +PBSEL = 0x022A; +PBSEL_L = 0x022A; +PBSEL_H = 0x022B; +/************************************************************ +* DIGITAL I/O PortJ Pull up / Pull down Resistors +************************************************************/ +PJIN = 0x0320; +PJIN_L = 0x0320; +PJIN_H = 0x0321; +PJOUT = 0x0322; +PJOUT_L = 0x0322; +PJOUT_H = 0x0323; +PJDIR = 0x0324; +PJDIR_L = 0x0324; +PJDIR_H = 0x0325; +PJREN = 0x0326; +PJREN_L = 0x0326; +PJREN_H = 0x0327; +PJDS = 0x0328; +PJDS_L = 0x0328; +PJDS_H = 0x0329; +PJSEL = 0x032A; +PJSEL_L = 0x032A; +PJSEL_H = 0x032B; +/************************************************************ +* PORT MAPPING CONTROLLER +************************************************************/ +PMAPKEYID = 0x01C0; +PMAPKEYID_L = 0x01C0; +PMAPKEYID_H = 0x01C1; +PMAPCTL = 0x01C2; +PMAPCTL_L = 0x01C2; +PMAPCTL_H = 0x01C3; +/************************************************************ +* PORT 1 MAPPING CONTROLLER +************************************************************/ +P1MAP01 = 0x01C8; +P1MAP01_L = 0x01C8; +P1MAP01_H = 0x01C9; +P1MAP23 = 0x01CA; +P1MAP23_L = 0x01CA; +P1MAP23_H = 0x01CB; +P1MAP45 = 0x01CC; +P1MAP45_L = 0x01CC; +P1MAP45_H = 0x01CD; +P1MAP67 = 0x01CE; +P1MAP67_L = 0x01CE; +P1MAP67_H = 0x01CF; +/************************************************************ +* PORT 2 MAPPING CONTROLLER +************************************************************/ +P2MAP01 = 0x01D0; +P2MAP01_L = 0x01D0; +P2MAP01_H = 0x01D1; +P2MAP23 = 0x01D2; +P2MAP23_L = 0x01D2; +P2MAP23_H = 0x01D3; +P2MAP45 = 0x01D4; +P2MAP45_L = 0x01D4; +P2MAP45_H = 0x01D5; +P2MAP67 = 0x01D6; +P2MAP67_L = 0x01D6; +P2MAP67_H = 0x01D7; +/************************************************************ +* PORT 3 MAPPING CONTROLLER +************************************************************/ +P3MAP01 = 0x01D8; +P3MAP01_L = 0x01D8; +P3MAP01_H = 0x01D9; +P3MAP23 = 0x01DA; +P3MAP23_L = 0x01DA; +P3MAP23_H = 0x01DB; +P3MAP45 = 0x01DC; +P3MAP45_L = 0x01DC; +P3MAP45_H = 0x01DD; +P3MAP67 = 0x01DE; +P3MAP67_L = 0x01DE; +P3MAP67_H = 0x01DF; +/************************************************************ +* PMM - Power Management System +************************************************************/ +PMMCTL0 = 0x0120; +PMMCTL0_L = 0x0120; +PMMCTL0_H = 0x0121; +PMMCTL1 = 0x0122; +PMMCTL1_L = 0x0122; +PMMCTL1_H = 0x0123; +SVSMHCTL = 0x0124; +SVSMHCTL_L = 0x0124; +SVSMHCTL_H = 0x0125; +SVSMLCTL = 0x0126; +SVSMLCTL_L = 0x0126; +SVSMLCTL_H = 0x0127; +SVSMIO = 0x0128; +SVSMIO_L = 0x0128; +SVSMIO_H = 0x0129; +PMMIFG = 0x012C; +PMMIFG_L = 0x012C; +PMMIFG_H = 0x012D; +PMMRIE = 0x012E; +PMMRIE_L = 0x012E; +PMMRIE_H = 0x012F; +PM5CTL0 = 0x0130; +PM5CTL0_L = 0x0130; +PM5CTL0_H = 0x0131; +/************************************************************* +* RAM Control Module +*************************************************************/ +RCCTL0 = 0x0158; +RCCTL0_L = 0x0158; +RCCTL0_H = 0x0159; +/************************************************************ +* Shared Reference +************************************************************/ +REFCTL0 = 0x01B0; +REFCTL0_L = 0x01B0; +REFCTL0_H = 0x01B1; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSBSLC = 0x0182; +SYSBSLC_L = 0x0182; +SYSBSLC_H = 0x0183; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x03C0; +TA0CCTL0 = 0x03C2; +TA0CCTL1 = 0x03C4; +TA0CCTL2 = 0x03C6; +TA0R = 0x03D0; +TA0CCR0 = 0x03D2; +TA0CCR1 = 0x03D4; +TA0CCR2 = 0x03D6; +TA0IV = 0x03EE; +TA0EX0 = 0x03E0; +/************************************************************ +* Timer0_D3 +************************************************************/ +TD0CTL0 = 0x0B00; +TD0CTL1 = 0x0B02; +TD0CTL2 = 0x0B04; +TD0R = 0x0B06; +TD0CCTL0 = 0x0B08; +TD0CCR0 = 0x0B0A; +TD0CL0 = 0x0B0C; +TD0CCTL1 = 0x0B0E; +TD0CCR1 = 0x0B10; +TD0CL1 = 0x0B12; +TD0CCTL2 = 0x0B14; +TD0CCR2 = 0x0B16; +TD0CL2 = 0x0B18; +TD0HCTL0 = 0x0B38; +TD0HCTL1 = 0x0B3A; +TD0HINT = 0x0B3C; +TD0IV = 0x0B3E; +/************************************************************ +* Timer1_D3 +************************************************************/ +TD1CTL0 = 0x0B40; +TD1CTL1 = 0x0B42; +TD1CTL2 = 0x0B44; +TD1R = 0x0B46; +TD1CCTL0 = 0x0B48; +TD1CCR0 = 0x0B4A; +TD1CL0 = 0x0B4C; +TD1CCTL1 = 0x0B4E; +TD1CCR1 = 0x0B50; +TD1CL1 = 0x0B52; +TD1CCTL2 = 0x0B54; +TD1CCR2 = 0x0B56; +TD1CL2 = 0x0B58; +TD1HCTL0 = 0x0B78; +TD1HCTL1 = 0x0B7A; +TD1HINT = 0x0B7C; +TD1IV = 0x0B7E; +/************************************************************ +* Timer Event Control 0 +************************************************************/ +TEC0XCTL0 = 0x0C00; +TEC0XCTL0_L = 0x0C00; +TEC0XCTL0_H = 0x0C01; +TEC0XCTL1 = 0x0C02; +TEC0XCTL1_L = 0x0C02; +TEC0XCTL1_H = 0x0C03; +TEC0XCTL2 = 0x0C04; +TEC0XCTL2_L = 0x0C04; +TEC0XCTL2_H = 0x0C05; +TEC0STA = 0x0C06; +TEC0STA_L = 0x0C06; +TEC0STA_H = 0x0C07; +TEC0XINT = 0x0C08; +TEC0XINT_L = 0x0C08; +TEC0XINT_H = 0x0C09; +TEC0IV = 0x0C0A; +TEC0IV_L = 0x0C0A; +TEC0IV_H = 0x0C0B; +/************************************************************ +* Timer Event Control 1 +************************************************************/ +TEC1XCTL0 = 0x0C20; +TEC1XCTL0_L = 0x0C20; +TEC1XCTL0_H = 0x0C21; +TEC1XCTL1 = 0x0C22; +TEC1XCTL1_L = 0x0C22; +TEC1XCTL1_H = 0x0C23; +TEC1XCTL2 = 0x0C24; +TEC1XCTL2_L = 0x0C24; +TEC1XCTL2_H = 0x0C25; +TEC1STA = 0x0C26; +TEC1STA_L = 0x0C26; +TEC1STA_H = 0x0C27; +TEC1XINT = 0x0C28; +TEC1XINT_L = 0x0C28; +TEC1XINT_H = 0x0C29; +TEC1IV = 0x0C2A; +TEC1IV_L = 0x0C2A; +TEC1IV_H = 0x0C2B; +/************************************************************ +* UNIFIED CLOCK SYSTEM +************************************************************/ +UCSCTL0 = 0x0160; +UCSCTL0_L = 0x0160; +UCSCTL0_H = 0x0161; +UCSCTL1 = 0x0162; +UCSCTL1_L = 0x0162; +UCSCTL1_H = 0x0163; +UCSCTL2 = 0x0164; +UCSCTL2_L = 0x0164; +UCSCTL2_H = 0x0165; +UCSCTL3 = 0x0166; +UCSCTL3_L = 0x0166; +UCSCTL3_H = 0x0167; +UCSCTL4 = 0x0168; +UCSCTL4_L = 0x0168; +UCSCTL4_H = 0x0169; +UCSCTL5 = 0x016A; +UCSCTL5_L = 0x016A; +UCSCTL5_H = 0x016B; +UCSCTL6 = 0x016C; +UCSCTL6_L = 0x016C; +UCSCTL6_H = 0x016D; +UCSCTL7 = 0x016E; +UCSCTL7_L = 0x016E; +UCSCTL7_H = 0x016F; +UCSCTL8 = 0x0170; +UCSCTL8_L = 0x0170; +UCSCTL8_H = 0x0171; +/************************************************************ +* USCI A0 +************************************************************/ +UCA0CTLW0 = 0x05C0; +UCA0CTLW0_L = 0x05C0; +UCA0CTLW0_H = 0x05C1; +UCA0BRW = 0x05C6; +UCA0BRW_L = 0x05C6; +UCA0BRW_H = 0x05C7; +UCA0MCTL = 0x05C8; +UCA0STAT = 0x05CA; +UCA0RXBUF = 0x05CC; +UCA0TXBUF = 0x05CE; +UCA0ABCTL = 0x05D0; +UCA0IRCTL = 0x05D2; +UCA0IRCTL_L = 0x05D2; +UCA0IRCTL_H = 0x05D3; +UCA0ICTL = 0x05DC; +UCA0ICTL_L = 0x05DC; +UCA0ICTL_H = 0x05DD; +UCA0IV = 0x05DE; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x05E0; +UCB0CTLW0_L = 0x05E0; +UCB0CTLW0_H = 0x05E1; +UCB0BRW = 0x05E6; +UCB0BRW_L = 0x05E6; +UCB0BRW_H = 0x05E7; +UCB0STAT = 0x05EA; +UCB0RXBUF = 0x05EC; +UCB0TXBUF = 0x05EE; +UCB0I2COA = 0x05F0; +UCB0I2COA_L = 0x05F0; +UCB0I2COA_H = 0x05F1; +UCB0I2CSA = 0x05F2; +UCB0I2CSA_L = 0x05F2; +UCB0I2CSA_H = 0x05F3; +UCB0ICTL = 0x05FC; +UCB0ICTL_L = 0x05FC; +UCB0ICTL_H = 0x05FD; +UCB0IV = 0x05FE; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* TLV Descriptors +************************************************************/ +/************************************************************ +* Interrupt Vectors (offset from 0xFF80) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/rf430frl152h.cmd b/msp430/rf430frl152h.cmd new file mode 100644 index 00000000..3574b631 --- /dev/null +++ b/msp430/rf430frl152h.cmd @@ -0,0 +1,328 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* rf430frl152h.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* COMPACT CLOCK SYSTEM +************************************************************/ +CCSCTL0 = 0x0160; +CCSCTL0_L = 0x0160; +CCSCTL0_H = 0x0161; +CCSCTL1 = 0x0162; +CCSCTL1_L = 0x0162; +CCSCTL1_H = 0x0163; +CCSCTL2 = 0x0164; +CCSCTL2_L = 0x0164; +CCSCTL2_H = 0x0165; +CCSCTL4 = 0x0168; +CCSCTL4_L = 0x0168; +CCSCTL4_H = 0x0169; +CCSCTL5 = 0x016A; +CCSCTL5_L = 0x016A; +CCSCTL5_H = 0x016B; +CCSCTL6 = 0x016C; +CCSCTL6_L = 0x016C; +CCSCTL6_H = 0x016D; +CCSCTL7 = 0x016E; +CCSCTL7_L = 0x016E; +CCSCTL7_H = 0x016F; +CCSCTL8 = 0x0170; +CCSCTL8_L = 0x0170; +CCSCTL8_H = 0x0171; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* RF13M (13MHz NFC communication module) +************************************************************/ +RF13MCTL = 0x0800; +RF13MCTL_L = 0x0800; +RF13MCTL_H = 0x0801; +RF13MINT = 0x0802; +RF13MINT_L = 0x0802; +RF13MINT_H = 0x0803; +RF13MIV = 0x0804; +RF13MIV_L = 0x0804; +RF13MIV_H = 0x0805; +RF13MRXF = 0x0806; +RF13MRXF_L = 0x0806; +RF13MRXF_H = 0x0807; +RF13MTXF = 0x0808; +RF13MTXF_L = 0x0808; +RF13MTXF_H = 0x0809; +RF13MCRC = 0x080A; +RF13MCRC_L = 0x080A; +RF13MCRC_H = 0x080B; +RF13MFIFOFL = 0x080C; +RF13MFIFOFL_L = 0x080C; +RF13MFIFOFL_H = 0x080D; +RF13MWMCFG = 0x080E; +RF13MWMCFG_L = 0x080E; +RF13MWMCFG_H = 0x080F; +RF13MRXBUF = 0x0820; +RF13MRXBUF_L = 0x0820; +RF13MRXBUF_H = 0x0821; +RF13MTXBUF = 0x0840; +RF13MTXBUF_L = 0x0840; +RF13MTXBUF_H = 0x0841; +/************************************************************ +* SD14 (14 Bit sigma delta ADC) +************************************************************/ +SD14CTL0 = 0x0700; +SD14CTL0_L = 0x0700; +SD14CTL0_H = 0x0701; +SD14CTL1 = 0x0702; +SD14CTL1_L = 0x0702; +SD14CTL1_H = 0x0703; +SD14MEM0 = 0x0704; +SD14MEM0_L = 0x0704; +SD14MEM0_H = 0x0705; +SD14MEM1 = 0x0706; +SD14MEM1_L = 0x0706; +SD14MEM1_H = 0x0707; +SD14MEM2 = 0x0708; +SD14MEM2_L = 0x0708; +SD14MEM2_H = 0x0709; +SD14MEM3 = 0x070A; +SD14MEM3_L = 0x070A; +SD14MEM3_H = 0x070B; +SD14IV = 0x070C; +SD14IV_L = 0x070C; +SD14IV_H = 0x070D; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* COMPACT SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSCNF = 0x0190; +SYSCNF_L = 0x0190; +SYSCNF_H = 0x0191; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* PMM_RF - Power Management System of RF +************************************************************/ +RFPMMCTL0 = 0x0120; +RFPMMCTL0_L = 0x0120; +RFPMMCTL0_H = 0x0121; +RFPMMCTL1 = 0x0122; +RFPMMCTL1_L = 0x0122; +RFPMMCTL1_H = 0x0123; +RFMMIE = 0x0124; +RFMMIE_L = 0x0124; +RFMMIE_H = 0x0125; +RFPMMIFG = 0x0126; +RFPMMIFG_L = 0x0126; +RFPMMIFG_H = 0x0127; +RFPMMIV = 0x0128; +RFPMMIV_L = 0x0128; +RFPMMIV_H = 0x0129; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFFFF - 0x20) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/rf430frl152h_rom.cmd b/msp430/rf430frl152h_rom.cmd new file mode 100644 index 00000000..7df287ac --- /dev/null +++ b/msp430/rf430frl152h_rom.cmd @@ -0,0 +1,328 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* rf430frl152h_rom.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* COMPACT CLOCK SYSTEM +************************************************************/ +CCSCTL0 = 0x0160; +CCSCTL0_L = 0x0160; +CCSCTL0_H = 0x0161; +CCSCTL1 = 0x0162; +CCSCTL1_L = 0x0162; +CCSCTL1_H = 0x0163; +CCSCTL2 = 0x0164; +CCSCTL2_L = 0x0164; +CCSCTL2_H = 0x0165; +CCSCTL4 = 0x0168; +CCSCTL4_L = 0x0168; +CCSCTL4_H = 0x0169; +CCSCTL5 = 0x016A; +CCSCTL5_L = 0x016A; +CCSCTL5_H = 0x016B; +CCSCTL6 = 0x016C; +CCSCTL6_L = 0x016C; +CCSCTL6_H = 0x016D; +CCSCTL7 = 0x016E; +CCSCTL7_L = 0x016E; +CCSCTL7_H = 0x016F; +CCSCTL8 = 0x0170; +CCSCTL8_L = 0x0170; +CCSCTL8_H = 0x0171; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* RF13M (13MHz NFC communication module) +************************************************************/ +RF13MCTL = 0x0800; +RF13MCTL_L = 0x0800; +RF13MCTL_H = 0x0801; +RF13MINT = 0x0802; +RF13MINT_L = 0x0802; +RF13MINT_H = 0x0803; +RF13MIV = 0x0804; +RF13MIV_L = 0x0804; +RF13MIV_H = 0x0805; +RF13MRXF = 0x0806; +RF13MRXF_L = 0x0806; +RF13MRXF_H = 0x0807; +RF13MTXF = 0x0808; +RF13MTXF_L = 0x0808; +RF13MTXF_H = 0x0809; +RF13MCRC = 0x080A; +RF13MCRC_L = 0x080A; +RF13MCRC_H = 0x080B; +RF13MFIFOFL = 0x080C; +RF13MFIFOFL_L = 0x080C; +RF13MFIFOFL_H = 0x080D; +RF13MWMCFG = 0x080E; +RF13MWMCFG_L = 0x080E; +RF13MWMCFG_H = 0x080F; +RF13MRXBUF = 0x0820; +RF13MRXBUF_L = 0x0820; +RF13MRXBUF_H = 0x0821; +RF13MTXBUF = 0x0840; +RF13MTXBUF_L = 0x0840; +RF13MTXBUF_H = 0x0841; +/************************************************************ +* SD14 (14 Bit sigma delta ADC) +************************************************************/ +SD14CTL0 = 0x0700; +SD14CTL0_L = 0x0700; +SD14CTL0_H = 0x0701; +SD14CTL1 = 0x0702; +SD14CTL1_L = 0x0702; +SD14CTL1_H = 0x0703; +SD14MEM0 = 0x0704; +SD14MEM0_L = 0x0704; +SD14MEM0_H = 0x0705; +SD14MEM1 = 0x0706; +SD14MEM1_L = 0x0706; +SD14MEM1_H = 0x0707; +SD14MEM2 = 0x0708; +SD14MEM2_L = 0x0708; +SD14MEM2_H = 0x0709; +SD14MEM3 = 0x070A; +SD14MEM3_L = 0x070A; +SD14MEM3_H = 0x070B; +SD14IV = 0x070C; +SD14IV_L = 0x070C; +SD14IV_H = 0x070D; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* COMPACT SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSCNF = 0x0190; +SYSCNF_L = 0x0190; +SYSCNF_H = 0x0191; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* PMM_RF - Power Management System of RF +************************************************************/ +RFPMMCTL0 = 0x0120; +RFPMMCTL0_L = 0x0120; +RFPMMCTL0_H = 0x0121; +RFPMMCTL1 = 0x0122; +RFPMMCTL1_L = 0x0122; +RFPMMCTL1_H = 0x0123; +RFMMIE = 0x0124; +RFMMIE_L = 0x0124; +RFMMIE_H = 0x0125; +RFPMMIFG = 0x0126; +RFPMMIFG_L = 0x0126; +RFPMMIFG_H = 0x0127; +RFPMMIV = 0x0128; +RFPMMIV_L = 0x0128; +RFPMMIV_H = 0x0129; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFFFF - 0x20) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/rf430frl153h.cmd b/msp430/rf430frl153h.cmd new file mode 100644 index 00000000..9aa74921 --- /dev/null +++ b/msp430/rf430frl153h.cmd @@ -0,0 +1,276 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* rf430frl153h.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* COMPACT CLOCK SYSTEM +************************************************************/ +CCSCTL0 = 0x0160; +CCSCTL0_L = 0x0160; +CCSCTL0_H = 0x0161; +CCSCTL1 = 0x0162; +CCSCTL1_L = 0x0162; +CCSCTL1_H = 0x0163; +CCSCTL2 = 0x0164; +CCSCTL2_L = 0x0164; +CCSCTL2_H = 0x0165; +CCSCTL4 = 0x0168; +CCSCTL4_L = 0x0168; +CCSCTL4_H = 0x0169; +CCSCTL5 = 0x016A; +CCSCTL5_L = 0x016A; +CCSCTL5_H = 0x016B; +CCSCTL6 = 0x016C; +CCSCTL6_L = 0x016C; +CCSCTL6_H = 0x016D; +CCSCTL7 = 0x016E; +CCSCTL7_L = 0x016E; +CCSCTL7_H = 0x016F; +CCSCTL8 = 0x0170; +CCSCTL8_L = 0x0170; +CCSCTL8_H = 0x0171; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* RF13M (13MHz NFC communication module) +************************************************************/ +RF13MCTL = 0x0800; +RF13MCTL_L = 0x0800; +RF13MCTL_H = 0x0801; +RF13MINT = 0x0802; +RF13MINT_L = 0x0802; +RF13MINT_H = 0x0803; +RF13MIV = 0x0804; +RF13MIV_L = 0x0804; +RF13MIV_H = 0x0805; +RF13MRXF = 0x0806; +RF13MRXF_L = 0x0806; +RF13MRXF_H = 0x0807; +RF13MTXF = 0x0808; +RF13MTXF_L = 0x0808; +RF13MTXF_H = 0x0809; +RF13MCRC = 0x080A; +RF13MCRC_L = 0x080A; +RF13MCRC_H = 0x080B; +RF13MFIFOFL = 0x080C; +RF13MFIFOFL_L = 0x080C; +RF13MFIFOFL_H = 0x080D; +RF13MWMCFG = 0x080E; +RF13MWMCFG_L = 0x080E; +RF13MWMCFG_H = 0x080F; +RF13MRXBUF = 0x0820; +RF13MRXBUF_L = 0x0820; +RF13MRXBUF_H = 0x0821; +RF13MTXBUF = 0x0840; +RF13MTXBUF_L = 0x0840; +RF13MTXBUF_H = 0x0841; +/************************************************************ +* SD14 (14 Bit sigma delta ADC) +************************************************************/ +SD14CTL0 = 0x0700; +SD14CTL0_L = 0x0700; +SD14CTL0_H = 0x0701; +SD14CTL1 = 0x0702; +SD14CTL1_L = 0x0702; +SD14CTL1_H = 0x0703; +SD14MEM0 = 0x0704; +SD14MEM0_L = 0x0704; +SD14MEM0_H = 0x0705; +SD14MEM1 = 0x0706; +SD14MEM1_L = 0x0706; +SD14MEM1_H = 0x0707; +SD14MEM2 = 0x0708; +SD14MEM2_L = 0x0708; +SD14MEM2_H = 0x0709; +SD14MEM3 = 0x070A; +SD14MEM3_L = 0x070A; +SD14MEM3_H = 0x070B; +SD14IV = 0x070C; +SD14IV_L = 0x070C; +SD14IV_H = 0x070D; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* COMPACT SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSCNF = 0x0190; +SYSCNF_L = 0x0190; +SYSCNF_H = 0x0191; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* PMM_RF - Power Management System of RF +************************************************************/ +RFPMMCTL0 = 0x0120; +RFPMMCTL0_L = 0x0120; +RFPMMCTL0_H = 0x0121; +RFPMMCTL1 = 0x0122; +RFPMMCTL1_L = 0x0122; +RFPMMCTL1_H = 0x0123; +RFMMIE = 0x0124; +RFMMIE_L = 0x0124; +RFMMIE_H = 0x0125; +RFPMMIFG = 0x0126; +RFPMMIFG_L = 0x0126; +RFPMMIFG_H = 0x0127; +RFPMMIV = 0x0128; +RFPMMIV_L = 0x0128; +RFPMMIV_H = 0x0129; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFFFF - 0x20) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/rf430frl153h_rom.cmd b/msp430/rf430frl153h_rom.cmd new file mode 100644 index 00000000..d82880bb --- /dev/null +++ b/msp430/rf430frl153h_rom.cmd @@ -0,0 +1,276 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* rf430frl153h_rom.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* COMPACT CLOCK SYSTEM +************************************************************/ +CCSCTL0 = 0x0160; +CCSCTL0_L = 0x0160; +CCSCTL0_H = 0x0161; +CCSCTL1 = 0x0162; +CCSCTL1_L = 0x0162; +CCSCTL1_H = 0x0163; +CCSCTL2 = 0x0164; +CCSCTL2_L = 0x0164; +CCSCTL2_H = 0x0165; +CCSCTL4 = 0x0168; +CCSCTL4_L = 0x0168; +CCSCTL4_H = 0x0169; +CCSCTL5 = 0x016A; +CCSCTL5_L = 0x016A; +CCSCTL5_H = 0x016B; +CCSCTL6 = 0x016C; +CCSCTL6_L = 0x016C; +CCSCTL6_H = 0x016D; +CCSCTL7 = 0x016E; +CCSCTL7_L = 0x016E; +CCSCTL7_H = 0x016F; +CCSCTL8 = 0x0170; +CCSCTL8_L = 0x0170; +CCSCTL8_H = 0x0171; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* RF13M (13MHz NFC communication module) +************************************************************/ +RF13MCTL = 0x0800; +RF13MCTL_L = 0x0800; +RF13MCTL_H = 0x0801; +RF13MINT = 0x0802; +RF13MINT_L = 0x0802; +RF13MINT_H = 0x0803; +RF13MIV = 0x0804; +RF13MIV_L = 0x0804; +RF13MIV_H = 0x0805; +RF13MRXF = 0x0806; +RF13MRXF_L = 0x0806; +RF13MRXF_H = 0x0807; +RF13MTXF = 0x0808; +RF13MTXF_L = 0x0808; +RF13MTXF_H = 0x0809; +RF13MCRC = 0x080A; +RF13MCRC_L = 0x080A; +RF13MCRC_H = 0x080B; +RF13MFIFOFL = 0x080C; +RF13MFIFOFL_L = 0x080C; +RF13MFIFOFL_H = 0x080D; +RF13MWMCFG = 0x080E; +RF13MWMCFG_L = 0x080E; +RF13MWMCFG_H = 0x080F; +RF13MRXBUF = 0x0820; +RF13MRXBUF_L = 0x0820; +RF13MRXBUF_H = 0x0821; +RF13MTXBUF = 0x0840; +RF13MTXBUF_L = 0x0840; +RF13MTXBUF_H = 0x0841; +/************************************************************ +* SD14 (14 Bit sigma delta ADC) +************************************************************/ +SD14CTL0 = 0x0700; +SD14CTL0_L = 0x0700; +SD14CTL0_H = 0x0701; +SD14CTL1 = 0x0702; +SD14CTL1_L = 0x0702; +SD14CTL1_H = 0x0703; +SD14MEM0 = 0x0704; +SD14MEM0_L = 0x0704; +SD14MEM0_H = 0x0705; +SD14MEM1 = 0x0706; +SD14MEM1_L = 0x0706; +SD14MEM1_H = 0x0707; +SD14MEM2 = 0x0708; +SD14MEM2_L = 0x0708; +SD14MEM2_H = 0x0709; +SD14MEM3 = 0x070A; +SD14MEM3_L = 0x070A; +SD14MEM3_H = 0x070B; +SD14IV = 0x070C; +SD14IV_L = 0x070C; +SD14IV_H = 0x070D; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* COMPACT SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSCNF = 0x0190; +SYSCNF_L = 0x0190; +SYSCNF_H = 0x0191; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* PMM_RF - Power Management System of RF +************************************************************/ +RFPMMCTL0 = 0x0120; +RFPMMCTL0_L = 0x0120; +RFPMMCTL0_H = 0x0121; +RFPMMCTL1 = 0x0122; +RFPMMCTL1_L = 0x0122; +RFPMMCTL1_H = 0x0123; +RFMMIE = 0x0124; +RFMMIE_L = 0x0124; +RFMMIE_H = 0x0125; +RFPMMIFG = 0x0126; +RFPMMIFG_L = 0x0126; +RFPMMIFG_H = 0x0127; +RFPMMIV = 0x0128; +RFPMMIV_L = 0x0128; +RFPMMIV_H = 0x0129; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFFFF - 0x20) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/rf430frl154h.cmd b/msp430/rf430frl154h.cmd new file mode 100644 index 00000000..5611df76 --- /dev/null +++ b/msp430/rf430frl154h.cmd @@ -0,0 +1,304 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* rf430frl154h.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* COMPACT CLOCK SYSTEM +************************************************************/ +CCSCTL0 = 0x0160; +CCSCTL0_L = 0x0160; +CCSCTL0_H = 0x0161; +CCSCTL1 = 0x0162; +CCSCTL1_L = 0x0162; +CCSCTL1_H = 0x0163; +CCSCTL2 = 0x0164; +CCSCTL2_L = 0x0164; +CCSCTL2_H = 0x0165; +CCSCTL4 = 0x0168; +CCSCTL4_L = 0x0168; +CCSCTL4_H = 0x0169; +CCSCTL5 = 0x016A; +CCSCTL5_L = 0x016A; +CCSCTL5_H = 0x016B; +CCSCTL6 = 0x016C; +CCSCTL6_L = 0x016C; +CCSCTL6_H = 0x016D; +CCSCTL7 = 0x016E; +CCSCTL7_L = 0x016E; +CCSCTL7_H = 0x016F; +CCSCTL8 = 0x0170; +CCSCTL8_L = 0x0170; +CCSCTL8_H = 0x0171; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* RF13M (13MHz NFC communication module) +************************************************************/ +RF13MCTL = 0x0800; +RF13MCTL_L = 0x0800; +RF13MCTL_H = 0x0801; +RF13MINT = 0x0802; +RF13MINT_L = 0x0802; +RF13MINT_H = 0x0803; +RF13MIV = 0x0804; +RF13MIV_L = 0x0804; +RF13MIV_H = 0x0805; +RF13MRXF = 0x0806; +RF13MRXF_L = 0x0806; +RF13MRXF_H = 0x0807; +RF13MTXF = 0x0808; +RF13MTXF_L = 0x0808; +RF13MTXF_H = 0x0809; +RF13MCRC = 0x080A; +RF13MCRC_L = 0x080A; +RF13MCRC_H = 0x080B; +RF13MFIFOFL = 0x080C; +RF13MFIFOFL_L = 0x080C; +RF13MFIFOFL_H = 0x080D; +RF13MWMCFG = 0x080E; +RF13MWMCFG_L = 0x080E; +RF13MWMCFG_H = 0x080F; +RF13MRXBUF = 0x0820; +RF13MRXBUF_L = 0x0820; +RF13MRXBUF_H = 0x0821; +RF13MTXBUF = 0x0840; +RF13MTXBUF_L = 0x0840; +RF13MTXBUF_H = 0x0841; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* COMPACT SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSCNF = 0x0190; +SYSCNF_L = 0x0190; +SYSCNF_H = 0x0191; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* PMM_RF - Power Management System of RF +************************************************************/ +RFPMMCTL0 = 0x0120; +RFPMMCTL0_L = 0x0120; +RFPMMCTL0_H = 0x0121; +RFPMMCTL1 = 0x0122; +RFPMMCTL1_L = 0x0122; +RFPMMCTL1_H = 0x0123; +RFMMIE = 0x0124; +RFMMIE_L = 0x0124; +RFMMIE_H = 0x0125; +RFPMMIFG = 0x0126; +RFPMMIFG_L = 0x0126; +RFPMMIFG_H = 0x0127; +RFPMMIV = 0x0128; +RFPMMIV_L = 0x0128; +RFPMMIV_H = 0x0129; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFFFF - 0x20) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/msp430/rf430frl154h_rom.cmd b/msp430/rf430frl154h_rom.cmd new file mode 100644 index 00000000..32ca9af6 --- /dev/null +++ b/msp430/rf430frl154h_rom.cmd @@ -0,0 +1,304 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* rf430frl154h_rom.cmd */ +/* - Linker Command File for defintions in the header file */ +/* Please do not change ! */ +/* */ +/******************************************************************************/ +/* Version: 1.213 */ +/******************************************************************************/ + + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* COMPACT CLOCK SYSTEM +************************************************************/ +CCSCTL0 = 0x0160; +CCSCTL0_L = 0x0160; +CCSCTL0_H = 0x0161; +CCSCTL1 = 0x0162; +CCSCTL1_L = 0x0162; +CCSCTL1_H = 0x0163; +CCSCTL2 = 0x0164; +CCSCTL2_L = 0x0164; +CCSCTL2_H = 0x0165; +CCSCTL4 = 0x0168; +CCSCTL4_L = 0x0168; +CCSCTL4_H = 0x0169; +CCSCTL5 = 0x016A; +CCSCTL5_L = 0x016A; +CCSCTL5_H = 0x016B; +CCSCTL6 = 0x016C; +CCSCTL6_L = 0x016C; +CCSCTL6_H = 0x016D; +CCSCTL7 = 0x016E; +CCSCTL7_L = 0x016E; +CCSCTL7_H = 0x016F; +CCSCTL8 = 0x0170; +CCSCTL8_L = 0x0170; +CCSCTL8_H = 0x0171; +/************************************************************* +* CRC Module +*************************************************************/ +CRCDI = 0x0150; +CRCDI_L = 0x0150; +CRCDI_H = 0x0151; +CRCDIRB = 0x0152; +CRCDIRB_L = 0x0152; +CRCDIRB_H = 0x0153; +CRCINIRES = 0x0154; +CRCINIRES_L = 0x0154; +CRCINIRES_H = 0x0155; +CRCRESR = 0x0156; +CRCRESR_L = 0x0156; +CRCRESR_H = 0x0157; +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PAIN = 0x0200; +PAIN_L = 0x0200; +PAIN_H = 0x0201; +PAOUT = 0x0202; +PAOUT_L = 0x0202; +PAOUT_H = 0x0203; +PADIR = 0x0204; +PADIR_L = 0x0204; +PADIR_H = 0x0205; +PAREN = 0x0206; +PAREN_L = 0x0206; +PAREN_H = 0x0207; +PADS = 0x0208; +PADS_L = 0x0208; +PADS_H = 0x0209; +PASEL0 = 0x020A; +PASEL0_L = 0x020A; +PASEL0_H = 0x020B; +PASEL1 = 0x020C; +PASEL1_L = 0x020C; +PASEL1_H = 0x020D; +PAIES = 0x0218; +PAIES_L = 0x0218; +PAIES_H = 0x0219; +PAIE = 0x021A; +PAIE_L = 0x021A; +PAIE_H = 0x021B; +PAIFG = 0x021C; +PAIFG_L = 0x021C; +PAIFG_H = 0x021D; +P1IV = 0x020E; +P2IV = 0x021E; +/************************************************************ +* RF13M (13MHz NFC communication module) +************************************************************/ +RF13MCTL = 0x0800; +RF13MCTL_L = 0x0800; +RF13MCTL_H = 0x0801; +RF13MINT = 0x0802; +RF13MINT_L = 0x0802; +RF13MINT_H = 0x0803; +RF13MIV = 0x0804; +RF13MIV_L = 0x0804; +RF13MIV_H = 0x0805; +RF13MRXF = 0x0806; +RF13MRXF_L = 0x0806; +RF13MRXF_H = 0x0807; +RF13MTXF = 0x0808; +RF13MTXF_L = 0x0808; +RF13MTXF_H = 0x0809; +RF13MCRC = 0x080A; +RF13MCRC_L = 0x080A; +RF13MCRC_H = 0x080B; +RF13MFIFOFL = 0x080C; +RF13MFIFOFL_L = 0x080C; +RF13MFIFOFL_H = 0x080D; +RF13MWMCFG = 0x080E; +RF13MWMCFG_L = 0x080E; +RF13MWMCFG_H = 0x080F; +RF13MRXBUF = 0x0820; +RF13MRXBUF_L = 0x0820; +RF13MRXBUF_H = 0x0821; +RF13MTXBUF = 0x0840; +RF13MTXBUF_L = 0x0840; +RF13MTXBUF_H = 0x0841; +/************************************************************ +* USCI B0 +************************************************************/ +UCB0CTLW0 = 0x0640; +UCB0CTLW0_L = 0x0640; +UCB0CTLW0_H = 0x0641; +UCB0CTLW1 = 0x0642; +UCB0CTLW1_L = 0x0642; +UCB0CTLW1_H = 0x0643; +UCB0BRW = 0x0646; +UCB0BRW_L = 0x0646; +UCB0BRW_H = 0x0647; +UCB0STATW = 0x0648; +UCB0STATW_L = 0x0648; +UCB0STATW_H = 0x0649; +UCB0TBCNT = 0x064A; +UCB0TBCNT_L = 0x064A; +UCB0TBCNT_H = 0x064B; +UCB0RXBUF = 0x064C; +UCB0RXBUF_L = 0x064C; +UCB0RXBUF_H = 0x064D; +UCB0TXBUF = 0x064E; +UCB0TXBUF_L = 0x064E; +UCB0TXBUF_H = 0x064F; +UCB0I2COA0 = 0x0654; +UCB0I2COA0_L = 0x0654; +UCB0I2COA0_H = 0x0655; +UCB0I2COA1 = 0x0656; +UCB0I2COA1_L = 0x0656; +UCB0I2COA1_H = 0x0657; +UCB0I2COA2 = 0x0658; +UCB0I2COA2_L = 0x0658; +UCB0I2COA2_H = 0x0659; +UCB0I2COA3 = 0x065A; +UCB0I2COA3_L = 0x065A; +UCB0I2COA3_H = 0x065B; +UCB0ADDRX = 0x065C; +UCB0ADDRX_L = 0x065C; +UCB0ADDRX_H = 0x065D; +UCB0ADDMASK = 0x065E; +UCB0ADDMASK_L = 0x065E; +UCB0ADDMASK_H = 0x065F; +UCB0I2CSA = 0x0660; +UCB0I2CSA_L = 0x0660; +UCB0I2CSA_H = 0x0661; +UCB0IE = 0x066A; +UCB0IE_L = 0x066A; +UCB0IE_H = 0x066B; +UCB0IFG = 0x066C; +UCB0IFG_L = 0x066C; +UCB0IFG_H = 0x066D; +UCB0IV = 0x066E; +/************************************************************ +* SFR - Special Function Register Module +************************************************************/ +SFRIE1 = 0x0100; +SFRIE1_L = 0x0100; +SFRIE1_H = 0x0101; +SFRIFG1 = 0x0102; +SFRIFG1_L = 0x0102; +SFRIFG1_H = 0x0103; +SFRRPCR = 0x0104; +SFRRPCR_L = 0x0104; +SFRRPCR_H = 0x0105; +/************************************************************ +* COMPACT SYS - System Module +************************************************************/ +SYSCTL = 0x0180; +SYSCTL_L = 0x0180; +SYSCTL_H = 0x0181; +SYSJMBC = 0x0186; +SYSJMBC_L = 0x0186; +SYSJMBC_H = 0x0187; +SYSJMBI0 = 0x0188; +SYSJMBI0_L = 0x0188; +SYSJMBI0_H = 0x0189; +SYSJMBI1 = 0x018A; +SYSJMBI1_L = 0x018A; +SYSJMBI1_H = 0x018B; +SYSJMBO0 = 0x018C; +SYSJMBO0_L = 0x018C; +SYSJMBO0_H = 0x018D; +SYSJMBO1 = 0x018E; +SYSJMBO1_L = 0x018E; +SYSJMBO1_H = 0x018F; +SYSCNF = 0x0190; +SYSCNF_L = 0x0190; +SYSCNF_H = 0x0191; +SYSBERRIV = 0x0198; +SYSBERRIV_L = 0x0198; +SYSBERRIV_H = 0x0199; +SYSUNIV = 0x019A; +SYSUNIV_L = 0x019A; +SYSUNIV_H = 0x019B; +SYSSNIV = 0x019C; +SYSSNIV_L = 0x019C; +SYSSNIV_H = 0x019D; +SYSRSTIV = 0x019E; +SYSRSTIV_L = 0x019E; +SYSRSTIV_H = 0x019F; +/************************************************************ +* PMM_RF - Power Management System of RF +************************************************************/ +RFPMMCTL0 = 0x0120; +RFPMMCTL0_L = 0x0120; +RFPMMCTL0_H = 0x0121; +RFPMMCTL1 = 0x0122; +RFPMMCTL1_L = 0x0122; +RFPMMCTL1_H = 0x0123; +RFMMIE = 0x0124; +RFMMIE_L = 0x0124; +RFMMIE_H = 0x0125; +RFPMMIFG = 0x0126; +RFPMMIFG_L = 0x0126; +RFPMMIFG_H = 0x0127; +RFPMMIV = 0x0128; +RFPMMIV_L = 0x0128; +RFPMMIV_H = 0x0129; +/************************************************************ +* Timer0_A3 +************************************************************/ +TA0CTL = 0x0340; +TA0CCTL0 = 0x0342; +TA0CCTL1 = 0x0344; +TA0CCTL2 = 0x0346; +TA0R = 0x0350; +TA0CCR0 = 0x0352; +TA0CCR1 = 0x0354; +TA0CCR2 = 0x0356; +TA0IV = 0x036E; +TA0EX0 = 0x0360; +/************************************************************ +* WATCHDOG TIMER A +************************************************************/ +WDTCTL = 0x015C; +WDTCTL_L = 0x015C; +WDTCTL_H = 0x015D; +/************************************************************ +* Interrupt Vectors (offset from 0xFFFF - 0x20) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/targetdb/timestamp b/targetdb/timestamp index 62f16042..94c3e81d 100644 --- a/targetdb/timestamp +++ b/targetdb/timestamp @@ -1 +1 @@ -20250510062515 +20250510071710